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nicolasvasilache (Nicolas Vasilache)
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User Since
Feb 2 2017, 2:24 AM (190 w, 18 h)

Recent Activity

Tue, Sep 22

nicolasvasilache added a comment to D88080: [MLIR][Linalg] Fix assertion in dependency analysis.

What does it mean for a linalg op to take unranked memref?
In particular, a linalg op has indexing_maps. of fixed rank.
How would that work with unranked stuff ?

Tue, Sep 22, 3:21 AM · Restricted Project
nicolasvasilache committed rGed229132f1c4: [mlir][Linalg] Uniformize linalg.generic with named ops. (authored by nicolasvasilache).
[mlir][Linalg] Uniformize linalg.generic with named ops.
Tue, Sep 22, 1:15 AM
nicolasvasilache committed rG0304c6da1006: [MLIR] Add subf and rsqrt EDSC intrinsics (authored by ezhulenev).
[MLIR] Add subf and rsqrt EDSC intrinsics
Tue, Sep 22, 1:15 AM
nicolasvasilache closed D88039: [MLIR] Add subf and rsqrt EDSC intrinsics.
Tue, Sep 22, 1:14 AM · Restricted Project

Mon, Sep 21

nicolasvasilache updated the diff for D87938: [mlir][Linalg] Uniformize linalg.generic with named ops..

Address review comments.

Mon, Sep 21, 12:31 PM · Restricted Project
nicolasvasilache accepted D88039: [MLIR] Add subf and rsqrt EDSC intrinsics.
Mon, Sep 21, 12:28 PM · Restricted Project
nicolasvasilache added inline comments to D87938: [mlir][Linalg] Uniformize linalg.generic with named ops..
Mon, Sep 21, 12:27 PM · Restricted Project
nicolasvasilache updated the diff for D87938: [mlir][Linalg] Uniformize linalg.generic with named ops..

Additional changes and builders.

Mon, Sep 21, 8:39 AM · Restricted Project
nicolasvasilache added inline comments to D87938: [mlir][Linalg] Uniformize linalg.generic with named ops..
Mon, Sep 21, 8:36 AM · Restricted Project
nicolasvasilache accepted D88010: [mlir][VectorOps] Loosen restrictions on vector.reduction types.
Mon, Sep 21, 3:12 AM · Restricted Project
nicolasvasilache added inline comments to D87938: [mlir][Linalg] Uniformize linalg.generic with named ops..
Mon, Sep 21, 12:09 AM · Restricted Project

Fri, Sep 18

nicolasvasilache requested review of D87938: [mlir][Linalg] Uniformize linalg.generic with named ops..
Fri, Sep 18, 1:22 PM · Restricted Project
nicolasvasilache accepted D87781: Reorder linalg.conv indexing_maps loop order.
Fri, Sep 18, 8:37 AM · Restricted Project
nicolasvasilache added a comment to D87781: Reorder linalg.conv indexing_maps loop order.

Thanks for discussing, some comments.

Fri, Sep 18, 8:36 AM · Restricted Project
nicolasvasilache requested changes to D87781: Reorder linalg.conv indexing_maps loop order.

Putting a blocker to get some discussion here.

Fri, Sep 18, 7:01 AM · Restricted Project
nicolasvasilache committed rG93fd30bac334: [mlir][Linalg] Evolve named ops to use assembly form and support linalg on… (authored by nicolasvasilache).
[mlir][Linalg] Evolve named ops to use assembly form and support linalg on…
Fri, Sep 18, 3:18 AM
nicolasvasilache updated the diff for D87767: [mlir][Linalg] Evolve named ops to use assembly form and support linalg on tensors..

Drop extra dialect name form printing.

Fri, Sep 18, 3:14 AM · Restricted Project
nicolasvasilache updated the diff for D87767: [mlir][Linalg] Evolve named ops to use assembly form and support linalg on tensors..

DCE

Fri, Sep 18, 3:03 AM · Restricted Project
nicolasvasilache updated the diff for D87767: [mlir][Linalg] Evolve named ops to use assembly form and support linalg on tensors..

Spin a custom parser as declarative assembly extension is blocked for now.

Fri, Sep 18, 2:59 AM · Restricted Project

Thu, Sep 17

nicolasvasilache updated the diff for D87776: [mlir][ODS] Add TypeRef directive in Declarative Assembly Format to allow custom UserDirective parser to receive previously parsed types..

Update

Thu, Sep 17, 11:51 PM · Restricted Project
nicolasvasilache added inline comments to D87776: [mlir][ODS] Add TypeRef directive in Declarative Assembly Format to allow custom UserDirective parser to receive previously parsed types..
Thu, Sep 17, 12:48 PM · Restricted Project
nicolasvasilache updated the diff for D87767: [mlir][Linalg] Evolve named ops to use assembly form and support linalg on tensors..

InsertionGuard.

Thu, Sep 17, 12:18 PM · Restricted Project
nicolasvasilache added inline comments to D87767: [mlir][Linalg] Evolve named ops to use assembly form and support linalg on tensors..
Thu, Sep 17, 12:13 PM · Restricted Project
nicolasvasilache added inline comments to D87767: [mlir][Linalg] Evolve named ops to use assembly form and support linalg on tensors..
Thu, Sep 17, 12:07 PM · Restricted Project
nicolasvasilache updated the diff for D87767: [mlir][Linalg] Evolve named ops to use assembly form and support linalg on tensors..

Fix incorrect OpBuilder state with an InsertionGuard.

Thu, Sep 17, 11:49 AM · Restricted Project
nicolasvasilache updated the diff for D87767: [mlir][Linalg] Evolve named ops to use assembly form and support linalg on tensors..

Better building of block.

Thu, Sep 17, 9:30 AM · Restricted Project
nicolasvasilache added a reviewer for D87767: [mlir][Linalg] Evolve named ops to use assembly form and support linalg on tensors.: burmako.
Thu, Sep 17, 8:52 AM · Restricted Project
nicolasvasilache added inline comments to D87767: [mlir][Linalg] Evolve named ops to use assembly form and support linalg on tensors..
Thu, Sep 17, 8:52 AM · Restricted Project
nicolasvasilache updated the diff for D87767: [mlir][Linalg] Evolve named ops to use assembly form and support linalg on tensors..

Address review

Thu, Sep 17, 8:51 AM · Restricted Project
nicolasvasilache updated the diff for D87767: [mlir][Linalg] Evolve named ops to use assembly form and support linalg on tensors..

Tmp OpBuilder creation.

Thu, Sep 17, 7:53 AM · Restricted Project
nicolasvasilache retitled D87776: [mlir][ODS] Add TypeRef directive in Declarative Assembly Format to allow custom UserDirective parser to receive previously parsed types. from [mlir][ODS][WIP] Add TypeRef directive to Declarative Assembly Format to allow custom UserDirective printer / parser to receive existing types. to [mlir][ODS] Add TypeRef directive in Declarative Assembly Format to allow custom UserDirective parser to receive previously parsed types..
Thu, Sep 17, 5:47 AM · Restricted Project
nicolasvasilache accepted D85869: [MLIR][Affine][VectorOps] Utility to vectorize loop nest using strategy.

Thanks @dcaballe !

Thu, Sep 17, 4:50 AM · Restricted Project
nicolasvasilache updated the diff for D87776: [mlir][ODS] Add TypeRef directive in Declarative Assembly Format to allow custom UserDirective parser to receive previously parsed types..

Finishing the impl and adding unit tests.

Thu, Sep 17, 4:41 AM · Restricted Project
nicolasvasilache added reviewers for D87776: [mlir][ODS] Add TypeRef directive in Declarative Assembly Format to allow custom UserDirective parser to receive previously parsed types.: ftynse, mehdi_amini.
Thu, Sep 17, 1:18 AM · Restricted Project

Wed, Sep 16

nicolasvasilache requested review of D87776: [mlir][ODS] Add TypeRef directive in Declarative Assembly Format to allow custom UserDirective parser to receive previously parsed types..
Wed, Sep 16, 10:10 AM · Restricted Project
nicolasvasilache requested review of D87767: [mlir][Linalg] Evolve named ops to use assembly form and support linalg on tensors..
Wed, Sep 16, 8:08 AM · Restricted Project
nicolasvasilache added a comment to D87567: Enable inlining for Linalg dialect.

Thanks @ezhulenev !

Wed, Sep 16, 7:20 AM · Restricted Project
nicolasvasilache committed rG8c0dc1e38b6c: Enable inlining for Linalg dialect (authored by ezhulenev).
Enable inlining for Linalg dialect
Wed, Sep 16, 7:20 AM
nicolasvasilache closed D87567: Enable inlining for Linalg dialect.
Wed, Sep 16, 7:19 AM · Restricted Project
nicolasvasilache accepted D87567: Enable inlining for Linalg dialect.
Wed, Sep 16, 7:02 AM · Restricted Project
nicolasvasilache abandoned D87509: [MLIR][Linalg] Add minimal support for linalg on tensors with one reduction and one result..

Thanks for your reviews, I have something better planned so I am abandonning this one.

Wed, Sep 16, 1:56 AM · Restricted Project

Tue, Sep 15

nicolasvasilache accepted D87676: [mlir][Linalg] Convolution tiling added to ConvOp vectorization pass.

Looks good!

Tue, Sep 15, 5:29 AM · Restricted Project
nicolasvasilache accepted D87605: [mlir] check for failures when packing function sigunatures in std->llvm conversion.
Tue, Sep 15, 3:11 AM · Restricted Project

Mon, Sep 14

nicolasvasilache closed D87440: [mlir][Linalg] Refactor StructuredOpInterface - NFC.

Landed as e6f2f17f05a1248b069ba830c4afffd61ee2f297

Mon, Sep 14, 5:32 AM · Restricted Project

Fri, Sep 11

nicolasvasilache updated the diff for D87509: [MLIR][Linalg] Add minimal support for linalg on tensors with one reduction and one result..

Fix test

Fri, Sep 11, 9:15 AM · Restricted Project
nicolasvasilache updated the diff for D87509: [MLIR][Linalg] Add minimal support for linalg on tensors with one reduction and one result..

Fix bug, add helpers and a roundtrip test.

Fri, Sep 11, 8:49 AM · Restricted Project
nicolasvasilache requested review of D87509: [MLIR][Linalg] Add minimal support for linalg on tensors with one reduction and one result..
Fri, Sep 11, 6:02 AM · Restricted Project
nicolasvasilache committed rG1851bab176bb: [MLIR][Linalg] Undo spurious parameter name change (authored by nicolasvasilache).
[MLIR][Linalg] Undo spurious parameter name change
Fri, Sep 11, 5:19 AM
nicolasvasilache committed rGe6f2f17f05a1: [mlir][Linalg] Refactor StructuredOpInterface - NFC (authored by nicolasvasilache).
[mlir][Linalg] Refactor StructuredOpInterface - NFC
Fri, Sep 11, 4:54 AM
nicolasvasilache added inline comments to D87440: [mlir][Linalg] Refactor StructuredOpInterface - NFC.
Fri, Sep 11, 3:20 AM · Restricted Project
nicolasvasilache updated the diff for D87440: [mlir][Linalg] Refactor StructuredOpInterface - NFC.

Format

Fri, Sep 11, 3:20 AM · Restricted Project
nicolasvasilache updated the diff for D87440: [mlir][Linalg] Refactor StructuredOpInterface - NFC.

Address review.

Fri, Sep 11, 3:19 AM · Restricted Project
nicolasvasilache accepted D87460: [mlir] Fix generation of AVX512 dialect documentation.

Thanks!

Fri, Sep 11, 1:08 AM · Restricted Project
nicolasvasilache accepted D87462: [mlir][Linalg] Print both types for linalg.transpose.

Thanks!

Fri, Sep 11, 1:08 AM · Restricted Project

Thu, Sep 10

nicolasvasilache accepted D87308: [mlir][Linalg] Make LinalgBaseTilingPattern not delete the original operation..

Thanks!

Thu, Sep 10, 11:53 PM · Restricted Project
nicolasvasilache added inline comments to D87462: [mlir][Linalg] Print both types for linalg.transpose.
Thu, Sep 10, 9:47 AM · Restricted Project
nicolasvasilache accepted D87292: Introduce linalg.vecmat.

I am not concerned. by having many ops as long as the underlying mechanisms are shared.
Of course, I agree that more core work is needed to get new op definitions to be just the 4 lines in .tc.
This is just a bit of tablegen + macro away so I am not worried that a future CL will make things more automatic.

Thu, Sep 10, 7:56 AM · Restricted Project
nicolasvasilache requested review of D87440: [mlir][Linalg] Refactor StructuredOpInterface - NFC.
Thu, Sep 10, 12:58 AM · Restricted Project
nicolasvasilache accepted D87404: [mlir] [VectorOps] Enable 32-bit index optimizations.
Thu, Sep 10, 12:17 AM · Restricted Project

Wed, Sep 9

nicolasvasilache accepted D87288: [mlir][Linalg] Reduction dimensions specified in TC definition of ConvOps..
Wed, Sep 9, 3:04 AM · Restricted Project
nicolasvasilache accepted D87277: [mlir][Linalg] Integration tests for convolutions added..
Wed, Sep 9, 3:03 AM · Restricted Project
nicolasvasilache accepted D87354: [mlir][Linalg] Small refactoring of ConvOpVectorization.
Wed, Sep 9, 3:03 AM · Restricted Project
nicolasvasilache added a comment to D87308: [mlir][Linalg] Make LinalgBaseTilingPattern not delete the original operation..
The alternative would be that I copy the guts of the matchAndRewrite method of LinalgBaseTilingPattern
Wed, Sep 9, 2:56 AM · Restricted Project

Tue, Sep 8

nicolasvasilache added a comment to D87292: Introduce linalg.vecmat.

@burmako ah my apologies, I thought you wanted a linalg op that would operate on memref<vector>.

Tue, Sep 8, 1:47 PM · Restricted Project
nicolasvasilache added a comment to D87308: [mlir][Linalg] Make LinalgBaseTilingPattern not delete the original operation..

Could you please describe the use case a bit?
Should this be an abstract base that never deletes and a default derived that deletes + other derived that do X and delete?

Tue, Sep 8, 1:41 PM · Restricted Project
nicolasvasilache accepted D86619: [mlir] Conv ops vectorization pass.

Thanks !

Tue, Sep 8, 1:36 AM · Restricted Project
nicolasvasilache committed rG9be617844955: [mlir][Vector] Make VectorToSCF deterministic (authored by nicolasvasilache).
[mlir][Vector] Make VectorToSCF deterministic
Tue, Sep 8, 1:20 AM
nicolasvasilache closed D87273: [mlir][Vector] Make VectorToSCF deterministic.
Tue, Sep 8, 1:19 AM · Restricted Project
nicolasvasilache accepted D87241: [mlir][VectorOps] Redo the scalar loop emission in VectoToSCF to pad instead of clipping.

Thanks much for updating this older piece!

Tue, Sep 8, 12:53 AM · Restricted Project
nicolasvasilache added a comment to D87230: [MLIR] Fix Win test due to partial order of CHECK directives.

yes :) https://reviews.llvm.org/D87273

Tue, Sep 8, 12:40 AM · Restricted Project
nicolasvasilache requested review of D87273: [mlir][Vector] Make VectorToSCF deterministic.
Tue, Sep 8, 12:39 AM · Restricted Project
nicolasvasilache updated subscribers of D87230: [MLIR] Fix Win test due to partial order of CHECK directives.

First this is not an issue but a feature of C++.
Builders would have the same behavior as explained in the discourse post.

Tue, Sep 8, 12:16 AM · Restricted Project

Mon, Sep 7

nicolasvasilache added inline comments to D87230: [MLIR] Fix Win test due to partial order of CHECK directives.
Mon, Sep 7, 2:32 PM · Restricted Project
nicolasvasilache accepted D86619: [mlir] Conv ops vectorization pass.

Looks good, thanks @limo1996 !

Mon, Sep 7, 7:32 AM · Restricted Project
nicolasvasilache committed rG1c849ec40a53: [MLIR] Fix Win test due to partial order of CHECK directives (authored by nicolasvasilache).
[MLIR] Fix Win test due to partial order of CHECK directives
Mon, Sep 7, 5:15 AM
nicolasvasilache closed D87230: [MLIR] Fix Win test due to partial order of CHECK directives.
Mon, Sep 7, 5:15 AM · Restricted Project
nicolasvasilache updated the diff for D87230: [MLIR] Fix Win test due to partial order of CHECK directives.

Update.

Mon, Sep 7, 3:09 AM · Restricted Project
nicolasvasilache requested review of D87230: [MLIR] Fix Win test due to partial order of CHECK directives.
Mon, Sep 7, 3:06 AM · Restricted Project
nicolasvasilache committed rG8d64df9f1390: [mlir][Vector] Revisit VectorToSCF. (authored by nicolasvasilache).
[mlir][Vector] Revisit VectorToSCF.
Mon, Sep 7, 2:20 AM
nicolasvasilache closed D87150: [mlir][Vector] Revisit VectorToSCF..
Mon, Sep 7, 2:20 AM · Restricted Project

Fri, Sep 4

nicolasvasilache updated subscribers of D87116: [mlir] [VectorOps] Improve SIMD compares with narrower indices.

Thanks for tracking and fixing the perf bug Aart!
Maybe this also influences how aggressive we need to be in splitting in the codegen strategy to get to peak.
Will also be interesting to see the effects on mobile (cc @asaadaldien )

Fri, Sep 4, 9:11 AM · Restricted Project
nicolasvasilache requested review of D87150: [mlir][Vector] Revisit VectorToSCF..
Fri, Sep 4, 8:49 AM · Restricted Project
nicolasvasilache accepted D87127: [mlir] Take ValueRange instead of ArrayRef<Value> in StructuredIndexed.
Fri, Sep 4, 8:47 AM · Restricted Project

Thu, Sep 3

nicolasvasilache accepted D87082: [mlir][VectorOps] Fall back to a loop when accessing a vector from a strided memref.
Thu, Sep 3, 6:48 AM · Restricted Project
nicolasvasilache added a comment to D87082: [mlir][VectorOps] Fall back to a loop when accessing a vector from a strided memref.

Note I am also making some changes to the scalar path for other correctness purposes.
There may be something interesting to do down the line.

Thu, Sep 3, 6:17 AM · Restricted Project
nicolasvasilache accepted D87082: [mlir][VectorOps] Fall back to a loop when accessing a vector from a strided memref.
Thu, Sep 3, 6:17 AM · Restricted Project
nicolasvasilache added inline comments to D85869: [MLIR][Affine][VectorOps] Utility to vectorize loop nest using strategy.
Thu, Sep 3, 3:01 AM · Restricted Project

Wed, Sep 2

nicolasvasilache accepted D86638: [mlir][Linalg] Wrong tile size for convolutions fixed.

Great, thank you @limo1996 !

Wed, Sep 2, 7:50 AM · Restricted Project
nicolasvasilache requested changes to D86638: [mlir][Linalg] Wrong tile size for convolutions fixed.
Wed, Sep 2, 5:48 AM · Restricted Project

Tue, Sep 1

nicolasvasilache accepted D86951: [mlir][VectorOps] Fail fast when a strided memref is passed to vector_transfer.

Thanks @bkramer !

Tue, Sep 1, 8:56 AM · Restricted Project
nicolasvasilache accepted D86756: [MLIR][Affine][VectorOps] Vectorize uniform values in SuperVectorizer.

Thanks for extending the SuperVectorizer !

Tue, Sep 1, 8:41 AM · Restricted Project
nicolasvasilache accepted D85869: [MLIR][Affine][VectorOps] Utility to vectorize loop nest using strategy.

Thanks for this @dcaballe, I'm. a big fan of more composable APIs and less blackbox heuristics.

Tue, Sep 1, 8:36 AM · Restricted Project
nicolasvasilache added a reviewer for D86619: [mlir] Conv ops vectorization pass: asaadaldien.
Tue, Sep 1, 5:09 AM · Restricted Project
nicolasvasilache updated subscribers of D86619: [mlir] Conv ops vectorization pass.

This is not how I was imagining convolution to be lowered in a first stab.
I was expecting 1. taking subviews, 2. either using reshape or extending subviews to allow it to be rank-reducing, 3. rewrite as a linalg.matmul and reuse the existing vectorization patterns.

Tue, Sep 1, 5:09 AM · Restricted Project

Aug 19 2020

nicolasvasilache resigned from D86197: [mlir][VectorToSCF] Bug in TransferRead lowering fixed.

I was under the impression that you were implementing the more general case but indeed not.
Then please just make sure the writes behave properly too, thanks!

Aug 19 2020, 5:13 AM · Restricted Project
nicolasvasilache requested changes to D86197: [mlir][VectorToSCF] Bug in TransferRead lowering fixed.

There are a few different places where patterns apply where we make the test that the permutation map is identity and that the rest is not yet supported.
Please update such places too and add tests to extend support more generally.

Aug 19 2020, 1:35 AM · Restricted Project
nicolasvasilache requested changes to D85885: [MLIR] Introduce memref vector cast op.

If it wants to subsume vector.type_cast, how does this interact with n-D vectors for n>1?

Aug 19 2020, 1:28 AM · Restricted Project

Aug 7 2020

nicolasvasilache committed rG2a01d7f7b648: [mlir][SCF] Add utility to outline the then and else branches of an scf.IfOp (authored by nicolasvasilache).
[mlir][SCF] Add utility to outline the then and else branches of an scf.IfOp
Aug 7 2020, 11:50 AM
nicolasvasilache closed D85449: [mlir][SCF] Add utility to outline the then and else branches of an scf.IfOp.
Aug 7 2020, 11:50 AM · Restricted Project
nicolasvasilache added inline comments to D85449: [mlir][SCF] Add utility to outline the then and else branches of an scf.IfOp.
Aug 7 2020, 11:49 AM · Restricted Project