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Differential D156195

[docs] Add llvm & clang release notes for LoongArch
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Authored by SixWeining on Jul 24 2023, 7:06 PM.

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Reviewers
xen0n
xry111
hev
wangleiat
alexander-shaposhnikov
Commits
rG6223050db88b: [docs] Add llvm & clang release notes for LoongArch

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SixWeining created this revision.Jul 24 2023, 7:06 PM
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SixWeining requested review of this revision.Jul 24 2023, 7:06 PM
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xen0n added a comment.Jul 25 2023, 1:19 AM

Thank you (and your team, and of course other friends) for all your work this cycle!

llvm/docs/ReleaseNotes.rst
202–203

The ISA extension acronyms are not identifiers here, so no need to format as inline code?

206

I'd suggest mentioning the GCC equivalent, in case people wonder. (-mcmodel=large is unimplemented GCC-side AFAIK.)

207

"Assorted codegen improvements" sounds more attractive? ;-)

SixWeining updated this revision to Diff 543867.Jul 25 2023, 1:41 AM

Address @xen0n's comments and add some more recordable updates.

Herald added a reviewer: alexander-shaposhnikov. · View Herald TranscriptJul 25 2023, 1:41 AM
SixWeining updated this revision to Diff 543876.Jul 25 2023, 1:59 AM

Move sanitizer changes to clang side.

xen0n accepted this revision.Jul 25 2023, 2:07 AM

LGTM, thanks!

This revision is now accepted and ready to land.Jul 25 2023, 2:07 AM
This revision was landed with ongoing or failed builds.Jul 25 2023, 2:12 AM
Closed by commit rG6223050db88b: [docs] Add llvm & clang release notes for LoongArch (authored by SixWeining). · Explain Why
This revision was automatically updated to reflect the committed changes.
SixWeining added a commit: rG6223050db88b: [docs] Add llvm & clang release notes for LoongArch.
Harbormaster completed remote builds in B247921: Diff 543876.Jul 25 2023, 9:38 AM

Revision Contents

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llvm/
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Diff 543887

clang/docs/ReleaseNotes.rst

Show First 20 Lines • Show All 891 Lines • ▼ Show 20 Lines
LoongArch Support LoongArch Support
^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^^
- Patchable function entry (``-fpatchable-function-entry``) is now supported - Patchable function entry (``-fpatchable-function-entry``) is now supported
on LoongArch. on LoongArch.
- Unaligned memory accesses can be toggled by ``-m[no-]unaligned-access`` or the - Unaligned memory accesses can be toggled by ``-m[no-]unaligned-access`` or the
aliases ``-m[no-]strict-align``. aliases ``-m[no-]strict-align``.
- Non ``$``-prefixed GPR names (e.g. ``r4`` and ``a0``) are allowed in inlineasm
like GCC does.
RISC-V Support RISC-V Support
^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^
- Added ``-mrvv-vector-bits=`` option to give an upper and lower bound on vector - Added ``-mrvv-vector-bits=`` option to give an upper and lower bound on vector
length. Valid values are powers of 2 between 64 and 65536. A value of 32 length. Valid values are powers of 2 between 64 and 65536. A value of 32
should eventually be supported. We also accept "zvl" to use the Zvl*b should eventually be supported. We also accept "zvl" to use the Zvl*b
extension from ``-march`` or ``-mcpu`` to the be the upper and lower bound. extension from ``-march`` or ``-mcpu`` to the be the upper and lower bound.
- Fixed incorrect ABI lowering of ``_Float16`` in the case of structs - Fixed incorrect ABI lowering of ``_Float16`` in the case of structs
▲ Show 20 Lines • Show All 182 Lines • ▼ Show 20 Lines- Now, taint propagations are tracked further back until the real taint source.
This improves all taint-related diagnostics. This improves all taint-related diagnostics.
- Fixed a null-pointer dereference crash inside the ``MoveChecker``. - Fixed a null-pointer dereference crash inside the ``MoveChecker``.
.. _release-notes-sanitizers: .. _release-notes-sanitizers:
Sanitizers Sanitizers
---------- ----------
- Several more sanitizers are now ported to LoongArch: MSan, DFsan, Profile, XRay and libFuzzer.
Python Binding Changes Python Binding Changes
---------------------- ----------------------
The following methods have been added: The following methods have been added:
- ``clang_Location_isInSystemHeader`` exposed via the ``is_in_system_header`` - ``clang_Location_isInSystemHeader`` exposed via the ``is_in_system_header``
property of the `Location` class. property of the `Location` class.
Show All 13 Lines

llvm/docs/ReleaseNotes.rst

Show First 20 Lines • Show All 193 Lines • ▼ Show 20 Lines
Changes to the Hexagon Backend Changes to the Hexagon Backend
------------------------------ ------------------------------
* ... * ...
Changes to the LoongArch Backend Changes to the LoongArch Backend
-------------------------------- --------------------------------
* Adds assembler/disassembler support for the LSX, LASX, LVZ and LBT ISA extensions.
* The ``lp64s`` ABI is supported now and has been tested on Rust bare-matal target. * The ``lp64s`` ABI is supported now and has been tested on Rust bare-matal target.
xen0nUnsubmitted
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The ISA extension acronyms are not identifiers here, so no need to format as inline code?

xen0n: The ISA extension acronyms are not identifiers here, so no need to format as inline code?
* A target feature ``ual`` is introduced to allow unaligned memory accesses and * A target feature ``ual`` is introduced to allow unaligned memory accesses and
this feature is enabled by default for generic 64-bit processors. this feature is enabled by default for generic 64-bit processors.
* Adds support for the ``large`` code model, which is equivalent to GCC's ``extreme`` one.
xen0nUnsubmitted
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this feature is enabled by default for generic 64-bit processors.
- * Adds support for the ``large`` code model.
+ * Adds support for the ``large`` code model, which is equivalent to GCC's ``extreme`` one.
* Several codegen improvements are made.

I'd suggest mentioning the GCC equivalent, in case people wonder. (-mcmodel=large is unimplemented GCC-side AFAIK.)

xen0n: I'd suggest mentioning the GCC equivalent, in case people wonder. (`-mcmodel=large` is…
* Assorted codegen improvements.
xen0nUnsubmitted
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"Assorted codegen improvements" sounds more attractive? ;-)

xen0n: "Assorted codegen improvements" sounds more attractive? ;-)
* llvm-objcopy now supports processing LoongArch objects.
Changes to the MIPS Backend Changes to the MIPS Backend
--------------------------- ---------------------------
* ... * ...
Changes to the PowerPC Backend Changes to the PowerPC Backend
------------------------------ ------------------------------
▲ Show 20 Lines • Show All 225 Lines • Show Last 20 Lines