For CSR_Interrupt, we can generate the register list via a single
sequence.
For CSR_XLEN_F32_Interrupt and CSR_XLEN_F64_Interrupt, I don't
see the reason why we need to keep the order the same as how we used
to allocate registers (and we have changed the order in D146488), so
I fold them into one sequence.
There are some *.ll changes because of the order change.