[lld][Arm] Big Endian - Byte invariant support.

[simpal01]

Summary

Arm has BE8 big endian configuration called a byte-invariant(every byte has the same address on little and big-endian systems).

When in BE8 mode:

1. Instructions are big-endian in relocatable objects but little-endian in executables and shared objects.
2. Data is big-endian.
3. The data encoding of the ELF file is ELFDATA2MSB.

To support BE8 without an ABI break for relocatable objects,the linker takes on the responsibility of changing the endianness of instructions. At a high level the only difference between BE32 and BE8 in the linker is that for BE8:

1. The linker sets the flag EF_ARM_BE8 in the ELF header.
2. The linker endian reverses the instructions, but not data.

This patch adds BE8 big endian support for Arm. To endian reverse the instructions we'll need access to the mapping symbols. Code sections can contain a mix of Arm, Thumb and literal data. We need to endian reverse Arm instructions as words, Thumb instructions
as half-words and ignore literal data.The only way to find these transitions precisely is by using mapping symbols. The instruction reversal will need to take place after relocation. For Arm BE8 code sections (Section has SHF_EXECINSTR flag ) we inserted a step after relocation to endian reverse the instructions. The implementation strategy i have used here is to write all sections BE32 including SyntheticSections then endian reverse all code in InputSections via mapping symbols.

[simpal01]

There is some similar code in the ARMErrataFix.cpp that also collects the mapping symbols. Now i have kept the code to collect Mapping symbols getArmMappingSymbolList in a generic place (Arch/ARM.cpp) so that it can be called by ARMErrataFix.cpp as well. If this decision is accepted, i will make an another patch to reflect the changes in ARMErrataFix.cpp.

[amilendra]

lld/ELF/Arch/ARM.cpp

938

getArmMappingSymbolList is called only within this file. So you can make it static.

941

InputSection?

953

Nit: InputSection

968–975

Because width does not change within the loop, checking it before the loop would be more efficient.
Something like

if (width == 4) {
  for (uint64_t i = start; i < end; i += width)
      write32le(buf + i, read32(bytes + i));
}
else if (width == 2) {
  for (uint64_t i = start; i < end; i += width) 
      write16le(buf + i, read16(bytes + i));
}

Also it would be good if the hard coded `4` and `2` can be avoided to use the `CodeState` enum. Maybe `CodeWidth` is a better name for the enum?

983

I can see some refactoring opportunities in this function.
If you use something like enum CodeState { DATA = 0, HALFWORDCODE = 2, WORDCODE = 4}; you can use
BytesexReverseInstructions(buf, start, end, cur_state); instead of hard coding width such as BytesexReverseInstructions(buf, start, end, 4); and BytesexReverseInstructions(buf, start, end, 2);

1003–1008

This can be in its own function. Maybe a lambda function? That will let you rewrite the case DATA: block like

start = msym->value;
cur_state = function(msym);

1011–1026

These two blocks can probably be folded together.

case WORDCODE:
case HALFWORDCODE:
  if (new_state != cur_state) {
    end = msym->value;
    BytesexReverseInstructions(buf, start, end, cur_state);
    cur_state = new_state;
    start = msym->value;
  }
  break;

1036–1037

ARM.cpp:1032:5: warning: default label in switch which covers all enumeration values [-Wcovered-switch-default]
    default:

[amilendra]

lld/ELF/Arch/ARM.cpp

938

Ah sorry. I did not see your comment that there is a chance that this can be used in ARMErrataFix.cpp as well. Ignore my comment of making it static.

[peter.smith]

I think the overall strategy looks good. I've got quite a few detailed comments. Not had a chance to go over the tests in detail yet. Will do that next week.

lld/ELF/Arch/ARM.cpp

76

A couple of nits:

• Suggest ELF instead of elf and big-endian instead of big endian to be consistent with other comments.
• The convention for LLD comments is to finish with a full stop.

[peter.smith]

lld/ELF/Arch/ARM.cpp

941

I think this should be InputSection as the map is from InputSection to defined.

953

Type IutputSection -> InputSection

965

I think toLittleEndianInstructions is a better name as this doesn't endian reverse, it converts from big-endian to little- endian.

967

Do you need bytes? It looks like neither the pointer buf or the pointer bytes is written to. For example:

write32le(buf + i, read32(buf + i));

978

I'd go with:

// Arm BE8 big endian format requires instructions to be little-endian, with the initial contents big-endian. Convert
// the big-endian instructions to little-endian leaving literal data untouched. We use mapping symbols to identify
// half open intervals of Arm code [$a, non $a) and Thumb [$t, non  $t) code and convert these to little-endian a word
// or half-word at a time respectively.

980

Mapping symbols are lower case $a instead of $A

983

Similar to the comment about the function name above. This is converting big to little endian, whereas the name implies that we are reversing.

Given that this is specific to Arm BE8 perhaps convertArmInstructionsToBE8()

985

getArmMappingSymbolList() is going to recalculate the mapping symbols for the whole program each time it is called (once per inputSection).

Given that the mapping symbols are read-only then I suggest calculating them before writing sections and storting them read-only in the ARM class or Config.

991

I suggest using an enum class using the normal variable naming convention. For example in Config.h

enum class BsymbolicKind { None, NonWeakFunctions, Functions, All };

I'd also suggest Arm, Thumb and Data for the names.

992

curState (LLVM coding standard)

996

I don't think you need to treat SyntheticSections differently as getSize is a virtual function.
length = s->getSize(); should be fine.

1002

newState (LLVM coding standard)

1009

I wonder if this could be simplified. For example

case WORDCODE:
  if (new_state == HALFWORDCODE || new_state == DATA)

Is the same as

case WORDCODE:
  if (new_state != WORDCODE)

In all cases it looks like

if (new_state == cur_state)
  continue;

Then the if statements within the case statements could be skipped as we know we are terminating a contiguous run of cur_state.

cur_state = new_state; and start=msym->value are common to all cases apart from the default case, but I think that as we only record mapping symbols in the map then default shouldn't occur.

With all that I think this could be (using your names and enum):

    if (new_state == cur_state)
      continue;

    if (cur_state == WORDCODE)
      BytesexReverseInstructions(buf, start, msym->value, 4);
    else if (cur_state == HALFWORDCODE)
      BytesexReverseInstructions(buf, start, msym->value, 2);

    start = msym->value;
    cur_state = new_state;
  }
  // Passed last mapping symbol, may need to reverse
  // up to end of section
  if (cur_state == WORDCODE)
    BytesexReverseInstructions(buf, start, length, 4);
  if (cur_state == HALFWORDCODE)
    BytesexReverseInstructions(buf, start, length, 2);
}

A further shortening could be done by using values 4, 2 and 1 for the enum (although not with an enum class without casting) then you could use that for the length

// Passed last mapping symbol, may need to reverse
 // up to end of section
 if (cur_state != DATA)
   BytesexReverseInstructions(buf, start, length, cur_state);

1041

For a couple of sentences I suggest using // rather than /* */

lld/ELF/Options.td

39

I'd go with something like "Write a Big Endian ELF file using BE8 format (Arm only)".

lld/ELF/OutputSections.cpp

499

I'd say When in Arm BE8 mode, the linker has to convert the big-endian instructions to little-endian, leaving the data big-endian.

501

I've just thought that we probably do not want to endian reverse instructions when doing a relocatable link (the -r option which maps to config->relocatable; this produces a relocatable object file). We will want to double check what GNU ld does to make sure.

503

I think this test can be folded into the first if statement.

if (config->emachine == EM_ARM && !config->isLE && config->be8 && (flags & SHF_EXECINSTR))

lld/test/ELF/emulation-arm.s

76

I think this comment needs updating. This is the test that checks that BE8 has been set.

[peter.smith]

lld/ELF/Options.td

39

We'll also need to add be8 to the man page llvm-project/lld/docs/ld/lld.1

[simpal01]

Thanks for the reviews. I am away the whole next week. I will work on this review comments the week after next.

[peter.smith]

One more thought I had where we might need changes, although they could be done in a different patch as they are more of a bug fix.

The Arm thunks come in short and long forms. If a thunk is within range of a branch instruction it will write this out, otherwise it will use a longer sequence involving an indirect branch. In most thunks this doesn't change the mapping symbols, but in some cases it does because there are either state changes or inline literal data. For example:

void ThumbV6MABSLongThunk::addSymbols(ThunkSection &isec) {
  addSymbol(saver().save("__Thumbv6MABSLongThunk_" + destination.getName()),
            STT_FUNC, 1, isec);
  addSymbol("$t", STT_NOTYPE, 0, isec);
  addSymbol("$d", STT_NOTYPE, 8, isec);
}

Note that if this is written as a short thunk then the second mapping symbol will be incorrect, and will end up overlapping with the next thunk. At the moment this may just mess the disassembly up, but with BE8 this could end up messing up the conversion to little endian.

I think that there may only be one or two thunks that have multiple mapping symbols and are used on CPUs that support BE8, however it would be good to fix all the cases. Which can be done by checking if a short thunk is being used and only adding the non 0 offset mapping symbols if short thunks aren't being used. For example, the AArch64 thunks add a check:

void AArch64ABSLongThunk::addSymbols(ThunkSection &isec) {
  addSymbol(saver().save("__AArch64AbsLongThunk_" + destination.getName()),
            STT_FUNC, 0, isec);
  addSymbol("$x", STT_NOTYPE, 0, isec);
  if (!getMayUseShortThunk())
    addSymbol("$d", STT_NOTYPE, 8, isec);
}

[simpal01]

Address review comments.

[simpal01]

lld/ELF/Arch/ARM.cpp

1003–1008

isArmMapSymbol, isThumbMapSymbol and isDataMapSymbol are used by both the functions convertArmInstructionstoBE8 and getArmMappingSymbolList.

1011–1026

Refactored this part of the code as suggested by Amilendra and Peter.

lld/ELF/OutputSections.cpp

501

I have checked with gcc and found that gcc does endian reverse instructions in BE8 mode when doing a relocatable link.

[simpal01]

In D150870#4355800, @peter.smith wrote:

One more thought I had where we might need changes, although they could be done in a different patch as they are more of a bug fix.

The Arm thunks come in short and long forms. If a thunk is within range of a branch instruction it will write this out, otherwise it will use a longer sequence involving an indirect branch. In most thunks this doesn't change the mapping symbols, but in some cases it does because there are either state changes or inline literal data. For example:

void ThumbV6MABSLongThunk::addSymbols(ThunkSection &isec) {
  addSymbol(saver().save("__Thumbv6MABSLongThunk_" + destination.getName()),
            STT_FUNC, 1, isec);
  addSymbol("$t", STT_NOTYPE, 0, isec);
  addSymbol("$d", STT_NOTYPE, 8, isec);
}

Note that if this is written as a short thunk then the second mapping symbol will be incorrect, and will end up overlapping with the next thunk. At the moment this may just mess the disassembly up, but with BE8 this could end up messing up the conversion to little endian.

I think that there may only be one or two thunks that have multiple mapping symbols and are used on CPUs that support BE8, however it would be good to fix all the cases. Which can be done by checking if a short thunk is being used and only adding the non 0 offset mapping symbols if short thunks aren't being used. For example, the AArch64 thunks add a check:

void AArch64ABSLongThunk::addSymbols(ThunkSection &isec) {
  addSymbol(saver().save("__AArch64AbsLongThunk_" + destination.getName()),
            STT_FUNC, 0, isec);
  addSymbol("$x", STT_NOTYPE, 0, isec);
  if (!getMayUseShortThunk())
    addSymbol("$d", STT_NOTYPE, 8, isec);
}

I have added these changes as well into this patch. I am not quite sure what you mean by non 0 offset mapping symbols here. There are places where we are adding three mapping symbols($a, $t and $d). In that cases i added the check like below.

addSymbol("$t", STT_NOTYPE, 0, isec);
addSymbol("$a", STT_NOTYPE, 4, isec);
if (!getMayUseShortThunk())
  addSymbol("$d", STT_NOTYPE, 12, isec);

[MaskRay]

lld/ELF/Arch/ARM.cpp

24

Move CodeState into the end of the anonymous namespace

Make sectionMap static after the anonymous namespace.

https://llvm.org/docs/CodingStandards.html#anonymous-namespaces

26

std::vector => SmallVector<const Defined *, 0>

939

in.symTab will be null with --strip-all

945

cast_if_present

985

Don't add blank line between local variable declarations

987

Delete this blank line.

995

if (isDataMapSymbol(msym)) is unneeded.

1012

length is uncommon in lld. Use size.

lld/ELF/Config.h

204

bool armBe8 = false;

lld/ELF/Options.td

39

format(Arm only) => format (AArch32 only)

lld/ELF/Target.h

226

...List is uncommon in lld code. use the plural form Symbols

lld/docs/ld.lld.1

92

(AArch32 only)

lld/test/ELF/arm-plt-reloc.s

260

Omit addresses that are not significant. These addresses make test updating difficult if text section addresses change.

[MaskRay]

lld/test/ELF/arm-be8-check.s

1 ↗

(On Diff #527410)

What's the purpose of the new test when there are other thunk tests have got the --be8 test?

lld/test/ELF/arm-be8-thunks.s

1 ↗

(On Diff #527410)

What's the purpose of the new test when there are other thunk tests have got the --be8 test?

[MaskRay]

Should there be an error when --be8 is used by non-EM_ARM or little-endian? You may add arm-be8.s

[MaskRay]

Instructions are big-endian in objects but little-endian in executables.
Data is big-endian.
ELF files are big-endian.

Instructions are big-endian in relocatable object files but little-endian in executables and shared objects. ("objects files" include executable files and shared object files as well)
Data is big-endian.
The data encoding of the ELF files is ELFDATA2MSB

[simpal01]

Addressed review comments.

[simpal01]

lld/ELF/Arch/ARM.cpp

939

Yeah. you are right. I didn't notice that until you say. Thank you. Now i am collecting mapping symbols separately between synthetic and non synthetic local symbols. Adding Linker generated mapping symbols through the function addArmMappingSymbols() when linker generated symbols are added via addSyntheticLocal.

lld/test/ELF/arm-be8-check.s

1 ↗

(On Diff #527410)

Removed this test

lld/test/ELF/arm-be8-thunks.s

1 ↗

(On Diff #527410)

there were not any test which checks the hex dump content of the executable sections. Now moved this checking to arm-thunk-reuse.s

[simpal01]

In D150870#4387593, @MaskRay wrote:

Should there be an error when --be8 is used by non-EM_ARM or little-endian? You may add arm-be8.s

Done. Added the checking in target-specific-options.s. We have similar checks in the same test file.

[simpal01]

In D150870#4387598, @MaskRay wrote:

Instructions are big-endian in objects but little-endian in executables.
Data is big-endian.
ELF files are big-endian.

Instructions are big-endian in relocatable object files but little-endian in executables and shared objects. ("objects files" include executable files and shared object files as well)
Data is big-endian.
The data encoding of the ELF files is ELFDATA2MSB

Updated the summary accordingly.

[peter.smith]

Only a small comment about making sure the mapping symbols remain sorted when adding symbols later.

lld/ELF/Arch/ARM.cpp

969

We are only adding a single symbol, whereas the name addArmMappingSymbols implies many symbols.

We should also be careful with using push_back here as we need to make sure that the mapping symbols are sorted. As it happens the way the code is used today push_back is fine as we always add the symbols in ascending order, but it would be easy to make a mistake in the future.

Possible solutions include:

• use insert rather than push_back
• sort the section map for the section after push_back
• possibly delay the sorting of the mapping symbols till the first use.
• change the name to push rather than add, make sure there is a comment to state that symbols must be pushed in ascending order.

[simpal01]

lld/ELF/Arch/ARM.cpp

969

I am sorting the mapping symbols already in this patch just before using it. I have introduced a new function named sortArmMappingSymbols which calls inside getArmMappingSymbols. By this time all the local and synthetic mapping symbols are added into the sectionmap. Sorry i could have been mentioned about it in my previous comments.

[peter.smith]

lld/ELF/Arch/ARM.cpp

969

I am sorting the mapping symbols already in this patch just before using it. I have introduced a new function named sortArmMappingSymbols which calls inside getArmMappingSymbols. By this time all the local and synthetic mapping symbols are added into the sectionmap. Sorry i could have been mentioned about it in my previous comments.

OK, I missed that getMappingSymbols() is called after addArmMappingSymbols().

Although a little bit more code, one suggestion is to split getArmMappingSymbols into two functions
addArmInputSectionMappingSymbols();
sortArmMappingSymbols();

Which makes it clear at the call-site what is going on.

Looking at the name alone getArmMappingSymbols() doesn't hint at the side-effect of sorting the mapping symbols. Really it is addArmInputSectionMappingSymbolsThenSort()

[simpal01]

Addressing review comments.

1. Rename the following functions getArmMappingSymbols -> addArmInputSectionMappingSymbolsThenSort addArmMappingSymbols -> addSyntheticSectionMappingSymbol

2. Split getArmMappingSymbols into two functions. addArmInputSectionMappingSymbols() and sortArmMappingSymbols()

[simpal01]

lld/ELF/Arch/ARM.cpp

969

Renamed the functions. Since the mapping symbols are sorting before first use, i hope push_back is fine to use and no need to change to insert.

[peter.smith]

A few small follow up comments. I don't have anything beyond comments or naming. So hopefully can approve next round.

lld/ELF/Arch/ARM.cpp

973

Suggest changing the comment to explain why. For example:

Synthetic Sections are not backed by an ELF file where we can access the symbol table, instead mapping symbols added to Synthetic Sections are stored in the Synthetic Symbol Table. Due to the presence of strip, we cannot rely on the Synthetic Symbol Table retaining the mapping symbols. Instead we record the mapping symbols locally.

lld/ELF/Options.td

39

Looks like this line is missing a space between format and (AArch32 only)

lld/ELF/Target.h

221

It would be good to keep the Arm BE8 functionality together in a single chunk. Consider moving to where the other two functions are, or moving the other two up here.

lld/ELF/Writer.cpp

2151

I have a mild preference for making sortArmMappingSymbols() non static and doing:
if (config->emachine == EM_ARM && !config->isLE && config->armBe8) {

addArmInputSectionMappingSymbols();
sortArmMappingSymbols();

}

But that isn't a strong opinion, feel free to keep this if you prefer.

[simpal01]

Addressing review comments.

[peter.smith]

LGTM, one typo fix, but this can be done prior to commit. Will be good to wait a few days to give MaskRay a chance to leave any final comments.

lld/ELF/Arch/ARM.cpp

972

typo locallly -> locally.

[simpal01]

typo locallly -> locally.

[simpal01]

Since there is no new comments after Peter approved this patch, i am going to submit this. If there is any more comments later, i can work on that as a separate patch.

[thakis]

This makes lld sigsegv during check-lld: http://45.33.8.238/linux/110197/step_11.txt

Please take a look and revert for now if it takes a while to fix.

[thakis]

The bot recovered after https://github.com/llvm/llvm-project/compare/1d27ad207744...2efdacf74c54 , but that looks fairly unrelated. So maybe it's accidentally hiding a bug. Maybe run tests with asan (or similar) enabled to make sure there aren't issues in this patch.

[simpal01]

Thank you for the heads up. I had tested everything locally before landing the changes. Not sure what caused the premege check to fail. Yes as you said i will run the tests with asan enabled and see . Thanks.

[hctim]

Hi, looks like this broke the sanitizer buildbots: https://lab.llvm.org/buildbot/#/builders/5/builds/34555/steps/10/logs/stdio

Full instructions on how to reproduce the bot can be found here: https://github.com/google/sanitizers/wiki/SanitizerBotReproduceBuild. The script used in that bit is buildbot_fast.sh.

In saying that, you should be able to reproduce quicker by using:

$ cmake \
-DLLVM_ENABLE_ASSERTIONS=ON \
-DCMAKE_C_COMPILER=clang \
-DCMAKE_CXX_COMPILER=clang++ \
-DLLVM_USE_LINKER=lld \
-GNinja \
-DCMAKE_BUILD_TYPE=Release \
-DCMAKE_C_FLAGS="-fsanitize=undefined" \
-DCMAKE_CXX_FLAGS="-fsanitize=undefined" \
-DLLVM_ENABLE_PROJECTS="'clang;lld;libc'" \
-DLLVM_ENABLE_RUNTIMES="libcxx;libcxxabi" \
-DLLVM_LIBC_ENABLE_LINTING=OFF \
-DLLVM_USE_SANITIZER=Undefined \
/path/to/llvm/llvm
$ LIT_OPTS='--filter arm-data-relocs.s' ninja check-lld

******************** TEST 'lld :: ELF/arm-data-relocs.s' FAILED ********************
Script:
--
: 'RUN: at line 2';   /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/bin/llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi /b/sanitizer-x86_64-linux-fast/build/llvm-project/lld/test/ELF/arm-data-relocs.s -o /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/tools/lld/test/ELF/Output/arm-data-relocs.s.tmp.o
: 'RUN: at line 3';   /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/bin/llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi /b/sanitizer-x86_64-linux-fast/build/llvm-project/lld/test/ELF/Inputs/abs256.s -o /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/tools/lld/test/ELF/Output/arm-data-relocs.s.tmp256.o
: 'RUN: at line 4';   /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/bin/ld.lld /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/tools/lld/test/ELF/Output/arm-data-relocs.s.tmp.o /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/tools/lld/test/ELF/Output/arm-data-relocs.s.tmp256.o -o /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/tools/lld/test/ELF/Output/arm-data-relocs.s.tmp
: 'RUN: at line 5';   /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/bin/llvm-objdump -s /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/tools/lld/test/ELF/Output/arm-data-relocs.s.tmp | /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/bin/FileCheck /b/sanitizer-x86_64-linux-fast/build/llvm-project/lld/test/ELF/arm-data-relocs.s --check-prefixes=CHECK,LE
: 'RUN: at line 7';   /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/bin/llvm-mc -filetype=obj -triple=armv7aeb-none-linux-gnueabi /b/sanitizer-x86_64-linux-fast/build/llvm-project/lld/test/ELF/arm-data-relocs.s -o /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/tools/lld/test/ELF/Output/arm-data-relocs.s.tmp.be.o
: 'RUN: at line 8';   /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/bin/llvm-mc -filetype=obj -triple=armv7aeb-none-linux-gnueabi /b/sanitizer-x86_64-linux-fast/build/llvm-project/lld/test/ELF/Inputs/abs256.s -o /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/tools/lld/test/ELF/Output/arm-data-relocs.s.tmp256.be.o
: 'RUN: at line 9';   /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/bin/ld.lld /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/tools/lld/test/ELF/Output/arm-data-relocs.s.tmp.be.o /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/tools/lld/test/ELF/Output/arm-data-relocs.s.tmp256.be.o -o /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/tools/lld/test/ELF/Output/arm-data-relocs.s.tmp.be
: 'RUN: at line 10';   /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/bin/llvm-objdump -s /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/tools/lld/test/ELF/Output/arm-data-relocs.s.tmp.be | /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/bin/FileCheck /b/sanitizer-x86_64-linux-fast/build/llvm-project/lld/test/ELF/arm-data-relocs.s --check-prefixes=CHECK,BE
: 'RUN: at line 12';   /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/bin/ld.lld --be8 /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/tools/lld/test/ELF/Output/arm-data-relocs.s.tmp.be.o /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/tools/lld/test/ELF/Output/arm-data-relocs.s.tmp256.be.o -o /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/tools/lld/test/ELF/Output/arm-data-relocs.s.tmp.be8
: 'RUN: at line 13';   /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/bin/llvm-objdump -s /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/tools/lld/test/ELF/Output/arm-data-relocs.s.tmp.be8 | /b/sanitizer-x86_64-linux-fast/build/llvm_build_asan_ubsan/bin/FileCheck /b/sanitizer-x86_64-linux-fast/build/llvm-project/lld/test/ELF/arm-data-relocs.s --check-prefixes=CHECK,BE
--
Exit Code: 1
Command Output (stderr):
--
/b/sanitizer-x86_64-linux-fast/build/llvm-project/llvm/include/llvm/ADT/DenseMap.h:656:46: runtime error: applying non-zero offset 696 to null pointer
SUMMARY: UndefinedBehaviorSanitizer: undefined-behavior /b/sanitizer-x86_64-linux-fast/build/llvm-project/llvm/include/llvm/ADT/DenseMap.h:656:46 in

[MaskRay]

f146763e0788f84de227623d87adccd5890ecdc6 Revert "Revert "[lld][Arm] Big Endian - Byte invariant support.""

The convention is to use reland and include the original description (including Differential Revision: ) in the reland commit.
You may additionally state what has been fixed.

lld/ELF/Arch/ARM.cpp

 //===- ARM.cpp ------------------------------------------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
+#include "InputFiles.h"
 #include "Symbols.h"
 #include "SyntheticSections.h"
 #include "Target.h"
 #include "lld/Common/ErrorHandler.h"
 #include "llvm/BinaryFormat/ELF.h"
 #include "llvm/Support/Endian.h"
 
 using namespace llvm;
 using namespace llvm::support::endian;
 using namespace llvm::support;
 using namespace llvm::ELF;
 using namespace lld;
 using namespace lld::elf;
 
 namespace {
 class ARM final : public TargetInfo {
 public:
   ARM();
   uint32_t calcEFlags() const override;
   RelExpr getRelExpr(RelType type, const Symbol &s,
                      const uint8_t *loc) const override;
   RelType getDynRel(RelType type) const override;
   int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override;
   void writeGotPlt(uint8_t *buf, const Symbol &s) const override;
   void writeIgotPlt(uint8_t *buf, const Symbol &s) const override;
   void writePltHeader(uint8_t *buf) const override;
   void writePlt(uint8_t *buf, const Symbol &sym,
                 uint64_t pltEntryAddr) const override;
   void addPltSymbols(InputSection &isec, uint64_t off) const override;
   void addPltHeaderSymbols(InputSection &isd) const override;
   bool needsThunk(RelExpr expr, RelType type, const InputFile *file,
                   uint64_t branchAddr, const Symbol &s,
                   int64_t a) const override;
   uint32_t getThunkSectionSpacing() const override;
   bool inBranchRange(RelType type, uint64_t src, uint64_t dst) const override;
   void relocate(uint8_t *loc, const Relocation &rel,
                 uint64_t val) const override;
 };
+enum class CodeState { Data = 0, Thumb = 2, Arm = 4 };
 } // namespace
 
+static DenseMap<InputSection *, SmallVector<const Defined *, 0>> sectionMap;
+
 ARM::ARM() {
   copyRel = R_ARM_COPY;
   relativeRel = R_ARM_RELATIVE;
   iRelativeRel = R_ARM_IRELATIVE;
   gotRel = R_ARM_GLOB_DAT;
   pltRel = R_ARM_JUMP_SLOT;
   symbolicRel = R_ARM_ABS32;
   tlsGotRel = R_ARM_TLS_TPOFF32;
   tlsModuleIndexRel = R_ARM_TLS_DTPMOD32;
   tlsOffsetRel = R_ARM_TLS_DTPOFF32;
   pltHeaderSize = 32;
   pltEntrySize = 16;
   ipltEntrySize = 16;
   trapInstr = {0xd4, 0xd4, 0xd4, 0xd4};
   needsThunks = true;
   defaultMaxPageSize = 65536;
 }
 
 uint32_t ARM::calcEFlags() const {
   // The ABIFloatType is used by loaders to detect the floating point calling
   // convention.
   uint32_t abiFloatType = 0;
+
+  // Set the EF_ARM_BE8 flag in the ELF header, if ELF file is big-endian
+  // with BE-8 code.
+  uint32_t armBE8 = 0;
+
   if (config->armVFPArgs == ARMVFPArgKind::Base ||
       config->armVFPArgs == ARMVFPArgKind::Default)
     abiFloatType = EF_ARM_ABI_FLOAT_SOFT;
   else if (config->armVFPArgs == ARMVFPArgKind::VFP)
     abiFloatType = EF_ARM_ABI_FLOAT_HARD;
 
+  if (!config->isLE && config->armBe8)
+    armBE8 = EF_ARM_BE8;
+
   // We don't currently use any features incompatible with EF_ARM_EABI_VER5,
   // but we don't have any firm guarantees of conformance. Linux AArch64
   // kernels (as of 2016) require an EABI version to be set.
-  return EF_ARM_EABI_VER5 | abiFloatType;
+  return EF_ARM_EABI_VER5 | abiFloatType | armBE8;
 }
 
 RelExpr ARM::getRelExpr(RelType type, const Symbol &s,
                         const uint8_t *loc) const {
   switch (type) {
   case R_ARM_ABS32:
   case R_ARM_MOVW_ABS_NC:
   case R_ARM_MOVT_ABS:
int64_t ARM::getImplicitAddend(const uint8_t *buf, RelType type) const {
   case R_ARM_NONE:
   case R_ARM_V4BX:
   case R_ARM_JUMP_SLOT:
     // These relocations are defined as not having an implicit addend.
     return 0;
   }
 }
 
+static bool isArmMapSymbol(const Symbol *b) {
+  return b->getName() == "$a" || b->getName().startswith("$a.");
+}
+
+static bool isThumbMapSymbol(const Symbol *s) {
+  return s->getName() == "$t" || s->getName().startswith("$t.");
+}
+
+static bool isDataMapSymbol(const Symbol *b) {
+  return b->getName() == "$d" || b->getName().startswith("$d.");
+}
+
+void elf::sortArmMappingSymbols() {
+  // For each input section make sure the mapping symbols are sorted in
+  // ascending order.
+  for (auto &kv : sectionMap) {
+    SmallVector<const Defined *, 0> &mapSyms = kv.second;
+    llvm::stable_sort(mapSyms, [](const Defined *a, const Defined *b) {
+      return a->value < b->value;
+    });
+  }
+}
+
+void elf::addArmInputSectionMappingSymbols() {
+  // Collect mapping symbols for every executable input sections.
+  // The linker generated mapping symbols for all the synthetic
+  // sections are adding into the sectionmap through the function
+  // addArmSyntheitcSectionMappingSymbol.
+  for (ELFFileBase *file : ctx.objectFiles) {
+    for (Symbol *sym : file->getLocalSymbols()) {
+      auto *def = dyn_cast<Defined>(sym);
+      if (!def)
+        continue;
+      if (!isArmMapSymbol(def) && !isDataMapSymbol(def) &&
+          !isThumbMapSymbol(def))
+        continue;
+      if (auto *sec = cast_if_present<InputSection>(def->section))
+        if (sec->flags & SHF_EXECINSTR)
+          sectionMap[sec].push_back(def);
+    }
+  }
+}
+
+// Synthetic sections are not backed by an ELF file where we can access the
+// symbol table, instead mapping symbols added to synthetic sections are stored
+// in the synthetic symbol table. Due to the presence of strip (--strip-all),
+// we can not rely on the synthetic symbol table retaining the mapping symbols.
+// Instead we record the mapping symbols locally.
+void elf::addArmSyntheticSectionMappingSymbol(Defined *sym) {
+  if (!isArmMapSymbol(sym) && !isDataMapSymbol(sym) && !isThumbMapSymbol(sym))
+    return;
+  if (auto *sec = cast_if_present<InputSection>(sym->section))
+    if (sec->flags & SHF_EXECINSTR)
+      sectionMap[sec].push_back(sym);
+}
+
+static void toLittleEndianInstructions(uint8_t *buf, uint64_t start,
+                                       uint64_t end, uint64_t width) {
+  CodeState curState = static_cast<CodeState>(width);
+  if (curState == CodeState::Arm)
+    for (uint64_t i = start; i < end; i += width)
+      write32le(buf + i, read32(buf + i));
+
+  if (curState == CodeState::Thumb)
+    for (uint64_t i = start; i < end; i += width)
+      write16le(buf + i, read16(buf + i));
+}
+
+// Arm BE8 big endian format requires instructions to be little endian, with
+// the initial contents big-endian. Convert the big-endian instructions to
+// little endian leaving literal data untouched. We use mapping symbols to
+// identify half open intervals of Arm code [$a, non $a) and Thumb code
+// [$t, non $t) and convert these to little endian a word or half word at a
+// time respectively.
+void elf::convertArmInstructionstoBE8(InputSection *sec, uint8_t *buf) {
+  SmallVector<const Defined *, 0> &mapSyms = sectionMap[sec];
+
+  if (mapSyms.empty())
+    return;
+
+  CodeState curState = CodeState::Data;
+  uint64_t start = 0, width = 0, size = sec->getSize();
+  for (auto &msym : mapSyms) {
+    CodeState newState = CodeState::Data;
+    if (isThumbMapSymbol(msym))
+      newState = CodeState::Thumb;
+    else if (isArmMapSymbol(msym))
+      newState = CodeState::Arm;
+
+    if (newState == curState)
+      continue;
+
+    if (curState != CodeState::Data) {
+      width = static_cast<uint64_t>(curState);
+      toLittleEndianInstructions(buf, start, msym->value, width);
+    }
+    start = msym->value;
+    curState = newState;
+  }
+
+  // Passed last mapping symbol, may need to reverse
+  // up to end of section.
+  if (curState != CodeState::Data) {
+    width = static_cast<uint64_t>(curState);
+    toLittleEndianInstructions(buf, start, size, width);
+  }
+}
+
 TargetInfo *elf::getARMTargetInfo() {
   static ARM target;
   return &target;
 }
 

lld/ELF/Config.h

llvm::MapVector<std::pair<const InputSectionBase *, const InputSectionBase *>,
                   uint64_t>
       callGraphProfile;
   bool allowMultipleDefinition;
   bool androidPackDynRelocs = false;
   bool armHasBlx = false;
   bool armHasMovtMovw = false;
   bool armJ1J2BranchEncoding = false;
   bool asNeeded = false;
+  bool armBe8 = false;
   BsymbolicKind bsymbolic = BsymbolicKind::None;
   bool callGraphProfileSort;
   bool checkSections;
   bool checkDynamicRelocs;
   llvm::DebugCompressionType compressDebugSections;
   bool cref;
   llvm::SmallVector<std::pair<llvm::GlobPattern, uint64_t>, 0>
       deadRelocInNonAlloc;

lld/ELF/Driver.cpp

if (config->emachine == EM_MIPS && config->gnuHash)
     error("the .gnu.hash section is not compatible with the MIPS target");
 
   if (config->fixCortexA53Errata843419 && config->emachine != EM_AARCH64)
     error("--fix-cortex-a53-843419 is only supported on AArch64 targets");
 
   if (config->fixCortexA8 && config->emachine != EM_ARM)
     error("--fix-cortex-a8 is only supported on ARM targets");
 
+  if (config->armBe8 && config->emachine != EM_ARM)
+    error("--be8 is only supported on ARM targets");
+
   if (config->fixCortexA8 && !config->isLE)
     error("--fix-cortex-a8 is not supported on big endian targets");
-  
   if (config->tocOptimize && config->emachine != EM_PPC64)
     error("--toc-optimize is only supported on PowerPC64 targets");
 
   if (config->pcRelOptimize && config->emachine != EM_PPC64)
     error("--pcrel-optimize is only supported on PowerPC64 targets");
 
   if (config->relaxGP && config->emachine != EM_RISCV)
     error("--relax-gp is only supported on RISC-V targets");
config->allowMultipleDefinition =
                    OPT_no_allow_multiple_definition, false) ||
       hasZOption(args, "muldefs");
   config->androidMemtagHeap =
       args.hasFlag(OPT_android_memtag_heap, OPT_no_android_memtag_heap, false);
   config->androidMemtagStack = args.hasFlag(OPT_android_memtag_stack,
                                             OPT_no_android_memtag_stack, false);
   config->androidMemtagMode = getMemtagMode(args);
   config->auxiliaryList = args::getStrings(args, OPT_auxiliary);
+  config->armBe8 = args.hasArg(OPT_be8);
   if (opt::Arg *arg =
           args.getLastArg(OPT_Bno_symbolic, OPT_Bsymbolic_non_weak_functions,
                           OPT_Bsymbolic_functions, OPT_Bsymbolic)) {
     if (arg->getOption().matches(OPT_Bsymbolic_non_weak_functions))
       config->bsymbolic = BsymbolicKind::NonWeakFunctions;
     else if (arg->getOption().matches(OPT_Bsymbolic_functions))
       config->bsymbolic = BsymbolicKind::Functions;
     else if (arg->getOption().matches(OPT_Bsymbolic))

lld/ELF/Options.td

 
 multiclass B<string name, string help1, string help2> {
   def NAME: Flag<["--", "-"], name>, HelpText<help1>;
   def no_ # NAME: Flag<["--", "-"], "no-" # name>, HelpText<help2>;
 }
 
 defm auxiliary: Eq<"auxiliary", "Set DT_AUXILIARY field to the specified name">;
 
+def be8: F<"be8">, HelpText<"write a Big Endian ELF file using BE8 format (AArch32 only)">;
+
 def Bno_symbolic: F<"Bno-symbolic">, HelpText<"Don't bind default visibility defined symbols locally for -shared (default)">;
 
 def Bsymbolic: F<"Bsymbolic">, HelpText<"Bind default visibility defined symbols locally for -shared">;
 
 def Bsymbolic_functions: F<"Bsymbolic-functions">,
   HelpText<"Bind default visibility defined function symbols locally for -shared">;
 
 def Bsymbolic_non_weak_functions: F<"Bsymbolic-non-weak-functions">,

lld/ELF/OutputSections.cpp

auto fn = [=](size_t begin, size_t end) {
     size_t numSections = sections.size();
     for (size_t i = begin; i != end; ++i) {
       InputSection *isec = sections[i];
       if (auto *s = dyn_cast<SyntheticSection>(isec))
         s->writeTo(buf + isec->outSecOff);
       else
         isec->writeTo<ELFT>(buf + isec->outSecOff);
 
+      // When in Arm BE8 mode, the linker has to convert the big-endian
+      // instructions to little-endian, leaving the data big-endian.
+      if (config->emachine == EM_ARM && !config->isLE && config->armBe8 &&
+          (flags & SHF_EXECINSTR))
+        convertArmInstructionstoBE8(isec, buf + isec->outSecOff);
+
       // Fill gaps between sections.
       if (nonZeroFiller) {
         uint8_t *start = buf + isec->outSecOff + isec->getSize();
         uint8_t *end;
         if (i + 1 == numSections)
           end = buf + size;
         else
           end = buf + sections[i + 1]->outSecOff;

lld/ELF/SyntheticSections.cpp

 }
 
 Defined *elf::addSyntheticLocal(StringRef name, uint8_t type, uint64_t value,
                                 uint64_t size, InputSectionBase &section) {
   Defined *s = makeDefined(section.file, name, STB_LOCAL, STV_DEFAULT, type,
                            value, size, &section);
   if (in.symTab)
     in.symTab->addSymbol(s);
+
+  if (config->emachine == EM_ARM && !config->isLE && config->armBe8 &&
+      (section.flags & SHF_EXECINSTR))
+    // Adding Linker generated mapping symbols to the arm specific mapping
+    // symbols list.
+    addArmSyntheticSectionMappingSymbol(s);
+
   return s;
 }
 
 static size_t getHashSize() {
   switch (config->buildId) {
   case BuildIdKind::Fast:
     return 8;
   case BuildIdKind::Md5:

lld/ELF/Target.h

 // to the local entry-point.
 unsigned getPPC64GlobalEntryToLocalEntryOffset(uint8_t stOther);
 
 // Write a prefixed instruction, which is a 4-byte prefix followed by a 4-byte
 // instruction (regardless of endianness). Therefore, the prefix is always in
 // lower memory than the instruction.
 void writePrefixedInstruction(uint8_t *loc, uint64_t insn);
 
 void addPPC64SaveRestore();
 uint64_t getPPC64TocBase();
 uint64_t getAArch64Page(uint64_t expr);
 void riscvFinalizeRelax(int passes);
 void mergeRISCVAttributesSections();
+void addArmInputSectionMappingSymbols();
+void addArmSyntheticSectionMappingSymbol(Defined *);
+void sortArmMappingSymbols();
+void convertArmInstructionstoBE8(InputSection *sec, uint8_t *buf);
 
 LLVM_LIBRARY_VISIBILITY extern const TargetInfo *target;
 TargetInfo *getTarget();
 
 template <class ELFT> bool isMipsPIC(const Defined *sym);
 
 void reportRangeError(uint8_t *loc, const Relocation &rel, const Twine &v,
                       int64_t min, uint64_t max);

lld/ELF/Thunks.cpp

void ThumbV6MABSLongThunk::writeLong(uint8_t *buf) {
   uint64_t s = getARMThunkDestVA(destination);
   target->relocateNoSym(buf + 8, R_ARM_ABS32, s);
 }
 
 void ThumbV6MABSLongThunk::addSymbols(ThunkSection &isec) {
   addSymbol(saver().save("__Thumbv6MABSLongThunk_" + destination.getName()),
             STT_FUNC, 1, isec);
   addSymbol("$t", STT_NOTYPE, 0, isec);
+  if (!getMayUseShortThunk())
     addSymbol("$d", STT_NOTYPE, 8, isec);
 }
 
 void ThumbV6MPILongThunk::writeLong(uint8_t *buf) {
   // Most Thumb instructions cannot access the high registers r8 - r15. As the
   // only register we can corrupt is ip (r12) we must instead spill a low
   // register to the stack to use as a scratch register.
   write16(buf + 0, 0xb401);   // P:  push {r0}        ; Obtain scratch register
   write16(buf + 2, 0x4802);   //     ldr r0, [pc, #8] ; L2
   write16(buf + 4, 0x4684);   //     mov ip, r0       ; high to low register
   write16(buf + 6, 0xbc01);   //     pop {r0}         ; restore scratch register
   write16(buf + 8, 0x44e7);   // L1: add pc, ip       ; transfer control
   write16(buf + 10, 0x46c0);  //     nop              ; pad to 4-byte boundary
   write32(buf + 12, 0x00000000);  // L2: .word S - (P + (L1 - P) + 4)
   uint64_t s = getARMThunkDestVA(destination);
   uint64_t p = getThunkTargetSym()->getVA() & ~0x1;
   target->relocateNoSym(buf + 12, R_ARM_REL32, s - p - 12);
 }
 
 void ThumbV6MPILongThunk::addSymbols(ThunkSection &isec) {
   addSymbol(saver().save("__Thumbv6MPILongThunk_" + destination.getName()),
             STT_FUNC, 1, isec);
   addSymbol("$t", STT_NOTYPE, 0, isec);
+  if (!getMayUseShortThunk())
     addSymbol("$d", STT_NOTYPE, 12, isec);
 }
 
 void ARMV5LongLdrPcThunk::writeLong(uint8_t *buf) {
   write32(buf + 0, 0xe51ff004); // ldr pc, [pc,#-4] ; L1
   write32(buf + 4, 0x00000000); // L1: .word S
   target->relocateNoSym(buf + 4, R_ARM_ABS32, getARMThunkDestVA(destination));
 }
 
 void ARMV5LongLdrPcThunk::addSymbols(ThunkSection &isec) {
   addSymbol(saver().save("__ARMv5LongLdrPcThunk_" + destination.getName()),
             STT_FUNC, 0, isec);
   addSymbol("$a", STT_NOTYPE, 0, isec);
+  if (!getMayUseShortThunk())
     addSymbol("$d", STT_NOTYPE, 4, isec);
 }
 
 void ARMV4ABSLongBXThunk::writeLong(uint8_t *buf) {
   write32(buf + 0, 0xe59fc000); // ldr r12, [pc] ; L1
   write32(buf + 4, 0xe12fff1c); // bx r12
   write32(buf + 8, 0x00000000); // L1: .word S
   target->relocateNoSym(buf + 8, R_ARM_ABS32, getARMThunkDestVA(destination));
 }
 
 void ARMV4ABSLongBXThunk::addSymbols(ThunkSection &isec) {
   addSymbol(saver().save("__ARMv4ABSLongBXThunk_" + destination.getName()),
             STT_FUNC, 0, isec);
   addSymbol("$a", STT_NOTYPE, 0, isec);
+  if (!getMayUseShortThunk())
     addSymbol("$d", STT_NOTYPE, 8, isec);
 }
 
 void ThumbV4ABSLongBXThunk::writeLong(uint8_t *buf) {
   write16(buf + 0, 0x4778); // bx pc
   write16(buf + 2, 0xe7fd); // b #-6 ; Arm recommended sequence to follow bx pc
   write32(buf + 4, 0xe51ff004); // ldr pc, [pc, #-4] ; L1
   write32(buf + 8, 0x00000000); // L1: .word S
   target->relocateNoSym(buf + 8, R_ARM_ABS32, getARMThunkDestVA(destination));
 }
 
 void ThumbV4ABSLongBXThunk::addSymbols(ThunkSection &isec) {
   addSymbol(saver().save("__Thumbv4ABSLongBXThunk_" + destination.getName()),
             STT_FUNC, 1, isec);
   addSymbol("$t", STT_NOTYPE, 0, isec);
   addSymbol("$a", STT_NOTYPE, 4, isec);
+  if (!getMayUseShortThunk())
     addSymbol("$d", STT_NOTYPE, 8, isec);
 }
 
 void ThumbV4ABSLongThunk::writeLong(uint8_t *buf) {
   write16(buf + 0, 0x4778); // bx pc
   write16(buf + 2, 0xe7fd); // b #-6 ; Arm recommended sequence to follow bx pc
   write32(buf + 4, 0xe59fc000); // ldr r12, [pc] ; L1
   write32(buf + 8, 0xe12fff1c); // bx r12
   write32(buf + 12, 0x00000000); // L1: .word S
   target->relocateNoSym(buf + 12, R_ARM_ABS32, getARMThunkDestVA(destination));
 }
 
 void ThumbV4ABSLongThunk::addSymbols(ThunkSection &isec) {
   addSymbol(saver().save("__Thumbv4ABSLongThunk_" + destination.getName()),
             STT_FUNC, 1, isec);
   addSymbol("$t", STT_NOTYPE, 0, isec);
   addSymbol("$a", STT_NOTYPE, 4, isec);
+  if (!getMayUseShortThunk())
     addSymbol("$d", STT_NOTYPE, 12, isec);
 }
 
 void ARMV4PILongBXThunk::writeLong(uint8_t *buf) {
   write32(buf + 0, 0xe59fc004); // P:  ldr ip, [pc,#4] ; L2
   write32(buf + 4, 0xe08fc00c);  // L1: add ip, pc, ip
   write32(buf + 8, 0xe12fff1c); //     bx ip
   write32(buf + 12, 0x00000000); // L2: .word S - (P + (L1 - P) + 8)
   uint64_t s = getARMThunkDestVA(destination);
   uint64_t p = getThunkTargetSym()->getVA() & ~0x1;
   target->relocateNoSym(buf + 12, R_ARM_REL32, s - p - 12);
 }
 
 void ARMV4PILongBXThunk::addSymbols(ThunkSection &isec) {
   addSymbol(saver().save("__ARMv4PILongBXThunk_" + destination.getName()),
             STT_FUNC, 0, isec);
   addSymbol("$a", STT_NOTYPE, 0, isec);
+  if (!getMayUseShortThunk())
     addSymbol("$d", STT_NOTYPE, 12, isec);
 }
 
 void ARMV4PILongThunk::writeLong(uint8_t *buf) {
   write32(buf + 0, 0xe59fc000); // P:  ldr ip, [pc] ; L2
   write32(buf + 4, 0xe08ff00c); // L1: add pc, pc, r12
   write32(buf + 8, 0x00000000); // L2: .word S - (P + (L1 - P) + 8)
   uint64_t s = getARMThunkDestVA(destination);
   uint64_t p = getThunkTargetSym()->getVA() & ~0x1;
   target->relocateNoSym(buf + 8, R_ARM_REL32, s - p - 12);
 }
 
 void ARMV4PILongThunk::addSymbols(ThunkSection &isec) {
   addSymbol(saver().save("__ARMv4PILongThunk_" + destination.getName()),
             STT_FUNC, 0, isec);
   addSymbol("$a", STT_NOTYPE, 0, isec);
+  if (!getMayUseShortThunk())
     addSymbol("$d", STT_NOTYPE, 8, isec);
 }
 
 void ThumbV4PILongBXThunk::writeLong(uint8_t *buf) {
   write16(buf + 0, 0x4778); // P:  bx pc
   write16(buf + 2, 0xe7fd); //     b #-6 ; Arm recommended sequence to follow bx pc
   write32(buf + 4, 0xe59fc000); //     ldr r12, [pc] ; L2
   write32(buf + 8, 0xe08cf00f); // L1: add pc, r12, pc
   write32(buf + 12, 0x00000000); // L2: .word S - (P + (L1 - P) + 8)
   uint64_t s = getARMThunkDestVA(destination);
   uint64_t p = getThunkTargetSym()->getVA() & ~0x1;
   target->relocateNoSym(buf + 12, R_ARM_REL32, s - p - 16);
 }
 
 void ThumbV4PILongBXThunk::addSymbols(ThunkSection &isec) {
   addSymbol(saver().save("__Thumbv4PILongBXThunk_" + destination.getName()),
             STT_FUNC, 1, isec);
   addSymbol("$t", STT_NOTYPE, 0, isec);
   addSymbol("$a", STT_NOTYPE, 4, isec);
+  if (!getMayUseShortThunk())
     addSymbol("$d", STT_NOTYPE, 12, isec);
 }
 
 void ThumbV4PILongThunk::writeLong(uint8_t *buf) {
   write16(buf + 0, 0x4778); // P:  bx pc
   write16(buf + 2, 0xe7fd); //     b #-6 ; Arm recommended sequence to follow bx pc
   write32(buf + 4, 0xe59fc004); //     ldr ip, [pc,#4] ; L2
   write32(buf + 8, 0xe08fc00c); // L1: add ip, pc, ip
   write32(buf + 12, 0xe12fff1c); //     bx ip
   write32(buf + 16, 0x00000000); // L2: .word S - (P + (L1 - P) + 8)
   uint64_t s = getARMThunkDestVA(destination);
   uint64_t p = getThunkTargetSym()->getVA() & ~0x1;
   target->relocateNoSym(buf + 16, R_ARM_REL32, s - p - 16);
 }
 
 void ThumbV4PILongThunk::addSymbols(ThunkSection &isec) {
   addSymbol(saver().save("__Thumbv4PILongThunk_" + destination.getName()),
             STT_FUNC, 1, isec);
   addSymbol("$t", STT_NOTYPE, 0, isec);
   addSymbol("$a", STT_NOTYPE, 4, isec);
+  if (!getMayUseShortThunk())
     addSymbol("$d", STT_NOTYPE, 16, isec);
 }
 
 // Use the long jump which covers a range up to 8MiB.
 void AVRThunk::writeTo(uint8_t *buf) {
   write32(buf, 0x940c); // jmp func
   target->relocateNoSym(buf, R_AVR_CALL, destination.getVA());
 }
 

lld/ELF/Writer.cpp

if (config->optimizeBBJumps)
     optimizeBasicBlockJumps();
 
   // Fill other section headers. The dynamic table is finalized
   // at the end because some tags like RELSZ depend on result
   // of finalizing other sections.
   for (OutputSection *sec : outputSections)
     sec->finalize();
 
   script->checkMemoryRegions();
+
+  if (config->emachine == EM_ARM && !config->isLE && config->armBe8) {
+    addArmInputSectionMappingSymbols();
+    sortArmMappingSymbols();
+  }
 }
 
 // Ensure data sections are not mixed with executable sections when
 // --execute-only is used. --execute-only make pages executable but not
 // readable.
 template <class ELFT> void Writer<ELFT>::checkExecuteOnly() {
   if (!config->executeOnly)
     return;

lld/docs/ld.lld.1

 .Dv DF_SYMBOLIC
 flag.
 .It Fl Bsymbolic-functions
 Bind default visibility defined function symbols locally for
 .Fl shared.
 .It Fl Bsymbolic-non-weak-functions
 Bind default visibility defined STB_GLOBAL function symbols locally for
 .Fl shared.
+.It Fl --be8
+Write a Big Endian ELF File using BE8 format(AArch32 only)
 .It Fl -build-id Ns = Ns Ar value
 Generate a build ID note.
 .Ar value
 may be one of
 .Cm fast ,
 .Cm md5 ,
 .Cm sha1 ,
 .Cm tree ,

lld/test/ELF/arm-bl-v6.s

 // REQUIRES: arm
 // RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv6-none-linux-gnueabi %s -o %t
 // RUN: ld.lld %t -o %t2
 // RUN: llvm-objdump --no-print-imm-hex -d --triple=armv6-none-linux-gnueabi --start-address=0x21000 --stop-address=0x21008 %t2 | FileCheck --check-prefix=CHECK-ARM1 %s
 // RUN: llvm-objdump --no-print-imm-hex -d --triple=thumbv6-none-linux-gnueabi %t2 --start-address=0x21008 --stop-address=0x2100c | FileCheck --check-prefix=CHECK-THUMB1 %s
 // RUN: llvm-objdump --no-print-imm-hex -d --triple=armv6-none-linux-gnueabi --start-address=0x22100c --stop-address=0x221014 %t2 | FileCheck --check-prefix=CHECK-ARM2 %s
 // RUN: llvm-objdump --no-print-imm-hex -d --triple=thumbv6-none-linux-gnueabi %t2 --start-address=0x622000 --stop-address=0x622002 | FileCheck --check-prefix=CHECK-THUMB2 %s
 
 // RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv6eb-none-linux-gnueabi %s -o %t
 // RUN: ld.lld %t -o %t2
 // RUN: llvm-objdump --no-print-imm-hex -d --triple=armv6eb-none-linux-gnueabi --start-address=0x21000 --stop-address=0x21008 %t2 | FileCheck --check-prefix=CHECK-ARM1 %s
 // RUN: llvm-objdump --no-print-imm-hex -d --triple=thumbv6eb-none-linux-gnueabi %t2 --start-address=0x21008 --stop-address=0x2100c | FileCheck --check-prefix=CHECK-THUMB1 %s
 // RUN: llvm-objdump --no-print-imm-hex -d --triple=armv6eb-none-linux-gnueabi --start-address=0x22100c --stop-address=0x221014 %t2 | FileCheck --check-prefix=CHECK-ARM2-EB %s
 // RUN: llvm-objdump --no-print-imm-hex -d --triple=thumbv6eb-none-linux-gnueabi %t2 --start-address=0x622000 --stop-address=0x622002 | FileCheck --check-prefix=CHECK-THUMB2 %s
 
+// RUN: ld.lld --be8 %t -o %t2
+// RUN: llvm-objdump --no-print-imm-hex -d --triple=armv6eb-none-linux-gnueabi --start-address=0x21000 --stop-address=0x21008 %t2 | FileCheck --check-prefix=CHECK-ARM1 %s
+// RUN: llvm-objdump --no-print-imm-hex -d --triple=thumbv6eb-none-linux-gnueabi %t2 --start-address=0x21008 --stop-address=0x2100c | FileCheck --check-prefix=CHECK-THUMB1 %s
+// RUN: llvm-objdump --no-print-imm-hex -d --triple=armv6eb-none-linux-gnueabi --start-address=0x22100c --stop-address=0x221014 %t2 | FileCheck --check-prefix=CHECK-ARM2-EB %s
+// RUN: llvm-objdump --no-print-imm-hex -d --triple=thumbv6eb-none-linux-gnueabi %t2 --start-address=0x622000 --stop-address=0x622002 | FileCheck --check-prefix=CHECK-THUMB2 %s
+
 /// On Arm v6 the range of a Thumb BL instruction is only 4 megabytes as the
 /// extended range encoding is not supported. The following example has a Thumb
 /// BL that is out of range on ARM v6 and requires a range extension thunk.
 /// As v6 does not support MOVT or MOVW instructions the Thunk must not
 /// use these instructions either.
 
 
 /// ARM v6 supports blx so we shouldn't see the blx not supported warning.

lld/test/ELF/arm-data-relocs.s

 // REQUIRES: arm
 // RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t.o
 // RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %S/Inputs/abs256.s -o %t256.o
 // RUN: ld.lld %t.o %t256.o -o %t
 // RUN: llvm-objdump -s %t | FileCheck %s --check-prefixes=CHECK,LE
 
 // RUN: llvm-mc -filetype=obj -triple=armv7aeb-none-linux-gnueabi %s -o %t.be.o
 // RUN: llvm-mc -filetype=obj -triple=armv7aeb-none-linux-gnueabi %S/Inputs/abs256.s -o %t256.be.o
 // RUN: ld.lld %t.be.o %t256.be.o -o %t.be
 // RUN: llvm-objdump -s %t.be | FileCheck %s --check-prefixes=CHECK,BE
 
+// RUN: ld.lld --be8 %t.be.o %t256.be.o -o %t.be8
+// RUN: llvm-objdump -s %t.be8 | FileCheck %s --check-prefixes=CHECK,BE
+
 .globl _start
 _start:
 .section .R_ARM_ABS, "ax","progbits"
   .word foo + 0x24
 
 // CHECK: Contents of section .R_ARM_ABS:
 // LE-NEXT:  200b4 24010000
 // BE-NEXT:  200b4 00000124
 
 .section .R_ARM_PREL, "ax","progbits"
   .word foo - . + 0x24
 
 // CHECK: Contents of section .R_ARM_PREL:
 // LE-NEXT:  200b8 6c00feff
 // BE-NEXT:  200b8 fffe006c
 

lld/test/ELF/arm-exidx-emit-relocs.s

 // REQUIRES: arm
 // RUN: llvm-mc -filetype=obj --arm-add-build-attributes -triple=armv7a-none-linux-gnueabi %s -o %t
 // RUN: ld.lld --emit-relocs %t -o %t2
 // RUN: llvm-objdump -s --triple=armv7a-none-linux-gnueabi %t2 | FileCheck %s
 // RUN: llvm-readelf --relocs %t2 | FileCheck -check-prefix=CHECK-RELOCS %s
 
 // RUN: llvm-mc -filetype=obj --arm-add-build-attributes -triple=armv7aeb-none-linux-gnueabi -mcpu=cortex-a8 %s -o %t
 // RUN: ld.lld --emit-relocs %t -o %t2
 // RUN: llvm-objdump -s --triple=armv7aeb-none-linux-gnueabi %t2 | FileCheck -check-prefix=CHECK-EB %s
 // RUN: llvm-readelf --relocs %t2 | FileCheck -check-prefix=CHECK-RELOCS %s
 
+// RUN: ld.lld --be8 --emit-relocs %t -o %t2
+// RUN: llvm-objdump -s --triple=armv7aeb-none-linux-gnueabi %t2 | FileCheck -check-prefix=CHECK-EB %s
+// RUN: llvm-readelf --relocs %t2 | FileCheck -check-prefix=CHECK-RELOCS %s
+
 /// LLD does not support --emit-relocs for .ARM.exidx sections as the relocations
 /// from synthetic table entries won't be represented. Given the known use cases
 /// of --emit-relocs, relocating kernels, and binary analysis, the former doesn't
 /// use exceptions and the latter can derive the relocations from the table if
 /// they need them.
  .syntax unified
  /// Will produce an ARM.exidx entry with inline unwinding instructions
  .section .text.func1, "ax",%progbits

lld/test/ELF/arm-exidx-relocatable.s

 // REQUIRES: arm
 // RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t
 // RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %S/Inputs/arm-exidx-cantunwind.s -o %tcantunwind
 // Check that relocatable link maintains SHF_LINK_ORDER
 // RUN: ld.lld -r %t %tcantunwind -o %t4
 // RUN: llvm-readobj -S %t4 | FileCheck %s
 
 // RUN: llvm-mc -filetype=obj -triple=armv7aeb-none-linux-gnueabi -mcpu=cortex-a8 %s -o %t
 // RUN: llvm-mc -filetype=obj -triple=armv7aeb-none-linux-gnueabi -mcpu=cortex-a8 %S/Inputs/arm-exidx-cantunwind.s -o %tcantunwind
 // Check that relocatable link maintains SHF_LINK_ORDER for big endian
 // RUN: ld.lld -r %t %tcantunwind -o %t4
 // RUN: llvm-readobj -S %t4 | FileCheck %s
+// RUN: ld.lld --be8 -r %t %tcantunwind -o %t4
+// RUN: llvm-readobj -S %t4 | FileCheck %s
 
 // Each assembler created .ARM.exidx section has the SHF_LINK_ORDER flag set
 // with the sh_link containing the section index of the executable section
 // containing the function it describes. To maintain this property in
 // relocatable links we pass through the .ARM.exidx section, the section it
 // it has a sh_link to, and the associated relocation sections uncombined.
 
  .syntax unified

lld/test/ELF/arm-exidx-sentinel-norelocatable.s

 // REQUIRES: arm
 // RUN: llvm-mc %s -triple=armv7-unknown-linux-gnueabi -filetype=obj -o %t.o
 // RUN: ld.lld -r %t.o -o %t
 // RUN: llvm-readobj -S %t | FileCheck %s
 
 // RUN: llvm-mc %s -triple=armv7eb-unknown-linux-gnueabi -mcpu=cortex-a8 -filetype=obj -o %t.o
 // RUN: ld.lld -r %t.o -o %t
 // RUN: llvm-readobj -S %t | FileCheck %s
+// RUN: ld.lld --be8 -r %t.o -o %t
+// RUN: llvm-readobj -S %t | FileCheck %s
 
 // Check that when doing a relocatable link we don't add a terminating entry
 // to the .ARM.exidx section
  .syntax unified
  .text
 _start:
  .fnstart
  .cantunwind
  bx lr
  .fnend
 
 // Expect 1 table entry of size 8
 // CHECK: Name: .ARM.exidx
 // CHECK: Size: 8

lld/test/ELF/arm-header.s

 # REQUIRES: arm
 # RUN: llvm-mc -filetype=obj -triple=armv7aeb-none-linux-gnueabi -mcpu=cortex-a8 %s -o %t.o
 # RUN: ld.lld %t.o -o %t1
 # RUN: llvm-readobj -h %t1 | FileCheck %s
 
+# RUN: llvm-mc -filetype=obj -triple=armv7aeb-none-linux-gnueabi -mcpu=cortex-a8 %s -o %t.o
+# RUN: ld.lld --be8 %t.o -o %t1
+# RUN: llvm-readobj -h %t1 | FileCheck -check-prefix=CHECK-EB %s
+
 # CHECK: Format: elf32-bigarm
 
 # CHECK: ElfHeader {
 # CHECK-NEXT:   Ident {
 # CHECK-NEXT:     Magic: (7F 45 4C 46)
 # CHECK-NEXT:     Class: 32-bit (0x1)
 # CHECK-NEXT:     DataEncoding: BigEndian (0x2)
 # CHECK-NEXT:     FileVersion: 1
 # CHECK-NEXT:     OS/ABI: SystemV (0x0)
 # CHECK-NEXT:     ABIVersion: 0
 # CHECK-NEXT:     Unused: (00 00 00 00 00 00 00)
 # CHECK-NEXT:   }
 
 # CHECK:   Flags [ (0x5000200)
 # CHECK-NEXT:     0x200
 # CHECK-NEXT:     0x1000000
 # CHECK-NEXT:     0x4000000
 # CHECK-NEXT:   ]
 
 # CHECK-NOT: 0x800000
 
+# CHECK-EB: Format: elf32-bigarm
+
+# CHECK-EB: ElfHeader {
+# CHECK-EB-NEXT:   Ident {
+# CHECK-EB-NEXT:     Magic: (7F 45 4C 46)
+# CHECK-EB-NEXT:     Class: 32-bit (0x1)
+# CHECK-EB-NEXT:     DataEncoding: BigEndian (0x2)
+# CHECK-EB-NEXT:     FileVersion: 1
+# CHECK-EB-NEXT:     OS/ABI: SystemV (0x0)
+# CHECK-EB-NEXT:     ABIVersion: 0
+# CHECK-EB-NEXT:     Unused: (00 00 00 00 00 00 00)
+# CHECK-EB-NEXT:   }
+
+# CHECK-EB:   Flags [ (0x5800200)
+# CHECK-EB-NEXT:     0x200
+# CHECK-EB-NEXT:     0x800000
+# CHECK-EB-NEXT:     0x1000000
+# CHECK-EB-NEXT:     0x4000000
+# CHECK-EB-NEXT:   ]
+

lld/test/ELF/arm-mov-relocs.s

 // REQUIRES: arm
 // RUN: llvm-mc -filetype=obj -triple=armv7a-unknown-linux-gnueabi %s -o %t
 // RUN: ld.lld %t -o %t2
 // RUN: llvm-objdump --no-print-imm-hex -d %t2 --triple=armv7a-unknown-linux-gnueabi --no-show-raw-insn | FileCheck %s
 // RUN: llvm-mc -filetype=obj -triple=thumbv7a-unknown-linux-gnueabi %s -o %t3
 // RUN: ld.lld %t3 -o %t4
 // RUN: llvm-objdump --no-print-imm-hex -d %t4 --triple=thumbv7a-unknown-linux-gnueabi --no-show-raw-insn | FileCheck %s
 
 // RUN: llvm-mc -filetype=obj -triple=armv7aeb-unknown-linux-gnueabi -mcpu=cortex-a8 %s -o %t
 // RUN: ld.lld %t -o %t2
 // RUN: llvm-objdump --no-print-imm-hex -d %t2 --triple=armv7aeb-unknown-linux-gnueabi --no-show-raw-insn | FileCheck %s
 // RUN: llvm-mc -filetype=obj -triple=thumbv7aeb-unknown-linux-gnueabi -mcpu=cortex-a8 %s -o %t3
 // RUN: ld.lld %t3 -o %t4
 // RUN: llvm-objdump --no-print-imm-hex -d %t4 --triple=thumbv7aeb-unknown-linux-gnueabi --no-show-raw-insn | FileCheck %s
 
+// RUN: ld.lld --be8 %t -o %t2
+// RUN: llvm-objdump --no-print-imm-hex -d %t2 --triple=armv7aeb-unknown-linux-gnueabi --no-show-raw-insn | FileCheck %s
+// RUN: ld.lld --be8 %t3 -o %t4
+// RUN: llvm-objdump --no-print-imm-hex -d %t4 --triple=thumbv7aeb-unknown-linux-gnueabi --no-show-raw-insn | FileCheck %s
+
 /// Test the following relocation pairs:
 ///  * R_ARM_MOVW_ABS_NC and R_ARM_MOVT_ABS
 ///  * R_ARM_MOVW_PREL_NC and R_ARM_MOVT_PREL
 ///  * R_ARM_MOVW_BREL_NC and R_ARM_MOVT_BREL
 ///
 ///  * R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_ABS
 ///  * R_ARM_THM_MOVW_PREL_NC and R_ARM_THM_MOVT_PREL
 ///  * R_ARM_THM_MOVW_BREL_NC and R_ARM_THM_MOVT_BREL

lld/test/ELF/arm-plt-reloc.s

 // REQUIRES: arm
 // RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %p/Inputs/arm-plt-reloc.s -o %t1
 // RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t2
 // RUN: ld.lld %t1 %t2 -o %t
 // RUN: llvm-objdump --no-print-imm-hex --triple=armv7a-none-linux-gnueabi -d --no-show-raw-insn %t | FileCheck %s
 // RUN: ld.lld -shared %t1 %t2 -o %t3
 // RUN: llvm-objdump --no-print-imm-hex --triple=armv7a-none-linux-gnueabi -d --no-show-raw-insn %t3 | FileCheck --check-prefix=DSO %s
 // RUN: llvm-readobj -S -r %t3 | FileCheck -check-prefix=DSOREL %s
+
+// RUN: llvm-mc -filetype=obj -triple=armv7aeb-none-linux-gnueabi %p/Inputs/arm-plt-reloc.s -o %t1.be
+// RUN: llvm-mc -filetype=obj -triple=armv7aeb-none-linux-gnueabi %s -o %t2.be
+// RUN: ld.lld %t1.be %t2.be -o %t.be
+// RUN: llvm-objdump --no-print-imm-hex --triple=armv7aeb-none-linux-gnueabi -d --no-show-raw-insn %t.be | FileCheck %s
+// RUN: ld.lld -shared %t1.be %t2.be -o %t3.be
+// RUN: llvm-objdump --no-print-imm-hex --triple=armv7aeb-none-linux-gnueabi -d --no-show-raw-insn %t3.be | FileCheck --check-prefix=DSO %s
+// RUN: llvm-readobj -S -r %t3.be | FileCheck -check-prefix=DSOREL %s
+
+// RUN: ld.lld --be8 %t1.be %t2.be -o %t.be
+// RUN: llvm-objdump --no-print-imm-hex --triple=armv7aeb-none-linux-gnueabi -d --no-show-raw-insn %t.be | FileCheck %s
+// RUN: ld.lld --be8 -shared %t1.be %t2.be -o %t3.be
+// RUN: llvm-objdump --no-print-imm-hex --triple=armv7aeb-none-linux-gnueabi -d --no-show-raw-insn %t3.be | FileCheck --check-prefix=DSO %s
+// RUN: llvm-readobj -S -r %t3.be | FileCheck -check-prefix=DSOREL %s
 //
 // Test PLT entry generation
  .syntax unified
  .text
  .align 2
  .globl _start
  .type  _start,%function
 _start:

 // RUN:       .text 0x1000 : { *(.text) } \
 // RUN:       .plt  0x2000 : { *(.plt) *(.plt.*) } \
 // RUN:       .got.plt 0x1100000 : { *(.got.plt) } \
 // RUN:       }" > %t.script
 // RUN: ld.lld --hash-style=sysv --script %t.script -shared %t1 %t2 -o %t4
 // RUN: llvm-objdump --no-print-imm-hex --triple=armv7a-none-linux-gnueabi -d --no-show-raw-insn %t4 | FileCheck --check-prefix=CHECKHIGH %s
 // RUN: llvm-readobj -S -r %t4 | FileCheck --check-prefix=DSORELHIGH %s
 
+// RUN: ld.lld --hash-style=sysv --script %t.script -shared %t1.be %t2.be -o %t4.be
+// RUN: llvm-objdump --no-print-imm-hex --triple=armv7aeb-none-linux-gnueabi -d --no-show-raw-insn %t4.be | FileCheck --check-prefix=CHECKHIGH %s
+// RUN: llvm-readobj -S -r %t4.be | FileCheck --check-prefix=DSORELHIGH %s
+// RUN: ld.lld --be8 --hash-style=sysv --script %t.script -shared %t1.be %t2.be -o %t4.be
+// RUN: llvm-objdump --no-print-imm-hex --triple=armv7aeb-none-linux-gnueabi -d --no-show-raw-insn %t4.be | FileCheck --check-prefix=CHECKHIGH %s
+// RUN: llvm-readobj -S -r %t4.be | FileCheck --check-prefix=DSORELHIGH %s
+
 // CHECKHIGH: Disassembly of section .text:
 // CHECKHIGH-EMPTY:
 // CHECKHIGH-NEXT: <func1>:
 // CHECKHIGH-NEXT:     1000:       bx      lr
 // CHECKHIGH: <func2>:
 // CHECKHIGH-NEXT:     1004:       bx      lr
 // CHECKHIGH: <func3>:
 // CHECKHIGH-NEXT:     1008:       bx      lr

 // RUN:       .text 0x1000 : { *(.text) } \
 // RUN:       .plt  0x2000 : { *(.plt) *(.plt.*) } \
 // RUN:       .got.plt 0x11111100 : { *(.got.plt) } \
 // RUN:       }" > %t2.script
 // RUN: ld.lld --hash-style=sysv --script %t2.script -shared %t1 %t2 -o %t5
 // RUN: llvm-objdump --no-print-imm-hex --triple=armv7a-none-linux-gnueabi -d --no-show-raw-insn %t5 | FileCheck --check-prefix=CHECKLONG %s
 // RUN: llvm-readobj -S -r %t5 | FileCheck --check-prefix=DSORELLONG %s
 
+// RUN: ld.lld --hash-style=sysv --script %t2.script -shared %t1.be %t2.be -o %t5.be
+// RUN: llvm-objdump --no-print-imm-hex --triple=armv7aeb-none-linux-gnueabi -d --no-show-raw-insn %t5.be | FileCheck --check-prefix=CHECKLONG-EB %s
+// RUN: llvm-readobj -S -r %t5.be | FileCheck --check-prefix=DSORELLONG %s
+// RUN: ld.lld --be8 --hash-style=sysv --script %t2.script -shared %t1.be %t2.be -o %t5.be
+// RUN: llvm-objdump --no-print-imm-hex --triple=armv7aeb-none-linux-gnueabi -d --no-show-raw-insn %t5.be | FileCheck --check-prefix=CHECKLONG-EB %s
+// RUN: llvm-readobj -S -r %t5.be | FileCheck --check-prefix=DSORELLONG %s
+
 // CHECKLONG: Disassembly of section .text:
 // CHECKLONG-EMPTY:
 // CHECKLONG-NEXT: <func1>:
 // CHECKLONG-NEXT:     1000:       bx      lr
 // CHECKLONG: <func2>:
 // CHECKLONG-NEXT:     1004:       bx      lr
 // CHECKLONG: <func3>:
 // CHECKLONG-NEXT:     1008:       bx      lr

 // CHECKLONG-NEXT:     203c:       d4 f0 10 11     .word   0x1110f0d4
 // CHECKLONG: <$a>:
 // CHECKLONG-NEXT:     2040:       ldr     r12, [pc, #4]
 // CHECKLONG-NEXT:     2044:       add     r12, r12, pc
 // CHECKLONG-NEXT:     2048:       ldr     pc, [r12]
 // CHECKLONG: <$d>:
 // CHECKLONG-NEXT:     204c:       c8 f0 10 11     .word   0x1110f0c8
 
+// CHECKLONG-EB: Disassembly of section .text:
+// CHECKLONG-EB-EMPTY:
+// CHECKLONG-EB-NEXT: <func1>:
+// CHECKLONG-EB-NEXT:     1000:       bx      lr
+// CHECKLONG-EB: <func2>:
+// CHECKLONG-EB-NEXT:                 bx      lr
+// CHECKLONG-EB: <func3>:
+// CHECKLONG-EB-NEXT:                 bx      lr
+// CHECKLONG-EB: <_start>:
+// CHECKLONG-EB-NEXT:                 b       0x2020
+// CHECKLONG-EB-NEXT:                 bl      0x2030
+// CHECKLONG-EB-NEXT:                 beq     0x2040
+// CHECKLONG-EB-EMPTY:
+// CHECKLONG-EB-NEXT: Disassembly of section .plt:
+// CHECKLONG-EB-EMPTY:
+// CHECKLONG-EB-NEXT: <$a>:
+// CHECKLONG-EB-NEXT:     2000:       str     lr, [sp, #-4]!
+// CHECKLONG-EB-NEXT:                 ldr     lr, [pc, #4]
+// CHECKLONG-EB-NEXT:                 add     lr, pc, lr
+// CHECKLONG-EB-NEXT:                 ldr     pc, [lr, #8]!
+// CHECKLONG-EB: <$d>:
+// CHECKLONG-EB-NEXT:                 11 10 f0 f0     .word   0x1110f0f0
+// CHECKLONG-EB-NEXT:                 d4 d4 d4 d4     .word   0xd4d4d4d4
+// CHECKLONG-EB-NEXT:                 d4 d4 d4 d4     .word   0xd4d4d4d4
+// CHECKLONG-EB-NEXT:                 d4 d4 d4 d4     .word   0xd4d4d4d4
+// CHECKLONG-EB: <$a>:
+// CHECKLONG-EB-NEXT:     2020:       ldr     r12, [pc, #4]
+// CHECKLONG-EB-NEXT:                 add     r12, r12, pc
+// CHECKLONG-EB-NEXT:                 ldr     pc, [r12]
+// CHECKLONG-EB: <$d>:
+// CHECKLONG-EB-NEXT:                 11 10 f0 e0     .word   0x1110f0e0
+// CHECKLONG-EB: <$a>:
+// CHECKLONG-EB-NEXT:     2030:       ldr     r12, [pc, #4]
+// CHECKLONG-EB-NEXT:                 add     r12, r12, pc
+// CHECKLONG-EB-NEXT:                 ldr     pc, [r12]
+// CHECKLONG-EB: <$d>:
+// CHECKLONG-EB-NEXT:                 11 10 f0 d4     .word   0x1110f0d4
+// CHECKLONG-EB: <$a>:
+// CHECKLONG-EB-NEXT:     2040:       ldr     r12, [pc, #4]
+// CHECKLONG-EB-NEXT:                 add     r12, r12, pc
+// CHECKLONG-EB-NEXT:                 ldr     pc, [r12]
+// CHECKLONG-EB: <$d>:
+// CHECKLONG-EB-NEXT:                11 10 f0 c8     .word   0x1110f0c8
+
 // DSORELLONG: Name: .got.plt
 // DSORELLONG-NEXT:     Type: SHT_PROGBITS
 // DSORELLONG-NEXT:     Flags [
 // DSORELLONG-NEXT:       SHF_ALLOC
 // DSORELLONG-NEXT:       SHF_WRITE
 // DSORELLONG-NEXT:     ]
 // DSORELLONG-NEXT:     Address: 0x11111100
 // DSORELLONG: Relocations [

 // RUN:       .text 0x1000 : { *(.text) } \
 // RUN:       .plt  0x2000 : { *(.plt) *(.plt.*) } \
 // RUN:       .got.plt 0x8002020 : { *(.got.plt) } \
 // RUN:       }" > %t3.script
 // RUN: ld.lld --hash-style=sysv --script %t3.script -shared %t1 %t2 -o %t6
 // RUN: llvm-objdump --no-print-imm-hex --triple=armv7a-none-linux-gnueabi -d --no-show-raw-insn %t6 | FileCheck --check-prefix=CHECKMIX %s
 // RUN: llvm-readobj -S -r %t6 | FileCheck --check-prefix=DSORELMIX %s
 
+// RUN: ld.lld --hash-style=sysv --script %t3.script -shared %t1.be %t2.be -o %t6.be
+// RUN: llvm-objdump --no-print-imm-hex --triple=armv7aeb-none-linux-gnueabi -d --no-show-raw-insn %t6.be | FileCheck --check-prefix=CHECKMIX-EB %s
+// RUN: llvm-readobj -S -r %t6.be | FileCheck --check-prefix=DSORELMIX %s
+// RUN: ld.lld --be8 --hash-style=sysv --script %t3.script -shared %t1.be %t2.be -o %t6.be
+// RUN: llvm-objdump --no-print-imm-hex --triple=armv7a-none-linux-gnueabi -d --no-show-raw-insn %t6.be | FileCheck --check-prefix=CHECKMIX-EB %s
+// RUN: llvm-readobj -S -r %t6.be | FileCheck --check-prefix=DSORELMIX %s
+
 // CHECKMIX: Disassembly of section .text:
 // CHECKMIX-EMPTY:
 // CHECKMIX-NEXT: <func1>:
 // CHECKMIX-NEXT:     1000:       bx      lr
 // CHECKMIX: <func2>:
 // CHECKMIX-NEXT:     1004:       bx      lr
 // CHECKMIX: <func3>:
 // CHECKMIX-NEXT:     1008:       bx      lr

 // CHECKMIX-NEXT:     203c:     d4 d4 d4 d4     .word   0xd4d4d4d4
 // CHECKMIX: <$a>:
 // CHECKMIX-NEXT:     2040:       add     r12, pc, #133169152
 // CHECKMIX-NEXT:     2044:       add     r12, r12, #1044480
 // CHECKMIX-NEXT:     2048:       ldr     pc, [r12, #4076]!
 // CHECKMIX: <$d>:
 // CHECKMIX-NEXT:     204c:     d4 d4 d4 d4     .word   0xd4d4d4d4
 
+// CHECKMIX-EB: Disassembly of section .text:
+// CHECKMIX-EB-EMPTY:
+// CHECKMIX-EB-NEXT: <func1>:
+// CHECKMIX-EB-NEXT:     1000:       bx      lr
+// CHECKMIX-EB: <func2>:
+// CHECKMIX-EB-NEXT:                 bx      lr
+// CHECKMIX-EB: <func3>:
+// CHECKMIX-EB-NEXT:                 bx      lr
+// CHECKMIX-EB: <_start>:
+// CHECKMIX-EB-NEXT:                 b       0x2020
+// CHECKMIX-EB-NEXT:                 bl      0x2030
+// CHECKMIX-EB-NEXT:                 beq     0x2040
+// CHECKMIX-EB-EMPTY:
+// CHECKMIX-EB-NEXT: Disassembly of section .plt:
+// CHECKMIX-EB-EMPTY:
+// CHECKMIX-EB-NEXT: <$a>:
+// CHECKMIX-EB-NEXT:     2000:       str     lr, [sp, #-4]!
+// CHECKMIX-EB-NEXT:                 ldr     lr, [pc, #4]
+// CHECKMIX-EB-NEXT:                 add     lr, pc, lr
+// CHECKMIX-EB-NEXT:                 ldr     pc, [lr, #8]!
+// CHECKMIX-EB: <$d>:
+// CHECKMIX-EB-NEXT:                 08 00 00 10     .word   0x08000010
+// CHECKMIX-EB-NEXT:                 d4 d4 d4 d4     .word   0xd4d4d4d4
+// CHECKMIX-EB-NEXT:                 d4 d4 d4 d4     .word   0xd4d4d4d4
+// CHECKMIX-EB-NEXT:                 d4 d4 d4 d4     .word   0xd4d4d4d4
+// CHECKMIX-EB: <$a>:
+// CHECKMIX-EB-NEXT:     2020:       ldr     r12, [pc, #4]
+// CHECKMIX-EB-NEXT:                 add     r12, r12, pc
+// CHECKMIX-EB-NEXT:                 ldr     pc, [r12]
+// CHECKMIX-EB: <$d>:
+// CHECKMIX-EB-NEXT:                 08 00 00 00     .word   0x08000000
+// CHECKMIX-EB: <$a>:
+// CHECKMIX-EB-NEXT:     2030:       add     r12, pc, #133169152
+// CHECKMIX-EB-NEXT:                 add     r12, r12, #1044480
+// CHECKMIX-EB-NEXT:                 ldr     pc, [r12, #4088]!
+// CHECKMIX-EB: <$d>:
+// CHECKMIX-EB-NEXT:                 d4 d4 d4 d4     .word   0xd4d4d4d4
+// CHECKMIX-EB: <$a>:
+// CHECKMIX-EB-NEXT:     2040:       add     r12, pc, #133169152
+// CHECKMIX-EB-NEXT:                 add     r12, r12, #1044480
+// CHECKMIX-EB-NEXT:                 ldr     pc, [r12, #4076]!
+// CHECKMIX-EB: <$d>:
+// CHECKMIX-EB-NEXT:                 d4 d4 d4 d4     .word   0xd4d4d4d4
+
 // DSORELMIX:    Name: .got.plt
 // DSORELMIX-NEXT:     Type: SHT_PROGBITS
 // DSORELMIX-NEXT:     Flags [
 // DSORELMIX-NEXT:       SHF_ALLOC
 // DSORELMIX-NEXT:       SHF_WRITE
 // DSORELMIX-NEXT:     ]
 // DSORELMIX-NEXT:     Address: 0x8002020
 // DSORELMIX:   Section {{.*}} .rel.plt {
 // DSORELMIX-NEXT:     0x800202C R_ARM_JUMP_SLOT func1
 // DSORELMIX-NEXT:     0x8002030 R_ARM_JUMP_SLOT func2
 // DSORELMIX-NEXT:     0x8002034 R_ARM_JUMP_SLOT func3
 
-// RUN: llvm-mc -filetype=obj -triple=armv7aeb-none-linux-gnueabi -mcpu=cortex-a8 %p/Inputs/arm-plt-reloc.s -o %t1
-// RUN: llvm-mc -filetype=obj -triple=armv7aeb-none-linux-gnueabi -mcpu=cortex-a8 %s -o %t2
-// RUN: ld.lld %t1 %t2 -o %t
-// RUN: llvm-objdump --no-print-imm-hex --triple=armv7aeb-none-linux-gnueabi -d --no-show-raw-insn %t | FileCheck %s
-// RUN: ld.lld -shared %t1 %t2 -o %t3
-// RUN: llvm-objdump --no-print-imm-hex --triple=armv7aeb-none-linux-gnueabi -d --no-show-raw-insn %t3 | FileCheck --check-prefix=DSO %s
-// RUN: llvm-readobj -S -r %t3 | FileCheck -check-prefix=DSOREL %s
-
-// RUN: ld.lld --hash-style=sysv --script %t2.script -shared %t1 %t2 -o %t5
-// RUN: llvm-objdump --no-print-imm-hex --triple=armv7aeb-none-linux-gnueabi -d --no-show-raw-insn %t5 | FileCheck --check-prefix=CHECKLONG-EB %s
-// RUN: llvm-readobj -S -r %t5 | FileCheck --check-prefix=DSORELLONG %s
-
-// CHECKLONG-EB: Disassembly of section .text:
-// CHECKLONG-EB-EMPTY:
-// CHECKLONG-EB-NEXT: <func1>:
-// CHECKLONG-EB-NEXT:     1000:       bx      lr
-// CHECKLONG-EB: <func2>:
-// CHECKLONG-EB-NEXT:     1004:       bx      lr
-// CHECKLONG-EB: <func3>:
-// CHECKLONG-EB-NEXT:     1008:       bx      lr
-// CHECKLONG-EB: <_start>:
-// CHECKLONG-EB-NEXT:     100c:       b       0x2020
-// CHECKLONG-EB-NEXT:     1010:       bl      0x2030
-// CHECKLONG-EB-NEXT:     1014:       beq     0x2040
-// CHECKLONG-EB-EMPTY:
-// CHECKLONG-EB-NEXT: Disassembly of section .plt:
-// CHECKLONG-EB-EMPTY:
-// CHECKLONG-EB-NEXT: <$a>:
-// CHECKLONG-EB-NEXT:     2000:       str     lr, [sp, #-4]!
-// CHECKLONG-EB-NEXT:     2004:       ldr     lr, [pc, #4]
-// CHECKLONG-EB-NEXT:     2008:       add     lr, pc, lr
-// CHECKLONG-EB-NEXT:     200c:       ldr     pc, [lr, #8]!
-// CHECKLONG-EB: <$d>:
-// CHECKLONG-EB-NEXT:     2010:       11 10 f0 f0     .word   0x1110f0f0
-// CHECKLONG-EB-NEXT:     2014:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECKLONG-EB-NEXT:     2018:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECKLONG-EB-NEXT:     201c:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECKLONG-EB: <$a>:
-// CHECKLONG-EB-NEXT:     2020:       ldr     r12, [pc, #4]
-// CHECKLONG-EB-NEXT:     2024:       add     r12, r12, pc
-// CHECKLONG-EB-NEXT:     2028:       ldr     pc, [r12]
-// CHECKLONG-EB: <$d>:
-// CHECKLONG-EB-NEXT:     202c:       11 10 f0 e0     .word   0x1110f0e0
-// CHECKLONG-EB: <$a>:
-// CHECKLONG-EB-NEXT:     2030:       ldr     r12, [pc, #4]
-// CHECKLONG-EB-NEXT:     2034:       add     r12, r12, pc
-// CHECKLONG-EB-NEXT:     2038:       ldr     pc, [r12]
-// CHECKLONG-EB: <$d>:
-// CHECKLONG-EB-NEXT:     203c:       11 10 f0 d4     .word 0x1110f0d4
-// CHECKLONG-EB: <$a>:
-// CHECKLONG-EB-NEXT:     2040:       ldr     r12, [pc, #4]
-// CHECKLONG-EB-NEXT:     2044:       add     r12, r12, pc
-// CHECKLONG-EB-NEXT:     2048:       ldr     pc, [r12]
-// CHECKLONG-EB: <$d>:
-// CHECKLONG-EB-NEXT:     204c:       11 10 f0 c8     .word   0x1110f0c8
-

lld/test/ELF/arm-thumb-plt-reloc.s

 // RUN: llvm-mc -filetype=obj -triple=thumbv7aeb-none-linux-gnueabi %p/Inputs/arm-plt-reloc.s -o %t1
 // RUN: llvm-mc -filetype=obj -triple=thumbv7aeb-none-linux-gnueabi %s -o %t2
 // RUN: ld.lld %t1 %t2 -o %t
 // RUN: llvm-objdump --no-print-imm-hex --triple=thumbv7aeb-none-linux-gnueabi -d %t | FileCheck %s
 // RUN: ld.lld -shared %t1 %t2 -o %t.so
 // RUN: llvm-objdump --no-print-imm-hex --triple=thumbv7aeb-none-linux-gnueabi -d %t.so | FileCheck --check-prefix=DSO %s
 // RUN: llvm-readobj -S -r %t.so | FileCheck -check-prefix=DSOREL %s
 
+// RUN: ld.lld --be8 %t1 %t2 -o %t
+// RUN: llvm-objdump --no-print-imm-hex --triple=thumbv7aeb-none-linux-gnueabi -d %t | FileCheck %s
+// RUN: ld.lld --be8 -shared %t1 %t2 -o %t.so
+// RUN: llvm-objdump --no-print-imm-hex --triple=thumbv7aeb-none-linux-gnueabi -d %t.so | FileCheck --check-prefix=DSO %s
+// RUN: llvm-readobj -S -r %t.so | FileCheck -check-prefix=DSOREL %s
+
 // Test PLT entry generation
  .syntax unified
  .text
  .align 2
  .globl _start
  .type  _start,%function
 _start:
 // FIXME, interworking is only supported for BL via BLX at the moment, when

lld/test/ELF/arm-thunk-arm-thumb-reuse.s

 // REQUIRES: arm
 // RUN: split-file %s %t
 // RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=thumbv7a-none-linux-gnueabi %t/test.s -o %t.o
 // RUN: ld.lld --script %t/script %t.o -o %t2
 // RUN: llvm-objdump --no-print-imm-hex --no-show-raw-insn -d %t2 | FileCheck %s
 
 // RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=thumbv7aeb-none-linux-gnueabi -mcpu=cortex-a8 %t/test.s -o %t.o
 // RUN: ld.lld --script %t/script %t.o -o %t2
 // RUN: llvm-objdump --no-print-imm-hex --no-show-raw-insn -d %t2 | FileCheck %s
+// RUN: ld.lld --be8 --script %t/script %t.o -o %t2
+// RUN: llvm-objdump --no-print-imm-hex --no-show-raw-insn -d %t2 | FileCheck %s
 
 /// Test that we can reuse thunks between Arm and Thumb callers
 /// using a BL. Expect two thunks, one for far, one for far2.
 
 //--- script
 SECTIONS {
         .text 0x10000 : { *(.text) }
         .text.far 0x10000000 : AT (0x10000000) { *(.far) }

lld/test/ELF/arm-thunk-edgecase.s

 // RUN: llvm-objdump --no-print-imm-hex -d %tthumb_to_arm.so | FileCheck --check-prefix=THUMB-TO-ARM %s
 
 // RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7aeb-none-linux-gnueabi -mcpu=cortex-a8 %s -o %t.o
 // RUN: ld.lld -shared -Bsymbolic -script %tarm_to_thumb.script %t.o -o %tarm_to_thumb.so
 // RUN: ld.lld -shared -Bsymbolic -script %tthumb_to_arm.script %t.o -o %tthumb_to_arm.so
 // RUN: llvm-objdump --no-print-imm-hex --triple=armv7aeb-none-linux-gnueabi -d %tarm_to_thumb.so | FileCheck --check-prefix=ARM-TO-THUMB %s
 // RUN: llvm-objdump --no-print-imm-hex -d %tthumb_to_arm.so | FileCheck --check-prefix=THUMB-TO-ARM %s
 
+// RUN: ld.lld --be8 -shared -Bsymbolic -script %tarm_to_thumb.script %t.o -o %tarm_to_thumb.so
+// RUN: ld.lld --be8 -shared -Bsymbolic -script %tthumb_to_arm.script %t.o -o %tthumb_to_arm.so
+// RUN: llvm-objdump --no-print-imm-hex --triple=armv7aeb-none-linux-gnueabi -d %tarm_to_thumb.so | FileCheck --check-prefix=ARM-TO-THUMB %s
+// RUN: llvm-objdump --no-print-imm-hex -d %tthumb_to_arm.so | FileCheck --check-prefix=THUMB-TO-ARM %s
+
 .syntax unified
 
 .arm
 .section .text_armfunc, "ax", %progbits
 .globl armfunc
 .type armfunc, %function
 armfunc:
   b thumbfunc

lld/test/ELF/arm-thunk-largesection.s

 // RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=thumbv7aeb-none-linux-gnueabi -mcpu=cortex-a8 %s -o %t
 // RUN: ld.lld %t -o %t2
 // RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x21000 --stop-address=0x21006 %t2 | FileCheck --check-prefix=CHECK1 %s
 // RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x22004 --stop-address=0x22008 %t2 | FileCheck --check-prefix=CHECK2 %s
 // RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x1021ff8 --stop-address=0x1021ffc %t2 | FileCheck --check-prefix=CHECK3 %s
 // RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x2012ff8 --stop-address=0x2021ffc %t2 | FileCheck --check-prefix=CHECK4 %s
 // RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x3021fec --stop-address=0x3021ff6 %t2 | FileCheck --check-prefix=CHECK5 %s
 
+// RUN: ld.lld --be8 %t -o %t2
+// RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x21000 --stop-address=0x21006 %t2 | FileCheck --check-prefix=CHECK1 %s
+// RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x22004 --stop-address=0x22008 %t2 | FileCheck --check-prefix=CHECK2 %s
+// RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x1021ff8 --stop-address=0x1021ffc %t2 | FileCheck --check-prefix=CHECK3 %s
+// RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x2012ff8 --stop-address=0x2021ffc %t2 | FileCheck --check-prefix=CHECK4 %s
+// RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --start-address=0x3021fec --stop-address=0x3021ff6 %t2 | FileCheck --check-prefix=CHECK5 %s
+
  .syntax unified
  .balign 0x1000
  .thumb
  .text
  .globl _start
  .type _start, %function
 _start:
  bx lr

lld/test/ELF/arm-thunk-linkerscript-dotexpr.s

 // REQUIRES: arm
 // RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t
 // RUN: echo "SECTIONS { \
 // RUN:       . = SIZEOF_HEADERS; \
 // RUN:       .text_low : { *(.text_low) *(.text_low2) . = . + 0x2000000 ; *(.text_high) *(.text_high2) } \
 // RUN:       } " > %t.script
 // RUN: ld.lld --no-rosegment --script %t.script %t -o %t2
 // RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x94 --stop-address=0xbc | FileCheck --check-prefix=CHECK1 %s
 // RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x20000bc --stop-address=0x20000de | FileCheck --check-prefix=CHECK2 %s
 
 // RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7aeb-none-linux-gnueabi -mcpu=cortex-a8 %s -o %t
 // RUN: ld.lld --no-rosegment --script %t.script %t -o %t2
 // RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x94 --stop-address=0xbc | FileCheck --check-prefix=CHECK1 %s
 // RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x20000bc --stop-address=0x20000de | FileCheck --check-prefix=CHECK2 %s
+// RUN: ld.lld --be8 --no-rosegment --script %t.script %t -o %t2
+// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x94 --stop-address=0xbc | FileCheck --check-prefix=CHECK1 %s
+// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x20000bc --stop-address=0x20000de | FileCheck --check-prefix=CHECK2 %s
 
 // Test that range extension thunks can handle location expressions within
 // a Section Description
  .syntax unified
  .section .text_low, "ax", %progbits
  .thumb
  .globl _start
 _start: bx lr

lld/test/ELF/arm-thunk-linkerscript.s

 // REQUIRES: arm
 // RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t
 // RUN: echo "SECTIONS { \
 // RUN:       . = SIZEOF_HEADERS; \
 // RUN:       .text_low : { *(.text_low) *(.text_low2) } \
 // RUN:       .text_high 0x2000000 : { *(.text_high) *(.text_high2) } \
 // RUN:       } " > %t.script
 // RUN: ld.lld --no-rosegment --script %t.script %t -o %t2
 // RUN: llvm-objdump --no-print-imm-hex -d %t2 | FileCheck %s
 
 // RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7aeb-none-linux-gnueabi -mcpu=cortex-a8 %s -o %t
 // RUN: ld.lld --no-rosegment --script %t.script %t -o %t2
 // RUN: llvm-objdump --no-print-imm-hex -d %t2 | FileCheck %s
+// RUN: ld.lld --be8 --no-rosegment --script %t.script %t -o %t2
+// RUN: llvm-objdump --no-print-imm-hex -d %t2 | FileCheck %s
 
 // Simple test that we can support range extension thunks with linker scripts
  .syntax unified
  .section .text_low, "ax", %progbits
  .thumb
  .globl _start
 _start: bx lr
  .globl low_target

lld/test/ELF/arm-thunk-nosuitable.s

 // REQUIRES: arm
 // RUN: llvm-mc %s --arm-add-build-attributes --triple=armv7a-linux-gnueabihf --filetype=obj -o %t.o
 // RUN: ld.lld %t.o -o %t
 // RUN: llvm-objdump -d --start-address=0x2200b4 --stop-address=0x2200be %t | FileCheck %s
 
 // RUN: llvm-mc %s --arm-add-build-attributes --triple=armv7aeb-linux-gnueabihf --filetype=obj -mcpu=cortex-a8 -o %t.o
 // RUN: ld.lld %t.o -o %t
 // RUN: llvm-objdump -d --start-address=0x2200b4 --stop-address=0x2200be %t | FileCheck %s
+// RUN: ld.lld --be8 %t.o -o %t
+// RUN: llvm-objdump -d --start-address=0x2200b4 --stop-address=0x2200be %t | FileCheck %s
 
         /// Create a conditional branch too far away from a precreated thunk
         /// section. This will need a thunk section created within range.
         .syntax unified
         .thumb
 
         .section .text.0, "ax", %progbits
         .space 2 * 1024 * 1024

lld/test/ELF/arm-thunk-re-add.s

 // RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=thumbv7aeb-none-linux-gnueabi -mcpu=cortex-a8 %s -o %t
 // RUN: ld.lld %t --shared -o %t.so
 // The output file is large, most of it zeroes. We dissassemble only the
 // parts we need to speed up the test and avoid a large output file
 // RUN: llvm-objdump --no-print-imm-hex -d %t.so --start-address=0x1000004 --stop-address=0x100001c | FileCheck --check-prefix=CHECK1 %s
 // RUN: llvm-objdump --no-print-imm-hex -d %t.so --start-address=0x1100008 --stop-address=0x1100022 | FileCheck --check-prefix=CHECK2 %s
 // RUN: llvm-objdump --no-print-imm-hex -d %t.so --start-address=0x1100020 --stop-address=0x1100064 --triple=armv7aeb-linux-gnueabihf | FileCheck --check-prefix=CHECK3 %s
 
+// RUN: ld.lld --be8 %t --shared -o %t.so
+// The output file is large, most of it zeroes. We dissassemble only the
+// parts we need to speed up the test and avoid a large output file
+// RUN: llvm-objdump --no-print-imm-hex -d %t.so --start-address=0x1000004 --stop-address=0x100001c | FileCheck --check-prefix=CHECK1 %s
+// RUN: llvm-objdump --no-print-imm-hex -d %t.so --start-address=0x1100008 --stop-address=0x1100022 | FileCheck --check-prefix=CHECK2 %s
+// RUN: llvm-objdump --no-print-imm-hex -d %t.so --start-address=0x1100020 --stop-address=0x1100064 --triple=armv7aeb-linux-gnueabihf | FileCheck --check-prefix=CHECK3 %s
+

lld/test/ELF/arm-thunk-reuse.s

 # REQUIRES: arm
 # RUN: rm -rf %t && split-file %s %t
 # RUN: llvm-mc -filetype=obj -triple=armv7-a-none-eabi --arm-add-build-attributes %t/a.s -o %t/a.o
 # RUN: ld.lld -pie -T %t/lds %t/a.o -o %t/a
 # RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn %t/a | FileCheck %s
+# RUN: llvm-objdump -s --triple=armv7a-none-linux-gnueabi %t/a | FileCheck --check-prefix=CHECK-LE %s
 
 # RUN: llvm-mc -filetype=obj -triple=armv7eb-a-none-eabi --arm-add-build-attributes -mcpu=cortex-a8 %t/a.s -o %t/a.o
 # RUN: ld.lld -pie -T %t/lds %t/a.o -o %t/a
 # RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn %t/a | FileCheck %s
+# RUN: llvm-objdump -s --triple=armv7eb-a-none-eabi %t/a| FileCheck --check-prefix=CHECK-EB %s
+# RUN: ld.lld --be8 -pie -T %t/lds %t/a.o -o %t/a
+# RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn %t/a | FileCheck %s
+# RUN: llvm-objdump -s --triple=armv7eb-a-none-eabi %t/a| FileCheck --check-prefix=CHECK-LE %s
 
 ## We create a thunk for dest.
 # CHECK-LABEL: <mid>:
 # CHECK-NEXT:   2010004:     b       0x2010008 <__ARMV7PILongThunk_dest>
 # CHECK-EMPTY:
 # CHECK-NEXT:  <__ARMV7PILongThunk_dest>:
 # CHECK-NEXT:   2010008:     movw    r12, #65516
 # CHECK-NEXT:                movt    r12, #65023
 # CHECK-NEXT:                add     r12, r12, pc
 # CHECK-NEXT:                bx      r12
 
 ## The first instruction can reuse the thunk but the second can't.
 ## If we reuse the thunk for b, we will get an "out of range" error.
 # CHECK-LABEL: <high>:
 # CHECK-NEXT:   4010000:      bl      0x2010008 <__ARMV7PILongThunk_dest>
 # CHECK-NEXT:                 b       0x4010008 <__ARMV7PILongThunk_dest>
 # CHECK-EMPTY:
 # CHECK-NEXT:  <__ARMV7PILongThunk_dest>:
 # CHECK-NEXT:   4010008:      movw    r12, #65516
 # CHECK-NEXT:                 movt    r12, #64511
 # CHECK-NEXT:                 add     r12, r12, pc
 # CHECK-NEXT:                 bx      r12
 
+# CHECK-EB: Contents of section .text_low:
+# CHECK-EB-NEXT: 10000 e320f000 e12fff1e
+# CHECK-EB: Contents of section .text_mid:
+# CHECK-EB-NEXT: 2010004 eaffffff e30fcfec e34fcdff e08cc00f
+# CHECK-EB-NEXT: 2010014 e12fff1c
+# CHECK-EB: Contents of section .text_high:
+# CHECK-EB-NEXT: 4010000 eb800000 eaffffff e30fcfec e34fcbff
+# CHECK-EB-NEXT: 4010010 e08cc00f e12fff1c
+
+# CHECK-LE: Contents of section .text_low:
+# CHECK-LE-NEXT: 10000 00f020e3 1eff2fe1
+# CHECK-LE: Contents of section .text_mid:
+# CHECK-LE-NEXT: 2010004 ffffffea eccf0fe3 ffcd4fe3 0fc08ce0
+# CHECK-LE-NEXT: 2010014 1cff2fe1
+# CHECK-LE: Contents of section .text_high:
+# CHECK-LE-NEXT: 4010000 000080eb ffffffea eccf0fe3 ffcb4fe3
+# CHECK-LE-NEXT: 4010010 0fc08ce0 1cff2fe1
+
 #--- a.s
 .section .text_low, "ax", %progbits
 
 .globl _start
 _start:
   nop
 dest:
   bx lr

lld/test/ELF/arm-thunk-section-too-large.s

 // REQUIRES: arm
 // RUN: llvm-mc %s -triple=armv7a-linux-gnueabihf -arm-add-build-attributes -filetype=obj -o %t.o
 // RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s
 
 // RUN: llvm-mc %s -triple=armv7aeb-linux-gnueabihf -arm-add-build-attributes -filetype=obj -mcpu=cortex-a8 -o %t.o
 // RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s
+// RUN: not ld.lld --be8 %t.o -o /dev/null 2>&1 | FileCheck %s
 
 // CHECK: InputSection too large for range extension thunk
         .syntax unified
         .thumb
         .text
         .globl _start
         .type _start, %function
 _start:

lld/test/ELF/arm-thunk-toolargesection.s

 // REQUIRES: arm
 // RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t
 // RUN: not ld.lld %t -o /dev/null 2>&1 | FileCheck %s
 
 // RUN: llvm-mc -filetype=obj -triple=thumbv7aeb-none-linux-gnueabi %s -o %t
 // RUN: not ld.lld %t -o /dev/null 2>&1 | FileCheck %s
+// RUN: not ld.lld --be8 %t -o /dev/null 2>&1 | FileCheck %s
 
  .syntax unified
  .balign 0x1000
  .thumb
  .text
  .globl _start
  .type _start, %function
 _start:

lld/test/ELF/arm-v5-reloc-error.s

 // REQUIRES: arm
 // RUN: llvm-mc -filetype=obj -triple=armv7a-linux-gnueabi %s -o %t
 // RUN: echo "SECTIONS { \
 // RUN:       . = SIZEOF_HEADERS; \
 // RUN:       .text_low : { *(.text_low) *(.text_low2) } \
 // RUN:       .text_high 0x2000000 : { *(.text_high) *(.text_high2) } \
 // RUN:       } " > %t.script
 // RUN: not ld.lld --script %t.script %t -o /dev/null 2>&1 | FileCheck %s
 
 // RUN: llvm-mc -filetype=obj -triple=armv7aeb-linux-gnueabi -mcpu=cortex-a8 %s -o %t
 // RUN: not ld.lld --script %t.script %t -o /dev/null 2>&1 | FileCheck %s
+// RUN: not ld.lld -be8 --script %t.script %t -o /dev/null 2>&1 | FileCheck %s
 
 // CHECK: error: relocation R_ARM_THM_JUMP24 to far not supported for Armv5 or Armv6 targets
 
 // Lie about our build attributes. Our triple is armv7a-linux-gnueabi but
 // we are claiming to be Armv5. This can also happen with llvm-mc when we
 // don't have any .eabi_attribute directives in the file or the
 // --arm-add-build-attributes command line isn't used to add them from the
 // triple.

lld/test/ELF/emulation-arm.s

 
 # RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7aeb-none-linux-gnueabi %s -o %t.o
 # RUN: ld.lld -marmelfb_linux_eabi %t.o -o %t1
 # echo 'OUTPUT_FORMAT(elf32-bigarm)' > %t6arm.script
 # ld.lld %tarm -o %t6arm
 # RUN: llvm-readobj -h %t1 | FileCheck %s --check-prefix=ARMEB
 # RUN: llvm-readobj -h %t1 | FileCheck %s --check-prefix=BE8
 
+# RUN: ld.lld --be8 -marmelfb_linux_eabi %t.o -o %t1
+# echo 'OUTPUT_FORMAT(elf32-bigarm)' > %t6arm.script
+# ld.lld --be8 %tarm -o %t6arm
+# RUN: llvm-readobj -h %t1 | FileCheck %s --check-prefix=ARMEB8
+
 # ARMEB: ElfHeader {
 # ARMEB-NEXT:   Ident {
 # ARMEB-NEXT:     Magic: (7F 45 4C 46)
 # ARMEB-NEXT:     Class: 32-bit (0x1)
 # ARMEB-NEXT:     DataEncoding: BigEndian (0x2)
 # ARMEB-NEXT:     FileVersion: 1
 # ARMEB-NEXT:     OS/ABI: SystemV (0x0)
 # ARMEB-NEXT:     ABIVersion: 0
 # ARMEB-NEXT:     Unused: (00 00 00 00 00 00 00)
 # ARMEB-NEXT:   }
 # ARMEB-NEXT:   Type: Executable (0x2)
 # ARMEB-NEXT:   Machine: EM_ARM (0x28)
 # ARMEB-NEXT:   Version: 1
 
 ## Ensure that the EF_ARM_BE8 flag is not set for be32
 ## This will have to be modified on the be8 is implemented
 # ARMEB:   Flags [ (0x5000200)
 # ARMEB-NEXT:     0x200
 # ARMEB-NEXT:     0x1000000
 # ARMEB-NEXT:     0x4000000
 # ARMEB-NEXT:   ]
 
 # BE8-NOT: 0x800000
 
+# ARMEB8: ElfHeader {
+# ARMEB8-NEXT:   Ident {
+# ARMEB8-NEXT:     Magic: (7F 45 4C 46)
+# ARMEB8-NEXT:     Class: 32-bit (0x1)
+# ARMEB8-NEXT:     DataEncoding: BigEndian (0x2)
+# ARMEB8-NEXT:     FileVersion: 1
+# ARMEB8-NEXT:     OS/ABI: SystemV (0x0)
+# ARMEB8-NEXT:     ABIVersion: 0
+# ARMEB8-NEXT:     Unused: (00 00 00 00 00 00 00)
+# ARMEB8-NEXT:   }
+# ARMEB8-NEXT:   Type: Executable (0x2)
+# ARMEB8-NEXT:   Machine: EM_ARM (0x28)
+# ARMEB8-NEXT:   Version: 1
+
+## Ensure that the EF_ARM_BE8 flag is set for be8
+# ARMEB8:   Flags [ (0x5800200)
+# ARMEB8-NEXT:     0x200
+# ARMEB8-NEXT:     0x800000
+# ARMEB8-NEXT:     0x1000000
+# ARMEB8-NEXT:     0x4000000
+# ARMEB8-NEXT:   ]
+
 .globl _start
 _start:

lld/test/ELF/target-specific-options.s

 # REQUIRES: x86
 # RUN: llvm-mc -filetype=obj -triple=x86_64 %s -o %t
 
 # RUN: not ld.lld %t --fix-cortex-a53-843419 -o /dev/null 2>&1 | FileCheck %s --check-prefix=ERR-843419
 # ERR-843419: error: --fix-cortex-a53-843419 is only supported on AArch64 targets
 
+# RUN: not ld.lld %t --be8 -o /dev/null 2>&1 | FileCheck %s --check-prefix=ERR-BE8
+# ERR-BE8: error: --be8 is only supported on ARM targets
+
 # RUN: not ld.lld %t --pcrel-optimize -o /dev/null 2>&1 | FileCheck %s --check-prefix=ERR-PCREL
 # ERR-PCREL: error: --pcrel-optimize is only supported on PowerPC64 targets
 
 # RUN: not ld.lld %t --toc-optimize -o /dev/null 2>&1 | FileCheck %s --check-prefix=ERR-TOC
 # ERR-TOC: error: --toc-optimize is only supported on PowerPC64 targets
 
 .globl _start
 _start: