[RISCV][SLP] Add tests for unprofitable SLP vectorization due to GEP. NFC

[ABataev]

llvm/test/Analysis/CostModel/RISCV/gep-zero-indices.ll

7–23

Could you add some more tests with other types/vector lengths?

[luke]

Add more zero indices tests

[luke]

Add a comment to describe what the gep-zero-indices tests are for, and add
a few more test cases

[reames]

LGTM to the test additions in test/Analysis/CostModel/RISCV/gep-zero-indices.ll only. The other piece needs a bit of cleanup, and is tied more to the sequence.

llvm/test/Analysis/CostModel/RISCV/gep-zero-indices.ll

8

indices

llvm/test/Transforms/SLPVectorizer/RISCV/gep.ll

6

This needs more explanation as to *why* this shouldn't be vectorized.

[luke]

Include new cost model tests for GEPs in this patch

[reames]

LGTM to the CostModel tests only. Please split and land. Please do *not* update this patch again without doing so, and likely rearranging the dependencies on other reviews.

[luke]

Split out the cost model tests

[luke]

Split out non-SLP changes

[luke]

Undo accidental diff update: apologies for the noise.

[ABataev]

Retitle to add SLP again and add NFC

[ABataev]

LG

llvm/test/Analysis/CostModel/RISCV/gep-zero-indices.ll

+; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 2
+; RUN: opt -mtriple=riscv32 -mattr=+v -passes="print<cost-model>" 2>&1 -disable-output < %s \
+; RUN:   | FileCheck %s
+; RUN: opt -mtriple=riscv64 -mattr=+v -passes="print<cost-model>" 2>&1 -disable-output < %s \
+; RUN:   | FileCheck %s
+
+define ptr @zero_indices_i32(ptr %p) {
+; CHECK-LABEL: 'zero_indices_i32'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %x = getelementptr i32, ptr %p, i32 0
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret ptr %x
+;
+  %x = getelementptr i32, ptr %p, i32 0
+  ret ptr %x
+}
+
+define <4 x ptr> @zero_indices_v4i32(<4 x ptr> %p) {
+; CHECK-LABEL: 'zero_indices_v4i32'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %x = getelementptr i32, <4 x ptr> %p, <4 x i32> zeroinitializer
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <4 x ptr> %x
+;
+  %x = getelementptr i32, <4 x ptr> %p, <4 x i32> zeroinitializer
+  ret <4 x ptr> %x
+}

llvm/test/Transforms/SLPVectorizer/RISCV/gep.ll

+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -passes=slp-vectorizer -mtriple=riscv64 -mattr=+v \
+; RUN: -riscv-v-slp-max-vf=0 -S | FileCheck %s
+
+; FIXME: This should not be vectorized
+
+define void @copy_with_offset_v2i8(ptr noalias %p, ptr noalias %q) {
+; CHECK-LABEL: @copy_with_offset_v2i8(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 8
+; CHECK-NEXT:    [[Q1:%.*]] = getelementptr i8, ptr [[Q:%.*]], i32 16
+; CHECK-NEXT:    [[TMP0:%.*]] = load <2 x i8>, ptr [[P1]], align 1
+; CHECK-NEXT:    store <2 x i8> [[TMP0]], ptr [[Q1]], align 1
+; CHECK-NEXT:    ret void
+;
+entry:
+  %p1 = getelementptr i8, ptr %p, i32 8
+  %x1 = load i8, ptr %p1
+  %q1 = getelementptr i8, ptr %q, i32 16
+  store i8 %x1, ptr %q1
+
+  %p2 = getelementptr i8, ptr %p, i32 9
+  %x2 = load i8, ptr %p2
+  %q2 = getelementptr i8, ptr %q, i32 17
+  store i8 %x2, ptr %q2
+
+  ret void
+}