[RISCV] Add H extension

[kito-cheng]

Summary

h was the prefix of multi-letter extension name, but it become a
extension name in later RISC-V isa spec.

Fortunately we don't have any extension really defined is prefixed
with h, so we can just change that.

[asb]

Thanks for this patch Kito - I'm thinking that perhaps we erred in not treating the hypervisor instructions (e.g. HLV* and HSV*) as being gated on the H extension, so a sensible follow-on to this patch would be to mark those instructions as requiring FeatureStdExtH - what do you think?

[kito-cheng]

Let me do that within this patch :)

[kito-cheng]

Update instructions which are belong H extension now.

[kito-cheng]

llvm/test/MC/RISCV/rvi-aliases-valid.s

270

Note: Those testcase are moved to rv32ih-aliases-valid.s, not just removed.

[reames]

llvm/docs/RISCVUsage.rst

54

If I'm reading the code right here, we only have assembly support here. Given that, shouldn't this be Assembly Support?

[kito-cheng]

Changes:

• Update doc, H is support assembly only.

[kito-cheng]

llvm/docs/RISCVUsage.rst

54

Corrected, thanks :)

[kito-cheng]

ping :)

[asb]

Thanks Kito, I think my only remaining request would be to add at least some test coverage for using a H extensions when h isn't included in the ISA string. I don't think such tests are handled very cleanly or consistently right now, but adding something to rv32i-invalid.s alongside similar checks would be better than nothing.

[kito-cheng]

Changes:

• Rebase to main
• Add negative test.

[kito-cheng]

ping :)

[reames]

LGTM

clang/test/Preprocessor/riscv-target-features.c

 // CHECK-NOT: __riscv_zicbom
 // CHECK-NOT: __riscv_zicboz
 // CHECK-NOT: __riscv_svnapot
 // CHECK-NOT: __riscv_svpbmt
 // CHECK-NOT: __riscv_svinval
 // CHECK-NOT: __riscv_xventanacondops
 // CHECK-NOT: __riscv_zcd
 // CHECK-NOT: __riscv_zcf
+// CHECK-NOT: __riscv_h
 
 // RUN: %clang -target riscv32-unknown-linux-gnu -march=rv32im -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-M-EXT %s
 // RUN: %clang -target riscv64-unknown-linux-gnu -march=rv64im -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-M-EXT %s
 // CHECK-M-EXT: __riscv_div 1
 // CHECK-M-EXT: __riscv_m 2000000{{$}}
 // CHECK-M-EXT: __riscv_mul 1

 // CHECK-SVPBMT-EXT: __riscv_svpbmt 1000000{{$}}
 
 // RUN: %clang -target riscv32 -march=rv32isvinval -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-SVINVAL-EXT %s
 // RUN: %clang -target riscv64 -march=rv64isvinval -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-SVINVAL-EXT %s
 // CHECK-SVINVAL-EXT: __riscv_svinval 1000000{{$}}
 
+// RUN: %clang -target riscv32 -march=rv32ih -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-H-EXT %s
+// RUN: %clang -target riscv64 -march=rv64ih -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-H-EXT %s
+// CHECK-H-EXT: __riscv_h 1000000{{$}}
+
 // RUN: %clang -target riscv64 -march=rv64ixventanacondops -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-XVENTANACONDOPS-EXT %s
 // CHECK-XVENTANACONDOPS-EXT: __riscv_xventanacondops 1000000{{$}}
 
 // RUN: %clang -target riscv64 -march=rv64ixtheadvdot -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-XTHEADVDOT-EXT %s
 // CHECK-XTHEADVDOT-EXT: __riscv_xtheadvdot 1000000{{$}}
 

llvm/docs/RISCVUsage.rst

.. table:: Ratified Extensions by Status
 
      ===============  =========================================================
      Extension        Status
      ===============  =========================================================
      ``A``            Supported
      ``C``            Supported
      ``D``            Supported
      ``F``            Supported
+     ``H``            Assembly Support
      ``M``            Supported
      ``Svinval``      Assembly Support
      ``Svnapot``      Assembly Support
      ``Svpbmt``       Supported
      ``V``            Supported
      ``Zba``          Supported
      ``Zbb``          Supported
      ``Zbc``          Supported

llvm/lib/Support/RISCVISAInfo.cpp

 struct RISCVSupportedExtension {
   const char *Name;
   /// Supported version.
   RISCVExtensionVersion Version;
 };
 
 } // end anonymous namespace
 
-static constexpr StringLiteral AllStdExts = "mafdqlcbkjtpvn";
+static constexpr StringLiteral AllStdExts = "mafdqlcbkjtpvnh";
 
 static const RISCVSupportedExtension SupportedExtensions[] = {
     {"i", RISCVExtensionVersion{2, 0}},
     {"e", RISCVExtensionVersion{1, 9}},
     {"m", RISCVExtensionVersion{2, 0}},
     {"a", RISCVExtensionVersion{2, 0}},
     {"f", RISCVExtensionVersion{2, 0}},
     {"d", RISCVExtensionVersion{2, 0}},
     {"c", RISCVExtensionVersion{2, 0}},
 
+    {"h", RISCVExtensionVersion{1, 0}},
+
     {"zihintpause", RISCVExtensionVersion{2, 0}},
 
     {"zfhmin", RISCVExtensionVersion{1, 0}},
     {"zfh", RISCVExtensionVersion{1, 0}},
 
     {"zfinx", RISCVExtensionVersion{1, 0}},
     {"zdinx", RISCVExtensionVersion{1, 0}},
     {"zhinxmin", RISCVExtensionVersion{1, 0}},
static int multiLetterExtensionRank(const std::string &ExtName) {
   int HighOrder;
   int LowOrder = 0;
   // The order between multi-char extensions: s -> h -> z -> x.
   char ExtClass = ExtName[0];
   switch (ExtClass) {
   case 's':
     HighOrder = 0;
     break;
-  case 'h':
-    HighOrder = 1;
-    break;
   case 'z':
-    HighOrder = 2;
+    HighOrder = 1;
     // `z` extension must be sorted by canonical order of second letter.
     // e.g. zmx has higher rank than zax.
     LowOrder = singleLetterExtensionRank(ExtName[1]);
     break;
   case 'x':
-    HighOrder = 3;
+    HighOrder = 2;
     break;
   default:
     llvm_unreachable("Unknown prefix for multi-char extension");
     return -1;
   }
 
   return (HighOrder << 8) + LowOrder;
 }
if (std::next(I) != E)
       Next = std::string(std::next(I), E);
     if (auto E = getExtensionVersion(std::string(1, C), Next, Major, Minor,
                                      ConsumeLength, EnableExperimentalExtension,
                                      ExperimentalExtensionVersionCheck))
       return std::move(E);
 
     // The order is OK, then push it into features.
     // TODO: Use version number when setting target features
-    // Currently LLVM supports only "mafdcv".
-    StringRef SupportedStandardExtension = "mafdcv";
+    // Currently LLVM supports only "mafdcvh".
+    StringRef SupportedStandardExtension = "mafdcvh";
     if (!SupportedStandardExtension.contains(C))
       return createStringError(errc::invalid_argument,
                                "unsupported standard user-level extension '%c'",
                                C);
     ISAInfo->addExtension(std::string(1, C), Major, Minor);
 
     // Consume full extension name and version, including any optional '_'
     // between this extension and the next

llvm/lib/Target/RISCV/RISCV.td

 def FeatureStdExtD
     : SubtargetFeature<"d", "HasStdExtD", "true",
                        "'D' (Double-Precision Floating-Point)",
                        [FeatureStdExtF]>;
 def HasStdExtD : Predicate<"Subtarget->hasStdExtD()">,
                            AssemblerPredicate<(all_of FeatureStdExtD),
                            "'D' (Double-Precision Floating-Point)">;
 
+def FeatureStdExtH
+    : SubtargetFeature<"h", "HasStdExtH", "true",
+                       "'H' (Hypervisor)">;
+
+def HasStdExtH : Predicate<"Subtarget->hasStdExtH()">,
+                           AssemblerPredicate<(all_of FeatureStdExtH),
+                           "'H' (Hypervisor)">;
+
 def FeatureStdExtZihintpause
     : SubtargetFeature<"zihintpause", "HasStdExtZihintpause", "true",
                        "'zihintpause' (Pause Hint)">;
 def HasStdExtZihintpause : Predicate<"Subtarget->hasStdExtZihintpause()">,
                                      AssemblerPredicate<(all_of FeatureStdExtZihintpause),
                                      "'Zihintpause' (Pause Hint)">;
 
 def FeatureStdExtZihintntl

llvm/lib/Target/RISCV/RISCVInstrInfo.td

def SFENCE_INVAL_IR : Priv<"sfence.inval.ir", 0b0001100>, Sched<[]> {
   let rs2 = 0b00001;
 }
 def SINVAL_VMA  : Priv_rr<"sinval.vma", 0b0001011>, Sched<[]>;
 def HINVAL_VVMA : Priv_rr<"hinval.vvma", 0b0010011>, Sched<[]>;
 def HINVAL_GVMA : Priv_rr<"hinval.gvma", 0b0110011>, Sched<[]>;
 } // Predicates = [HasStdExtSvinval]
 
 def SFENCE_VMA  : Priv_rr<"sfence.vma", 0b0001001>, Sched<[]>;
+
+let Predicates = [HasStdExtH] in {
 def HFENCE_VVMA : Priv_rr<"hfence.vvma", 0b0010001>, Sched<[]>;
 def HFENCE_GVMA : Priv_rr<"hfence.gvma", 0b0110001>, Sched<[]>;
 
 def HLV_B   : HLoad_r<0b0110000, 0b00000, "hlv.b">, Sched<[]>;
 def HLV_BU  : HLoad_r<0b0110000, 0b00001, "hlv.bu">, Sched<[]>;
 def HLV_H   : HLoad_r<0b0110010, 0b00000, "hlv.h">, Sched<[]>;
 def HLV_HU  : HLoad_r<0b0110010, 0b00001, "hlv.hu">, Sched<[]>;
 def HLVX_HU : HLoad_r<0b0110010, 0b00011, "hlvx.hu">, Sched<[]>;
 def HLV_W   : HLoad_r<0b0110100, 0b00000, "hlv.w">, Sched<[]>;
 def HLVX_WU : HLoad_r<0b0110100, 0b00011, "hlvx.wu">, Sched<[]>;
 def HSV_B   : HStore_rr<0b0110001, "hsv.b">, Sched<[]>;
 def HSV_H   : HStore_rr<0b0110011, "hsv.h">, Sched<[]>;
 def HSV_W   : HStore_rr<0b0110101, "hsv.w">, Sched<[]>;
-
-let Predicates = [IsRV64] in {
+}
+let Predicates = [IsRV64, HasStdExtH] in {
 def HLV_WU  : HLoad_r<0b0110100, 0b00001, "hlv.wu">, Sched<[]>;
 def HLV_D   : HLoad_r<0b0110110, 0b00000, "hlv.d">, Sched<[]>;
 def HSV_D   : HStore_rr<0b0110111, "hsv.d">, Sched<[]>;
 }
 
 //===----------------------------------------------------------------------===//
 // Debug instructions
 //===----------------------------------------------------------------------===//

llvm/test/CodeGen/RISCV/attributes.ll

 ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zihintntl %s -o - | FileCheck --check-prefix=RV32ZIHINTNTL %s
 ; RUN: llc -mtriple=riscv32 -mattr=+zfhmin %s -o - | FileCheck --check-prefix=RV32ZFHMIN %s
 ; RUN: llc -mtriple=riscv32 -mattr=+zfh %s -o - | FileCheck --check-prefix=RV32ZFH %s
 ; RUN: llc -mtriple=riscv32 -mattr=+zba %s -o - | FileCheck --check-prefix=RV32ZBA %s
 ; RUN: llc -mtriple=riscv32 -mattr=+zbb %s -o - | FileCheck --check-prefix=RV32ZBB %s
 ; RUN: llc -mtriple=riscv32 -mattr=+zbc %s -o - | FileCheck --check-prefix=RV32ZBC %s
 ; RUN: llc -mtriple=riscv32 -mattr=+zbs %s -o - | FileCheck --check-prefix=RV32ZBS %s
 ; RUN: llc -mtriple=riscv32 -mattr=+v %s -o - | FileCheck --check-prefix=RV32V %s
+; RUN: llc -mtriple=riscv32 -mattr=+h %s -o - | FileCheck --check-prefix=RV32H %s
 ; RUN: llc -mtriple=riscv32 -mattr=+zbb,+zfh,+v,+f %s -o - | FileCheck --check-prefix=RV32COMBINED %s
 ; RUN: llc -mtriple=riscv32 -mattr=+zbkb %s -o - | FileCheck --check-prefix=RV32ZBKB %s
 ; RUN: llc -mtriple=riscv32 -mattr=+zbkc %s -o - | FileCheck --check-prefix=RV32ZBKC %s
 ; RUN: llc -mtriple=riscv32 -mattr=+zbkx %s -o - | FileCheck --check-prefix=RV32ZBKX %s
 ; RUN: llc -mtriple=riscv32 -mattr=+zknd %s -o - | FileCheck --check-prefix=RV32ZKND %s
 ; RUN: llc -mtriple=riscv32 -mattr=+zkne %s -o - | FileCheck --check-prefix=RV32ZKNE %s
 ; RUN: llc -mtriple=riscv32 -mattr=+zknh %s -o - | FileCheck --check-prefix=RV32ZKNH %s
 ; RUN: llc -mtriple=riscv32 -mattr=+zksed %s -o - | FileCheck --check-prefix=RV32ZKSED %s

 ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zihintntl %s -o - | FileCheck --check-prefix=RV64ZIHINTNTL %s
 ; RUN: llc -mtriple=riscv64 -mattr=+zfhmin %s -o - | FileCheck --check-prefix=RV64ZFHMIN %s
 ; RUN: llc -mtriple=riscv64 -mattr=+zfh %s -o - | FileCheck --check-prefix=RV64ZFH %s
 ; RUN: llc -mtriple=riscv64 -mattr=+zba %s -o - | FileCheck --check-prefix=RV64ZBA %s
 ; RUN: llc -mtriple=riscv64 -mattr=+zbb %s -o - | FileCheck --check-prefix=RV64ZBB %s
 ; RUN: llc -mtriple=riscv64 -mattr=+zbc %s -o - | FileCheck --check-prefix=RV64ZBC %s
 ; RUN: llc -mtriple=riscv64 -mattr=+zbs %s -o - | FileCheck --check-prefix=RV64ZBS %s
 ; RUN: llc -mtriple=riscv64 -mattr=+v %s -o - | FileCheck --check-prefix=RV64V %s
+; RUN: llc -mtriple=riscv64 -mattr=+h %s -o - | FileCheck --check-prefix=RV64H %s
 ; RUN: llc -mtriple=riscv64 -mattr=+zbb,+zfh,+v,+f %s -o - | FileCheck --check-prefix=RV64COMBINED %s
 ; RUN: llc -mtriple=riscv64 -mattr=+zbkb %s -o - | FileCheck --check-prefix=RV64ZBKB %s
 ; RUN: llc -mtriple=riscv64 -mattr=+zbkc %s -o - | FileCheck --check-prefix=RV64ZBKC %s
 ; RUN: llc -mtriple=riscv64 -mattr=+zbkx %s -o - | FileCheck --check-prefix=RV64ZBKX %s
 ; RUN: llc -mtriple=riscv64 -mattr=+zknd %s -o - | FileCheck --check-prefix=RV64ZKND %s
 ; RUN: llc -mtriple=riscv64 -mattr=+zkne %s -o - | FileCheck --check-prefix=RV64ZKNE %s
 ; RUN: llc -mtriple=riscv64 -mattr=+zknh %s -o - | FileCheck --check-prefix=RV64ZKNH %s
 ; RUN: llc -mtriple=riscv64 -mattr=+zksed %s -o - | FileCheck --check-prefix=RV64ZKSED %s

 ; RV32ZIHINTNTL: .attribute 5, "rv32i2p0_zihintntl0p2"
 ; RV32ZFHMIN: .attribute 5, "rv32i2p0_f2p0_zfhmin1p0"
 ; RV32ZFH: .attribute 5, "rv32i2p0_f2p0_zfh1p0"
 ; RV32ZBA: .attribute 5, "rv32i2p0_zba1p0"
 ; RV32ZBB: .attribute 5, "rv32i2p0_zbb1p0"
 ; RV32ZBC: .attribute 5, "rv32i2p0_zbc1p0"
 ; RV32ZBS: .attribute 5, "rv32i2p0_zbs1p0"
 ; RV32V: .attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0"
+; RV32H: .attribute 5, "rv32i2p0_h1p0"
 ; RV32COMBINED: .attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zfh1p0_zbb1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0"
 ; RV32ZBKB: .attribute 5, "rv32i2p0_zbkb1p0"
 ; RV32ZBKC: .attribute 5, "rv32i2p0_zbkc1p0"
 ; RV32ZBKX: .attribute 5, "rv32i2p0_zbkx1p0"
 ; RV32ZKND: .attribute 5, "rv32i2p0_zknd1p0"
 ; RV32ZKNE: .attribute 5, "rv32i2p0_zkne1p0"
 ; RV32ZKNH: .attribute 5, "rv32i2p0_zknh1p0"
 ; RV32ZKSED: .attribute 5, "rv32i2p0_zksed1p0"

 ; RV64ZIHINTNTL: .attribute 5, "rv64i2p0_zihintntl0p2"
 ; RV64ZFHMIN: .attribute 5, "rv64i2p0_f2p0_zfhmin1p0"
 ; RV64ZFH: .attribute 5, "rv64i2p0_f2p0_zfh1p0"
 ; RV64ZBA: .attribute 5, "rv64i2p0_zba1p0"
 ; RV64ZBB: .attribute 5, "rv64i2p0_zbb1p0"
 ; RV64ZBC: .attribute 5, "rv64i2p0_zbc1p0"
 ; RV64ZBS: .attribute 5, "rv64i2p0_zbs1p0"
 ; RV64V: .attribute 5, "rv64i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0"
+; RV64H: .attribute 5, "rv64i2p0_h1p0"
 ; RV64COMBINED: .attribute 5, "rv64i2p0_f2p0_d2p0_v1p0_zfh1p0_zbb1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0"
 ; RV64ZBKB: .attribute 5, "rv64i2p0_zbkb1p0"
 ; RV64ZBKC: .attribute 5, "rv64i2p0_zbkc1p0"
 ; RV64ZBKX: .attribute 5, "rv64i2p0_zbkx1p0"
 ; RV64ZKND: .attribute 5, "rv64i2p0_zknd1p0"
 ; RV64ZKNE: .attribute 5, "rv64i2p0_zkne1p0"
 ; RV64ZKNH: .attribute 5, "rv64i2p0_zknh1p0"
 ; RV64ZKSED: .attribute 5, "rv64i2p0_zksed1p0"

llvm/test/MC/RISCV/priv-aliases-valid.s

-# RUN: llvm-mc %s -triple=riscv32 -riscv-no-aliases -show-encoding \
-# RUN:     | FileCheck -check-prefixes=CHECK,CHECK-INST %s
-# RUN: llvm-mc %s -triple=riscv64 -riscv-no-aliases -show-encoding \
-# RUN:     | FileCheck -check-prefixes=CHECK,CHECK-INST %s
-# RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
-# RUN:     | llvm-objdump -M no-aliases -d - \
-# RUN:     | FileCheck -check-prefix=CHECK-INST %s
-# RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
-# RUN:     | llvm-objdump -M no-aliases -d - \
-# RUN:     | FileCheck -check-prefix=CHECK-INST %s
-
-# CHECK-INST: hlv.b a0, (a1)
-# CHECK: encoding: [0x73,0xc5,0x05,0x60]
-hlv.b   a0, 0(a1)
-
-# CHECK-INST: hlv.bu a0, (a1)
-# CHECK: encoding: [0x73,0xc5,0x15,0x60]
-hlv.bu  a0, 0(a1)
-
-# CHECK-INST: hlv.h a1, (a2)
-# CHECK: encoding: [0xf3,0x45,0x06,0x64]
-hlv.h   a1, 0(a2)
-
-# CHECK-INST: hlv.hu a1, (a1)
-# CHECK: encoding: [0xf3,0xc5,0x15,0x64]
-hlv.hu  a1, 0(a1)
-
-# CHECK-INST: hlvx.hu a1, (a2)
-# CHECK: encoding: [0xf3,0x45,0x36,0x64]
-hlvx.hu a1, 0(a2)
-
-# CHECK-INST: hlv.w a2, (a2)
-# CHECK: encoding: [0x73,0x46,0x06,0x68]
-hlv.w   a2, 0(a2)
-
-# CHECK-INST: hlvx.wu a2, (a3)
-# CHECK: encoding: [0x73,0xc6,0x36,0x68]
-hlvx.wu a2, 0(a3)
-
-# CHECK-INST: hsv.b a0, (a1)
-# CHECK: encoding: [0x73,0xc0,0xa5,0x62]
-hsv.b   a0, 0(a1)
-
-# CHECK-INST: hsv.h a0, (a1)
-# CHECK: encoding: [0x73,0xc0,0xa5,0x66]
-hsv.h   a0, 0(a1)
-
-# CHECK-INST: hsv.w a0, (a1)
-# CHECK: encoding: [0x73,0xc0,0xa5,0x6a]
-hsv.w   a0, 0(a1)

llvm/test/MC/RISCV/priv-valid.s

 
 # CHECK-INST: sfence.w.inval
 # CHECK: encoding: [0x73,0x00,0x00,0x18]
 sfence.w.inval
 
 # CHECK-INST: sfence.inval.ir
 # CHECK: encoding: [0x73,0x00,0x10,0x18]
 sfence.inval.ir
-
-# CHECK-INST: hfence.vvma zero, zero
-# CHECK: encoding: [0x73,0x00,0x00,0x22]
-hfence.vvma zero, zero
-
-# CHECK-INST: hfence.vvma a0, a1
-# CHECK: encoding: [0x73,0x00,0xb5,0x22]
-hfence.vvma a0, a1
-
-# CHECK-INST: hfence.gvma zero, zero
-# CHECK: encoding: [0x73,0x00,0x00,0x62]
-hfence.gvma zero, zero
-
-# CHECK-INST: hfence.gvma a0, a1
-# CHECK: encoding: [0x73,0x00,0xb5,0x62]
-hfence.gvma a0, a1
-
-# CHECK-INST: hinval.vvma zero, zero
-# CHECK: encoding: [0x73,0x00,0x00,0x26]
-hinval.vvma zero, zero
-
-# CHECK-INST: hinval.vvma a0, a1
-# CHECK: encoding: [0x73,0x00,0xb5,0x26]
-hinval.vvma a0, a1
-
-# CHECK-INST: hinval.gvma zero, zero
-# CHECK: encoding: [0x73,0x00,0x00,0x66]
-hinval.gvma zero, zero
-
-# CHECK-INST: hinval.gvma a0, a1
-# CHECK: encoding: [0x73,0x00,0xb5,0x66]
-hinval.gvma a0, a1
-
-# CHECK-INST: hlv.b a0, (a1)
-# CHECK: encoding: [0x73,0xc5,0x05,0x60]
-hlv.b   a0, (a1)
-
-# CHECK-INST: hlv.bu a0, (a1)
-# CHECK: encoding: [0x73,0xc5,0x15,0x60]
-hlv.bu  a0, (a1)
-
-# CHECK-INST: hlv.h a1, (a2)
-# CHECK: encoding: [0xf3,0x45,0x06,0x64]
-hlv.h   a1, (a2)
-
-# CHECK-INST: hlv.hu a1, (a1)
-# CHECK: encoding: [0xf3,0xc5,0x15,0x64]
-hlv.hu  a1, (a1)
-
-# CHECK-INST: hlvx.hu a1, (a2)
-# CHECK: encoding: [0xf3,0x45,0x36,0x64]
-hlvx.hu a1, (a2)
-
-# CHECK-INST: hlv.w a2, (a2)
-# CHECK: encoding: [0x73,0x46,0x06,0x68]
-hlv.w   a2, (a2)
-
-# CHECK-INST: hlvx.wu a2, (a3)
-# CHECK: encoding: [0x73,0xc6,0x36,0x68]
-hlvx.wu a2, (a3)
-
-# CHECK-INST: hsv.b a0, (a1)
-# CHECK: encoding: [0x73,0xc0,0xa5,0x62]
-hsv.b   a0, (a1)
-
-# CHECK-INST: hsv.h a0, (a1)
-# CHECK: encoding: [0x73,0xc0,0xa5,0x66]
-hsv.h   a0, (a1)
-
-# CHECK-INST: hsv.w a0, (a1)
-# CHECK: encoding: [0x73,0xc0,0xa5,0x6a]
-hsv.w   a0, (a1)

llvm/test/MC/RISCV/rv32h-invalid.s

+# RUN: not llvm-mc -triple riscv32 -mattr=+h < %s 2>&1 \
+# RUN:     | FileCheck %s -check-prefixes=CHECK-OFFSET
+# RUN: not llvm-mc -triple riscv32 < %s 2>&1 \
+# RUN:     | FileCheck %s -check-prefixes=CHECK,CHECK-OFFSET
+
+hfence.vvma zero, zero # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'H' (Hypervisor)
+
+hlv.h   a0, 0(a1) # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'H' (Hypervisor)
+
+hlv.wu   a0, 0(a1) # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'H' (Hypervisor), RV64I Base Instruction Set
+
+hlv.b   a0, 100(a1) # CHECK-OFFSET: :[[@LINE]]:13: error: optional integer offset must be 0

llvm/test/MC/RISCV/rv32ih-aliases-valid.s

+# RUN: llvm-mc %s -triple=riscv32 -mattr=+h -riscv-no-aliases -show-encoding \
+# RUN:     | FileCheck -check-prefixes=CHECK,CHECK-INST,CHECK-ALIAS-INST %s
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+h -riscv-no-aliases -show-encoding \
+# RUN:     | FileCheck -check-prefixes=CHECK,CHECK-INST,CHECK-ALIAS-INST %s
+# RUN: llvm-mc -filetype=obj -mattr=+h -triple riscv32 < %s \
+# RUN:     | llvm-objdump --mattr=+h -M no-aliases -d - \
+# RUN:     | FileCheck -check-prefixes=CHECK-INST,CHECK-NOALIAS-INST %s
+# RUN: llvm-mc -filetype=obj -mattr=+h -triple riscv64 < %s \
+# RUN:     | llvm-objdump --mattr=+h -M no-aliases -d - \
+# RUN:     | FileCheck -check-prefixes=CHECK-INST,CHECK-NOALIAS-INST %s
+
+# CHECK-ALIAS-INST: hfence.gvma
+# CHECK-NOALIAS-INST: hfence.gvma zero, zero
+# CHECK: encoding: [0x73,0x00,0x00,0x62]
+hfence.gvma
+
+# CHECK-ALIAS-INST: hfence.gvma a0
+# CHECK-NOALIAS-INST: hfence.gvma a0, zero
+# CHECK: encoding: [0x73,0x00,0x05,0x62]
+hfence.gvma a0
+
+# CHECK-ALIAS-INST: hfence.vvma
+# CHECK-NOALIAS-INST: hfence.vvma zero, zero
+# CHECK: encoding: [0x73,0x00,0x00,0x22]
+hfence.vvma
+
+# CHECK-ALIAS-INST: hfence.vvma a0
+# CHECK-NOALIAS-INST: hfence.vvma a0, zero
+# CHECK: encoding: [0x73,0x00,0x05,0x22]
+hfence.vvma a0
+
+# CHECK-INST: hlv.b a0, (a1)
+# CHECK: encoding: [0x73,0xc5,0x05,0x60]
+hlv.b   a0, 0(a1)
+
+# CHECK-INST: hlv.bu a0, (a1)
+# CHECK: encoding: [0x73,0xc5,0x15,0x60]
+hlv.bu  a0, 0(a1)
+
+# CHECK-INST: hlv.h a1, (a2)
+# CHECK: encoding: [0xf3,0x45,0x06,0x64]
+hlv.h   a1, 0(a2)
+
+# CHECK-INST: hlv.hu a1, (a1)
+# CHECK: encoding: [0xf3,0xc5,0x15,0x64]
+hlv.hu  a1, 0(a1)
+
+# CHECK-INST: hlvx.hu a1, (a2)
+# CHECK: encoding: [0xf3,0x45,0x36,0x64]
+hlvx.hu a1, 0(a2)
+
+# CHECK-INST: hlv.w a2, (a2)
+# CHECK: encoding: [0x73,0x46,0x06,0x68]
+hlv.w   a2, 0(a2)
+
+# CHECK-INST: hlvx.wu a2, (a3)
+# CHECK: encoding: [0x73,0xc6,0x36,0x68]
+hlvx.wu a2, 0(a3)
+
+# CHECK-INST: hsv.b a0, (a1)
+# CHECK: encoding: [0x73,0xc0,0xa5,0x62]
+hsv.b   a0, 0(a1)
+
+# CHECK-INST: hsv.h a0, (a1)
+# CHECK: encoding: [0x73,0xc0,0xa5,0x66]
+hsv.h   a0, 0(a1)
+
+# CHECK-INST: hsv.w a0, (a1)
+# CHECK: encoding: [0x73,0xc0,0xa5,0x6a]
+hsv.w   a0, 0(a1)

llvm/test/MC/RISCV/rv32ih-valid.s

+# RUN: llvm-mc %s -triple=riscv32 -mattr=+h -riscv-no-aliases -show-encoding \
+# RUN:     | FileCheck -check-prefixes=CHECK,CHECK-INST %s
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+h -riscv-no-aliases -show-encoding \
+# RUN:     | FileCheck -check-prefixes=CHECK,CHECK-INST %s
+# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+h < %s \
+# RUN:     | llvm-objdump --mattr=+h -M no-aliases -d - \
+# RUN:     | FileCheck -check-prefix=CHECK-INST %s
+# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+h < %s \
+# RUN:     | llvm-objdump --mattr=+h -M no-aliases -d - \
+# RUN:     | FileCheck -check-prefix=CHECK-INST %s
+
+# CHECK-INST: hfence.vvma zero, zero
+# CHECK: encoding: [0x73,0x00,0x00,0x22]
+hfence.vvma zero, zero
+
+# CHECK-INST: hfence.vvma a0, a1
+# CHECK: encoding: [0x73,0x00,0xb5,0x22]
+hfence.vvma a0, a1
+
+# CHECK-INST: hfence.gvma zero, zero
+# CHECK: encoding: [0x73,0x00,0x00,0x62]
+hfence.gvma zero, zero
+
+# CHECK-INST: hfence.gvma a0, a1
+# CHECK: encoding: [0x73,0x00,0xb5,0x62]
+hfence.gvma a0, a1
+
+# CHECK-INST: hlv.b a0, (a1)
+# CHECK: encoding: [0x73,0xc5,0x05,0x60]
+hlv.b   a0, (a1)
+
+# CHECK-INST: hlv.bu a0, (a1)
+# CHECK: encoding: [0x73,0xc5,0x15,0x60]
+hlv.bu  a0, (a1)
+
+# CHECK-INST: hlv.h a1, (a2)
+# CHECK: encoding: [0xf3,0x45,0x06,0x64]
+hlv.h   a1, (a2)
+
+# CHECK-INST: hlv.hu a1, (a1)
+# CHECK: encoding: [0xf3,0xc5,0x15,0x64]
+hlv.hu  a1, (a1)
+
+# CHECK-INST: hlvx.hu a1, (a2)
+# CHECK: encoding: [0xf3,0x45,0x36,0x64]
+hlvx.hu a1, (a2)
+
+# CHECK-INST: hlv.w a2, (a2)
+# CHECK: encoding: [0x73,0x46,0x06,0x68]
+hlv.w   a2, (a2)
+
+# CHECK-INST: hlvx.wu a2, (a3)
+# CHECK: encoding: [0x73,0xc6,0x36,0x68]
+hlvx.wu a2, (a3)
+
+# CHECK-INST: hsv.b a0, (a1)
+# CHECK: encoding: [0x73,0xc0,0xa5,0x62]
+hsv.b   a0, (a1)
+
+# CHECK-INST: hsv.h a0, (a1)
+# CHECK: encoding: [0x73,0xc0,0xa5,0x66]
+hsv.h   a0, (a1)
+
+# CHECK-INST: hsv.w a0, (a1)
+# CHECK: encoding: [0x73,0xc0,0xa5,0x6a]
+hsv.w   a0, (a1)

llvm/test/MC/RISCV/rv64h-invalid.s

+# RUN: not llvm-mc -triple riscv64 -mattr=+h < %s 2>&1 \
+# RUN:     | FileCheck %s -check-prefixes=CHECK-OFFSET
+# RUN: not llvm-mc -triple riscv64 < %s 2>&1 \
+# RUN:     | FileCheck %s -check-prefixes=CHECK,CHECK-OFFSET
+
+hfence.vvma zero, zero # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'H' (Hypervisor)
+
+hlv.h   a0, 0(a1) # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'H' (Hypervisor)
+
+hlv.wu   a0, 0(a1) # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'H' (Hypervisor)
+
+hlv.b   a0, 100(a1) # CHECK-OFFSET: :[[@LINE]]:13: error: optional integer offset must be 0

llvm/test/MC/RISCV/rv64ih-valid.s

-# RUN: llvm-mc %s -triple=riscv64 -riscv-no-aliases -show-encoding \
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+h -riscv-no-aliases -show-encoding \
 # RUN:     | FileCheck -check-prefixes=CHECK,CHECK-INST %s
-# RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
-# RUN:     | llvm-objdump -M no-aliases -d - \
+# RUN: llvm-mc -filetype=obj -mattr=+h -triple riscv64 < %s \
+# RUN:     | llvm-objdump --mattr=+h -M no-aliases -d - \
 # RUN:     | FileCheck -check-prefix=CHECK-INST %s
 
-# RUN: not llvm-mc -triple riscv32 < %s 2>&1 \
+# RUN: not llvm-mc -triple riscv32 -mattr=+h < %s 2>&1 \
 # RUN:     | FileCheck -check-prefix=CHECK-RV32 %s
 
 # CHECK-INST: hlv.wu a0, (a1)
 # CHECK: encoding: [0x73,0xc5,0x15,0x68]
 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set{{$}}
 hlv.wu   a0, (a1)
 
 # CHECK-INST: hlv.wu a0, (a1)

llvm/test/MC/RISCV/rvi-aliases-valid.s

 csrrc t0, 0x140, 0x11
 
 # CHECK-S-OBJ-NOALIAS: sfence.vma zero, zero
 # CHECK-S-OBJ: sfence.vma
 sfence.vma
 # CHECK-S-OBJ-NOALIAS: sfence.vma a0, zero
 # CHECK-S-OBJ: sfence.vma a0
 sfence.vma a0
-# CHECK-S-OBJ-NOALIAS: hfence.gvma zero, zero
-# CHECK-S-OBJ: hfence.gvma
-hfence.gvma
-# CHECK-S-OBJ-NOALIAS: hfence.gvma a0, zero
-# CHECK-S-OBJ: hfence.gvma a0
-hfence.gvma a0
-# CHECK-S-OBJ-NOALIAS: hfence.vvma zero, zero
-# CHECK-S-OBJ: hfence.vvma
-hfence.vvma
-# CHECK-S-OBJ-NOALIAS: hfence.vvma a0, zero
-# CHECK-S-OBJ: hfence.vvma a0
-hfence.vvma a0
 
 # The following aliases are accepted as input but the canonical form
 # of the instruction will always be printed.
 # CHECK-S-OBJ-NOALIAS: addi a2, a3, 4
 # CHECK-S-OBJ: addi a2, a3, 4
 add a2, a3, 4
 # CHECK-S-OBJ-NOALIAS: andi a2, a3, 4
 # CHECK-S-OBJ: andi a2, a3, 4