[mlir][llvmir] Support FastmathFlags for LLVM intrinsic operations.

[vzakhari]

Summary

This is required for D126305 code to propagate fastmath attributes
for Arith operations that are converted to LLVM IR intrinsics
operations.

LLVM IR intrinsic operations are using custom assembly format now
to avoid printing {fastmathFlags = #llvm.fastmath<none>}, which
is too verbose.

[vzakhari]

Friendly ping.

[vzakhari]

Rebase.

[vzakhari]

mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td

19

I think it may be better to move custom assemblyFormat to LLVM_IntrOpBase, but this is going to have broader effect on the LIT tests. Please let me know if it makes sense to you, and I will do this in a separate commit.

[vzakhari]

mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td

115–116

I believe we lost Pure trait and overloadedOperands [0,1] in D136360. I had to fix it to avoid assertion for powi addition in mlir/test/Target/LLVMIR/llvmir.mlir below.

@gysit, can you please confirm that the change for powi was unintentional?

[gysit]

mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td

115–116

Yes that was not intentional. Sorry for the glitch!

[jeanPerier]

Flang test changes look good to me, great to see fastmath flags coming in for intrinsics !

[vzakhari]

Thank you for the review, Jean and River!

flang/test/Intrinsics/math-codegen.fir

 // RUN: split-file %s %t
 // TODO: verify that Fast-Math Flags and 'strictfp' are properly set.
 
 //--- abs_fast.fir
 // RUN: fir-opt %t/abs_fast.fir --fir-to-llvm-ir="target=x86_64-unknown-linux-gnu" | FileCheck %t/abs_fast.fir
 // CHECK: @_QPtest_real4
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.fabs"({{%[A-Za-z0-9._]+}}) : (f32) -> f32
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.fabs({{%[A-Za-z0-9._]+}}) : (f32) -> f32
 
 // CHECK: @_QPtest_real8
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.fabs"({{%[A-Za-z0-9._]+}}) : (f64) -> f64
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.fabs({{%[A-Za-z0-9._]+}}) : (f64) -> f64
 
 // CHECK: @_QPtest_real16
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.fabs"({{%[A-Za-z0-9._]+}}) : (f128) -> f128
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.fabs({{%[A-Za-z0-9._]+}}) : (f128) -> f128
 
 // CHECK: @_QPtest_complex4
 // CHECK: {{%[A-Za-z0-9._]+}} = llvm.call @hypotf({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f32, f32) -> f32
 
 // CHECK: @_QPtest_complex8
 // CHECK: {{%[A-Za-z0-9._]+}} = llvm.call @hypot({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f64, f64) -> f64
 
 func.func @_QPtest_real4(%arg0: !fir.ref<f32> {fir.bindc_name = "x"}) -> f32 {
func.func @_QPtest_complex8(%arg0: !fir.ref<!fir.complex<8>> {fir.bindc_name = "c"}) -> !fir.complex<8> {
   return %8 : !fir.complex<8>
 }
 func.func private @hypotf(f32, f32) -> f32
 func.func private @hypot(f64, f64) -> f64
 
 //--- abs_relaxed.fir
 // RUN: fir-opt %t/abs_relaxed.fir --fir-to-llvm-ir="target=x86_64-unknown-linux-gnu" | FileCheck %t/abs_relaxed.fir
 // CHECK: @_QPtest_real4
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.fabs"({{%[A-Za-z0-9._]+}}) : (f32) -> f32
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.fabs({{%[A-Za-z0-9._]+}}) : (f32) -> f32
 
 // CHECK: @_QPtest_real8
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.fabs"({{%[A-Za-z0-9._]+}}) : (f64) -> f64
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.fabs({{%[A-Za-z0-9._]+}}) : (f64) -> f64
 
 // CHECK: @_QPtest_real16
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.fabs"({{%[A-Za-z0-9._]+}}) : (f128) -> f128
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.fabs({{%[A-Za-z0-9._]+}}) : (f128) -> f128
 
 // CHECK: @_QPtest_complex4
 // CHECK: {{%[A-Za-z0-9._]+}} = llvm.call @hypotf({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f32, f32) -> f32
 
 // CHECK: @_QPtest_complex8
 // CHECK: {{%[A-Za-z0-9._]+}} = llvm.call @hypot({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f64, f64) -> f64
 
 func.func @_QPtest_real4(%arg0: !fir.ref<f32> {fir.bindc_name = "x"}) -> f32 {
func.func @_QPtest_real8(%arg0: !fir.ref<f64> {fir.bindc_name = "x"}) -> f64 {
   return %3 : f64
 }
 func.func private @llvm.trunc.f32(f32) -> f32
 func.func private @llvm.trunc.f64(f64) -> f64
 
 //--- anint_fast.fir
 // RUN: fir-opt %t/anint_fast.fir --fir-to-llvm-ir="target=x86_64-unknown-linux-gnu" | FileCheck %t/anint_fast.fir
 // CHECK: @_QPtest_real4
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.round"({{%[A-Za-z0-9._]+}}) : (f32) -> f32
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.round({{%[A-Za-z0-9._]+}}) : (f32) -> f32
 
 // CHECK: @_QPtest_real8
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.round"({{%[A-Za-z0-9._]+}}) : (f64) -> f64
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.round({{%[A-Za-z0-9._]+}}) : (f64) -> f64
 
 func.func @_QPtest_real4(%arg0: !fir.ref<f32> {fir.bindc_name = "x"}) -> f32 {
   %0 = fir.alloca f32 {bindc_name = "test_real4", uniq_name = "_QFtest_real4Etest_real4"}
   %1 = fir.load %arg0 : !fir.ref<f32>
-  %2 = "llvm.intr.round"(%1) : (f32) -> f32
+  %2 = llvm.intr.round(%1) : (f32) -> f32
   fir.store %2 to %0 : !fir.ref<f32>
   %3 = fir.load %0 : !fir.ref<f32>
   return %3 : f32
 }
 func.func @_QPtest_real8(%arg0: !fir.ref<f64> {fir.bindc_name = "x"}) -> f64 {
   %0 = fir.alloca f64 {bindc_name = "test_real8", uniq_name = "_QFtest_real8Etest_real8"}
   %1 = fir.load %arg0 : !fir.ref<f64>
-  %2 = "llvm.intr.round"(%1) : (f64) -> f64
+  %2 = llvm.intr.round(%1) : (f64) -> f64
   fir.store %2 to %0 : !fir.ref<f64>
   %3 = fir.load %0 : !fir.ref<f64>
   return %3 : f64
 }
 
 //--- anint_relaxed.fir
 // RUN: fir-opt %t/anint_relaxed.fir --fir-to-llvm-ir="target=x86_64-unknown-linux-gnu" | FileCheck %t/anint_relaxed.fir
 // CHECK: @_QPtest_real4
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.round"({{%[A-Za-z0-9._]+}}) : (f32) -> f32
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.round({{%[A-Za-z0-9._]+}}) : (f32) -> f32
 
 // CHECK: @_QPtest_real8
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.round"({{%[A-Za-z0-9._]+}}) : (f64) -> f64
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.round({{%[A-Za-z0-9._]+}}) : (f64) -> f64
 
 func.func @_QPtest_real4(%arg0: !fir.ref<f32> {fir.bindc_name = "x"}) -> f32 {
   %0 = fir.alloca f32 {bindc_name = "test_real4", uniq_name = "_QFtest_real4Etest_real4"}
   %1 = fir.load %arg0 : !fir.ref<f32>
-  %2 = "llvm.intr.round"(%1) : (f32) -> f32
+  %2 = llvm.intr.round(%1) : (f32) -> f32
   fir.store %2 to %0 : !fir.ref<f32>
   %3 = fir.load %0 : !fir.ref<f32>
   return %3 : f32
 }
 func.func @_QPtest_real8(%arg0: !fir.ref<f64> {fir.bindc_name = "x"}) -> f64 {
   %0 = fir.alloca f64 {bindc_name = "test_real8", uniq_name = "_QFtest_real8Etest_real8"}
   %1 = fir.load %arg0 : !fir.ref<f64>
-  %2 = "llvm.intr.round"(%1) : (f64) -> f64
+  %2 = llvm.intr.round(%1) : (f64) -> f64
   fir.store %2 to %0 : !fir.ref<f64>
   %3 = fir.load %0 : !fir.ref<f64>
   return %3 : f64
 }
 
 //--- anint_precise.fir
 // RUN: fir-opt %t/anint_precise.fir --fir-to-llvm-ir="target=x86_64-unknown-linux-gnu" | FileCheck %t/anint_precise.fir
 // CHECK: @_QPtest_real4
func.func @_QPtest_real8(%arg0: !fir.ref<f64> {fir.bindc_name = "x"}, %arg1: !fir.ref<f64> {fir.bindc_name = "y"}) -> f64 {
   return %4 : f64
 }
 func.func private @atan2f(f32, f32) -> f32
 func.func private @atan2(f64, f64) -> f64
 
 //--- ceiling_fast.fir
 // RUN: fir-opt %t/ceiling_fast.fir --fir-to-llvm-ir="target=x86_64-unknown-linux-gnu" | FileCheck %t/ceiling_fast.fir
 // CHECK: @_QPtest_real4
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.ceil"({{%[A-Za-z0-9._]+}}) : (f32) -> f32
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.ceil({{%[A-Za-z0-9._]+}}) : (f32) -> f32
 
 // CHECK: @_QPtest_real8
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.ceil"({{%[A-Za-z0-9._]+}}) : (f64) -> f64
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.ceil({{%[A-Za-z0-9._]+}}) : (f64) -> f64
 
 func.func @_QPtest_real4(%arg0: !fir.ref<f32> {fir.bindc_name = "x"}) -> f32 {
   %0 = fir.alloca f32 {bindc_name = "test_real4", uniq_name = "_QFtest_real4Etest_real4"}
   %1 = fir.load %arg0 : !fir.ref<f32>
   %2 = math.ceil %1 : f32
   %3 = fir.convert %2 : (f32) -> i32
   %4 = fir.convert %3 : (i32) -> f32
   fir.store %4 to %0 : !fir.ref<f32>
func.func @_QPtest_real8(%arg0: !fir.ref<f64> {fir.bindc_name = "x"}) -> f64 {
   fir.store %4 to %0 : !fir.ref<f64>
   %5 = fir.load %0 : !fir.ref<f64>
   return %5 : f64
 }
 
 //--- ceiling_relaxed.fir
 // RUN: fir-opt %t/ceiling_relaxed.fir --fir-to-llvm-ir="target=x86_64-unknown-linux-gnu" | FileCheck %t/ceiling_relaxed.fir
 // CHECK: @_QPtest_real4
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.ceil"({{%[A-Za-z0-9._]+}}) : (f32) -> f32
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.ceil({{%[A-Za-z0-9._]+}}) : (f32) -> f32
 
 // CHECK: @_QPtest_real8
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.ceil"({{%[A-Za-z0-9._]+}}) : (f64) -> f64
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.ceil({{%[A-Za-z0-9._]+}}) : (f64) -> f64
 
 func.func @_QPtest_real4(%arg0: !fir.ref<f32> {fir.bindc_name = "x"}) -> f32 {
   %0 = fir.alloca f32 {bindc_name = "test_real4", uniq_name = "_QFtest_real4Etest_real4"}
   %1 = fir.load %arg0 : !fir.ref<f32>
   %2 = math.ceil %1 : f32
   %3 = fir.convert %2 : (f32) -> i32
   %4 = fir.convert %3 : (i32) -> f32
   fir.store %4 to %0 : !fir.ref<f32>
func.func @_QPtest_real8(%arg0: !fir.ref<f64> {fir.bindc_name = "x"}) -> f64 {
   return %5 : f64
 }
 func.func private @ceilf(f32) -> f32
 func.func private @ceil(f64) -> f64
 
 //--- cos_fast.fir
 // RUN: fir-opt %t/cos_fast.fir --fir-to-llvm-ir="target=x86_64-unknown-linux-gnu" | FileCheck %t/cos_fast.fir
 // CHECK: @_QPtest_real4
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.cos"({{%[A-Za-z0-9._]+}}) : (f32) -> f32
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.cos({{%[A-Za-z0-9._]+}}) : (f32) -> f32
 
 // CHECK: @_QPtest_real8
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.cos"({{%[A-Za-z0-9._]+}}) : (f64) -> f64
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.cos({{%[A-Za-z0-9._]+}}) : (f64) -> f64
 
 func.func @_QPtest_real4(%arg0: !fir.ref<f32> {fir.bindc_name = "x"}) -> f32 {
   %0 = fir.alloca f32 {bindc_name = "test_real4", uniq_name = "_QFtest_real4Etest_real4"}
   %1 = fir.load %arg0 : !fir.ref<f32>
   %2 = math.cos %1 : f32
   fir.store %2 to %0 : !fir.ref<f32>
   %3 = fir.load %0 : !fir.ref<f32>
   return %3 : f32
 }
 func.func @_QPtest_real8(%arg0: !fir.ref<f64> {fir.bindc_name = "x"}) -> f64 {
   %0 = fir.alloca f64 {bindc_name = "test_real8", uniq_name = "_QFtest_real8Etest_real8"}
   %1 = fir.load %arg0 : !fir.ref<f64>
   %2 = math.cos %1 : f64
   fir.store %2 to %0 : !fir.ref<f64>
   %3 = fir.load %0 : !fir.ref<f64>
   return %3 : f64
 }
 
 //--- cos_relaxed.fir
 // RUN: fir-opt %t/cos_relaxed.fir --fir-to-llvm-ir="target=x86_64-unknown-linux-gnu" | FileCheck %t/cos_relaxed.fir
 // CHECK: @_QPtest_real4
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.cos"({{%[A-Za-z0-9._]+}}) : (f32) -> f32
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.cos({{%[A-Za-z0-9._]+}}) : (f32) -> f32
 
 // CHECK: @_QPtest_real8
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.cos"({{%[A-Za-z0-9._]+}}) : (f64) -> f64
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.cos({{%[A-Za-z0-9._]+}}) : (f64) -> f64
 
 func.func @_QPtest_real4(%arg0: !fir.ref<f32> {fir.bindc_name = "x"}) -> f32 {
   %0 = fir.alloca f32 {bindc_name = "test_real4", uniq_name = "_QFtest_real4Etest_real4"}
   %1 = fir.load %arg0 : !fir.ref<f32>
   %2 = math.cos %1 : f32
   fir.store %2 to %0 : !fir.ref<f32>
   %3 = fir.load %0 : !fir.ref<f32>
   return %3 : f32
func.func @_QPtest_real8(%arg0: !fir.ref<f64> {fir.bindc_name = "x"}) -> f64 {
   return %3 : f64
 }
 func.func private @erff(f32) -> f32
 func.func private @erf(f64) -> f64
 
 //--- exp_fast.fir
 // RUN: fir-opt %t/exp_fast.fir --fir-to-llvm-ir="target=x86_64-unknown-linux-gnu" | FileCheck %t/exp_fast.fir
 // CHECK: @_QPtest_real4
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.exp"({{%[A-Za-z0-9._]+}}) : (f32) -> f32
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.exp({{%[A-Za-z0-9._]+}}) : (f32) -> f32
 
 // CHECK: @_QPtest_real8
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.exp"({{%[A-Za-z0-9._]+}}) : (f64) -> f64
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.exp({{%[A-Za-z0-9._]+}}) : (f64) -> f64
 
 func.func @_QPtest_real4(%arg0: !fir.ref<f32> {fir.bindc_name = "x"}) -> f32 {
   %0 = fir.alloca f32 {bindc_name = "test_real4", uniq_name = "_QFtest_real4Etest_real4"}
   %1 = fir.load %arg0 : !fir.ref<f32>
   %2 = math.exp %1 : f32
   fir.store %2 to %0 : !fir.ref<f32>
   %3 = fir.load %0 : !fir.ref<f32>
   return %3 : f32
 }
 func.func @_QPtest_real8(%arg0: !fir.ref<f64> {fir.bindc_name = "x"}) -> f64 {
   %0 = fir.alloca f64 {bindc_name = "test_real8", uniq_name = "_QFtest_real8Etest_real8"}
   %1 = fir.load %arg0 : !fir.ref<f64>
   %2 = math.exp %1 : f64
   fir.store %2 to %0 : !fir.ref<f64>
   %3 = fir.load %0 : !fir.ref<f64>
   return %3 : f64
 }
 
 //--- exp_relaxed.fir
 // RUN: fir-opt %t/exp_relaxed.fir --fir-to-llvm-ir="target=x86_64-unknown-linux-gnu" | FileCheck %t/exp_relaxed.fir
 // CHECK: @_QPtest_real4
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.exp"({{%[A-Za-z0-9._]+}}) : (f32) -> f32
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.exp({{%[A-Za-z0-9._]+}}) : (f32) -> f32
 
 // CHECK: @_QPtest_real8
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.exp"({{%[A-Za-z0-9._]+}}) : (f64) -> f64
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.exp({{%[A-Za-z0-9._]+}}) : (f64) -> f64
 
 func.func @_QPtest_real4(%arg0: !fir.ref<f32> {fir.bindc_name = "x"}) -> f32 {
   %0 = fir.alloca f32 {bindc_name = "test_real4", uniq_name = "_QFtest_real4Etest_real4"}
   %1 = fir.load %arg0 : !fir.ref<f32>
   %2 = math.exp %1 : f32
   fir.store %2 to %0 : !fir.ref<f32>
   %3 = fir.load %0 : !fir.ref<f32>
   return %3 : f32
func.func @_QPtest_real8(%arg0: !fir.ref<f64> {fir.bindc_name = "x"}) -> f64 {
   return %3 : f64
 }
 func.func private @expf(f32) -> f32
 func.func private @exp(f64) -> f64
 
 //--- floor_fast.fir
 // RUN: fir-opt %t/floor_fast.fir --fir-to-llvm-ir="target=x86_64-unknown-linux-gnu" | FileCheck %t/floor_fast.fir
 // CHECK: @_QPtest_real4
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.floor"({{%[A-Za-z0-9._]+}}) : (f32) -> f32
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.floor({{%[A-Za-z0-9._]+}}) : (f32) -> f32
 
 // CHECK: @_QPtest_real8
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.floor"({{%[A-Za-z0-9._]+}}) : (f64) -> f64
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.floor({{%[A-Za-z0-9._]+}}) : (f64) -> f64
 
 func.func @_QPtest_real4(%arg0: !fir.ref<f32> {fir.bindc_name = "x"}) -> f32 {
   %0 = fir.alloca f32 {bindc_name = "test_real4", uniq_name = "_QFtest_real4Etest_real4"}
   %1 = fir.load %arg0 : !fir.ref<f32>
   %2 = math.floor %1 : f32
   %3 = fir.convert %2 : (f32) -> i32
   %4 = fir.convert %3 : (i32) -> f32
   fir.store %4 to %0 : !fir.ref<f32>
func.func @_QPtest_real8(%arg0: !fir.ref<f64> {fir.bindc_name = "x"}) -> f64 {
   fir.store %4 to %0 : !fir.ref<f64>
   %5 = fir.load %0 : !fir.ref<f64>
   return %5 : f64
 }
 
 //--- floor_relaxed.fir
 // RUN: fir-opt %t/floor_relaxed.fir --fir-to-llvm-ir="target=x86_64-unknown-linux-gnu" | FileCheck %t/floor_relaxed.fir
 // CHECK: @_QPtest_real4
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.floor"({{%[A-Za-z0-9._]+}}) : (f32) -> f32
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.floor({{%[A-Za-z0-9._]+}}) : (f32) -> f32
 
 // CHECK: @_QPtest_real8
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.floor"({{%[A-Za-z0-9._]+}}) : (f64) -> f64
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.floor({{%[A-Za-z0-9._]+}}) : (f64) -> f64
 
 func.func @_QPtest_real4(%arg0: !fir.ref<f32> {fir.bindc_name = "x"}) -> f32 {
   %0 = fir.alloca f32 {bindc_name = "test_real4", uniq_name = "_QFtest_real4Etest_real4"}
   %1 = fir.load %arg0 : !fir.ref<f32>
   %2 = math.floor %1 : f32
   %3 = fir.convert %2 : (f32) -> i32
   %4 = fir.convert %3 : (i32) -> f32
   fir.store %4 to %0 : !fir.ref<f32>
func.func @_QPtest_real8(%arg0: !fir.ref<f64> {fir.bindc_name = "x"}) -> f64 {
   return %5 : f64
 }
 func.func private @floorf(f32) -> f32
 func.func private @floor(f64) -> f64
 
 //--- log_fast.fir
 // RUN: fir-opt %t/log_fast.fir --fir-to-llvm-ir="target=x86_64-unknown-linux-gnu" | FileCheck %t/log_fast.fir
 // CHECK: @_QPtest_real4
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.log"({{%[A-Za-z0-9._]+}}) : (f32) -> f32
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.log({{%[A-Za-z0-9._]+}}) : (f32) -> f32
 
 // CHECK: @_QPtest_real8
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.log"({{%[A-Za-z0-9._]+}}) : (f64) -> f64
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.log({{%[A-Za-z0-9._]+}}) : (f64) -> f64
 
 func.func @_QPtest_real4(%arg0: !fir.ref<f32> {fir.bindc_name = "x"}) -> f32 {
   %0 = fir.alloca f32 {bindc_name = "test_real4", uniq_name = "_QFtest_real4Etest_real4"}
   %1 = fir.load %arg0 : !fir.ref<f32>
   %2 = math.log %1 : f32
   fir.store %2 to %0 : !fir.ref<f32>
   %3 = fir.load %0 : !fir.ref<f32>
   return %3 : f32
 }
 func.func @_QPtest_real8(%arg0: !fir.ref<f64> {fir.bindc_name = "x"}) -> f64 {
   %0 = fir.alloca f64 {bindc_name = "test_real8", uniq_name = "_QFtest_real8Etest_real8"}
   %1 = fir.load %arg0 : !fir.ref<f64>
   %2 = math.log %1 : f64
   fir.store %2 to %0 : !fir.ref<f64>
   %3 = fir.load %0 : !fir.ref<f64>
   return %3 : f64
 }
 
 //--- log_relaxed.fir
 // RUN: fir-opt %t/log_relaxed.fir --fir-to-llvm-ir="target=x86_64-unknown-linux-gnu" | FileCheck %t/log_relaxed.fir
 // CHECK: @_QPtest_real4
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.log"({{%[A-Za-z0-9._]+}}) : (f32) -> f32
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.log({{%[A-Za-z0-9._]+}}) : (f32) -> f32
 
 // CHECK: @_QPtest_real8
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.log"({{%[A-Za-z0-9._]+}}) : (f64) -> f64
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.log({{%[A-Za-z0-9._]+}}) : (f64) -> f64
 
 func.func @_QPtest_real4(%arg0: !fir.ref<f32> {fir.bindc_name = "x"}) -> f32 {
   %0 = fir.alloca f32 {bindc_name = "test_real4", uniq_name = "_QFtest_real4Etest_real4"}
   %1 = fir.load %arg0 : !fir.ref<f32>
   %2 = math.log %1 : f32
   fir.store %2 to %0 : !fir.ref<f32>
   %3 = fir.load %0 : !fir.ref<f32>
   return %3 : f32
func.func @_QPtest_real8(%arg0: !fir.ref<f64> {fir.bindc_name = "x"}) -> f64 {
   return %3 : f64
 }
 func.func private @logf(f32) -> f32
 func.func private @log(f64) -> f64
 
 //--- log10_fast.fir
 // RUN: fir-opt %t/log10_fast.fir --fir-to-llvm-ir="target=x86_64-unknown-linux-gnu" | FileCheck %t/log10_fast.fir
 // CHECK: @_QPtest_real4
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.log10"({{%[A-Za-z0-9._]+}}) : (f32) -> f32
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.log10({{%[A-Za-z0-9._]+}}) : (f32) -> f32
 
 // CHECK: @_QPtest_real8
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.log10"({{%[A-Za-z0-9._]+}}) : (f64) -> f64
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.log10({{%[A-Za-z0-9._]+}}) : (f64) -> f64
 
 func.func @_QPtest_real4(%arg0: !fir.ref<f32> {fir.bindc_name = "x"}) -> f32 {
   %0 = fir.alloca f32 {bindc_name = "test_real4", uniq_name = "_QFtest_real4Etest_real4"}
   %1 = fir.load %arg0 : !fir.ref<f32>
   %2 = math.log10 %1 : f32
   fir.store %2 to %0 : !fir.ref<f32>
   %3 = fir.load %0 : !fir.ref<f32>
   return %3 : f32
 }
 func.func @_QPtest_real8(%arg0: !fir.ref<f64> {fir.bindc_name = "x"}) -> f64 {
   %0 = fir.alloca f64 {bindc_name = "test_real8", uniq_name = "_QFtest_real8Etest_real8"}
   %1 = fir.load %arg0 : !fir.ref<f64>
   %2 = math.log10 %1 : f64
   fir.store %2 to %0 : !fir.ref<f64>
   %3 = fir.load %0 : !fir.ref<f64>
   return %3 : f64
 }
 
 //--- log10_relaxed.fir
 // RUN: fir-opt %t/log10_relaxed.fir --fir-to-llvm-ir="target=x86_64-unknown-linux-gnu" | FileCheck %t/log10_relaxed.fir
 // CHECK: @_QPtest_real4
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.log10"({{%[A-Za-z0-9._]+}}) : (f32) -> f32
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.log10({{%[A-Za-z0-9._]+}}) : (f32) -> f32
 
 // CHECK: @_QPtest_real8
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.log10"({{%[A-Za-z0-9._]+}}) : (f64) -> f64
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.log10({{%[A-Za-z0-9._]+}}) : (f64) -> f64
 
 func.func @_QPtest_real4(%arg0: !fir.ref<f32> {fir.bindc_name = "x"}) -> f32 {
   %0 = fir.alloca f32 {bindc_name = "test_real4", uniq_name = "_QFtest_real4Etest_real4"}
   %1 = fir.load %arg0 : !fir.ref<f32>
   %2 = math.log10 %1 : f32
   fir.store %2 to %0 : !fir.ref<f32>
   %3 = fir.load %0 : !fir.ref<f32>
   return %3 : f32

 func.func private @llvm.lround.i32.f64(f64) -> i32
 func.func private @llvm.lround.i64.f64(f64) -> i64
 
 //--- exponentiation_fast.fir
 // RUN: fir-opt %t/exponentiation_fast.fir --fir-to-llvm-ir="target=x86_64-unknown-linux-gnu" | FileCheck %t/exponentiation_fast.fir
 // CHECK: @_QPtest_real4
 // CHECK: [[STOI:%[A-Za-z0-9._]+]] = llvm.sext {{%[A-Za-z0-9._]+}} : i16 to i32
 // CHECK: {{%[A-Za-z0-9._]+}} = llvm.call @llvm.powi.f32.i32({{%[A-Za-z0-9._]+}}, [[STOI]]) : (f32, i32) -> f32
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.pow"({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f32, f32) -> f32
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.pow({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f32, f32) -> f32
 // CHECK: {{%[A-Za-z0-9._]+}} = llvm.call @llvm.powi.f32.i32({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f32, i32) -> f32
 
 // CHECK: @_QPtest_real8
 // CHECK: [[STOI:%[A-Za-z0-9._]+]] = llvm.sext {{%[A-Za-z0-9._]+}} : i16 to i32
 // CHECK: {{%[A-Za-z0-9._]+}} = llvm.call @llvm.powi.f64.i32({{%[A-Za-z0-9._]+}}, [[STOI]]) : (f64, i32) -> f64
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.pow"({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f64, f64) -> f64
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.pow({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f64, f64) -> f64
 // CHECK: {{%[A-Za-z0-9._]+}} = llvm.call @llvm.powi.f64.i32({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f64, i32) -> f64
 
 func.func @_QPtest_real4(%arg0: !fir.ref<f32> {fir.bindc_name = "x"}, %arg1: !fir.ref<f32> {fir.bindc_name = "y"}, %arg2: !fir.ref<i16> {fir.bindc_name = "s"}, %arg3: !fir.ref<i32> {fir.bindc_name = "i"}) -> f32 {
   %0 = fir.alloca f32 {bindc_name = "test_real4", uniq_name = "_QFtest_real4Etest_real4"}
   %1 = fir.load %arg0 : !fir.ref<f32>
   %2 = fir.load %arg2 : !fir.ref<i16>
   %3 = fir.convert %2 : (i16) -> i32
   %4 = fir.call @llvm.powi.f32.i32(%1, %3) : (f32, i32) -> f32

 func.func private @llvm.powi.f32.i32(f32, i32) -> f32
 func.func private @llvm.powi.f64.i32(f64, i32) -> f64
 
 //--- exponentiation_relaxed.fir
 // RUN: fir-opt %t/exponentiation_relaxed.fir --fir-to-llvm-ir="target=x86_64-unknown-linux-gnu" | FileCheck %t/exponentiation_relaxed.fir
 // CHECK: @_QPtest_real4
 // CHECK: [[STOI:%[A-Za-z0-9._]+]] = llvm.sext {{%[A-Za-z0-9._]+}} : i16 to i32
 // CHECK: {{%[A-Za-z0-9._]+}} = llvm.call @llvm.powi.f32.i32({{%[A-Za-z0-9._]+}}, [[STOI]]) : (f32, i32) -> f32
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.pow"({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f32, f32) -> f32
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.pow({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f32, f32) -> f32
 // CHECK: {{%[A-Za-z0-9._]+}} = llvm.call @llvm.powi.f32.i32({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f32, i32) -> f32
 
 // CHECK: @_QPtest_real8
 // CHECK: [[STOI:%[A-Za-z0-9._]+]] = llvm.sext {{%[A-Za-z0-9._]+}} : i16 to i32
 // CHECK: {{%[A-Za-z0-9._]+}} = llvm.call @llvm.powi.f64.i32({{%[A-Za-z0-9._]+}}, [[STOI]]) : (f64, i32) -> f64
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.pow"({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f64, f64) -> f64
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.pow({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f64, f64) -> f64
 // CHECK: {{%[A-Za-z0-9._]+}} = llvm.call @llvm.powi.f64.i32({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f64, i32) -> f64
 
 func.func @_QPtest_real4(%arg0: !fir.ref<f32> {fir.bindc_name = "x"}, %arg1: !fir.ref<f32> {fir.bindc_name = "y"}, %arg2: !fir.ref<i16> {fir.bindc_name = "s"}, %arg3: !fir.ref<i32> {fir.bindc_name = "i"}) -> f32 {
   %0 = fir.alloca f32 {bindc_name = "test_real4", uniq_name = "_QFtest_real4Etest_real4"}
   %1 = fir.load %arg0 : !fir.ref<f32>
   %2 = fir.load %arg2 : !fir.ref<i16>
   %3 = fir.convert %2 : (i16) -> i32
   %4 = fir.call @llvm.powi.f32.i32(%1, %3) : (f32, i32) -> f32
func.func @_QPtest_int4(%arg0: !fir.ref<i32> {fir.bindc_name = "x"}, %arg1: !fir.ref<i32> {fir.bindc_name = "y"}, %arg2: !fir.ref<i32> {fir.bindc_name = "z"}) {
   %2 = math.ipowi %0, %1 : i32
   fir.store %2 to %arg2 : !fir.ref<i32>
   return
 }
 
 //--- sign_fast.fir
 // RUN: fir-opt %t/sign_fast.fir --fir-to-llvm-ir="target=x86_64-unknown-linux-gnu" | FileCheck %t/sign_fast.fir
 // CHECK: @_QPtest_real4
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.copysign"({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f32, f32) -> f32
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.copysign({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f32, f32) -> f32
 
 // CHECK: @_QPtest_real8
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.copysign"({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f64, f64) -> f64
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.copysign({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f64, f64) -> f64
 
 // CHECK: @_QPtest_real10
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.copysign"({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f80, f80) -> f80
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.copysign({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f80, f80) -> f80
 
 // CHECK: @_QPtest_real16
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.copysign"({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f128, f128) -> f128
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.copysign({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f128, f128) -> f128
 
 func.func @_QPtest_real4(%arg0: !fir.ref<f32> {fir.bindc_name = "x"}, %arg1: !fir.ref<f32> {fir.bindc_name = "y"}) -> f32 {
   %0 = fir.alloca f32 {bindc_name = "test_real4", uniq_name = "_QFtest_real4Etest_real4"}
   %1 = fir.load %arg0 : !fir.ref<f32>
   %2 = fir.load %arg1 : !fir.ref<f32>
   %3 = math.copysign %1, %2 : f32
   fir.store %3 to %0 : !fir.ref<f32>
   %4 = fir.load %0 : !fir.ref<f32>
func.func @_QPtest_real16(%arg0: !fir.ref<f128> {fir.bindc_name = "x"}, %arg1: !fir.ref<f128> {fir.bindc_name = "y"}) -> f128 {
   fir.store %3 to %0 : !fir.ref<f128>
   %4 = fir.load %0 : !fir.ref<f128>
   return %4 : f128
 }
 
 //--- sign_relaxed.fir
 // RUN: fir-opt %t/sign_relaxed.fir --fir-to-llvm-ir="target=x86_64-unknown-linux-gnu" | FileCheck %t/sign_relaxed.fir
 // CHECK: @_QPtest_real4
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.copysign"({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f32, f32) -> f32
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.copysign({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f32, f32) -> f32
 
 // CHECK: @_QPtest_real8
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.copysign"({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f64, f64) -> f64
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.copysign({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f64, f64) -> f64
 
 // CHECK: @_QPtest_real10
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.copysign"({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f80, f80) -> f80
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.copysign({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f80, f80) -> f80
 
 // CHECK: @_QPtest_real16
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.copysign"({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f128, f128) -> f128
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.copysign({{%[A-Za-z0-9._]+}}, {{%[A-Za-z0-9._]+}}) : (f128, f128) -> f128
 
 func.func @_QPtest_real4(%arg0: !fir.ref<f32> {fir.bindc_name = "x"}, %arg1: !fir.ref<f32> {fir.bindc_name = "y"}) -> f32 {
   %0 = fir.alloca f32 {bindc_name = "test_real4", uniq_name = "_QFtest_real4Etest_real4"}
   %1 = fir.load %arg0 : !fir.ref<f32>
   %2 = fir.load %arg1 : !fir.ref<f32>
   %3 = math.copysign %1, %2 : f32
   fir.store %3 to %0 : !fir.ref<f32>
   %4 = fir.load %0 : !fir.ref<f32>

 func.func private @copysignf(f32, f32) -> f32
 func.func private @copysign(f64, f64) -> f64
 func.func private @copysignl(f80, f80) -> f80
 func.func private @llvm.copysign.f128(f128, f128) -> f128
 
 //--- sin_fast.fir
 // RUN: fir-opt %t/sin_fast.fir --fir-to-llvm-ir="target=x86_64-unknown-linux-gnu" | FileCheck %t/sin_fast.fir
 // CHECK: @_QPtest_real4
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.sin"({{%[A-Za-z0-9._]+}}) : (f32) -> f32
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.sin({{%[A-Za-z0-9._]+}}) : (f32) -> f32
 
 // CHECK: @_QPtest_real8
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.sin"({{%[A-Za-z0-9._]+}}) : (f64) -> f64
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.sin({{%[A-Za-z0-9._]+}}) : (f64) -> f64
 
 func.func @_QPtest_real4(%arg0: !fir.ref<f32> {fir.bindc_name = "x"}) -> f32 {
   %0 = fir.alloca f32 {bindc_name = "test_real4", uniq_name = "_QFtest_real4Etest_real4"}
   %1 = fir.load %arg0 : !fir.ref<f32>
   %2 = math.sin %1 : f32
   fir.store %2 to %0 : !fir.ref<f32>
   %3 = fir.load %0 : !fir.ref<f32>
   return %3 : f32
 }
 func.func @_QPtest_real8(%arg0: !fir.ref<f64> {fir.bindc_name = "x"}) -> f64 {
   %0 = fir.alloca f64 {bindc_name = "test_real8", uniq_name = "_QFtest_real8Etest_real8"}
   %1 = fir.load %arg0 : !fir.ref<f64>
   %2 = math.sin %1 : f64
   fir.store %2 to %0 : !fir.ref<f64>
   %3 = fir.load %0 : !fir.ref<f64>
   return %3 : f64
 }
 
 //--- sin_relaxed.fir
 // RUN: fir-opt %t/sin_relaxed.fir --fir-to-llvm-ir="target=x86_64-unknown-linux-gnu" | FileCheck %t/sin_relaxed.fir
 // CHECK: @_QPtest_real4
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.sin"({{%[A-Za-z0-9._]+}}) : (f32) -> f32
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.sin({{%[A-Za-z0-9._]+}}) : (f32) -> f32
 
 // CHECK: @_QPtest_real8
-// CHECK: {{%[A-Za-z0-9._]+}} = "llvm.intr.sin"({{%[A-Za-z0-9._]+}}) : (f64) -> f64
+// CHECK: {{%[A-Za-z0-9._]+}} = llvm.intr.sin({{%[A-Za-z0-9._]+}}) : (f64) -> f64
 
 func.func @_QPtest_real4(%arg0: !fir.ref<f32> {fir.bindc_name = "x"}) -> f32 {
   %0 = fir.alloca f32 {bindc_name = "test_real4", uniq_name = "_QFtest_real4Etest_real4"}
   %1 = fir.load %arg0 : !fir.ref<f32>
   %2 = math.sin %1 : f32
   fir.store %2 to %0 : !fir.ref<f32>
   %3 = fir.load %0 : !fir.ref<f32>
   return %3 : f32

flang/test/Lower/Intrinsics/anint.f90

 ! RUN: bbc -emit-fir %s -o - | FileCheck %s
 
 ! CHECK-LABEL: func.func @_QPanint_test(
 ! CHECK-SAME:                           %[[VAL_0:.*]]: !fir.ref<f32> {fir.bindc_name = "a"},
 ! CHECK-SAME:                           %[[VAL_1:.*]]: !fir.ref<f32> {fir.bindc_name = "b"}) {
 ! CHECK:         %[[VAL_2:.*]] = fir.load %[[VAL_0]] : !fir.ref<f32>
-! CHECK:         %[[VAL_3:.*]] = "llvm.intr.round"(%[[VAL_2]]) : (f32) -> f32
+! CHECK:         %[[VAL_3:.*]] = llvm.intr.round(%[[VAL_2]]) : (f32) -> f32
 ! CHECK:         fir.store %[[VAL_3]] to %[[VAL_1]] : !fir.ref<f32>
 ! CHECK:         return
 ! CHECK:       }
 
 subroutine anint_test(a, b)
   real :: a, b
   b = anint(a)
 end subroutine
 
 ! CHECK-LABEL: func.func @_QPanint_test_real8(
 ! CHECK-SAME:                                 %[[VAL_0:.*]]: !fir.ref<f64> {fir.bindc_name = "a"},
 ! CHECK-SAME:                                 %[[VAL_1:.*]]: !fir.ref<f64> {fir.bindc_name = "b"}) {
 ! CHECK:         %[[VAL_2:.*]] = fir.load %[[VAL_0]] : !fir.ref<f64>
-! CHECK:         %[[VAL_3:.*]] = "llvm.intr.round"(%[[VAL_2]]) : (f64) -> f64
+! CHECK:         %[[VAL_3:.*]] = llvm.intr.round(%[[VAL_2]]) : (f64) -> f64
 ! CHECK:         fir.store %[[VAL_3]] to %[[VAL_1]] : !fir.ref<f64>
 ! CHECK:         return
 ! CHECK:       }
 
 subroutine anint_test_real8(a, b)
   real(8) :: a, b
   b = anint(a)
 end subroutine
 
 ! CHECK-LABEL: func.func @_QPanint_test_real10(
 ! CHECK-SAME:                                  %[[VAL_0:.*]]: !fir.ref<f80> {fir.bindc_name = "a"},
 ! CHECK-SAME:                                  %[[VAL_1:.*]]: !fir.ref<f80> {fir.bindc_name = "b"}) {
 ! CHECK:         %[[VAL_2:.*]] = fir.load %[[VAL_0]] : !fir.ref<f80>
-! CHECK:         %[[VAL_3:.*]] = "llvm.intr.round"(%[[VAL_2]]) : (f80) -> f80
+! CHECK:         %[[VAL_3:.*]] = llvm.intr.round(%[[VAL_2]]) : (f80) -> f80
 ! CHECK:         fir.store %[[VAL_3]] to %[[VAL_1]] : !fir.ref<f80>
 ! CHECK:         return
 ! CHECK:       }
 
 subroutine anint_test_real10(a, b)
   real(10) :: a, b
   b = anint(a)
 end subroutine
 
 ! TODO: wait until fp128 is supported well in llvm.round
 !subroutine anint_test_real16(a, b)
 !  real(16) :: a, b
 !  b = anint(a)
 !end subroutine

flang/test/Lower/math-lowering.f90

 ! RUN: %flang_fc1 -emit-fir -mllvm -math-runtime=precise %t/anint.f90 -o - | FileCheck --check-prefixes=ALL,PRECISE %t/anint.f90
 
 function test_real4(x)
   real :: x, test_real4
   test_real4 = anint(x)
 end function
 
 ! ALL-LABEL: @_QPtest_real4
-! FAST: {{%[A-Za-z0-9._]+}} = "llvm.intr.round"({{%[A-Za-z0-9._]+}}) : (f32) -> f32
-! RELAXED: {{%[A-Za-z0-9._]+}} = "llvm.intr.round"({{%[A-Za-z0-9._]+}}) : (f32) -> f32
+! FAST: {{%[A-Za-z0-9._]+}} = llvm.intr.round({{%[A-Za-z0-9._]+}}) : (f32) -> f32
+! RELAXED: {{%[A-Za-z0-9._]+}} = llvm.intr.round({{%[A-Za-z0-9._]+}}) : (f32) -> f32
 ! PRECISE: {{%[A-Za-z0-9._]+}} = fir.call @llvm.round.f32({{%[A-Za-z0-9._]+}}) : (f32) -> f32
 
 function test_real8(x)
   real(8) :: x, test_real8
   test_real8 = anint(x)
 end function
 
 ! ALL-LABEL: @_QPtest_real8
-! FAST: {{%[A-Za-z0-9._]+}} = "llvm.intr.round"({{%[A-Za-z0-9._]+}}) : (f64) -> f64
-! RELAXED: {{%[A-Za-z0-9._]+}} = "llvm.intr.round"({{%[A-Za-z0-9._]+}}) : (f64) -> f64
+! FAST: {{%[A-Za-z0-9._]+}} = llvm.intr.round({{%[A-Za-z0-9._]+}}) : (f64) -> f64
+! RELAXED: {{%[A-Za-z0-9._]+}} = llvm.intr.round({{%[A-Za-z0-9._]+}}) : (f64) -> f64
 ! PRECISE: {{%[A-Za-z0-9._]+}} = fir.call @llvm.round.f64({{%[A-Za-z0-9._]+}}) : (f64) -> f64
 
 function test_real10(x)
   real(10) :: x, test_real10
   test_real10 = anint(x)
 end function
 
 ! ALL-LABEL: @_QPtest_real10
-! FAST: {{%[A-Za-z0-9._]+}} = "llvm.intr.round"({{%[A-Za-z0-9._]+}}) : (f80) -> f80
-! RELAXED: {{%[A-Za-z0-9._]+}} = "llvm.intr.round"({{%[A-Za-z0-9._]+}}) : (f80) -> f80
+! FAST: {{%[A-Za-z0-9._]+}} = llvm.intr.round({{%[A-Za-z0-9._]+}}) : (f80) -> f80
+! RELAXED: {{%[A-Za-z0-9._]+}} = llvm.intr.round({{%[A-Za-z0-9._]+}}) : (f80) -> f80
 ! PRECISE: {{%[A-Za-z0-9._]+}} = fir.call @llvm.round.f80({{%[A-Za-z0-9._]+}}) : (f80) -> f80
 
 ! TODO: wait until fp128 is supported well in llvm.round
 !function test_real16(x)
 !  real(16) :: x, test_real16
 !  test_real16 = anint(x)
 !end function
 

mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td

 #define LLVMIR_ATTRDEFS
 
 include "mlir/IR/AttrTypeBase.td"
 include "mlir/Dialect/LLVMIR/LLVMOpBase.td"
 
 // All of the attributes will extend this class.
 class LLVM_Attr<string name> : AttrDef<LLVM_Dialect, name>;
 
+def FMFnone     : I32BitEnumAttrCaseNone<"none">;
+def FMFnnan     : I32BitEnumAttrCaseBit<"nnan", 0>;
+def FMFninf     : I32BitEnumAttrCaseBit<"ninf", 1>;
+def FMFnsz      : I32BitEnumAttrCaseBit<"nsz", 2>;
+def FMFarcp     : I32BitEnumAttrCaseBit<"arcp", 3>;
+def FMFcontract : I32BitEnumAttrCaseBit<"contract", 4>;
+def FMFafn      : I32BitEnumAttrCaseBit<"afn", 5>;
+def FMFreassoc  : I32BitEnumAttrCaseBit<"reassoc", 6>;
+def FMFfast     : I32BitEnumAttrCaseGroup<"fast",
+  [ FMFnnan, FMFninf, FMFnsz, FMFarcp, FMFcontract, FMFafn, FMFreassoc]>;
+
+def FastmathFlags : I32BitEnumAttr<
+    "FastmathFlags",
+    "LLVM fastmath flags",
+    [FMFnone, FMFnnan, FMFninf, FMFnsz, FMFarcp, FMFcontract, FMFafn,
+     FMFreassoc, FMFfast]> {
+  let separator = ", ";
+  let cppNamespace = "::mlir::LLVM";
+  let genSpecializedAttr = 0;
+  let printBitEnumPrimaryGroups = 1;
+}
+
+// The "FastMath" flags associated with floating point LLVM instructions.
+def LLVM_FastmathFlagsAttr :
+    EnumAttr<LLVM_Dialect, FastmathFlags, "fastmath"> {
+  let assemblyFormat = "`<` $value `>`";
+}
+
 // Attribute definition for the LLVM Linkage enum.
 def LinkageAttr : LLVM_Attr<"Linkage"> {
   let mnemonic = "linkage";
   let parameters = (ins
     "linkage::Linkage":$linkage
   );
   let hasCustomAssemblyFormat = 1;
 }

mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td

 #ifndef LLVM_INTRINSIC_OPS
 #define LLVM_INTRINSIC_OPS
 
 include "mlir/IR/OpBase.td"
+include "mlir/Dialect/LLVMIR/LLVMAttrDefs.td"
 include "mlir/Dialect/LLVMIR/LLVMOpBase.td"
 include "mlir/Interfaces/InferTypeOpInterface.td"
 
 // Operations that correspond to LLVM intrinsics. With MLIR operation set being
 // extendable, there is no reason to introduce a hard boundary between "core"
 // operations and intrinsics. However, we systematically prefix them with
 // "intr." to avoid potential name clashes.
 
-class LLVM_UnaryIntrinsicOp<string func, list<Trait> traits = []> :
+class LLVM_UnaryIntrinsicOpBase<string func, list<Trait> traits = [],
+                                dag addAttrs = (ins)> :
     LLVM_OneResultIntrOp<func, [], [0],
-           !listconcat([Pure, SameOperandsAndResultType], traits)> {
-  let arguments = (ins LLVM_Type:$in);
+  dag args = (ins LLVM_Type:$in);
+  let arguments = !con(args, addAttrs);
+  let assemblyFormat = "`(` operands `)` custom<LLVMOpAttrs>(attr-dict) `:` functional-type(operands, results)";
 }
 
-class LLVM_BinarySameArgsIntrinsicOp<string func, list<Trait> traits = []> :
+class LLVM_UnaryIntrinsicOp<string func, list<Trait> traits = []> :
+    LLVM_UnaryIntrinsicOpBase<func, traits>;
+
+class LLVM_UnaryFMFIntrinsicOp<string func, list<Trait> traits = []> :
+    LLVM_UnaryIntrinsicOpBase<func,
+        !listconcat([DeclareOpInterfaceMethods<FastmathFlagsInterface>],
+                    traits),
+        (ins DefaultValuedAttr<LLVM_FastmathFlagsAttr, "{}">:$fastmathFlags)>;
+
+class LLVM_BinarySameArgsIntrinsicOpBase<string func, list<Trait> traits = [],
+                                         dag addAttrs = (ins)> :
     LLVM_OneResultIntrOp<func, [], [0],
-           !listconcat([Pure, SameOperandsAndResultType], traits)> {
-  let arguments = (ins LLVM_Type:$a, LLVM_Type:$b);
+  dag args = (ins LLVM_Type:$a, LLVM_Type:$b);
+  let arguments = !con(args, addAttrs);
+  let assemblyFormat = "`(` operands `)` custom<LLVMOpAttrs>(attr-dict) `:` functional-type(operands, results)";
 }
 
-class LLVM_BinaryIntrinsicOp<string func, list<Trait> traits = []> :
+class LLVM_BinarySameArgsIntrinsicOp<string func, list<Trait> traits = []> :
+    LLVM_BinarySameArgsIntrinsicOpBase<func, traits>;
+
+class LLVM_BinarySameArgsFMFIntrinsicOp<string func, list<Trait> traits = []> :
+    LLVM_BinarySameArgsIntrinsicOpBase<func,
+        !listconcat([DeclareOpInterfaceMethods<FastmathFlagsInterface>],
+                    traits),
+        (ins DefaultValuedAttr<LLVM_FastmathFlagsAttr, "{}">:$fastmathFlags)>;
+
+class LLVM_BinaryIntrinsicOpBase<string func, list<Trait> traits = [],
+                                 dag addAttrs = (ins)> :
     LLVM_OneResultIntrOp<func, [], [0,1],
            !listconcat([Pure], traits)> {
-  let arguments = (ins LLVM_Type:$a, LLVM_Type:$b);
+  dag args = (ins LLVM_Type:$a, LLVM_Type:$b);
+  let arguments = !con(args, addAttrs);
+  let assemblyFormat = "`(` operands `)` custom<LLVMOpAttrs>(attr-dict) `:` functional-type(operands, results)";
 }
 
-class LLVM_TernarySameArgsIntrinsicOp<string func, list<Trait> traits = []> :
+class LLVM_BinaryIntrinsicOp<string func, list<Trait> traits = []> :
+    LLVM_BinaryIntrinsicOpBase<func, traits>;
+
+class LLVM_BinaryFMFIntrinsicOp<string func, list<Trait> traits = []> :
+    LLVM_BinaryIntrinsicOpBase<func,
+        !listconcat([DeclareOpInterfaceMethods<FastmathFlagsInterface>],
+                    traits),
+        (ins DefaultValuedAttr<LLVM_FastmathFlagsAttr, "{}">:$fastmathFlags)>;
+
+class LLVM_TernarySameArgsIntrinsicOpBase<string func, list<Trait> traits = [],
+                                          dag addAttrs = (ins)> :
     LLVM_OneResultIntrOp<func, [], [0],
-           !listconcat([Pure, SameOperandsAndResultType], traits)> {
-  let arguments = (ins LLVM_Type:$a, LLVM_Type:$b, LLVM_Type:$c);
+  dag args = (ins LLVM_Type:$a, LLVM_Type:$b, LLVM_Type:$c);
+  let arguments = !con(args, addAttrs);
+  let assemblyFormat = "`(` operands `)` custom<LLVMOpAttrs>(attr-dict) `:` functional-type(operands, results)";
 }
 
+class LLVM_TernarySameArgsIntrinsicOp<string func, list<Trait> traits = []> :
+    LLVM_TernarySameArgsIntrinsicOpBase<func, traits>;
+
+class LLVM_TernarySameArgsFMFIntrinsicOp<string func, list<Trait> traits = []> :
+    LLVM_TernarySameArgsIntrinsicOpBase<func,
+        !listconcat([DeclareOpInterfaceMethods<FastmathFlagsInterface>],
+                    traits),
+        (ins DefaultValuedAttr<LLVM_FastmathFlagsAttr, "{}">:$fastmathFlags)>;
+
 class LLVM_CountZerosIntrinsicOp<string func, list<Trait> traits = []> :
     LLVM_OneResultIntrOp<func, [], [0],
            !listconcat([Pure], traits)> {
   let arguments = (ins LLVM_Type:$in, I1:$zero_undefined);
 }
 
 def LLVM_AbsOp : LLVM_OneResultIntrOp<"abs", [], [0], [Pure]> {
   let arguments = (ins LLVM_Type:$in, I1:$is_int_min_poison);
 }
 
 def LLVM_IsFPClass : LLVM_OneResultIntrOp<"is.fpclass", [], [0], [Pure]> {
   let arguments = (ins LLVM_Type:$in, I32:$bit);
 }
 
-def LLVM_CopySignOp : LLVM_BinarySameArgsIntrinsicOp<"copysign">;
-def LLVM_CosOp : LLVM_UnaryIntrinsicOp<"cos">;
-def LLVM_ExpOp : LLVM_UnaryIntrinsicOp<"exp">;
-def LLVM_Exp2Op : LLVM_UnaryIntrinsicOp<"exp2">;
-def LLVM_FAbsOp : LLVM_UnaryIntrinsicOp<"fabs">;
-def LLVM_FCeilOp : LLVM_UnaryIntrinsicOp<"ceil">;
-def LLVM_FFloorOp : LLVM_UnaryIntrinsicOp<"floor">;
-def LLVM_FMAOp : LLVM_TernarySameArgsIntrinsicOp<"fma">;
-def LLVM_FMulAddOp : LLVM_TernarySameArgsIntrinsicOp<"fmuladd">;
-def LLVM_Log10Op : LLVM_UnaryIntrinsicOp<"log10">;
-def LLVM_Log2Op : LLVM_UnaryIntrinsicOp<"log2">;
-def LLVM_LogOp : LLVM_UnaryIntrinsicOp<"log">;
+def LLVM_CopySignOp : LLVM_BinarySameArgsFMFIntrinsicOp<"copysign">;
+def LLVM_CosOp : LLVM_UnaryFMFIntrinsicOp<"cos">;
+def LLVM_ExpOp : LLVM_UnaryFMFIntrinsicOp<"exp">;
+def LLVM_Exp2Op : LLVM_UnaryFMFIntrinsicOp<"exp2">;
+def LLVM_FAbsOp : LLVM_UnaryFMFIntrinsicOp<"fabs">;
+def LLVM_FCeilOp : LLVM_UnaryFMFIntrinsicOp<"ceil">;
+def LLVM_FFloorOp : LLVM_UnaryFMFIntrinsicOp<"floor">;
+def LLVM_FMAOp : LLVM_TernarySameArgsFMFIntrinsicOp<"fma">;
+def LLVM_FMulAddOp : LLVM_TernarySameArgsFMFIntrinsicOp<"fmuladd">;
+def LLVM_Log10Op : LLVM_UnaryFMFIntrinsicOp<"log10">;
+def LLVM_Log2Op : LLVM_UnaryFMFIntrinsicOp<"log2">;
+def LLVM_LogOp : LLVM_UnaryFMFIntrinsicOp<"log">;
 def LLVM_Prefetch : LLVM_ZeroResultIntrOp<"prefetch", [0]> {
   let arguments = (ins LLVM_Type:$addr, LLVM_Type:$rw, LLVM_Type:$hint,
                    LLVM_Type:$cache);
 }
-def LLVM_SinOp : LLVM_UnaryIntrinsicOp<"sin">;
-def LLVM_RoundEvenOp : LLVM_UnaryIntrinsicOp<"roundeven">;
-def LLVM_RoundOp : LLVM_UnaryIntrinsicOp<"round">;
-def LLVM_FTruncOp : LLVM_UnaryIntrinsicOp<"trunc">;
-def LLVM_SqrtOp : LLVM_UnaryIntrinsicOp<"sqrt">;
-def LLVM_PowOp : LLVM_BinarySameArgsIntrinsicOp<"pow">;
-def LLVM_PowIOp : LLVM_BinaryIntrinsicOp<"powi">;
+def LLVM_SinOp : LLVM_UnaryFMFIntrinsicOp<"sin">;
+def LLVM_RoundEvenOp : LLVM_UnaryFMFIntrinsicOp<"roundeven">;
+def LLVM_RoundOp : LLVM_UnaryFMFIntrinsicOp<"round">;
+def LLVM_FTruncOp : LLVM_UnaryFMFIntrinsicOp<"trunc">;
+def LLVM_SqrtOp : LLVM_UnaryFMFIntrinsicOp<"sqrt">;
+def LLVM_PowOp : LLVM_BinarySameArgsFMFIntrinsicOp<"pow">;
+def LLVM_PowIOp : LLVM_BinaryFMFIntrinsicOp<"powi">;
 def LLVM_BitReverseOp : LLVM_UnaryIntrinsicOp<"bitreverse">;
 def LLVM_CountLeadingZerosOp : LLVM_CountZerosIntrinsicOp<"ctlz">;
 def LLVM_CountTrailingZerosOp : LLVM_CountZerosIntrinsicOp<"cttz">;
 def LLVM_CtPopOp : LLVM_UnaryIntrinsicOp<"ctpop">;
-def LLVM_MaxNumOp : LLVM_BinarySameArgsIntrinsicOp<"maxnum">;
-def LLVM_MinNumOp : LLVM_BinarySameArgsIntrinsicOp<"minnum">;
-def LLVM_MaximumOp : LLVM_BinarySameArgsIntrinsicOp<"maximum">;
-def LLVM_MinimumOp : LLVM_BinarySameArgsIntrinsicOp<"minimum">;
+def LLVM_MaxNumOp : LLVM_BinarySameArgsFMFIntrinsicOp<"maxnum">;
+def LLVM_MinNumOp : LLVM_BinarySameArgsFMFIntrinsicOp<"minnum">;
+def LLVM_MaximumOp : LLVM_BinarySameArgsFMFIntrinsicOp<"maximum">;
+def LLVM_MinimumOp : LLVM_BinarySameArgsFMFIntrinsicOp<"minimum">;
 def LLVM_SMaxOp : LLVM_BinarySameArgsIntrinsicOp<"smax">;
 def LLVM_SMinOp : LLVM_BinarySameArgsIntrinsicOp<"smin">;
 def LLVM_UMaxOp : LLVM_BinarySameArgsIntrinsicOp<"umax">;
 def LLVM_UMinOp : LLVM_BinarySameArgsIntrinsicOp<"umin">;
 
 def LLVM_MemcpyOp : LLVM_ZeroResultIntrOp<"memcpy", [0, 1, 2]> {
   let arguments = (ins Arg<LLVM_Type,"",[MemWrite]>:$dst, Arg<LLVM_Type,"",[MemRead]>:$src, LLVM_Type:$len,
                    LLVM_Type:$isVolatile);

mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td

 include "mlir/IR/EnumAttr.td"
 include "mlir/IR/FunctionInterfaces.td"
 include "mlir/IR/SymbolInterfaces.td"
 include "mlir/Interfaces/CallInterfaces.td"
 include "mlir/Interfaces/ControlFlowInterfaces.td"
 include "mlir/Interfaces/InferTypeOpInterface.td"
 include "mlir/Interfaces/SideEffectInterfaces.td"
 
-def FMFnone     : I32BitEnumAttrCaseNone<"none">;
-def FMFnnan     : I32BitEnumAttrCaseBit<"nnan", 0>;
-def FMFninf     : I32BitEnumAttrCaseBit<"ninf", 1>;
-def FMFnsz      : I32BitEnumAttrCaseBit<"nsz", 2>;
-def FMFarcp     : I32BitEnumAttrCaseBit<"arcp", 3>;
-def FMFcontract : I32BitEnumAttrCaseBit<"contract", 4>;
-def FMFafn      : I32BitEnumAttrCaseBit<"afn", 5>;
-def FMFreassoc  : I32BitEnumAttrCaseBit<"reassoc", 6>;
-def FMFfast     : I32BitEnumAttrCaseGroup<"fast",
-  [ FMFnnan, FMFninf, FMFnsz, FMFarcp, FMFcontract, FMFafn, FMFreassoc]>;
-
-def FastmathFlags : I32BitEnumAttr<
-    "FastmathFlags",
-    "LLVM fastmath flags",
-    [FMFnone, FMFnnan, FMFninf, FMFnsz, FMFarcp, FMFcontract, FMFafn,
-     FMFreassoc, FMFfast]> {
-  let separator = ", ";
-  let cppNamespace = "::mlir::LLVM";
-  let genSpecializedAttr = 0;
-  let printBitEnumPrimaryGroups = 1;
-}
-
-// The "FastMath" flags associated with floating point LLVM instructions.
-def LLVM_FastmathFlagsAttr :
-    EnumAttr<LLVM_Dialect, FastmathFlags, "fastmath"> {
-  let assemblyFormat = "`<` $value `>`";
-}
-
 def LOptDisableUnroll : I32EnumAttrCase<"disable_unroll", 1>;
 def LOptDisableLICM : I32EnumAttrCase<"disable_licm", 2>;
 def LOptInterleaveCount : I32EnumAttrCase<"interleave_count", 3>;
 def LOptDisablePipeline : I32EnumAttrCase<"disable_pipeline", 4>;
 def LOptPipelineInitiationInterval : I32EnumAttrCase<"pipeline_initiation_interval", 5>;
 
 def LoopOptionCase : I32EnumAttr<
     "LoopOptionCase",

mlir/lib/Dialect/LLVMIR/CMakeLists.txt

 add_subdirectory(Transforms)
 
 add_mlir_dialect_library(MLIRLLVMDialect
   IR/FunctionCallUtils.cpp
   IR/LLVMDialect.cpp
-  IR/LLVMIntrinsicOps.cpp
   IR/LLVMTypes.cpp
   IR/LLVMTypeSyntax.cpp
 
   ADDITIONAL_HEADER_DIRS
   ${MLIR_MAIN_INCLUDE_DIR}/mlir/Dialect/LLVMIR
 
   DEPENDS
   MLIRLLVMOpsIncGen

mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp

#include "mlir/Dialect/LLVMIR/LLVMIntrinsicOps.cpp.inc"
 
   // Support unknown operations because not all LLVM operations are registered.
   allowUnknownOperations();
 }
 
 #define GET_OP_CLASSES
 #include "mlir/Dialect/LLVMIR/LLVMOps.cpp.inc"
 
+#define GET_OP_CLASSES
+#include "mlir/Dialect/LLVMIR/LLVMIntrinsicOps.cpp.inc"
+
 /// Parse a type registered to this dialect.
 Type LLVMDialect::parseType(DialectAsmParser &parser) const {
   return detail::parseType(parser);
 }
 
 /// Print a type registered to this dialect.
 void LLVMDialect::printType(Type type, DialectAsmPrinter &os) const {
   return detail::printType(type, os);

mlir/lib/Dialect/LLVMIR/IR/LLVMIntrinsicOps.cpp

-#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
-
-using namespace mlir;
-using namespace mlir::LLVM;
-
-#define GET_OP_CLASSES
-#include "mlir/Dialect/LLVMIR/LLVMIntrinsicOps.cpp.inc"

mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir

func.func @select(%arg0 : i1, %arg1 : i32, %arg2 : i32) -> i32 {
   %0 = arith.select %arg0, %arg1, %arg2 : i32
   return %0 : i32
 }
 
 // -----
 
 // CHECK-LABEL: @minmaxi
 func.func @minmaxi(%arg0 : i32, %arg1 : i32) -> i32 {
-  // CHECK: = "llvm.intr.smin"(%arg0, %arg1) : (i32, i32) -> i32
+  // CHECK: = llvm.intr.smin(%arg0, %arg1) : (i32, i32) -> i32
   %0 = arith.minsi %arg0, %arg1 : i32
-  // CHECK: = "llvm.intr.smax"(%arg0, %arg1) : (i32, i32) -> i32
+  // CHECK: = llvm.intr.smax(%arg0, %arg1) : (i32, i32) -> i32
   %1 = arith.maxsi %arg0, %arg1 : i32
-  // CHECK: = "llvm.intr.umin"(%arg0, %arg1) : (i32, i32) -> i32
+  // CHECK: = llvm.intr.umin(%arg0, %arg1) : (i32, i32) -> i32
   %2 = arith.minui %arg0, %arg1 : i32
-  // CHECK: = "llvm.intr.umax"(%arg0, %arg1) : (i32, i32) -> i32
+  // CHECK: = llvm.intr.umax(%arg0, %arg1) : (i32, i32) -> i32
   %3 = arith.maxui %arg0, %arg1 : i32
   return %0 : i32
 }
 
 // CHECK-LABEL: @minmaxf
 func.func @minmaxf(%arg0 : f32, %arg1 : f32) -> f32 {
-  // CHECK: = "llvm.intr.minnum"(%arg0, %arg1) : (f32, f32) -> f32
+  // CHECK: = llvm.intr.minnum(%arg0, %arg1) : (f32, f32) -> f32
   %0 = arith.minf %arg0, %arg1 : f32
-  // CHECK: = "llvm.intr.maxnum"(%arg0, %arg1) : (f32, f32) -> f32
+  // CHECK: = llvm.intr.maxnum(%arg0, %arg1) : (f32, f32) -> f32
   %1 = arith.maxf %arg0, %arg1 : f32
   return %0 : f32
 }

mlir/test/Conversion/ComplexToLLVM/convert-to-llvm.mlir

func.func @complex_abs(%arg: complex<f32>) -> f32 {
   return %abs : f32
 }
 // CHECK: %[[CASTED_ARG:.*]] = builtin.unrealized_conversion_cast %[[ARG]] : complex<f32> to ![[C_TY:.*>]]
 // CHECK: %[[REAL:.*]] = llvm.extractvalue %[[CASTED_ARG]][0] : ![[C_TY]]
 // CHECK: %[[IMAG:.*]] = llvm.extractvalue %[[CASTED_ARG]][1] : ![[C_TY]]
 // CHECK-DAG: %[[REAL_SQ:.*]] = llvm.fmul %[[REAL]], %[[REAL]]  : f32
 // CHECK-DAG: %[[IMAG_SQ:.*]] = llvm.fmul %[[IMAG]], %[[IMAG]]  : f32
 // CHECK: %[[SQ_NORM:.*]] = llvm.fadd %[[REAL_SQ]], %[[IMAG_SQ]]  : f32
-// CHECK: %[[NORM:.*]] = "llvm.intr.sqrt"(%[[SQ_NORM]]) : (f32) -> f32
+// CHECK: %[[NORM:.*]] = llvm.intr.sqrt(%[[SQ_NORM]]) : (f32) -> f32
 // CHECK: return %[[NORM]] : f32
 

mlir/test/Conversion/ComplexToLLVM/full-conversion.mlir

func.func @complex_abs(%arg: complex<f32>) -> f32 {
   %abs = complex.abs %arg: complex<f32>
   return %abs : f32
 }
 // CHECK: %[[REAL:.*]] = llvm.extractvalue %[[ARG]][0] : ![[C_TY]]
 // CHECK: %[[IMAG:.*]] = llvm.extractvalue %[[ARG]][1] : ![[C_TY]]
 // CHECK-DAG: %[[REAL_SQ:.*]] = llvm.fmul %[[REAL]], %[[REAL]]  : f32
 // CHECK-DAG: %[[IMAG_SQ:.*]] = llvm.fmul %[[IMAG]], %[[IMAG]]  : f32
 // CHECK: %[[SQ_NORM:.*]] = llvm.fadd %[[REAL_SQ]], %[[IMAG_SQ]]  : f32
-// CHECK: %[[NORM:.*]] = "llvm.intr.sqrt"(%[[SQ_NORM]]) : (f32) -> f32
+// CHECK: %[[NORM:.*]] = llvm.intr.sqrt(%[[SQ_NORM]]) : (f32) -> f32
 // CHECK: llvm.return %[[NORM]] : f32
 

mlir/test/Conversion/ComplexToStandard/full-conversion.mlir

 // RUN: mlir-opt %s -pass-pipeline="func.func(convert-complex-to-standard),convert-complex-to-llvm,func.func(convert-math-to-llvm,convert-arith-to-llvm),convert-func-to-llvm,reconcile-unrealized-casts" | FileCheck %s
 
 // CHECK-LABEL: llvm.func @complex_abs
 // CHECK-SAME: %[[ARG:.*]]: ![[C_TY:.*]])
 func.func @complex_abs(%arg: complex<f32>) -> f32 {
   %abs = complex.abs %arg: complex<f32>
   return %abs : f32
 }
 // CHECK: %[[REAL:.*]] = llvm.extractvalue %[[ARG]][0] : ![[C_TY]]
 // CHECK: %[[IMAG:.*]] = llvm.extractvalue %[[ARG]][1] : ![[C_TY]]
 // CHECK-DAG: %[[REAL_SQ:.*]] = llvm.fmul %[[REAL]], %[[REAL]]  : f32
 // CHECK-DAG: %[[IMAG_SQ:.*]] = llvm.fmul %[[IMAG]], %[[IMAG]]  : f32
 // CHECK: %[[SQ_NORM:.*]] = llvm.fadd %[[REAL_SQ]], %[[IMAG_SQ]]  : f32
-// CHECK: %[[NORM:.*]] = "llvm.intr.sqrt"(%[[SQ_NORM]]) : (f32) -> f32
+// CHECK: %[[NORM:.*]] = llvm.intr.sqrt(%[[SQ_NORM]]) : (f32) -> f32
 // CHECK: llvm.return %[[NORM]] : f32
 
 // CHECK-LABEL: llvm.func @complex_eq
 // CHECK-SAME: %[[LHS:.*]]: ![[C_TY:.*]], %[[RHS:.*]]: ![[C_TY:.*]])
 func.func @complex_eq(%lhs: complex<f32>, %rhs: complex<f32>) -> i1 {
   %eq = complex.eq %lhs, %rhs: complex<f32>
   return %eq : i1
 }

mlir/test/Conversion/FuncToLLVM/func-to-llvm.mlir

// CHECK-NEXT:  llvm.br ^bb1
   cf.br ^bb1
 }
 
 // -----
 
 // CHECK-LABEL: func @ceilf(
 // CHECK-SAME: f32
 func.func @ceilf(%arg0 : f32) {
-  // CHECK: "llvm.intr.ceil"(%arg0) : (f32) -> f32
+  // CHECK: llvm.intr.ceil(%arg0) : (f32) -> f32
   %0 = math.ceil %arg0 : f32
   func.return
 }
 
 // -----
 
 // CHECK-LABEL: func @floorf(
 // CHECK-SAME: f32
 func.func @floorf(%arg0 : f32) {
-  // CHECK: "llvm.intr.floor"(%arg0) : (f32) -> f32
+  // CHECK: llvm.intr.floor(%arg0) : (f32) -> f32
   %0 = math.floor %arg0 : f32
   func.return
 }
 
 // -----
 
 // Lowers `cf.assert` to a function call to `abort` if the assertion is violated.
 // CHECK: llvm.func @abort()

 func.func private @zero_result_func()
 
 // -----
 
 // CHECK-LABEL: func @fmaf(
 // CHECK-SAME: %[[ARG0:.*]]: f32
 // CHECK-SAME: %[[ARG1:.*]]: vector<4xf32>
 func.func @fmaf(%arg0: f32, %arg1: vector<4xf32>) {
-  // CHECK: %[[S:.*]] = "llvm.intr.fma"(%[[ARG0]], %[[ARG0]], %[[ARG0]]) : (f32, f32, f32) -> f32
+  // CHECK: %[[S:.*]] = llvm.intr.fma(%[[ARG0]], %[[ARG0]], %[[ARG0]]) : (f32, f32, f32) -> f32
   %0 = math.fma %arg0, %arg0, %arg0 : f32
-  // CHECK: %[[V:.*]] = "llvm.intr.fma"(%[[ARG1]], %[[ARG1]], %[[ARG1]]) : (vector<4xf32>, vector<4xf32>, vector<4xf32>) -> vector<4xf32>
+  // CHECK: %[[V:.*]] = llvm.intr.fma(%[[ARG1]], %[[ARG1]], %[[ARG1]]) : (vector<4xf32>, vector<4xf32>, vector<4xf32>) -> vector<4xf32>
   %1 = math.fma %arg1, %arg1, %arg1 : vector<4xf32>
   func.return
 }
 
 // -----
 
 // CHECK-LABEL: func @switchi8(
 func.func @switchi8(%arg0 : i8) -> i32 {

mlir/test/Conversion/MathToLLVM/math-to-llvm.mlir

 // RUN: mlir-opt %s -split-input-file -pass-pipeline="func.func(convert-math-to-llvm)" | FileCheck %s
 
 // CHECK-LABEL: @ops
 func.func @ops(%arg0: f32, %arg1: f32, %arg2: i32, %arg3: i32, %arg4: f64) {
-  // CHECK: = "llvm.intr.exp"(%{{.*}}) : (f32) -> f32
+  // CHECK: = llvm.intr.exp(%{{.*}}) : (f32) -> f32
   %0 = math.exp %arg0 : f32
-  // CHECK: = "llvm.intr.exp2"(%{{.*}}) : (f32) -> f32
+  // CHECK: = llvm.intr.exp2(%{{.*}}) : (f32) -> f32
   %1 = math.exp2 %arg0 : f32
-  // CHECK: = "llvm.intr.sqrt"(%{{.*}}) : (f32) -> f32
+  // CHECK: = llvm.intr.sqrt(%{{.*}}) : (f32) -> f32
   %2 = math.sqrt %arg0 : f32
-  // CHECK: = "llvm.intr.sqrt"(%{{.*}}) : (f64) -> f64
+  // CHECK: = llvm.intr.sqrt(%{{.*}}) : (f64) -> f64
   %3 = math.sqrt %arg4 : f64
   func.return
 }
 
 // -----
 
 func.func @absi(%arg0: i32) -> i32 {
   // CHECK: %[[FALSE:.*]] = llvm.mlir.constant(false
   // CHECK: = "llvm.intr.abs"(%{{.*}}, %[[FALSE]]) : (i32, i1) -> i32
   %0 = math.absi %arg0 : i32
   return %0 : i32
 }
 
 // -----
 
 // CHECK-LABEL: func @log1p(
 // CHECK-SAME: f32
 func.func @log1p(%arg0 : f32) {
   // CHECK: %[[ONE:.*]] = llvm.mlir.constant(1.000000e+00 : f32) : f32
   // CHECK: %[[ADD:.*]] = llvm.fadd %[[ONE]], %arg0 : f32
-  // CHECK: %[[LOG:.*]] = "llvm.intr.log"(%[[ADD]]) : (f32) -> f32
+  // CHECK: %[[LOG:.*]] = llvm.intr.log(%[[ADD]]) : (f32) -> f32
   %0 = math.log1p %arg0 : f32
   func.return
 }
 
 // -----
 
 // CHECK-LABEL: func @log1p_2dvector(
 func.func @log1p_2dvector(%arg0 : vector<4x3xf32>) {
   // CHECK: %[[EXTRACT:.*]] = llvm.extractvalue %{{.*}}[0] : !llvm.array<4 x vector<3xf32>>
   // CHECK: %[[ONE:.*]] = llvm.mlir.constant(dense<1.000000e+00> : vector<3xf32>) : vector<3xf32>
   // CHECK: %[[ADD:.*]] = llvm.fadd %[[ONE]], %[[EXTRACT]] : vector<3xf32>
-  // CHECK: %[[LOG:.*]] = "llvm.intr.log"(%[[ADD]]) : (vector<3xf32>) -> vector<3xf32>
+  // CHECK: %[[LOG:.*]] = llvm.intr.log(%[[ADD]]) : (vector<3xf32>) -> vector<3xf32>
   // CHECK: %[[INSERT:.*]] = llvm.insertvalue %[[LOG]], %{{.*}}[0] : !llvm.array<4 x vector<3xf32>>
   %0 = math.log1p %arg0 : vector<4x3xf32>
   func.return
 }
 
 // -----
 
 // CHECK-LABEL: func @expm1(
 // CHECK-SAME: f32
 func.func @expm1(%arg0 : f32) {
   // CHECK: %[[ONE:.*]] = llvm.mlir.constant(1.000000e+00 : f32) : f32
-  // CHECK: %[[EXP:.*]] = "llvm.intr.exp"(%arg0) : (f32) -> f32
+  // CHECK: %[[EXP:.*]] = llvm.intr.exp(%arg0) : (f32) -> f32
   // CHECK: %[[SUB:.*]] = llvm.fsub %[[EXP]], %[[ONE]] : f32
   %0 = math.expm1 %arg0 : f32
   func.return
 }
 
 // -----
 
 // CHECK-LABEL: func @rsqrt(
 // CHECK-SAME: f32
 func.func @rsqrt(%arg0 : f32) {
   // CHECK: %[[ONE:.*]] = llvm.mlir.constant(1.000000e+00 : f32) : f32
-  // CHECK: %[[SQRT:.*]] = "llvm.intr.sqrt"(%arg0) : (f32) -> f32
+  // CHECK: %[[SQRT:.*]] = llvm.intr.sqrt(%arg0) : (f32) -> f32
   // CHECK: %[[DIV:.*]] = llvm.fdiv %[[ONE]], %[[SQRT]] : f32
   %0 = math.rsqrt %arg0 : f32
   func.return
 }
 
 // -----
 
 // CHECK-LABEL: func @sine(
 // CHECK-SAME: f32
 func.func @sine(%arg0 : f32) {
-  // CHECK: "llvm.intr.sin"(%arg0) : (f32) -> f32
+  // CHECK: llvm.intr.sin(%arg0) : (f32) -> f32
   %0 = math.sin %arg0 : f32
   func.return
 }
 
 // -----
 
 // CHECK-LABEL: func @ctlz(
 // CHECK-SAME: i32
func.func @cttz_vec(%arg0 : vector<4xi32>) {
   func.return
 }
 
 // -----
 
 // CHECK-LABEL: func @ctpop(
 // CHECK-SAME: i32
 func.func @ctpop(%arg0 : i32) {
-  // CHECK: "llvm.intr.ctpop"(%arg0) : (i32) -> i32
+  // CHECK: llvm.intr.ctpop(%arg0) : (i32) -> i32
   %0 = math.ctpop %arg0 : i32
   func.return
 }
 
 // -----
 
 // CHECK-LABEL: func @ctpop_vector(
 // CHECK-SAME: vector<3xi32>
 func.func @ctpop_vector(%arg0 : vector<3xi32>) {
-  // CHECK: "llvm.intr.ctpop"(%arg0) : (vector<3xi32>) -> vector<3xi32>
+  // CHECK: llvm.intr.ctpop(%arg0) : (vector<3xi32>) -> vector<3xi32>
   %0 = math.ctpop %arg0 : vector<3xi32>
   func.return
 }
 
 // -----
 
 // CHECK-LABEL: func @rsqrt_double(
 // CHECK-SAME: f64
 func.func @rsqrt_double(%arg0 : f64) {
   // CHECK: %[[ONE:.*]] = llvm.mlir.constant(1.000000e+00 : f64) : f64
-  // CHECK: %[[SQRT:.*]] = "llvm.intr.sqrt"(%arg0) : (f64) -> f64
+  // CHECK: %[[SQRT:.*]] = llvm.intr.sqrt(%arg0) : (f64) -> f64
   // CHECK: %[[DIV:.*]] = llvm.fdiv %[[ONE]], %[[SQRT]] : f64
   %0 = math.rsqrt %arg0 : f64
   func.return
 }
 
 // -----
 
 // CHECK-LABEL: func @rsqrt_vector(
 // CHECK-SAME: vector<4xf32>
 func.func @rsqrt_vector(%arg0 : vector<4xf32>) {
   // CHECK: %[[ONE:.*]] = llvm.mlir.constant(dense<1.000000e+00> : vector<4xf32>) : vector<4xf32>
-  // CHECK: %[[SQRT:.*]] = "llvm.intr.sqrt"(%arg0) : (vector<4xf32>) -> vector<4xf32>
+  // CHECK: %[[SQRT:.*]] = llvm.intr.sqrt(%arg0) : (vector<4xf32>) -> vector<4xf32>
   // CHECK: %[[DIV:.*]] = llvm.fdiv %[[ONE]], %[[SQRT]] : vector<4xf32>
   %0 = math.rsqrt %arg0 : vector<4xf32>
   func.return
 }
 
 // -----
 
 // CHECK-LABEL: func @rsqrt_multidim_vector(
 func.func @rsqrt_multidim_vector(%arg0 : vector<4x3xf32>) {
   // CHECK: %[[EXTRACT:.*]] = llvm.extractvalue %{{.*}}[0] : !llvm.array<4 x vector<3xf32>>
   // CHECK: %[[ONE:.*]] = llvm.mlir.constant(dense<1.000000e+00> : vector<3xf32>) : vector<3xf32>
-  // CHECK: %[[SQRT:.*]] = "llvm.intr.sqrt"(%[[EXTRACT]]) : (vector<3xf32>) -> vector<3xf32>
+  // CHECK: %[[SQRT:.*]] = llvm.intr.sqrt(%[[EXTRACT]]) : (vector<3xf32>) -> vector<3xf32>
   // CHECK: %[[DIV:.*]] = llvm.fdiv %[[ONE]], %[[SQRT]] : vector<3xf32>
   // CHECK: %[[INSERT:.*]] = llvm.insertvalue %[[DIV]], %{{.*}}[0] : !llvm.array<4 x vector<3xf32>>
   %0 = math.rsqrt %arg0 : vector<4x3xf32>
   func.return
 }
 
 // -----
 
 // CHECK-LABEL: func @powf(
 // CHECK-SAME: f64
 func.func @powf(%arg0 : f64) {
-  // CHECK: %[[POWF:.*]] = "llvm.intr.pow"(%arg0, %arg0) : (f64, f64) -> f64
+  // CHECK: %[[POWF:.*]] = llvm.intr.pow(%arg0, %arg0) : (f64, f64) -> f64
   %0 = math.powf %arg0, %arg0 : f64
   func.return
 }
 
 // -----
 
 // CHECK-LABEL: func @round(
 // CHECK-SAME: f32
 func.func @round(%arg0 : f32) {
-  // CHECK: "llvm.intr.round"(%arg0) : (f32) -> f32
+  // CHECK: llvm.intr.round(%arg0) : (f32) -> f32
   %0 = math.round %arg0 : f32
   func.return
 }
 
 // -----
 
 // CHECK-LABEL: func @roundeven(
 // CHECK-SAME: f32
 func.func @roundeven(%arg0 : f32) {
-  // CHECK: "llvm.intr.roundeven"(%arg0) : (f32) -> f32
+  // CHECK: llvm.intr.roundeven(%arg0) : (f32) -> f32
   %0 = math.roundeven %arg0 : f32
   func.return
 }
 
 // -----
 
 // CHECK-LABEL: func @trunc(
 // CHECK-SAME: f32
 func.func @trunc(%arg0 : f32) {
-  // CHECK: "llvm.intr.trunc"(%arg0) : (f32) -> f32
+  // CHECK: llvm.intr.trunc(%arg0) : (f32) -> f32
   %0 = math.trunc %arg0 : f32
   func.return
 }

mlir/test/Conversion/SPIRVToLLVM/bitwise-ops-to-llvm.mlir

 // RUN: mlir-opt -convert-spirv-to-llvm %s | FileCheck %s
 
 //===----------------------------------------------------------------------===//
 // spirv.BitCount
 //===----------------------------------------------------------------------===//
 
 // CHECK-LABEL: @bitcount_scalar
 spirv.func @bitcount_scalar(%arg0: i16) "None" {
-  // CHECK: "llvm.intr.ctpop"(%{{.*}}) : (i16) -> i16
+  // CHECK: llvm.intr.ctpop(%{{.*}}) : (i16) -> i16
   %0 = spirv.BitCount %arg0: i16
   spirv.Return
 }
 
 // CHECK-LABEL: @bitcount_vector
 spirv.func @bitcount_vector(%arg0: vector<3xi32>) "None" {
-  // CHECK: "llvm.intr.ctpop"(%{{.*}}) : (vector<3xi32>) -> vector<3xi32>
+  // CHECK: llvm.intr.ctpop(%{{.*}}) : (vector<3xi32>) -> vector<3xi32>
   %0 = spirv.BitCount %arg0: vector<3xi32>
   spirv.Return
 }
 
 //===----------------------------------------------------------------------===//
 // spirv.BitReverse
 //===----------------------------------------------------------------------===//
 
 // CHECK-LABEL: @bitreverse_scalar
 spirv.func @bitreverse_scalar(%arg0: i64) "None" {
-  // CHECK: "llvm.intr.bitreverse"(%{{.*}}) : (i64) -> i64
+  // CHECK: llvm.intr.bitreverse(%{{.*}}) : (i64) -> i64
   %0 = spirv.BitReverse %arg0: i64
   spirv.Return
 }
 
 // CHECK-LABEL: @bitreverse_vector
 spirv.func @bitreverse_vector(%arg0: vector<4xi32>) "None" {
-  // CHECK: "llvm.intr.bitreverse"(%{{.*}}) : (vector<4xi32>) -> vector<4xi32>
+  // CHECK: llvm.intr.bitreverse(%{{.*}}) : (vector<4xi32>) -> vector<4xi32>
   %0 = spirv.BitReverse %arg0: vector<4xi32>
   spirv.Return
 }
 
 //===----------------------------------------------------------------------===//
 // spirv.BitFieldInsert
 //===----------------------------------------------------------------------===//
 

mlir/test/Conversion/SPIRVToLLVM/gl-ops-to-llvm.mlir

 // RUN: mlir-opt -convert-spirv-to-llvm %s | FileCheck %s
 
 //===----------------------------------------------------------------------===//
 // spirv.GL.Ceil
 //===----------------------------------------------------------------------===//
 
 // CHECK-LABEL: @ceil
 spirv.func @ceil(%arg0: f32, %arg1: vector<3xf16>) "None" {
-  // CHECK: "llvm.intr.ceil"(%{{.*}}) : (f32) -> f32
+  // CHECK: llvm.intr.ceil(%{{.*}}) : (f32) -> f32
   %0 = spirv.GL.Ceil %arg0 : f32
-  // CHECK: "llvm.intr.ceil"(%{{.*}}) : (vector<3xf16>) -> vector<3xf16>
+  // CHECK: llvm.intr.ceil(%{{.*}}) : (vector<3xf16>) -> vector<3xf16>
   %1 = spirv.GL.Ceil %arg1 : vector<3xf16>
   spirv.Return
 }
 
 //===----------------------------------------------------------------------===//
 // spirv.GL.Cos
 //===----------------------------------------------------------------------===//
 
 // CHECK-LABEL: @cos
 spirv.func @cos(%arg0: f32, %arg1: vector<3xf16>) "None" {
-  // CHECK: "llvm.intr.cos"(%{{.*}}) : (f32) -> f32
+  // CHECK: llvm.intr.cos(%{{.*}}) : (f32) -> f32
   %0 = spirv.GL.Cos %arg0 : f32
-  // CHECK: "llvm.intr.cos"(%{{.*}}) : (vector<3xf16>) -> vector<3xf16>
+  // CHECK: llvm.intr.cos(%{{.*}}) : (vector<3xf16>) -> vector<3xf16>
   %1 = spirv.GL.Cos %arg1 : vector<3xf16>
   spirv.Return
 }
 
 //===----------------------------------------------------------------------===//
 // spirv.GL.Exp
 //===----------------------------------------------------------------------===//
 
 // CHECK-LABEL: @exp
 spirv.func @exp(%arg0: f32, %arg1: vector<3xf16>) "None" {
-  // CHECK: "llvm.intr.exp"(%{{.*}}) : (f32) -> f32
+  // CHECK: llvm.intr.exp(%{{.*}}) : (f32) -> f32
   %0 = spirv.GL.Exp %arg0 : f32
-  // CHECK: "llvm.intr.exp"(%{{.*}}) : (vector<3xf16>) -> vector<3xf16>
+  // CHECK: llvm.intr.exp(%{{.*}}) : (vector<3xf16>) -> vector<3xf16>
   %1 = spirv.GL.Exp %arg1 : vector<3xf16>
   spirv.Return
 }
 
 //===----------------------------------------------------------------------===//
 // spirv.GL.FAbs
 //===----------------------------------------------------------------------===//
 
 // CHECK-LABEL: @fabs
 spirv.func @fabs(%arg0: f32, %arg1: vector<3xf16>) "None" {
-  // CHECK: "llvm.intr.fabs"(%{{.*}}) : (f32) -> f32
+  // CHECK: llvm.intr.fabs(%{{.*}}) : (f32) -> f32
   %0 = spirv.GL.FAbs %arg0 : f32
-  // CHECK: "llvm.intr.fabs"(%{{.*}}) : (vector<3xf16>) -> vector<3xf16>
+  // CHECK: llvm.intr.fabs(%{{.*}}) : (vector<3xf16>) -> vector<3xf16>
   %1 = spirv.GL.FAbs %arg1 : vector<3xf16>
   spirv.Return
 }
 
 //===----------------------------------------------------------------------===//
 // spirv.GL.Floor
 //===----------------------------------------------------------------------===//
 
 // CHECK-LABEL: @floor
 spirv.func @floor(%arg0: f32, %arg1: vector<3xf16>) "None" {
-  // CHECK: "llvm.intr.floor"(%{{.*}}) : (f32) -> f32
+  // CHECK: llvm.intr.floor(%{{.*}}) : (f32) -> f32
   %0 = spirv.GL.Floor %arg0 : f32
-  // CHECK: "llvm.intr.floor"(%{{.*}}) : (vector<3xf16>) -> vector<3xf16>
+  // CHECK: llvm.intr.floor(%{{.*}}) : (vector<3xf16>) -> vector<3xf16>
   %1 = spirv.GL.Floor %arg1 : vector<3xf16>
   spirv.Return
 }
 
 //===----------------------------------------------------------------------===//
 // spirv.GL.FMax
 //===----------------------------------------------------------------------===//
 
 // CHECK-LABEL: @fmax
 spirv.func @fmax(%arg0: f32, %arg1: vector<3xf16>) "None" {
-  // CHECK: "llvm.intr.maxnum"(%{{.*}}, %{{.*}}) : (f32, f32) -> f32
+  // CHECK: llvm.intr.maxnum(%{{.*}}, %{{.*}}) : (f32, f32) -> f32
   %0 = spirv.GL.FMax %arg0, %arg0 : f32
-  // CHECK: "llvm.intr.maxnum"(%{{.*}}, %{{.*}}) : (vector<3xf16>, vector<3xf16>) -> vector<3xf16>
+  // CHECK: llvm.intr.maxnum(%{{.*}}, %{{.*}}) : (vector<3xf16>, vector<3xf16>) -> vector<3xf16>
   %1 = spirv.GL.FMax %arg1, %arg1 : vector<3xf16>
   spirv.Return
 }
 
 //===----------------------------------------------------------------------===//
 // spirv.GL.FMin
 //===----------------------------------------------------------------------===//
 
 // CHECK-LABEL: @fmin
 spirv.func @fmin(%arg0: f32, %arg1: vector<3xf16>) "None" {
-  // CHECK: "llvm.intr.minnum"(%{{.*}}, %{{.*}}) : (f32, f32) -> f32
+  // CHECK: llvm.intr.minnum(%{{.*}}, %{{.*}}) : (f32, f32) -> f32
   %0 = spirv.GL.FMin %arg0, %arg0 : f32
-  // CHECK: "llvm.intr.minnum"(%{{.*}}, %{{.*}}) : (vector<3xf16>, vector<3xf16>) -> vector<3xf16>
+  // CHECK: llvm.intr.minnum(%{{.*}}, %{{.*}}) : (vector<3xf16>, vector<3xf16>) -> vector<3xf16>
   %1 = spirv.GL.FMin %arg1, %arg1 : vector<3xf16>
   spirv.Return
 }
 
 //===----------------------------------------------------------------------===//
 // spirv.GL.Log
 //===----------------------------------------------------------------------===//
 
 // CHECK-LABEL: @log
 spirv.func @log(%arg0: f32, %arg1: vector<3xf16>) "None" {
-  // CHECK: "llvm.intr.log"(%{{.*}}) : (f32) -> f32
+  // CHECK: llvm.intr.log(%{{.*}}) : (f32) -> f32
   %0 = spirv.GL.Log %arg0 : f32
-  // CHECK: "llvm.intr.log"(%{{.*}}) : (vector<3xf16>) -> vector<3xf16>
+  // CHECK: llvm.intr.log(%{{.*}}) : (vector<3xf16>) -> vector<3xf16>
   %1 = spirv.GL.Log %arg1 : vector<3xf16>
   spirv.Return
 }
 
 //===----------------------------------------------------------------------===//
 // spirv.GL.Sin
 //===----------------------------------------------------------------------===//
 
 // CHECK-LABEL: @sin
 spirv.func @sin(%arg0: f32, %arg1: vector<3xf16>) "None" {
-  // CHECK: "llvm.intr.sin"(%{{.*}}) : (f32) -> f32
+  // CHECK: llvm.intr.sin(%{{.*}}) : (f32) -> f32
   %0 = spirv.GL.Sin %arg0 : f32
-  // CHECK: "llvm.intr.sin"(%{{.*}}) : (vector<3xf16>) -> vector<3xf16>
+  // CHECK: llvm.intr.sin(%{{.*}}) : (vector<3xf16>) -> vector<3xf16>
   %1 = spirv.GL.Sin %arg1 : vector<3xf16>
   spirv.Return
 }
 
 //===----------------------------------------------------------------------===//
 // spirv.GL.SMax
 //===----------------------------------------------------------------------===//
 
 // CHECK-LABEL: @smax
 spirv.func @smax(%arg0: i16, %arg1: vector<3xi32>) "None" {
-  // CHECK: "llvm.intr.smax"(%{{.*}}, %{{.*}}) : (i16, i16) -> i16
+  // CHECK: llvm.intr.smax(%{{.*}}, %{{.*}}) : (i16, i16) -> i16
   %0 = spirv.GL.SMax %arg0, %arg0 : i16
-  // CHECK: "llvm.intr.smax"(%{{.*}}, %{{.*}}) : (vector<3xi32>, vector<3xi32>) -> vector<3xi32>
+  // CHECK: llvm.intr.smax(%{{.*}}, %{{.*}}) : (vector<3xi32>, vector<3xi32>) -> vector<3xi32>
   %1 = spirv.GL.SMax %arg1, %arg1 : vector<3xi32>
   spirv.Return
 }
 
 //===----------------------------------------------------------------------===//
 // spirv.GL.SMin
 //===----------------------------------------------------------------------===//
 
 // CHECK-LABEL: @smin
 spirv.func @smin(%arg0: i16, %arg1: vector<3xi32>) "None" {
-  // CHECK: "llvm.intr.smin"(%{{.*}}, %{{.*}}) : (i16, i16) -> i16
+  // CHECK: llvm.intr.smin(%{{.*}}, %{{.*}}) : (i16, i16) -> i16
   %0 = spirv.GL.SMin %arg0, %arg0 : i16
-  // CHECK: "llvm.intr.smin"(%{{.*}}, %{{.*}}) : (vector<3xi32>, vector<3xi32>) -> vector<3xi32>
+  // CHECK: llvm.intr.smin(%{{.*}}, %{{.*}}) : (vector<3xi32>, vector<3xi32>) -> vector<3xi32>
   %1 = spirv.GL.SMin %arg1, %arg1 : vector<3xi32>
   spirv.Return
 }
 
 //===----------------------------------------------------------------------===//
 // spirv.GL.Sqrt
 //===----------------------------------------------------------------------===//
 
 // CHECK-LABEL: @sqrt
 spirv.func @sqrt(%arg0: f32, %arg1: vector<3xf16>) "None" {
-  // CHECK: "llvm.intr.sqrt"(%{{.*}}) : (f32) -> f32
+  // CHECK: llvm.intr.sqrt(%{{.*}}) : (f32) -> f32
   %0 = spirv.GL.Sqrt %arg0 : f32
-  // CHECK: "llvm.intr.sqrt"(%{{.*}}) : (vector<3xf16>) -> vector<3xf16>
+  // CHECK: llvm.intr.sqrt(%{{.*}}) : (vector<3xf16>) -> vector<3xf16>
   %1 = spirv.GL.Sqrt %arg1 : vector<3xf16>
   spirv.Return
 }
 
 //===----------------------------------------------------------------------===//
 // spirv.GL.Tan
 //===----------------------------------------------------------------------===//
 
 // CHECK-LABEL: @tan
 spirv.func @tan(%arg0: f32) "None" {
-  // CHECK: %[[SIN:.*]] = "llvm.intr.sin"(%{{.*}}) : (f32) -> f32
-  // CHECK: %[[COS:.*]] = "llvm.intr.cos"(%{{.*}}) : (f32) -> f32
+  // CHECK: %[[SIN:.*]] = llvm.intr.sin(%{{.*}}) : (f32) -> f32
+  // CHECK: %[[COS:.*]] = llvm.intr.cos(%{{.*}}) : (f32) -> f32
   // CHECK: llvm.fdiv %[[SIN]], %[[COS]] : f32
   %0 = spirv.GL.Tan %arg0 : f32
   spirv.Return
 }
 
 //===----------------------------------------------------------------------===//
 // spirv.GL.Tanh
 //===----------------------------------------------------------------------===//
 
 // CHECK-LABEL: @tanh
 spirv.func @tanh(%arg0: f32) "None" {
   // CHECK: %[[TWO:.*]] = llvm.mlir.constant(2.000000e+00 : f32) : f32
   // CHECK: %[[X2:.*]] = llvm.fmul %[[TWO]], %{{.*}} : f32
-  // CHECK: %[[EXP:.*]] = "llvm.intr.exp"(%[[X2]]) : (f32) -> f32
+  // CHECK: %[[EXP:.*]] = llvm.intr.exp(%[[X2]]) : (f32) -> f32
   // CHECK: %[[ONE:.*]] = llvm.mlir.constant(1.000000e+00 : f32) : f32
   // CHECK: %[[T0:.*]] = llvm.fsub %[[EXP]], %[[ONE]] : f32
   // CHECK: %[[T1:.*]] = llvm.fadd %[[EXP]], %[[ONE]] : f32
   // CHECK: llvm.fdiv %[[T0]], %[[T1]] : f32
   %0 = spirv.GL.Tanh %arg0 : f32
   spirv.Return
 }
 
 //===----------------------------------------------------------------------===//
 // spirv.GL.InverseSqrt
 //===----------------------------------------------------------------------===//
 
 // CHECK-LABEL: @inverse_sqrt
 spirv.func @inverse_sqrt(%arg0: f32) "None" {
   // CHECK: %[[ONE:.*]] = llvm.mlir.constant(1.000000e+00 : f32) : f32
-  // CHECK: %[[SQRT:.*]] = "llvm.intr.sqrt"(%{{.*}}) : (f32) -> f32
+  // CHECK: %[[SQRT:.*]] = llvm.intr.sqrt(%{{.*}}) : (f32) -> f32
   // CHECK: llvm.fdiv %[[ONE]], %[[SQRT]] : f32
   %0 = spirv.GL.InverseSqrt %arg0 : f32
   spirv.Return
 }

mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir

 // CHECK:       %[[T7:.*]] = builtin.unrealized_conversion_cast %[[C]] : vector<2x3xf32> to !llvm.array<2 x vector<3xf32>>
 // CHECK:       %[[T3:.*]] = arith.constant dense<0.000000e+00> : vector<2x3xf32>
 // CHECK:       %[[T10:.*]] = builtin.unrealized_conversion_cast %[[T3]] : vector<2x3xf32> to !llvm.array<2 x vector<3xf32>>
 // CHECK:       %[[T4:.*]] = llvm.mlir.constant(0 : i64) : i64
 // CHECK:       %[[T5:.*]] = llvm.extractelement %[[A]]{{\[}}%[[T4]] : i64] : vector<2xf32>
 // CHECK:       %[[T6Insert:.*]] = llvm.insertelement %[[T5]]
 // CHECK:       %[[T6:.*]] = llvm.shufflevector %[[T6Insert]]
 // CHECK:       %[[T8:.*]] = llvm.extractvalue %[[T7]][0] : !llvm.array<2 x vector<3xf32>>
-// CHECK:       %[[T9:.*]] = "llvm.intr.fmuladd"(%[[T6]], %[[B]], %[[T8]]) : (vector<3xf32>, vector<3xf32>, vector<3xf32>) -> vector<3xf32>
+// CHECK:       %[[T9:.*]] = llvm.intr.fmuladd(%[[T6]], %[[B]], %[[T8]]) : (vector<3xf32>, vector<3xf32>, vector<3xf32>) -> vector<3xf32>
 // CHECK:       %[[T11:.*]] = llvm.insertvalue %[[T9]], %[[T10]][0] : !llvm.array<2 x vector<3xf32>>
 // CHECK:       %[[T12:.*]] = llvm.mlir.constant(1 : i64) : i64
 // CHECK:       %[[T13:.*]] = llvm.extractelement %[[A]]{{\[}}%[[T12]] : i64] : vector<2xf32>
 // CHECK:       %[[T14Insert:.*]] = llvm.insertelement %[[T13]]
 // CHECK:       %[[T14:.*]] = llvm.shufflevector %[[T14Insert]]
 // CHECK:       %[[T16:.*]] = llvm.extractvalue %[[T7]][1] : !llvm.array<2 x vector<3xf32>>
-// CHECK:       %[[T17:.*]] = "llvm.intr.fmuladd"(%[[T14]], %[[B]], %[[T16]]) : (vector<3xf32>, vector<3xf32>, vector<3xf32>) -> vector<3xf32>
+// CHECK:       %[[T17:.*]] = llvm.intr.fmuladd(%[[T14]], %[[B]], %[[T16]]) : (vector<3xf32>, vector<3xf32>, vector<3xf32>) -> vector<3xf32>
 // CHECK:       %[[T18:.*]] = llvm.insertvalue %[[T17]], %[[T11]][1] : !llvm.array<2 x vector<3xf32>>
 // CHECK:       %[[T19:.*]] = builtin.unrealized_conversion_cast %[[T18]] : !llvm.array<2 x vector<3xf32>> to vector<2x3xf32>
 // CHECK:       return %[[T19]] : vector<2x3xf32>
 
 
 // -----
  
 func.func @shuffle_0D_direct(%arg0: vector<f32>) -> vector<3xf32> {

 // -----
 
 func.func @vector_fma(%a: vector<8xf32>, %b: vector<2x4xf32>, %c: vector<1x1x1xf32>, %d: vector<f32>) -> (vector<8xf32>, vector<2x4xf32>, vector<1x1x1xf32>, vector<f32>) {
   // CHECK-LABEL: @vector_fma
   //  CHECK-SAME: %[[A:.*]]: vector<8xf32>
   //  CHECK-SAME: %[[B:.*]]: vector<2x4xf32>
   //  CHECK-SAME: %[[C:.*]]: vector<1x1x1xf32>
   //       CHECK: %[[BL:.*]] = builtin.unrealized_conversion_cast %[[B]] : vector<2x4xf32> to !llvm.array<2 x vector<4xf32>>
-  //       CHECK: "llvm.intr.fmuladd"
+  //       CHECK: llvm.intr.fmuladd
   //  CHECK-SAME:   (vector<8xf32>, vector<8xf32>, vector<8xf32>) -> vector<8xf32>
   %0 = vector.fma %a, %a, %a : vector<8xf32>
 
   //       CHECK: %[[b00:.*]] = llvm.extractvalue %[[BL]][0] : !llvm.array<2 x vector<4xf32>>
   //       CHECK: %[[b01:.*]] = llvm.extractvalue %[[BL]][0] : !llvm.array<2 x vector<4xf32>>
   //       CHECK: %[[b02:.*]] = llvm.extractvalue %[[BL]][0] : !llvm.array<2 x vector<4xf32>>
-  //       CHECK: %[[B0:.*]] = "llvm.intr.fmuladd"(%[[b00]], %[[b01]], %[[b02]]) :
+  //       CHECK: %[[B0:.*]] = llvm.intr.fmuladd(%[[b00]], %[[b01]], %[[b02]]) :
   //  CHECK-SAME: (vector<4xf32>, vector<4xf32>, vector<4xf32>) -> vector<4xf32>
   //       CHECK: llvm.insertvalue %[[B0]], {{.*}}[0] : !llvm.array<2 x vector<4xf32>>
   //       CHECK: %[[b10:.*]] = llvm.extractvalue %[[BL]][1] : !llvm.array<2 x vector<4xf32>>
   //       CHECK: %[[b11:.*]] = llvm.extractvalue %[[BL]][1] : !llvm.array<2 x vector<4xf32>>
   //       CHECK: %[[b12:.*]] = llvm.extractvalue %[[BL]][1] : !llvm.array<2 x vector<4xf32>>
-  //       CHECK: %[[B1:.*]] = "llvm.intr.fmuladd"(%[[b10]], %[[b11]], %[[b12]]) :
+  //       CHECK: %[[B1:.*]] = llvm.intr.fmuladd(%[[b10]], %[[b11]], %[[b12]]) :
   //  CHECK-SAME: (vector<4xf32>, vector<4xf32>, vector<4xf32>) -> vector<4xf32>
   //       CHECK: llvm.insertvalue %[[B1]], {{.*}}[1] : !llvm.array<2 x vector<4xf32>>
   %1 = vector.fma %b, %b, %b : vector<2x4xf32>
 
-  //       CHECK: %[[C0:.*]] = "llvm.intr.fmuladd"
+  //       CHECK: %[[C0:.*]] = llvm.intr.fmuladd
   //  CHECK-SAME:   (vector<1xf32>, vector<1xf32>, vector<1xf32>) -> vector<1xf32>
   %2 = vector.fma %c, %c, %c : vector<1x1x1xf32>
 
-  //       CHECK: %[[D0:.*]] = "llvm.intr.fmuladd"
+  //       CHECK: %[[D0:.*]] = llvm.intr.fmuladd
   //  CHECK-SAME:   (vector<1xf32>, vector<1xf32>, vector<1xf32>) -> vector<1xf32>
   %3 = vector.fma %d, %d, %d : vector<f32>
 
   return %0, %1, %2, %3: vector<8xf32>, vector<2x4xf32>, vector<1x1x1xf32>, vector<f32>
 }
 
 // -----
 

mlir/test/Dialect/LLVMIR/optimize-for-nvvm.mlir

 // RUN: mlir-opt %s -llvm-optimize-for-nvvm-target | FileCheck %s
 
 // CHECK-LABEL: llvm.func @fdiv_fp16
 llvm.func @fdiv_fp16(%arg0 : f16, %arg1 : f16) -> f16 {
   // CHECK-DAG: %[[c0:.*]]      = llvm.mlir.constant(0 : ui32) : i32
   // CHECK-DAG: %[[mask:.*]]    = llvm.mlir.constant(2139095040 : ui32) : i32
   // CHECK-DAG: %[[lhs:.*]]     = llvm.fpext %arg0 : f16 to f32
   // CHECK-DAG: %[[rhs:.*]]     = llvm.fpext %arg1 : f16 to f32
   // CHECK-DAG: %[[rcp:.*]]     = nvvm.rcp.approx.ftz.f %[[rhs]] : f32
   // CHECK-DAG: %[[approx:.*]]  = llvm.fmul %[[lhs]], %[[rcp]] : f32
   // CHECK-DAG: %[[neg:.*]]     = llvm.fneg %[[rhs]] : f32
-  // CHECK-DAG: %[[err:.*]]     = "llvm.intr.fma"(%[[approx]], %[[neg]], %[[lhs]]) : (f32, f32, f32) -> f32
-  // CHECK-DAG: %[[refined:.*]] = "llvm.intr.fma"(%[[err]], %[[rcp]], %[[approx]]) : (f32, f32, f32) -> f32
+  // CHECK-DAG: %[[err:.*]]     = llvm.intr.fma(%[[approx]], %[[neg]], %[[lhs]]) : (f32, f32, f32) -> f32
+  // CHECK-DAG: %[[refined:.*]] = llvm.intr.fma(%[[err]], %[[rcp]], %[[approx]]) : (f32, f32, f32) -> f32
   // CHECK-DAG: %[[cast:.*]]    = llvm.bitcast %[[approx]] : f32 to i32
   // CHECK-DAG: %[[exp:.*]]     = llvm.and %[[cast]], %[[mask]] : i32
   // CHECK-DAG: %[[is_zero:.*]] = llvm.icmp "eq" %[[exp]], %[[c0]] : i32
   // CHECK-DAG: %[[is_mask:.*]] = llvm.icmp "eq" %[[exp]], %[[mask]] : i32
   // CHECK-DAG: %[[pred:.*]]    = llvm.or %[[is_zero]], %[[is_mask]] : i1
   // CHECK-DAG: %[[select:.*]]  = llvm.select %[[pred]], %[[approx]], %[[refined]] : i1, f32
   // CHECK-DAG: %[[result:.*]]  = llvm.fptrunc %[[select]] : f32 to f16
   %result = llvm.fdiv %arg0, %arg1 : f16
   // CHECK: llvm.return %[[result]] : f16
   llvm.return %result : f16
 }

mlir/test/Dialect/LLVMIR/roundtrip.mlir

 // CHECK: %{{.*}} = llvm.fpext %[[FLOAT]] : f32 to f80
 // CHECK: %{{.*}} = llvm.fpext %[[FLOAT]] : f32 to f128
   %27 = llvm.fpext %arg1 : f32 to f80
   %28 = llvm.fpext %arg1 : f32 to f128
 
 // CHECK: %{{.*}} = llvm.fneg %[[FLOAT]] : f32
   %29 = llvm.fneg %arg1 : f32
 
-// CHECK: "llvm.intr.sin"(%[[FLOAT]]) : (f32) -> f32
-  %30 = "llvm.intr.sin"(%arg1) : (f32) -> f32
+// CHECK: llvm.intr.sin(%[[FLOAT]]) : (f32) -> f32
+  %30 = llvm.intr.sin(%arg1) : (f32) -> f32
 
-// CHECK: "llvm.intr.pow"(%[[FLOAT]], %[[FLOAT]]) : (f32, f32) -> f32
-  %31 = "llvm.intr.pow"(%arg1, %arg1) : (f32, f32) -> f32
+// CHECK: llvm.intr.pow(%[[FLOAT]], %[[FLOAT]]) : (f32, f32) -> f32
+  %31 = llvm.intr.pow(%arg1, %arg1) : (f32, f32) -> f32
 
-// CHECK: "llvm.intr.powi"(%[[FLOAT]], %[[I32]]) : (f32, i32) -> f32
-  %a31 = "llvm.intr.powi"(%arg1, %arg0) : (f32, i32) -> f32
+// CHECK: llvm.intr.powi(%[[FLOAT]], %[[I32]]) : (f32, i32) -> f32
+  %a31 = llvm.intr.powi(%arg1, %arg0) : (f32, i32) -> f32
 
-// CHECK: "llvm.intr.bitreverse"(%{{.*}}) : (i32) -> i32
-  %32 = "llvm.intr.bitreverse"(%arg0) : (i32) -> i32
+// CHECK: llvm.intr.bitreverse(%{{.*}}) : (i32) -> i32
+  %32 = llvm.intr.bitreverse(%arg0) : (i32) -> i32
 
-// CHECK: "llvm.intr.ctpop"(%{{.*}}) : (i32) -> i32
-  %33 = "llvm.intr.ctpop"(%arg0) : (i32) -> i32
+// CHECK: llvm.intr.ctpop(%{{.*}}) : (i32) -> i32
+  %33 = llvm.intr.ctpop(%arg0) : (i32) -> i32
 
-// CHECK: "llvm.intr.round"(%[[FLOAT]]) : (f32) -> f32
-  %34 = "llvm.intr.round"(%arg1) : (f32) -> f32
+// CHECK: llvm.intr.round(%[[FLOAT]]) : (f32) -> f32
+  %34 = llvm.intr.round(%arg1) : (f32) -> f32
 
 // CHECK: "llvm.intr.memcpy"(%{{.*}}, %{{.*}}, %{{.*}}, %{{.*}}) : (!llvm.ptr<i8>, !llvm.ptr<i8>, i32, i1) -> ()
   "llvm.intr.memcpy"(%arg2, %arg3, %arg0, %arg4) : (!llvm.ptr<i8>, !llvm.ptr<i8>, i32, i1) -> ()
 
 // CHECK: "llvm.intr.memcpy"(%{{.*}}, %{{.*}}, %{{.*}}, %{{.*}}) : (!llvm.ptr<i8>, !llvm.ptr<i8>, i32, i1) -> ()
   "llvm.intr.memcpy"(%arg2, %arg3, %arg0, %arg4) : (!llvm.ptr<i8>, !llvm.ptr<i8>, i32, i1) -> ()
 
 // CHECK: %[[SZ:.*]] = llvm.mlir.constant

 
 // CHECK: {{.*}} = llvm.fadd %arg0, %arg1 : f32
   %8 = llvm.fadd %arg0, %arg1 {fastmathFlags = #llvm.fastmath<none>} : f32
 // CHECK: {{.*}} = llvm.fadd %arg0, %arg1 {fastmathFlags = #llvm.fastmath<nnan, ninf>} : f32
   %9 = llvm.fadd %arg0, %arg1 {fastmathFlags = #llvm.fastmath<nnan,ninf>} : f32
 
 // CHECK: {{.*}} = llvm.fneg %arg0 : f32
   %10 = llvm.fneg %arg0 {fastmathFlags = #llvm.fastmath<none>} : f32
+
+// CHECK: {{.*}} = llvm.intr.sin(%arg0) {fastmathFlags = #llvm.fastmath<fast>} : (f32) -> f32
+  %11 = llvm.intr.sin(%arg0) {fastmathFlags = #llvm.fastmath<fast>} : (f32) -> f32
+// CHECK: {{.*}} = llvm.intr.sin(%arg0) {fastmathFlags = #llvm.fastmath<afn>} : (f32) -> f32
+  %12 = llvm.intr.sin(%arg0) {fastmathFlags = #llvm.fastmath<afn>} : (f32) -> f32
   return
 }
 
 module {
   // CHECK-LABEL: @loopOptions
   llvm.func @loopOptions() {
     // CHECK: llvm.br
     // CHECK-SAME: llvm.loop = {options = #llvm.loopopts<disable_unroll = true, disable_licm = true, interleave_count = 1, disable_pipeline = true, pipeline_initiation_interval = 1>}, parallel_access = [@metadata::@group1]}

mlir/test/Dialect/OpenMP/ops.mlir

func.func @omp_atomic_update(%x : memref<i32>, %expr : i32, %xBool : memref<i1>, %exprBool : i1) {
   // CHECK-NEXT: }
   omp.atomic.update %x : memref<i32> {
   ^bb0(%xval: i32):
     %newval = llvm.shl %xval, %expr : i32
     omp.yield(%newval : i32)
   }
   // CHECK: omp.atomic.update %[[X]] : memref<i32>
   // CHECK-NEXT: (%[[XVAL:.*]]: i32):
-  // CHECK-NEXT:   %[[NEWVAL:.*]] = "llvm.intr.smax"(%[[XVAL]], %[[EXPR]]) : (i32, i32) -> i32
+  // CHECK-NEXT:   %[[NEWVAL:.*]] = llvm.intr.smax(%[[XVAL]], %[[EXPR]]) : (i32, i32) -> i32
   // CHECK-NEXT:   omp.yield(%[[NEWVAL]] : i32)
   // CHECK-NEXT: }
   omp.atomic.update %x : memref<i32> {
   ^bb0(%xval: i32):
-    %newval = "llvm.intr.smax"(%xval, %expr) : (i32, i32) -> i32
+    %newval = llvm.intr.smax(%xval, %expr) : (i32, i32) -> i32
     omp.yield(%newval : i32)
   }
 
   // CHECK: omp.atomic.update %[[XBOOL]] : memref<i1>
   // CHECK-NEXT: (%[[XVAL:.*]]: i1):
   // CHECK-NEXT:   %[[NEWVAL:.*]] = llvm.icmp "eq" %[[XVAL]], %[[EXPRBOOL]] : i1
   // CHECK-NEXT:   omp.yield(%[[NEWVAL]] : i1)
   // }

mlir/test/Target/LLVMIR/Import/intrinsic.ll

 ; RUN: mlir-translate -import-llvm %s | FileCheck %s
 
 define void @intrinsics() {
   ret void
 }
 
 ; CHECK-LABEL:  llvm.func @fmuladd_test
 define void @fmuladd_test(float %0, float %1, <8 x float> %2, i8* %3) {
-  ; CHECK: "llvm.intr.fmuladd"(%{{.*}}, %{{.*}}, %{{.*}}) : (f32, f32, f32) -> f32
+  ; CHECK: llvm.intr.fmuladd(%{{.*}}, %{{.*}}, %{{.*}}) : (f32, f32, f32) -> f32
   %5 = call float @llvm.fmuladd.f32(float %0, float %1, float %0)
-  ; CHECK: "llvm.intr.fmuladd"(%{{.*}}, %{{.*}}, %{{.*}}) : (vector<8xf32>, vector<8xf32>, vector<8xf32>) -> vector<8xf32>
+  ; CHECK: llvm.intr.fmuladd(%{{.*}}, %{{.*}}, %{{.*}}) : (vector<8xf32>, vector<8xf32>, vector<8xf32>) -> vector<8xf32>
   %6 = call <8 x float> @llvm.fmuladd.v8f32(<8 x float> %2, <8 x float> %2, <8 x float> %2)
-  ; CHECK: "llvm.intr.fma"(%{{.*}}, %{{.*}}, %{{.*}}) : (f32, f32, f32) -> f32
+  ; CHECK: llvm.intr.fma(%{{.*}}, %{{.*}}, %{{.*}}) : (f32, f32, f32) -> f32
   %7 = call float @llvm.fma.f32(float %0, float %1, float %0)
-  ; CHECK: "llvm.intr.fma"(%{{.*}}, %{{.*}}, %{{.*}}) : (vector<8xf32>, vector<8xf32>, vector<8xf32>) -> vector<8xf32>
+  ; CHECK: llvm.intr.fma(%{{.*}}, %{{.*}}, %{{.*}}) : (vector<8xf32>, vector<8xf32>, vector<8xf32>) -> vector<8xf32>
   %8 = call <8 x float> @llvm.fma.v8f32(<8 x float> %2, <8 x float> %2, <8 x float> %2)
   ; CHECK: "llvm.intr.prefetch"(%{{.*}}, %{{.*}}, %{{.*}}, %{{.*}}) : (!llvm.ptr<i8>, i32, i32, i32) -> ()
   call void @llvm.prefetch.p0i8(i8* %3, i32 0, i32 3, i32 1)
   ret void
 }
 
 ; CHECK-LABEL:  llvm.func @exp_test
 define void @exp_test(float %0, <8 x float> %1) {
-  ; CHECK: "llvm.intr.exp"(%{{.*}}) : (f32) -> f32
+  ; CHECK: llvm.intr.exp(%{{.*}}) : (f32) -> f32
   %3 = call float @llvm.exp.f32(float %0)
-  ; CHECK: "llvm.intr.exp"(%{{.*}}) : (vector<8xf32>) -> vector<8xf32>
+  ; CHECK: llvm.intr.exp(%{{.*}}) : (vector<8xf32>) -> vector<8xf32>
   %4 = call <8 x float> @llvm.exp.v8f32(<8 x float> %1)
   ret void
 }
 
 ; CHECK-LABEL:  llvm.func @exp2_test
 define void @exp2_test(float %0, <8 x float> %1) {
-  ; CHECK:  "llvm.intr.exp2"(%{{.*}}) : (f32) -> f32
+  ; CHECK:  llvm.intr.exp2(%{{.*}}) : (f32) -> f32
   %3 = call float @llvm.exp2.f32(float %0)
-  ; CHECK:  "llvm.intr.exp2"(%{{.*}}) : (vector<8xf32>) -> vector<8xf32>
+  ; CHECK:  llvm.intr.exp2(%{{.*}}) : (vector<8xf32>) -> vector<8xf32>
   %4 = call <8 x float> @llvm.exp2.v8f32(<8 x float> %1)
   ret void
 }
 
 ; CHECK-LABEL:  llvm.func @log_test
 define void @log_test(float %0, <8 x float> %1) {
-  ; CHECK:  "llvm.intr.log"(%{{.*}}) : (f32) -> f32
+  ; CHECK:  llvm.intr.log(%{{.*}}) : (f32) -> f32
   %3 = call float @llvm.log.f32(float %0)
-  ; CHECK:  "llvm.intr.log"(%{{.*}}) : (vector<8xf32>) -> vector<8xf32>
+  ; CHECK:  llvm.intr.log(%{{.*}}) : (vector<8xf32>) -> vector<8xf32>
   %4 = call <8 x float> @llvm.log.v8f32(<8 x float> %1)
   ret void
 }
 
 ; CHECK-LABEL:  llvm.func @log10_test
 define void @log10_test(float %0, <8 x float> %1) {
-  ; CHECK:  "llvm.intr.log10"(%{{.*}}) : (f32) -> f32
+  ; CHECK:  llvm.intr.log10(%{{.*}}) : (f32) -> f32
   %3 = call float @llvm.log10.f32(float %0)
-  ; CHECK:  "llvm.intr.log10"(%{{.*}}) : (vector<8xf32>) -> vector<8xf32>
+  ; CHECK:  llvm.intr.log10(%{{.*}}) : (vector<8xf32>) -> vector<8xf32>
   %4 = call <8 x float> @llvm.log10.v8f32(<8 x float> %1)
   ret void
 }
 
 ; CHECK-LABEL:  llvm.func @log2_test
 define void @log2_test(float %0, <8 x float> %1)  {
-  ; CHECK:  "llvm.intr.log2"(%{{.*}}) : (f32) -> f32
+  ; CHECK:  llvm.intr.log2(%{{.*}}) : (f32) -> f32
   %3 = call float @llvm.log2.f32(float %0)
-  ; CHECK: "llvm.intr.log2"(%{{.*}}) : (vector<8xf32>) -> vector<8xf32>
+  ; CHECK: llvm.intr.log2(%{{.*}}) : (vector<8xf32>) -> vector<8xf32>
   %4 = call <8 x float> @llvm.log2.v8f32(<8 x float> %1)
   ret void
 }
 
 ; CHECK-LABEL:  llvm.func @fabs_test
 define void @fabs_test(float %0, <8 x float> %1) {
-  ; CHECK: "llvm.intr.fabs"(%{{.*}}) : (f32) -> f32
+  ; CHECK: llvm.intr.fabs(%{{.*}}) : (f32) -> f32
   %3 = call float @llvm.fabs.f32(float %0)
-  ; CHECK: "llvm.intr.fabs"(%{{.*}}) : (vector<8xf32>) -> vector<8xf32>
+  ; CHECK: llvm.intr.fabs(%{{.*}}) : (vector<8xf32>) -> vector<8xf32>
   %4 = call <8 x float> @llvm.fabs.v8f32(<8 x float> %1)
   ret void
 }
 ; CHECK-LABEL:  llvm.func @sqrt_test
 define void @sqrt_test(float %0, <8 x float> %1) {
-  ; CHECK: "llvm.intr.sqrt"(%{{.*}}) : (f32) -> f32
+  ; CHECK: llvm.intr.sqrt(%{{.*}}) : (f32) -> f32
   %3 = call float @llvm.sqrt.f32(float %0)
-  ; CHECK: "llvm.intr.sqrt"(%{{.*}}) : (vector<8xf32>) -> vector<8xf32>
+  ; CHECK: llvm.intr.sqrt(%{{.*}}) : (vector<8xf32>) -> vector<8xf32>
   %4 = call <8 x float> @llvm.sqrt.v8f32(<8 x float> %1)
   ret void
 }
 ; CHECK-LABEL:  llvm.func @ceil_test
 define void @ceil_test(float %0, <8 x float> %1) {
-  ; CHECK: "llvm.intr.ceil"(%{{.*}}) : (f32) -> f32
+  ; CHECK: llvm.intr.ceil(%{{.*}}) : (f32) -> f32
   %3 = call float @llvm.ceil.f32(float %0)
-  ; CHECK: "llvm.intr.ceil"(%{{.*}}) : (vector<8xf32>) -> vector<8xf32>
+  ; CHECK: llvm.intr.ceil(%{{.*}}) : (vector<8xf32>) -> vector<8xf32>
   %4 = call <8 x float> @llvm.ceil.v8f32(<8 x float> %1)
   ret void
 }
 ; CHECK-LABEL:  llvm.func @floor_test
 define void @floor_test(float %0, <8 x float> %1) {
-  ; CHECK: "llvm.intr.floor"(%{{.*}}) : (f32) -> f32
+  ; CHECK: llvm.intr.floor(%{{.*}}) : (f32) -> f32
   %3 = call float @llvm.floor.f32(float %0)
-  ; CHECK: "llvm.intr.floor"(%{{.*}}) : (vector<8xf32>) -> vector<8xf32>
+  ; CHECK: llvm.intr.floor(%{{.*}}) : (vector<8xf32>) -> vector<8xf32>
   %4 = call <8 x float> @llvm.floor.v8f32(<8 x float> %1)
   ret void
 }
 ; CHECK-LABEL:  llvm.func @cos_test
 define void @cos_test(float %0, <8 x float> %1) {
-  ; CHECK: "llvm.intr.cos"(%{{.*}}) : (f32) -> f32
+  ; CHECK: llvm.intr.cos(%{{.*}}) : (f32) -> f32
   %3 = call float @llvm.cos.f32(float %0)
-  ; CHECK: "llvm.intr.cos"(%{{.*}}) : (vector<8xf32>) -> vector<8xf32>
+  ; CHECK: llvm.intr.cos(%{{.*}}) : (vector<8xf32>) -> vector<8xf32>
   %4 = call <8 x float> @llvm.cos.v8f32(<8 x float> %1)
   ret void
 }
 
 ; CHECK-LABEL:  llvm.func @copysign_test
 define void @copysign_test(float %0, float %1, <8 x float> %2, <8 x float> %3) {
-  ; CHECK:  "llvm.intr.copysign"(%{{.*}}, %{{.*}}) : (f32, f32) -> f32
+  ; CHECK:  llvm.intr.copysign(%{{.*}}, %{{.*}}) : (f32, f32) -> f32
   %5 = call float @llvm.copysign.f32(float %0, float %1)
-  ; CHECK:  "llvm.intr.copysign"(%{{.*}}, %{{.*}}) : (vector<8xf32>, vector<8xf32>) -> vector<8xf32>
+  ; CHECK:  llvm.intr.copysign(%{{.*}}, %{{.*}}) : (vector<8xf32>, vector<8xf32>) -> vector<8xf32>
   %6 = call <8 x float> @llvm.copysign.v8f32(<8 x float> %2, <8 x float> %3)
   ret void
 }
 ; CHECK-LABEL:  llvm.func @pow_test
 define void @pow_test(float %0, float %1, <8 x float> %2, <8 x float> %3) {
-  ; CHECK:  "llvm.intr.pow"(%{{.*}}, %{{.*}}) : (f32, f32) -> f32
+  ; CHECK:  llvm.intr.pow(%{{.*}}, %{{.*}}) : (f32, f32) -> f32
   %5 = call float @llvm.pow.f32(float %0, float %1)
-  ; CHECK:  "llvm.intr.pow"(%{{.*}}, %{{.*}}) : (vector<8xf32>, vector<8xf32>) -> vector<8xf32>
+  ; CHECK:  llvm.intr.pow(%{{.*}}, %{{.*}}) : (vector<8xf32>, vector<8xf32>) -> vector<8xf32>
   %6 = call <8 x float> @llvm.pow.v8f32(<8 x float> %2, <8 x float> %3)
   ret void
 }
 ; CHECK-LABEL:  llvm.func @bitreverse_test
 define void @bitreverse_test(i32 %0, <8 x i32> %1) {
-  ; CHECK:   "llvm.intr.bitreverse"(%{{.*}}) : (i32) -> i32
+  ; CHECK:   llvm.intr.bitreverse(%{{.*}}) : (i32) -> i32
   %3 = call i32 @llvm.bitreverse.i32(i32 %0)
-  ; CHECK:   "llvm.intr.bitreverse"(%{{.*}}) : (vector<8xi32>) -> vector<8xi32>
+  ; CHECK:   llvm.intr.bitreverse(%{{.*}}) : (vector<8xi32>) -> vector<8xi32>
   %4 = call <8 x i32> @llvm.bitreverse.v8i32(<8 x i32> %1)
   ret void
 }
 ; CHECK-LABEL:  llvm.func @ctlz_test
 define void @ctlz_test(i32 %0, <8 x i32> %1) {
   ; CHECK-DAG:   %[[falseval1:.+]] = llvm.mlir.constant(false) : i1
   ; CHECK-DAG:   %[[falseval2:.+]] = llvm.mlir.constant(false) : i1
   ; CHECK:   "llvm.intr.ctlz"(%{{.*}}, %[[falseval2]]) : (i32, i1) -> i32
define void @cttz_test(i32 %0, <8 x i32> %1) {
   %3 = call i32 @llvm.cttz.i32(i32 %0, i1 false)
   ; CHECK:   "llvm.intr.cttz"(%{{.*}}, %[[falseval1]]) : (vector<8xi32>, i1) -> vector<8xi32>
   %4 = call <8 x i32> @llvm.cttz.v8i32(<8 x i32> %1, i1 false)
   ret void
 }
 
 ; CHECK-LABEL:  llvm.func @ctpop_test
 define void @ctpop_test(i32 %0, <8 x i32> %1) {
-  ; CHECK:   "llvm.intr.ctpop"(%{{.*}}) : (i32) -> i32
+  ; CHECK:   llvm.intr.ctpop(%{{.*}}) : (i32) -> i32
   %3 = call i32 @llvm.ctpop.i32(i32 %0)
-  ; CHECK:   "llvm.intr.ctpop"(%{{.*}}) : (vector<8xi32>) -> vector<8xi32>
+  ; CHECK:   llvm.intr.ctpop(%{{.*}}) : (vector<8xi32>) -> vector<8xi32>
   %4 = call <8 x i32> @llvm.ctpop.v8i32(<8 x i32> %1)
   ret void
 }
 
 ; CHECK-LABEL:  llvm.func @maximum_test
 define void @maximum_test(float %0, float %1, <8 x float> %2, <8 x float> %3) {
-  ; CHECK:   "llvm.intr.maximum"(%{{.*}}, %{{.*}}) : (f32, f32) -> f32
+  ; CHECK:   llvm.intr.maximum(%{{.*}}, %{{.*}}) : (f32, f32) -> f32
   %5 = call float @llvm.maximum.f32(float %0, float %1)
-  ; CHECK:   "llvm.intr.maximum"(%{{.*}}, %{{.*}}) : (vector<8xf32>, vector<8xf32>) -> vector<8xf32>
+  ; CHECK:   llvm.intr.maximum(%{{.*}}, %{{.*}}) : (vector<8xf32>, vector<8xf32>) -> vector<8xf32>
   %6 = call <8 x float> @llvm.maximum.v8f32(<8 x float> %2, <8 x float> %3)
   ret void
 }
 
 ; CHECK-LABEL:    llvm.func @minimum_test
 define void @minimum_test(float %0, float %1, <8 x float> %2, <8 x float> %3) {
-  ; CHECK:   "llvm.intr.minimum"(%{{.*}}, %{{.*}}) : (f32, f32) -> f32
+  ; CHECK:   llvm.intr.minimum(%{{.*}}, %{{.*}}) : (f32, f32) -> f32
   %5 = call float @llvm.minimum.f32(float %0, float %1)
-  ; CHECK:   "llvm.intr.minimum"(%{{.*}}, %{{.*}}) : (vector<8xf32>, vector<8xf32>) -> vector<8xf32>
+  ; CHECK:   llvm.intr.minimum(%{{.*}}, %{{.*}}) : (vector<8xf32>, vector<8xf32>) -> vector<8xf32>
   %6 = call <8 x float> @llvm.minimum.v8f32(<8 x float> %2, <8 x float> %3)
   ret void
 }
 
 ; CHECK-LABEL:  llvm.func @maxnum_test
 define void @maxnum_test(float %0, float %1, <8 x float> %2, <8 x float> %3) {
-  ; CHECK:   "llvm.intr.maxnum"(%{{.*}}, %{{.*}}) : (f32, f32) -> f32
+  ; CHECK:   llvm.intr.maxnum(%{{.*}}, %{{.*}}) : (f32, f32) -> f32
   %5 = call float @llvm.maxnum.f32(float %0, float %1)
-  ; CHECK:   "llvm.intr.maxnum"(%{{.*}}, %{{.*}}) : (vector<8xf32>, vector<8xf32>) -> vector<8xf32>
+  ; CHECK:   llvm.intr.maxnum(%{{.*}}, %{{.*}}) : (vector<8xf32>, vector<8xf32>) -> vector<8xf32>
   %6 = call <8 x float> @llvm.maxnum.v8f32(<8 x float> %2, <8 x float> %3)
   ret void
 }
 
 ; CHECK-LABEL:  llvm.func @minnum_test
 define void @minnum_test(float %0, float %1, <8 x float> %2, <8 x float> %3) {
-  ; CHECK:   "llvm.intr.minnum"(%{{.*}}, %{{.*}}) : (f32, f32) -> f32
+  ; CHECK:   llvm.intr.minnum(%{{.*}}, %{{.*}}) : (f32, f32) -> f32
   %5 = call float @llvm.minnum.f32(float %0, float %1)
-  ; CHECK:   "llvm.intr.minnum"(%{{.*}}, %{{.*}}) : (vector<8xf32>, vector<8xf32>) -> vector<8xf32>
+  ; CHECK:   llvm.intr.minnum(%{{.*}}, %{{.*}}) : (vector<8xf32>, vector<8xf32>) -> vector<8xf32>
   %6 = call <8 x float> @llvm.minnum.v8f32(<8 x float> %2, <8 x float> %3)
   ret void
 }
 
 ; CHECK-LABEL:  llvm.func @smax_test
 define void @smax_test(i32 %0, i32 %1, <8 x i32> %2, <8 x i32> %3) {
-  ; CHECK:  "llvm.intr.smax"(%{{.*}}, %{{.*}}) : (i32, i32) -> i32
+  ; CHECK:  llvm.intr.smax(%{{.*}}, %{{.*}}) : (i32, i32) -> i32
   %5 = call i32 @llvm.smax.i32(i32 %0, i32 %1)
-  ; CHECK:  "llvm.intr.smax"(%{{.*}}, %{{.*}}) : (vector<8xi32>, vector<8xi32>) -> vector<8xi32>
+  ; CHECK:  llvm.intr.smax(%{{.*}}, %{{.*}}) : (vector<8xi32>, vector<8xi32>) -> vector<8xi32>
   %6 = call <8 x i32> @llvm.smax.v8i32(<8 x i32> %2, <8 x i32> %3)
   ret void
 }
 
 ; CHECK-LABEL:  llvm.func @smin_test
 define void @smin_test(i32 %0, i32 %1, <8 x i32> %2, <8 x i32> %3) {
-  ; CHECK:   "llvm.intr.smin"(%{{.*}}, %{{.*}}) : (i32, i32) -> i32
+  ; CHECK:   llvm.intr.smin(%{{.*}}, %{{.*}}) : (i32, i32) -> i32
   %5 = call i32 @llvm.smin.i32(i32 %0, i32 %1)
-  ; CHECK:   "llvm.intr.smin"(%{{.*}}, %{{.*}}) : (vector<8xi32>, vector<8xi32>) -> vector<8xi32>
+  ; CHECK:   llvm.intr.smin(%{{.*}}, %{{.*}}) : (vector<8xi32>, vector<8xi32>) -> vector<8xi32>
   %6 = call <8 x i32> @llvm.smin.v8i32(<8 x i32> %2, <8 x i32> %3)
   ret void
 }
 
 ; CHECK-LABEL:  llvm.func @umax_test
 define void @umax_test(i32 %0, i32 %1, <8 x i32> %2, <8 x i32> %3) {
-  ; CHECK:   "llvm.intr.umax"(%{{.*}}, %{{.*}}) : (i32, i32) -> i32
+  ; CHECK:   llvm.intr.umax(%{{.*}}, %{{.*}}) : (i32, i32) -> i32
   %5 = call i32 @llvm.umax.i32(i32 %0, i32 %1)
-  ; CHECK:   "llvm.intr.umax"(%{{.*}}, %{{.*}}) : (vector<8xi32>, vector<8xi32>) -> vector<8xi32>
+  ; CHECK:   llvm.intr.umax(%{{.*}}, %{{.*}}) : (vector<8xi32>, vector<8xi32>) -> vector<8xi32>
   %6 = call <8 x i32> @llvm.umax.v8i32(<8 x i32> %2, <8 x i32> %3)
   ret void
 }
 
 ; CHECK-LABEL:  llvm.func @umin_test
 define void @umin_test(i32 %0, i32 %1, <8 x i32> %2, <8 x i32> %3) {
-  ; CHECK:   "llvm.intr.umin"(%{{.*}}, %{{.*}}) : (i32, i32) -> i32
+  ; CHECK:   llvm.intr.umin(%{{.*}}, %{{.*}}) : (i32, i32) -> i32
   %5 = call i32 @llvm.umin.i32(i32 %0, i32 %1)
-  ; CHECK:   "llvm.intr.umin"(%{{.*}}, %{{.*}}) : (vector<8xi32>, vector<8xi32>) -> vector<8xi32>
+  ; CHECK:   llvm.intr.umin(%{{.*}}, %{{.*}}) : (vector<8xi32>, vector<8xi32>) -> vector<8xi32>
   %6 = call <8 x i32> @llvm.umin.v8i32(<8 x i32> %2, <8 x i32> %3)
   ret void
 }
 
 ; CHECK-LABEL:  llvm.func @vector_reductions
 define void @vector_reductions(float %0, <8 x float> %1, <8 x i32> %2) {
   ; CHECK: "llvm.intr.vector.reduce.add"(%{{.*}}) : (vector<8xi32>) -> i32
   %4 = call i32 @llvm.vector.reduce.add.v8i32(<8 x i32> %2)

mlir/test/Target/LLVMIR/llvmir.mlir

// CHECK: {{.*}} = call fast float @fastmathFlagsFunc({{.*}})
   %9 = llvm.call @fastmathFlagsFunc(%arg0) {fastmathFlags = #llvm.fastmath<nnan>} : (f32) -> (f32)
   %10 = llvm.call @fastmathFlagsFunc(%arg0) {fastmathFlags = #llvm.fastmath<ninf>} : (f32) -> (f32)
   %11 = llvm.call @fastmathFlagsFunc(%arg0) {fastmathFlags = #llvm.fastmath<nsz>} : (f32) -> (f32)
   %12 = llvm.call @fastmathFlagsFunc(%arg0) {fastmathFlags = #llvm.fastmath<arcp>} : (f32) -> (f32)
   %13 = llvm.call @fastmathFlagsFunc(%arg0) {fastmathFlags = #llvm.fastmath<contract>} : (f32) -> (f32)
   %14 = llvm.call @fastmathFlagsFunc(%arg0) {fastmathFlags = #llvm.fastmath<afn>} : (f32) -> (f32)
   %15 = llvm.call @fastmathFlagsFunc(%arg0) {fastmathFlags = #llvm.fastmath<reassoc>} : (f32) -> (f32)
   %16 = llvm.call @fastmathFlagsFunc(%arg0) {fastmathFlags = #llvm.fastmath<fast>} : (f32) -> (f32)
+
+// CHECK: call fast float @llvm.copysign.f32(float {{.*}}, float {{.*}})
+  %17 = "llvm.intr.copysign"(%arg0, %arg0) {fastmathFlags = #llvm.fastmath<fast>} : (f32, f32) -> f32
+// CHECK: call afn float @llvm.copysign.f32(float {{.*}}, float {{.*}})
+  %18 = "llvm.intr.copysign"(%arg0, %arg0) {fastmathFlags = #llvm.fastmath<afn>} : (f32, f32) -> f32
+
+// CHECK: call fast float @llvm.powi.f32.i32(float {{.*}}, i32 {{.*}})
+  %exp = llvm.mlir.constant(1 : i32) : i32
+  %19 = "llvm.intr.powi"(%arg0, %exp) {fastmathFlags = #llvm.fastmath<fast>} : (f32, i32) -> f32
+// CHECK: call afn float @llvm.powi.f32.i32(float {{.*}}, i32 {{.*}})
+  %20 = "llvm.intr.powi"(%arg0, %exp) {fastmathFlags = #llvm.fastmath<afn>} : (f32, i32) -> f32
   llvm.return
 }
 
 // -----
 
 // CHECK-LABEL: @switch_args
 llvm.func @switch_args(%arg0: i32) -> i32 {
   %0 = llvm.mlir.constant(5 : i32) : i32