♟ antiagainst

[mlir][spirv] Use SingleBlock + NoTerminator for spv.module

[mlir] Don't elide the last op if there is no terminator

In D103264#2785248, @mehdi_amini wrote:

Do you have a test for that?

Ah, I think you are right. I just checked the definition for index type; indeed it's just spec'ed as "signless integer whose size is equal to the natural machine word of the target". I was under the wrong impression due to its close relationship with indices/sizes. Thanks for pointing out!! :)

Cool; overall LGTM. Just a few nits. Please fix them and then land.

[mlir][linalg] Restrict distribution to parallel dims

[mlir][spirv] NFC: Replace OwningSPIRVModuleRef with OwningOpRef

Awesome, thanks for fixing this non-trivial part! :D

Cool! Thanks for rewriting the std op chain into affine apply chain!

LGTM. Thanks for fixing this, Thomas!

Revert "[ADT] Remove StatisticBase and make NoopStatistic empty"

FYI: this breaks MLIR build. I'll revert it for now.

[mlir][spirv] Only attach struct offset for required storage classes

In D100403#2686550, @hanchung wrote:

I think we should have a cleanup someday... many ops are no longer Standard ops...

[mlir][spirv] Fix runtime array stride when emulating bitwidth

[mlir][spirv] Allow bitwidth emulation on runtime arrays

[mlir] Move memref.subview patterns to MemRef/Transforms/

[mlir][spirv] Put debug-only variable in LLVM_DEBUG

In D100128#2677661, @Weiwei-2021 wrote:

In D100128#2677375, @antiagainst wrote:

Cool, just two minor issue.

BTW, do you still need me to land the patches from now on? I assume you have commit access now given https://github.com/llvm/llvm-project/commit/63e676ffff6fd57e731412f7d905ef9044d716bf?

Thank you for reviewing. Also thanks for helping me land patches all the time. I will fix the two issues and land the patch by myself. :)

Cool, just one final comment.

Cool, just two minor issue.

[mlir][linalg] Fix loop upper bounds in conv fusion test

Mostly okay to me. Major request to have an option for control.

[mlir][spirv] Add control for non-32-bit scalar type emulation

[mlir][spirv] Timely fail type conversion

I've created D100058 and D100059 to introduce controls over emulation. You can rebase after they are landed. With D100059 I think we can introduce another option there to control the # of bits for boolean types. So the getTypeNumBytes (which should probably be changed to getTypeNumBits) and all those convert*Type functions can properly handle i1.

LGTM. Just a nit about documentation.

[mlir][spirv] Add utilities for push constant value

These utility functions has been used in IREE for a while. Upstream them now.

[mlir][linalg] Fold fill -> tensor_reshape chain

[mlir][linalg] Support dropping unit dimensions for init tensors

[mlir][linalg] Allow controlling folding unit dim reshapes

[mlir][affine] Add canonicalization to merge affine min/max ops

[mlir][linalg] Fuse producers with non-permutation indexing maps

[mlir][affine] Deduplicate affine min/max op expressions

[mlir][linalg] NFC: Move makeTiledShapes into Utils.{h|cpp}

antiagainst (Lei Zhang)
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antiagainst (Lei Zhang)User