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antiagainst (Lei Zhang)
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User Since
Dec 24 2019, 5:47 AM (39 w, 2 d)

Recent Activity

Today

antiagainst accepted D88223: [MLIR][SPIRV] Fixed dialect loading in deserialization.

Thanks for the fix!

Thu, Sep 24, 5:47 AM · Restricted Project

Fri, Sep 18

antiagainst committed rG1f0b43638ed7: [spirv] Move device info from resource limit into target env (authored by antiagainst).
[spirv] Move device info from resource limit into target env
Fri, Sep 18, 2:44 PM
antiagainst closed D87911: [spirv] Move device info from resource limit into target env.
Fri, Sep 18, 2:44 PM · Restricted Project
antiagainst added inline comments to D87911: [spirv] Move device info from resource limit into target env.
Fri, Sep 18, 2:41 PM · Restricted Project
antiagainst updated the diff for D87911: [spirv] Move device info from resource limit into target env.

Fix

Fri, Sep 18, 11:46 AM · Restricted Project
antiagainst added a reviewer for D87911: [spirv] Move device info from resource limit into target env: ThomasRaoux.
Fri, Sep 18, 9:00 AM · Restricted Project
antiagainst requested review of D87911: [spirv] Move device info from resource limit into target env.
Fri, Sep 18, 9:00 AM · Restricted Project
antiagainst accepted D87907: [MLIR][ODS] Add constBuilderCall for TypeArrayAttr.
Fri, Sep 18, 8:57 AM · Restricted Project
antiagainst committed rG7b61b1927533: [MLIR][SPIRV] Create new ctx for deserialization in roundtrips. (authored by ergawy).
[MLIR][SPIRV] Create new ctx for deserialization in roundtrips.
Fri, Sep 18, 8:54 AM
antiagainst closed D87692: [MLIR][SPIRV] Create new ctx for deserialization in roundtrips..
Fri, Sep 18, 8:54 AM · Restricted Project
antiagainst accepted D87692: [MLIR][SPIRV] Create new ctx for deserialization in roundtrips..

Looks good to me. Thanks for fixing this!

Fri, Sep 18, 8:45 AM · Restricted Project

Thu, Sep 10

antiagainst accepted D87307: [mlir][Analysis] Allow Slice Analysis to work with linalg::LinalgOp.
Thu, Sep 10, 2:48 PM · Restricted Project

Wed, Sep 9

antiagainst accepted D87303: [mlir][Linalg] Add Utility method to get loop ranges for a LinalgOp..
Wed, Sep 9, 2:19 PM · Restricted Project
antiagainst added a comment to D87307: [mlir][Analysis] Allow Slice Analysis to work with linalg::LinalgOp.

Can we add a test for it in slicing-utils.mlir?

Wed, Sep 9, 2:13 PM · Restricted Project

Fri, Sep 4

antiagainst committed rG7d53fecb6792: [spirv] Add more target and resource limit fields (authored by antiagainst).
[spirv] Add more target and resource limit fields
Fri, Sep 4, 7:27 AM
antiagainst closed D87106: [spirv] Add more target and resource limit fields.
Fri, Sep 4, 7:26 AM · Restricted Project

Thu, Sep 3

antiagainst added a comment to D87106: [spirv] Add more target and resource limit fields.

Nice! THanks!
Is there a way to add tests for these (do we need to)? Some roundtrip tests will serve as good reference.

Thu, Sep 3, 1:11 PM · Restricted Project
antiagainst added a reviewer for D87106: [spirv] Add more target and resource limit fields: ThomasRaoux.
Thu, Sep 3, 11:50 AM · Restricted Project
antiagainst requested review of D87106: [spirv] Add more target and resource limit fields.
Thu, Sep 3, 11:49 AM · Restricted Project
antiagainst committed rG8d420fb3a02d: [spirv][nfc] Simplify resource limit with default values (authored by antiagainst).
[spirv][nfc] Simplify resource limit with default values
Thu, Sep 3, 10:31 AM
antiagainst closed D87090: [spirv][nfc] Simplify resource limit with default values.
Thu, Sep 3, 10:31 AM · Restricted Project
antiagainst added a reviewer for D87090: [spirv][nfc] Simplify resource limit with default values: hanchung.
Thu, Sep 3, 7:01 AM · Restricted Project
antiagainst updated the diff for D87090: [spirv][nfc] Simplify resource limit with default values.

Update comment

Thu, Sep 3, 6:57 AM · Restricted Project
antiagainst requested review of D87090: [spirv][nfc] Simplify resource limit with default values.
Thu, Sep 3, 6:53 AM · Restricted Project
antiagainst committed rG7939b76e2a7b: [mlir] Support default valued attribute in StructsGen (authored by antiagainst).
[mlir] Support default valued attribute in StructsGen
Thu, Sep 3, 6:50 AM
antiagainst closed D87055: [mlir] Support default valued attribute in StructsGen.
Thu, Sep 3, 6:50 AM · Restricted Project
antiagainst added a comment to D87055: [mlir] Support default valued attribute in StructsGen.

Looks good to me. One nit: it may be worth reordering the includes into the test to remove that pesky pre-merge check error.

Thu, Sep 3, 6:49 AM · Restricted Project
antiagainst committed rG1e21ca4d25f9: [spirv] Add SPIR-V GLSL extended Round op (authored by haoyouab).
[spirv] Add SPIR-V GLSL extended Round op
Thu, Sep 3, 6:43 AM
antiagainst closed D86914: add SPIR-V GLSL extended Round op.
Thu, Sep 3, 6:42 AM · Restricted Project
antiagainst added a comment to D86914: add SPIR-V GLSL extended Round op.

Sure thing. Happy to do that. Thanks for the contribution!

Thu, Sep 3, 6:30 AM · Restricted Project
antiagainst committed rG2860b2c14b42: [mlir] Add Acos, Asin, Atan, Sinh, Cosh, Pow to SPIRVGLSLOps (authored by LiyangLingIntel).
[mlir] Add Acos, Asin, Atan, Sinh, Cosh, Pow to SPIRVGLSLOps
Thu, Sep 3, 6:28 AM
antiagainst added a comment to D86929: [mlir] Add Acos, Asin, Atan, Sinh, Cosh, Pow to SPIRVGLSLOps.

Done. Thanks for the contribution! :)

Thu, Sep 3, 6:28 AM · Restricted Project
antiagainst closed D86929: [mlir] Add Acos, Asin, Atan, Sinh, Cosh, Pow to SPIRVGLSLOps.
Thu, Sep 3, 6:28 AM · Restricted Project

Wed, Sep 2

antiagainst added reviewers for D87055: [mlir] Support default valued attribute in StructsGen: rriddle, rsuderman.
Wed, Sep 2, 2:35 PM · Restricted Project
antiagainst requested review of D87055: [mlir] Support default valued attribute in StructsGen.
Wed, Sep 2, 2:34 PM · Restricted Project
antiagainst accepted D86929: [mlir] Add Acos, Asin, Atan, Sinh, Cosh, Pow to SPIRVGLSLOps.
Wed, Sep 2, 8:34 AM · Restricted Project
antiagainst accepted D86914: add SPIR-V GLSL extended Round op.
Wed, Sep 2, 8:30 AM · Restricted Project
antiagainst added a comment to D85133: [mlir] Extend BufferAssignmentTypeConverter with result conversion callbacks.

Reverted as https://github.com/llvm/llvm-project/commit/1b88bbf5eb80b38a4dee129df969d5632993fdd1.

Wed, Sep 2, 6:26 AM · Restricted Project
antiagainst added a reverting change for rG94f5d248772b: [mlir] Extend BufferAssignmentTypeConverter with result conversion callbacks: rG1b88bbf5eb80: Revert "[mlir] Extend BufferAssignmentTypeConverter with result conversion….
Wed, Sep 2, 6:26 AM
antiagainst added a reverting change for D85133: [mlir] Extend BufferAssignmentTypeConverter with result conversion callbacks: rG1b88bbf5eb80: Revert "[mlir] Extend BufferAssignmentTypeConverter with result conversion….
Wed, Sep 2, 6:26 AM · Restricted Project
antiagainst committed rG1b88bbf5eb80: Revert "[mlir] Extend BufferAssignmentTypeConverter with result conversion… (authored by antiagainst).
Revert "[mlir] Extend BufferAssignmentTypeConverter with result conversion…
Wed, Sep 2, 6:26 AM
antiagainst added a comment to D85133: [mlir] Extend BufferAssignmentTypeConverter with result conversion callbacks.

FYI: this change fails the following tests:

Wed, Sep 2, 6:23 AM · Restricted Project

Tue, Sep 1

antiagainst accepted D86829: [mlir][vulkan-runner] Explicitly export vulkan-runtime-wrapper entry points..
Tue, Sep 1, 12:34 PM · Restricted Project
antiagainst added a comment to D86829: [mlir][vulkan-runner] Explicitly export vulkan-runtime-wrapper entry points..

My only concern with that is that this is compiler dependent. (for instance visual studio doesn't use this notation). Are you suggesting handling this with a ifdef to deal with different compilers? That's what I was trying to avoid.

Tue, Sep 1, 10:14 AM · Restricted Project
antiagainst accepted D86876: [mlir][spirv] Add block read and write from SPV_INTEL_subgroups.

Nice, thanks!

Tue, Sep 1, 10:06 AM · Restricted Project
antiagainst requested changes to D86829: [mlir][vulkan-runner] Explicitly export vulkan-runtime-wrapper entry points..
Tue, Sep 1, 7:06 AM · Restricted Project

Aug 11 2020

antiagainst accepted D84626: [MLIR][SPIRVToLLVM] Conversion for global and addressof.

Sorry for the delay! For future patches, please feel free to land once you've gotten Mahesh's approval; no need to wait for mine.

Aug 11 2020, 8:58 AM · Restricted Project

Aug 6 2020

antiagainst accepted D85196: [mlir][spirv] Add correct handling of Kernel and Addresses capabilities.

Cool, thanks for the contribution!

Aug 6 2020, 2:29 PM · Restricted Project
antiagainst accepted D85461: [mlir][SPIR-V] Fix wrongly placed Rationale section..
Aug 6 2020, 11:50 AM · Restricted Project

Aug 5 2020

antiagainst committed rG0d03b3901d38: [mlir][StandardToSPIRV] Use spv.UMod for index re-calculation (authored by antiagainst).
[mlir][StandardToSPIRV] Use spv.UMod for index re-calculation
Aug 5 2020, 11:52 AM
antiagainst closed D83714: [mlir][StandardToSPIRV] Use spv.UMod for index re-calculation.
Aug 5 2020, 11:52 AM · Restricted Project
antiagainst added inline comments to D83714: [mlir][StandardToSPIRV] Use spv.UMod for index re-calculation.
Aug 5 2020, 11:47 AM · Restricted Project
antiagainst committed rG48378a32af54: [spirv] Fix bitwidth emulation for Workgroup storage class (authored by antiagainst).
[spirv] Fix bitwidth emulation for Workgroup storage class
Aug 5 2020, 11:44 AM
antiagainst closed D85308: [spirv] Fix bitwidth emulation for Workgroup storage class.
Aug 5 2020, 11:44 AM · Restricted Project
antiagainst updated the diff for D85308: [spirv] Fix bitwidth emulation for Workgroup storage class.

Update

Aug 5 2020, 7:18 AM · Restricted Project
antiagainst requested review of D85308: [spirv] Fix bitwidth emulation for Workgroup storage class.
Aug 5 2020, 7:12 AM · Restricted Project

Aug 4 2020

antiagainst accepted D84734: [MLIR][SPIRVToLLVM] Updated documentation for SPIR-V to LLVM conversion.
Aug 4 2020, 3:32 PM · Restricted Project
antiagainst requested changes to D85196: [mlir][spirv] Add correct handling of Kernel and Addresses capabilities.

Awesome, great to see that you are interested in bring up the OpenCL conversion path! :)

Aug 4 2020, 3:22 PM · Restricted Project
antiagainst accepted D84107: Add indented raw_ostream class.

This looks awesome! Sorry about the delay... LGTM; just a few nits. I see River has comments so would be good to get his consent too.

Aug 4 2020, 1:09 PM · Restricted Project
antiagainst accepted D84780: Setting the /bigobj option globally for Windows debug build. https://bugs.llvm.org/show_bug.cgi?id=46733.

LGTM for SPIR-V side.

Aug 4 2020, 12:35 PM · Restricted Project, Restricted Project, Restricted Project, Restricted Project

Jul 28 2020

antiagainst requested changes to D84734: [MLIR][SPIRVToLLVM] Updated documentation for SPIR-V to LLVM conversion.

Nice!

Jul 28 2020, 6:44 PM · Restricted Project
antiagainst requested changes to D84626: [MLIR][SPIRVToLLVM] Conversion for global and addressof.
Jul 28 2020, 6:38 PM · Restricted Project
antiagainst accepted D84175: [MLIR][SPIRV] Control attributes parsing/printing for loop and selection.
Jul 28 2020, 6:31 PM · Restricted Project
antiagainst accepted D84739: [MLIR][SPIRVToLLVM] Added support of volatile and nontemporal memory access in load/store.
Jul 28 2020, 5:53 PM · Restricted Project
antiagainst accepted D84731: [MLIR][SPIRV] Added storage class constraint on global variable.
Jul 28 2020, 5:51 PM · Restricted Project
antiagainst accepted D84661: [MLIR][SPIRVToLLVM] Conversion of GLSL ops to LLVM intrinsics.
Jul 28 2020, 5:50 PM · Restricted Project
antiagainst accepted D84633: [MLIR][SPIRVToLLVM] Conversion for inverse sqrt and tanh.
Jul 28 2020, 5:49 PM · Restricted Project
antiagainst accepted D84627: [MLIR][SPIRVToLLVM] Conversion patterns for GLSL ops.
Jul 28 2020, 4:07 PM · Restricted Project
antiagainst accepted D84657: [MLIR][SPIRVToLLVM] Branch weights support for BranchConditional conversion.
Jul 28 2020, 4:06 PM · Restricted Project

Jul 25 2020

GitHub <noreply@github.com> committed rZORG7e51df689871: Merge 706905e1515bfa6d00221e1313a2b505d689e8d4 into… (authored by antiagainst).
Merge 706905e1515bfa6d00221e1313a2b505d689e8d4 into…
Jul 25 2020, 6:52 PM

Jul 24 2020

GitHub <noreply@github.com> committed rZORG18c017b1164d: Merge 706905e1515bfa6d00221e1313a2b505d689e8d4 into… (authored by antiagainst).
Merge 706905e1515bfa6d00221e1313a2b505d689e8d4 into…
Jul 24 2020, 2:58 AM

Jul 23 2020

antiagainst accepted D84236: [MLIR][SPIRVToLLVM] Conversion of load and store SPIR-V ops.
Jul 23 2020, 4:25 PM · Restricted Project
antiagainst accepted D84196: [MLIR][SPIRV] Updated documentation for variableOp.
Jul 23 2020, 4:15 PM · Restricted Project
antiagainst requested changes to D84175: [MLIR][SPIRV] Control attributes parsing/printing for loop and selection.

Awesome! Can we also support (de)serialization for this?

Jul 23 2020, 4:14 PM · Restricted Project
GitHub <noreply@github.com> committed rZORG445a216a1472: Merge 706905e1515bfa6d00221e1313a2b505d689e8d4 into… (authored by antiagainst).
Merge 706905e1515bfa6d00221e1313a2b505d689e8d4 into…
Jul 23 2020, 7:52 AM

Jul 22 2020

GitHub <noreply@github.com> committed rZORG31975020fcf2: Merge 706905e1515bfa6d00221e1313a2b505d689e8d4 into… (authored by antiagainst).
Merge 706905e1515bfa6d00221e1313a2b505d689e8d4 into…
Jul 22 2020, 7:35 PM
GitHub <noreply@github.com> committed rZORG84463a9bc1d0: Merge 706905e1515bfa6d00221e1313a2b505d689e8d4 into… (authored by antiagainst).
Merge 706905e1515bfa6d00221e1313a2b505d689e8d4 into…
Jul 22 2020, 7:18 AM
antiagainst committed rZORG706905e1515b: Set up Vulkan compute in mlir-nvidia docker (authored by antiagainst).
Set up Vulkan compute in mlir-nvidia docker
Jul 22 2020, 7:18 AM
GitHub <noreply@github.com> committed rZORGbfb0880b554f: Merge d6c3b7e43ff2dd9e5323f748ffbb4415200db97f into… (authored by antiagainst).
Merge d6c3b7e43ff2dd9e5323f748ffbb4415200db97f into…
Jul 22 2020, 7:16 AM
antiagainst committed rZORGd6c3b7e43ff2: Set up Vulkan compute in mlir-nvidia docker and enable Vulkan tests (authored by antiagainst).
Set up Vulkan compute in mlir-nvidia docker and enable Vulkan tests
Jul 22 2020, 7:16 AM

Jul 20 2020

antiagainst accepted D84184: [mlir][SPIR-V] Adding rationale for not using memref descriptors.
Jul 20 2020, 9:16 PM · Restricted Project
antiagainst accepted D83860: [MLIR][LLVMDialect] SelectionOp conversion pattern.
Jul 20 2020, 6:29 AM · Restricted Project
antiagainst accepted D83784: [MLIR][SPIRVToLLVM] Conversion of SPIR-V branch ops.
Jul 20 2020, 6:10 AM · Restricted Project

Jul 16 2020

antiagainst accepted D83322: [MLIR][SPIRVToLLVM] Documentation for SPIR-V to LLVM conversion.

Awesome!

Jul 16 2020, 3:06 PM · Restricted Project
antiagainst committed rG2dd9e43579b3: [spirv] Use owning module ref to avoid leaks and fix ASAN tests (authored by antiagainst).
[spirv] Use owning module ref to avoid leaks and fix ASAN tests
Jul 16 2020, 2:31 PM
antiagainst closed D83982: [spirv] Use owning module ref to avoid leaks and fix ASAN tests.
Jul 16 2020, 2:31 PM · Restricted Project
antiagainst added reviewers for D83982: [spirv] Use owning module ref to avoid leaks and fix ASAN tests: mehdi_amini, rriddle.
Jul 16 2020, 1:10 PM · Restricted Project
Herald added a project to D83982: [spirv] Use owning module ref to avoid leaks and fix ASAN tests: Restricted Project.
Jul 16 2020, 1:09 PM · Restricted Project

Jul 15 2020

antiagainst requested changes to D83322: [MLIR][SPIRVToLLVM] Documentation for SPIR-V to LLVM conversion.

This is awesome doc! Thanks George!

Jul 15 2020, 8:47 AM · Restricted Project

Jul 13 2020

antiagainst added inline comments to D83679: [mlir][StandardToSPIRV] Fix conversion for signed remainder.
Jul 13 2020, 1:24 PM · Restricted Project
Herald added a project to D83714: [mlir][StandardToSPIRV] Use spv.UMod for index re-calculation: Restricted Project.
Jul 13 2020, 1:23 PM · Restricted Project
antiagainst committed rG4ba45a778a13: [mlir][StandardToSPIRV] Fix conversion for signed remainder (authored by antiagainst).
[mlir][StandardToSPIRV] Fix conversion for signed remainder
Jul 13 2020, 1:19 PM
antiagainst closed D83679: [mlir][StandardToSPIRV] Fix conversion for signed remainder.
Jul 13 2020, 1:19 PM · Restricted Project
antiagainst added inline comments to D83679: [mlir][StandardToSPIRV] Fix conversion for signed remainder.
Jul 13 2020, 1:15 PM · Restricted Project
antiagainst updated the diff for D83679: [mlir][StandardToSPIRV] Fix conversion for signed remainder.

Address comments

Jul 13 2020, 1:14 PM · Restricted Project
antiagainst added a comment to rGfb7ef0bb0b9c: [ORC] Generalize emit re-entry, stub, etc. APIs for working addr != link addr..

Looks to me #include <optional> is not really needed. Removed it via https://github.com/llvm/llvm-project/commit/9cafbf8f66c9596d8b31293830d8892db0837745.

Jul 13 2020, 11:44 AM
antiagainst committed rG9cafbf8f66c9: [NFC] Remove unused header include (authored by antiagainst).
[NFC] Remove unused header include
Jul 13 2020, 11:44 AM
antiagainst closed D83706: [NFC] Remove unused header include.
Jul 13 2020, 11:44 AM · Restricted Project
Herald added a project to D83706: [NFC] Remove unused header include: Restricted Project.
Jul 13 2020, 11:41 AM · Restricted Project
antiagainst added a comment to rGfb7ef0bb0b9c: [ORC] Generalize emit re-entry, stub, etc. APIs for working addr != link addr..

FYI: this breaks MLIR's buildbot https://buildkite.com/mlir/mlir-core/builds/6347#749c8761-2489-490e-bde9-edc50ea9207c

Jul 13 2020, 11:38 AM