mattd (Matt Davis)
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Nov 16 2017, 6:22 PM (34 w, 6 d)

Recent Activity

Today

mattd committed rL337496: [llvm-mca][docs] Add Timeline and How MCA works..
[llvm-mca][docs] Add Timeline and How MCA works.
Thu, Jul 19, 1:39 PM
mattd closed D49527: [llvm-mca][docs] Describe the Timeline View. NFC.
Thu, Jul 19, 1:39 PM
mattd added a comment to D49527: [llvm-mca][docs] Describe the Timeline View. NFC.

Thanks for the feedback @andreadb ! I've already made the suggested changes and will land that shortly.

Thu, Jul 19, 1:35 PM
mattd retitled D49527: [llvm-mca][docs] Describe the Timeline View. NFC from [llvm-mca][docs][WIP] Describe the Timeline View. NFC to [llvm-mca][docs] Describe the Timeline View. NFC.
Thu, Jul 19, 1:33 PM

Yesterday

mattd created D49527: [llvm-mca][docs] Describe the Timeline View. NFC.
Wed, Jul 18, 5:45 PM

Tue, Jul 17

mattd added a comment to D49436: [X86][BtVer2] correctly model the latency/throughput of LEA instructions..

I think it makes sense to have a separate patch for checkInvalidRegOperand. I do like that idea in particular, it simplifies reading the tablegen sources.

Tue, Jul 17, 5:38 PM
mattd updated the summary of D49431: [llvm-mca][docs][WIP] Initial work on an internals/views mca doc. NFC.
Tue, Jul 17, 9:41 AM
mattd created D49431: [llvm-mca][docs][WIP] Initial work on an internals/views mca doc. NFC.
Tue, Jul 17, 9:39 AM
mattd added a reverting commit for rL337225: [llvm-mca][docs] Add notes about cycle and resource callbacks. NFC.: rL337295: [llvm-mca][docs] Revert mca internals docs..
Tue, Jul 17, 9:17 AM
mattd committed rL337295: [llvm-mca][docs] Revert mca internals docs..
[llvm-mca][docs] Revert mca internals docs.
Tue, Jul 17, 9:17 AM

Mon, Jul 16

mattd committed rL337225: [llvm-mca][docs] Add notes about cycle and resource callbacks. NFC..
[llvm-mca][docs] Add notes about cycle and resource callbacks. NFC.
Mon, Jul 16, 4:55 PM
mattd committed rL337219: [llvm-mca][docs] Initial description of mca internals. NFC.
[llvm-mca][docs] Initial description of mca internals. NFC
Mon, Jul 16, 2:48 PM

Sat, Jul 14

mattd committed rL337113: [llvm-mca] Turn InstructionTables into a Stage..
[llvm-mca] Turn InstructionTables into a Stage.
Sat, Jul 14, 4:58 PM
mattd closed D49329: [llvm-mca] Turn InstructionTables into a Stage..
Sat, Jul 14, 4:57 PM
mattd added inline comments to D49329: [llvm-mca] Turn InstructionTables into a Stage..
Sat, Jul 14, 1:32 PM
mattd updated the diff for D49329: [llvm-mca] Turn InstructionTables into a Stage..
  • Move the adding of stages to the pipeline earlier, so that they automatically register view-listeners when views are added to the printer.
Sat, Jul 14, 1:30 PM
mattd added inline comments to D49329: [llvm-mca] Turn InstructionTables into a Stage..
Sat, Jul 14, 12:11 PM
mattd updated the diff for D49329: [llvm-mca] Turn InstructionTables into a Stage..
  • Removed some constified locals (my style/habit)
  • Yanked out the original Printer functionality from InstructionTables, and use the PipelinePrinter instead.
Sat, Jul 14, 12:10 PM

Fri, Jul 13

mattd added inline comments to D49329: [llvm-mca] Turn InstructionTables into a Stage..
Fri, Jul 13, 10:38 PM
mattd updated the summary of D49329: [llvm-mca] Turn InstructionTables into a Stage..
Fri, Jul 13, 10:38 PM
mattd committed rL337077: [llvm-mca] Remove unused InstRef formal from pre and post execute callbacks..
[llvm-mca] Remove unused InstRef formal from pre and post execute callbacks.
Fri, Jul 13, 5:15 PM
mattd added inline comments to D49329: [llvm-mca] Turn InstructionTables into a Stage..
Fri, Jul 13, 4:20 PM
mattd updated the summary of D49329: [llvm-mca] Turn InstructionTables into a Stage..
Fri, Jul 13, 4:18 PM
mattd created D49329: [llvm-mca] Turn InstructionTables into a Stage..
Fri, Jul 13, 4:17 PM
mattd added a comment to D49310: [llvm-mca][BtVer2] Teach how to identify dependency-breaking idioms..

This change LGTM, but you should let a few others take a peek before landing this.

Fri, Jul 13, 3:35 PM
mattd accepted D49196: [llvm-mca][BtVer2] teach how to identify false dependencies on partially written registers..

I'm happy with the changes made, and don't see anything obviously wrong, but you might want to wait a day/weekend to see if anyone else has anything to add. LGTM!

Fri, Jul 13, 9:51 AM

Thu, Jul 12

mattd committed rL336961: [llvm-mca] Constify SourceMgr::hasNext. NFC..
[llvm-mca] Constify SourceMgr::hasNext. NFC.
Thu, Jul 12, 4:24 PM
mattd committed rL336959: [llvm-mca] Add cycleBegin/cycleEnd callbacks to mca::Stage..
[llvm-mca] Add cycleBegin/cycleEnd callbacks to mca::Stage.
Thu, Jul 12, 4:05 PM
mattd closed D49250: [llvm-mca] Add cycleBegin/cycleEnd callbacks to mca::Stage..
Thu, Jul 12, 4:04 PM
mattd added a comment to D49250: [llvm-mca] Add cycleBegin/cycleEnd callbacks to mca::Stage..

Thanks for the review @andreadb! I'm totally fine with removing the Cycle formal. I added it because I thought that some user-defined Stage might find that data useful. Likewise, the pre/postExecute callbacks take InstRef references, but no existing function makes use of that either. I'd be happy to remove that InstRef formal as a NFC in another patch.

Thu, Jul 12, 3:26 PM
mattd added a comment to D49250: [llvm-mca] Add cycleBegin/cycleEnd callbacks to mca::Stage..

I just rebased this to fix a bad diff in the previous update.

Thu, Jul 12, 2:12 PM
mattd updated the diff for D49250: [llvm-mca] Add cycleBegin/cycleEnd callbacks to mca::Stage..
Thu, Jul 12, 2:09 PM
mattd updated the diff for D49250: [llvm-mca] Add cycleBegin/cycleEnd callbacks to mca::Stage..
Thu, Jul 12, 2:07 PM
mattd updated the diff for D49250: [llvm-mca] Add cycleBegin/cycleEnd callbacks to mca::Stage..

Moved the Instructions container cleanup to cycleEnd.

Thu, Jul 12, 10:24 AM
mattd committed rL336916: [llvm-mca] Simplify eventing by adding an onEvent templated method..
[llvm-mca] Simplify eventing by adding an onEvent templated method.
Thu, Jul 12, 10:01 AM
mattd closed D48672: [llvm-mca] Simplify eventing by adding an onEvent templated method..
Thu, Jul 12, 10:01 AM
mattd created D49250: [llvm-mca] Add cycleBegin/cycleEnd callbacks to mca::Stage..
Thu, Jul 12, 9:55 AM

Wed, Jul 11

mattd added a comment to D49034: [WIP] [WebAssembly] Move/clone DBG_VALUE during WebAssemblyRegStackify pass.

Thanks Yuri, it looks like you addressed my immediate concerns. I didn't see anything glaringly wrong, when I looked at the original patch. You should add a few reviewers and tag this as "debug-info" by editing the revision and updating the "Tags" field. That should get your patch a bit more exposure. Do you happen to have a smaller/reduced reproducer? I'm wondering how much of the test can be trimmed down, for instance, you declared a variable 't' but it's unused.

Wed, Jul 11, 7:00 PM · debug-info
mattd added a comment to D49203: [PM] Use getAnalysisIfAvailable / addUsedIfAvailable with StackProtector.

@thegameg - Good catch, and thanks for hunting this down.

Wed, Jul 11, 2:18 PM
mattd added inline comments to D49196: [llvm-mca][BtVer2] teach how to identify false dependencies on partially written registers..
Wed, Jul 11, 11:04 AM

Fri, Jul 6

mattd committed rL336456: [llvm-mca] Add HardwareUnit and Context classes..
[llvm-mca] Add HardwareUnit and Context classes.
Fri, Jul 6, 11:08 AM
mattd closed D48691: [llvm-mca] Add a HardwareUnit and Context classes..
Fri, Jul 6, 11:08 AM
mattd added inline comments to D49034: [WIP] [WebAssembly] Move/clone DBG_VALUE during WebAssemblyRegStackify pass.
Fri, Jul 6, 10:49 AM · debug-info
mattd added a comment to D48691: [llvm-mca] Add a HardwareUnit and Context classes..

Thanks @andreadb. I like your suggestions. I will make them, run some tests, and land the patch.

Fri, Jul 6, 9:43 AM

Tue, Jul 3

mattd added inline comments to D48691: [llvm-mca] Add a HardwareUnit and Context classes..
Tue, Jul 3, 11:48 AM
mattd updated the diff for D48691: [llvm-mca] Add a HardwareUnit and Context classes..
  • Made SrcMgr a required argument for constructing a default pipeline.
Tue, Jul 3, 11:42 AM
mattd updated the diff for D48691: [llvm-mca] Add a HardwareUnit and Context classes..
  • Updated the Context{.h,cpp} comment to be a bit more specific about what 'utility' routines it possesses.
  • Added a mca::PipelineOptions for simplifying the creation of the default out-of-order pipeline.
Tue, Jul 3, 11:35 AM

Mon, Jul 2

mattd added a comment to D48691: [llvm-mca] Add a HardwareUnit and Context classes..

Thanks for the review @andreadb!

Mon, Jul 2, 2:38 PM
mattd updated the diff for D48691: [llvm-mca] Add a HardwareUnit and Context classes..
  • Pinned HardwareUnit's vtable using the dtor.
  • Updated the text to refer to "unit" instead of "component" in certain places.
  • Moved the Context construction outside of the code-region loop.
Mon, Jul 2, 2:38 PM
mattd added a comment to D48691: [llvm-mca] Add a HardwareUnit and Context classes..

Thanks for the review @courbet!

Mon, Jul 2, 10:07 AM
mattd updated the diff for D48691: [llvm-mca] Add a HardwareUnit and Context classes..
  • Removed a comment.
  • Pinned the HardwareUnit's vtable in HardwareUnit.cpp
Mon, Jul 2, 10:06 AM

Thu, Jun 28

mattd committed rL335885: [llvm-mca] Delete Pipeline's copy ctor and assignement operator..
[llvm-mca] Delete Pipeline's copy ctor and assignement operator.
Thu, Jun 28, 10:38 AM

Wed, Jun 27

mattd created D48691: [llvm-mca] Add a HardwareUnit and Context classes..
Wed, Jun 27, 5:20 PM
mattd created D48672: [llvm-mca] Simplify eventing by adding an onEvent templated method..
Wed, Jun 27, 2:17 PM
mattd committed rL335748: [llvm-mca] Register listeners with stages; remove Pipeline dependency from….
[llvm-mca] Register listeners with stages; remove Pipeline dependency from…
Wed, Jun 27, 9:14 AM
mattd closed D48576: [llvm-mca] Register listeners with stages; remove Pipeline dependency from Stage..
Wed, Jun 27, 9:14 AM

Tue, Jun 26

mattd committed rL335697: [llvm-mca] Add a comment to Stage::execute and fix a spelling error. NFC..
[llvm-mca] Add a comment to Stage::execute and fix a spelling error. NFC.
Tue, Jun 26, 5:58 PM
mattd added inline comments to D48576: [llvm-mca] Register listeners with stages; remove Pipeline dependency from Stage..
Tue, Jun 26, 11:04 AM
mattd updated the diff for D48576: [llvm-mca] Register listeners with stages; remove Pipeline dependency from Stage..
  • Added a const accessor for the Stages::Listeners set.
Tue, Jun 26, 11:03 AM

Mon, Jun 25

mattd abandoned D47306: [llvm-mca] Register listeners with the Stage instances..
Mon, Jun 25, 4:48 PM
mattd added a comment to D47306: [llvm-mca] Register listeners with the Stage instances..

Abandoning in favor of https://reviews.llvm.org/D48576

Mon, Jun 25, 4:48 PM
mattd created D48576: [llvm-mca] Register listeners with stages; remove Pipeline dependency from Stage..
Mon, Jun 25, 4:47 PM
mattd committed rL335496: [llvm-mca] Rename Backend to Pipeline. NFC..
[llvm-mca] Rename Backend to Pipeline. NFC.
Mon, Jun 25, 9:57 AM
mattd closed D48496: [llvm-mca] Rename Backend to Pipeline. NFC..
Mon, Jun 25, 9:57 AM
mattd added a comment to D48496: [llvm-mca] Rename Backend to Pipeline. NFC..

Thanks for the feedback. I'll make the changes and land the patch.

Mon, Jun 25, 9:50 AM

Fri, Jun 22

mattd committed rL335392: [llvm-mca] Remove unnecessary include and forward decl in RCU. NFC..
[llvm-mca] Remove unnecessary include and forward decl in RCU. NFC.
Fri, Jun 22, 2:40 PM
mattd created D48496: [llvm-mca] Rename Backend to Pipeline. NFC..
Fri, Jun 22, 10:56 AM
mattd committed rL335361: [llvm-mca] Introduce a sequential container of Stages.
[llvm-mca] Introduce a sequential container of Stages
Fri, Jun 22, 9:22 AM
mattd closed D46907: [llvm-mca] Introduce a sequential container of Stages.
Fri, Jun 22, 9:21 AM

Thu, Jun 21

mattd added inline comments to D46907: [llvm-mca] Introduce a sequential container of Stages.
Thu, Jun 21, 4:16 PM
mattd updated the diff for D46907: [llvm-mca] Introduce a sequential container of Stages.

This change lifts the component initialization (stages and simulated hardware bits) out of Backend and into llvm-mca. That code will eventually be exposed as initializeDefaultPipeline. This patch removes the ownership of the simulated hardware pieces (Scheduler, RegisterFile, etc) from the Backend. Now a user can create stages using the simulated hardware components without having to enforce that the Backend own those components. That happens to simplify pipeline construction; however, we'll eventually need to pass ownership of the hardware with the stages. But for now, the patch just decouples hardware, stages, and the backend.

Thu, Jun 21, 4:14 PM
mattd added a comment to D45637: [DebugInfo] Ignore DBG_VALUE instructions in PostRA Machine Sink.

I have filed PR37897 to keep track of the issue mentioned above: The sinking, or more generally moving, of dbg values across other dbg values.
https://bugs.llvm.org/show_bug.cgi?id=37897

Thu, Jun 21, 11:34 AM · debug-info
mattd committed rL335264: [DebugInfo] Ignore DBG_VALUE instructions in PostRA Machine Sink.
[DebugInfo] Ignore DBG_VALUE instructions in PostRA Machine Sink
Thu, Jun 21, 11:04 AM
mattd closed D45637: [DebugInfo] Ignore DBG_VALUE instructions in PostRA Machine Sink.
Thu, Jun 21, 11:04 AM · debug-info
mattd added a comment to D45637: [DebugInfo] Ignore DBG_VALUE instructions in PostRA Machine Sink.

Thanks again for all of the input on this issue.

Thu, Jun 21, 8:46 AM · debug-info

Wed, Jun 20

mattd added a comment to D45637: [DebugInfo] Ignore DBG_VALUE instructions in PostRA Machine Sink.

@aprantl Thanks for example.

Wed, Jun 20, 2:59 PM · debug-info
mattd added inline comments to D45637: [DebugInfo] Ignore DBG_VALUE instructions in PostRA Machine Sink.
Wed, Jun 20, 12:24 PM · debug-info
mattd added a comment to D45637: [DebugInfo] Ignore DBG_VALUE instructions in PostRA Machine Sink.

Just pinging this. @bjope has provided great feedback (thanks!), but I am wondering if anyone else thinks this patch is useful, or if I should abandon it in favor of some other solution?

Wed, Jun 20, 10:00 AM · debug-info

Jun 19 2018

mattd committed rL335066: [MIRParser] Update a diagnostic message to use the correct register sigil. NFC.
[MIRParser] Update a diagnostic message to use the correct register sigil. NFC
Jun 19 2018, 11:44 AM
mattd closed D48086: [MIRParser] Update a diagnostic message to use the correct register sigil. NFC.
Jun 19 2018, 11:44 AM
mattd added a comment to D48086: [MIRParser] Update a diagnostic message to use the correct register sigil. NFC.

Thanks for the review @bjope!

Jun 19 2018, 10:49 AM
mattd added a comment to D48086: [MIRParser] Update a diagnostic message to use the correct register sigil. NFC.

Ping. Just checking back in to make sure that this patch makes sense.

Jun 19 2018, 10:24 AM
mattd updated the diff for D46907: [llvm-mca] Introduce a sequential container of Stages.
Jun 19 2018, 9:58 AM
mattd added inline comments to D48225: [llvm-mca][X86] Teach how to identify register writes that implicitly clear the upper portion of a super-register..
Jun 19 2018, 8:34 AM
mattd added a comment to D48225: [llvm-mca][X86] Teach how to identify register writes that implicitly clear the upper portion of a super-register..

I'm cool with the patch. I don't see anything wrong.

Jun 19 2018, 8:23 AM

Jun 18 2018

mattd committed rL334986: [llvm-mca] Cleanup the header syntax line. Fix a comment. NFC..
[llvm-mca] Cleanup the header syntax line. Fix a comment. NFC.
Jun 18 2018, 2:45 PM
mattd added a comment to D47874: [SCEVExp] Advance found insertion point until we find a non-dbg instruction..

Didn't we recently add a more convenient mechanism to determine all meta-instructions? Or am I misremembering and that was MIR?

Jun 18 2018, 2:31 PM

Jun 16 2018

mattd abandoned D48248: [llvm-mca] Create subdirectories for various pieces of MCA. NFC..
Jun 16 2018, 10:16 AM

Jun 15 2018

mattd created D48248: [llvm-mca] Create subdirectories for various pieces of MCA. NFC..
Jun 15 2018, 4:16 PM
mattd added inline comments to D48225: [llvm-mca][X86] Teach how to identify register writes that implicitly clear the upper portion of a super-register..
Jun 15 2018, 11:02 AM
mattd added a comment to D48225: [llvm-mca][X86] Teach how to identify register writes that implicitly clear the upper portion of a super-register..

I like the fact that we can now keep track of the implicit zero of the upper register bits. Very cool. This change makes sense, and as far as I can tell it looks good, but I'd wait for a few others to weigh in.

Jun 15 2018, 10:12 AM

Jun 14 2018

mattd updated the diff for D46907: [llvm-mca] Introduce a sequential container of Stages.
Jun 14 2018, 5:40 PM
mattd committed rL334770: [llvm-mca] Clean up the header comment. NFC..
[llvm-mca] Clean up the header comment. NFC.
Jun 14 2018, 2:03 PM

Jun 13 2018

mattd committed rL334679: [llvm-mca] Introduce the ExecuteStage (was originally the Scheduler class)..
[llvm-mca] Introduce the ExecuteStage (was originally the Scheduler class).
Jun 13 2018, 6:24 PM
mattd closed D47246: [llvm-mca] Introduce the ExecuteStage (was originally the Scheduler class)..
Jun 13 2018, 6:24 PM
mattd updated the diff for D47246: [llvm-mca] Introduce the ExecuteStage (was originally the Scheduler class)..

Thanks for the review @andreadb! I updated this based on your suggestions.

Jun 13 2018, 2:16 PM
mattd added inline comments to D47246: [llvm-mca] Introduce the ExecuteStage (was originally the Scheduler class)..
Jun 13 2018, 10:21 AM
mattd added a comment to D45637: [DebugInfo] Ignore DBG_VALUE instructions in PostRA Machine Sink.

That's a great explanation, thank you!

Jun 13 2018, 9:37 AM · debug-info

Jun 12 2018

mattd added a comment to D45637: [DebugInfo] Ignore DBG_VALUE instructions in PostRA Machine Sink.

@bjope , Thanks for your review and example! I agree that any changes to improve performSink/collectDebugValues should probably be in another patch.

Jun 12 2018, 3:03 PM · debug-info
mattd added a comment to D48086: [MIRParser] Update a diagnostic message to use the correct register sigil. NFC.

It looks like you simply missed the diagnostic, and not any functional part. I only discovered it because I was messing around with a .mir test and noticed the error message. I'm guessing your search/replace didn't cover the case of an isolated '$'

Jun 12 2018, 11:55 AM