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Differential D135934

[X86] Add MSRLIST instructions.
ClosedPublic

Authored by FreddyYe on Oct 13 2022, 8:04 PM.

Details

Reviewers
LuoYuanke
pengfei
skan
RKSimon
Commits
rGe3df4ba9d277: [X86] Add MSRLIST instructions.
Summary

For more details about these instructions, please refer to the latest ISE document: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

Diff Detail

Event Timeline

FreddyYe created this revision.Oct 13 2022, 8:04 PM
Herald added a project: Restricted Project. · View Herald TranscriptOct 13 2022, 8:04 PM
Herald added subscribers: pengfei, hiraditya. · View Herald Transcript
FreddyYe requested review of this revision.Oct 13 2022, 8:04 PM
Herald added a project: Restricted Project. · View Herald TranscriptOct 13 2022, 8:04 PM
Herald added a subscriber: llvm-commits. · View Herald Transcript
FreddyYe retitled this revision from Add MSRLIST instructions. to [X86] Add MSRLIST instructions..Oct 13 2022, 8:16 PM
FreddyYe added reviewers: LuoYuanke, pengfei, skan, RKSimon.Oct 13 2022, 8:30 PM
Harbormaster completed remote builds in B192107: Diff 467669.Oct 13 2022, 9:24 PM
RKSimon added inline comments.Oct 14 2022, 1:21 AM
llvm/docs/ReleaseNotes.rst
139

It'd be better to list the instructions as well (WRMSRNLIST and RDMSRNLIST)

FreddyYe updated this revision to Diff 468388.Oct 17 2022, 6:43 PM
FreddyYe marked an inline comment as done.

Address comment.

craig.topper added a subscriber: craig.topper.Oct 17 2022, 6:52 PM
craig.topper added inline comments.
llvm/lib/Target/X86/X86InstrSystem.td
432

why is there an N in the class name that isn't in the mnemonic?

FreddyYe updated this revision to Diff 468392.Oct 17 2022, 6:58 PM

Address comment.

FreddyYe marked an inline comment as done.Oct 17 2022, 6:59 PM
FreddyYe added inline comments.
llvm/lib/Target/X86/X86InstrSystem.td
432

Yes, N is typo... Good catch!

Harbormaster completed remote builds in B192633: Diff 468392.Oct 17 2022, 7:40 PM
RKSimon accepted this revision.Oct 18 2022, 2:37 AM

LGTM (with a minor tweak to the release notes description)

llvm/docs/ReleaseNotes.rst
139

Add support for the `RDMSRLIST and WRMSRLIST` instructions.

This revision is now accepted and ready to land.Oct 18 2022, 2:37 AM
skan added inline comments.Oct 18 2022, 3:53 AM
llvm/lib/Target/X86/X86InstrSystem.td
434

Could we combine the line 431 and 433?

FreddyYe updated this revision to Diff 468503.Oct 18 2022, 5:45 AM
FreddyYe marked 3 inline comments as done.

Address comments.

Harbormaster completed remote builds in B192720: Diff 468503.Oct 18 2022, 6:48 AM
skan accepted this revision.Oct 18 2022, 7:16 AM

LGTM

This revision was landed with ongoing or failed builds.Oct 18 2022, 7:37 PM
Closed by commit rGe3df4ba9d277: [X86] Add MSRLIST instructions. (authored by FreddyYe). · Explain Why
This revision was automatically updated to reflect the committed changes.
FreddyYe added a commit: rGe3df4ba9d277: [X86] Add MSRLIST instructions..
mtrofin mentioned this in rGbb7b0a2dab91: [mlgo] Fix one test post-D135934.Oct 19 2022, 1:49 PM

Revision Contents

PathSize
llvm/
docs/
2 lines
lib/
Target/
X86/
5 lines
test/
MC/
Disassembler/
X86/
10 lines
X86/
10 lines

Diff 468766

llvm/docs/ReleaseNotes.rst

Show First 20 Lines • Show All 130 Lines • ▼ Show 20 Lines
* For MinGW, generate embedded ``-exclude-symbols:`` directives for symbols * For MinGW, generate embedded ``-exclude-symbols:`` directives for symbols
with hidden visibility, omitting them from automatic export of all symbols. with hidden visibility, omitting them from automatic export of all symbols.
This roughly makes hidden visibility work like it does for other object This roughly makes hidden visibility work like it does for other object
file formats. file formats.
Changes to the X86 Backend Changes to the X86 Backend
-------------------------- --------------------------
* Add support for the ``RDMSRLIST and WRMSRLIST`` instructions.
RKSimonUnsubmitted
Done
ReplyInline Actions

It'd be better to list the instructions as well (WRMSRNLIST and RDMSRNLIST)

RKSimon: It'd be better to list the instructions as well (WRMSRNLIST and RDMSRNLIST)
RKSimonUnsubmitted
Done
ReplyInline Actions

Add support for the `RDMSRLIST and WRMSRLIST` instructions.

RKSimon: Add support for the ``RDMSRLIST`` and ``WRMSRLIST`` instructions.
Changes to the OCaml bindings Changes to the OCaml bindings
----------------------------- -----------------------------
Changes to the C API Changes to the C API
-------------------- --------------------
* The following functions for creating constant expressions have been removed, * The following functions for creating constant expressions have been removed,
▲ Show 20 Lines • Show All 68 Lines • Show Last 20 Lines

llvm/lib/Target/X86/X86InstrSystem.td

Show First 20 Lines • Show All 422 Lines • ▼ Show 20 Lines
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Specialized register support // Specialized register support
let SchedRW = [WriteSystem] in { let SchedRW = [WriteSystem] in {
let Uses = [EAX, ECX, EDX] in let Uses = [EAX, ECX, EDX] in
def WRMSR : I<0x30, RawFrm, (outs), (ins), "wrmsr", []>, TB; def WRMSR : I<0x30, RawFrm, (outs), (ins), "wrmsr", []>, TB;
let Defs = [EAX, EDX], Uses = [ECX] in let Defs = [EAX, EDX], Uses = [ECX] in
def RDMSR : I<0x32, RawFrm, (outs), (ins), "rdmsr", []>, TB; def RDMSR : I<0x32, RawFrm, (outs), (ins), "rdmsr", []>, TB;
let Uses = [RSI, RDI, RCX], Predicates = [In64BitMode] in {
def WRMSRLIST : I<0x01, MRM_C6, (outs), (ins), "wrmsrlist", []>, XS;
craig.topperUnsubmitted
Done
ReplyInline Actions

why is there an N in the class name that isn't in the mnemonic?

craig.topper: why is there an N in the class name that isn't in the mnemonic?
FreddyYeAuthorUnsubmitted
Done
ReplyInline Actions

Yes, N is typo... Good catch!

FreddyYe: Yes, N is typo... Good catch!
def RDMSRLIST : I<0x01, MRM_C6, (outs), (ins), "rdmsrlist", []>, XD;
}
skanUnsubmitted
Done
ReplyInline Actions

Could we combine the line 431 and 433?

skan: Could we combine the line 431 and 433?
let Defs = [RAX, RDX], Uses = [ECX] in let Defs = [RAX, RDX], Uses = [ECX] in
def RDPMC : I<0x33, RawFrm, (outs), (ins), "rdpmc", []>, TB; def RDPMC : I<0x33, RawFrm, (outs), (ins), "rdpmc", []>, TB;
def SMSW16r : I<0x01, MRM4r, (outs GR16:$dst), (ins), def SMSW16r : I<0x01, MRM4r, (outs GR16:$dst), (ins),
"smsw{w}\t$dst", []>, OpSize16, TB; "smsw{w}\t$dst", []>, OpSize16, TB;
def SMSW32r : I<0x01, MRM4r, (outs GR32:$dst), (ins), def SMSW32r : I<0x01, MRM4r, (outs GR32:$dst), (ins),
"smsw{l}\t$dst", []>, OpSize32, TB; "smsw{l}\t$dst", []>, OpSize32, TB;
// no m form encodable; use SMSW16m // no m form encodable; use SMSW16m
▲ Show 20 Lines • Show All 325 Lines • Show Last 20 Lines

llvm/test/MC/Disassembler/X86/x86-64-msrlist.txt

  • This file was added.
# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
# ATT: rdmsrlist
# INTEL: rdmsrlist
0xf2,0x0f,0x01,0xc6
# ATT: wrmsrlist
# INTEL: wrmsrlist
0xf3,0x0f,0x01,0xc6

llvm/test/MC/X86/x86-64-msrlist.s

  • This file was added.
// RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
// RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
// CHECK: rdmsrlist
// CHECK: encoding: [0xf2,0x0f,0x01,0xc6]
rdmsrlist
// CHECK: wrmsrlist
// CHECK: encoding: [0xf3,0x0f,0x01,0xc6]
wrmsrlist