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Differential D117920

[RISCV] Decouple V and Zve64*
AbandonedPublic

Authored by eopXD on Jan 21 2022, 12:51 PM.

Details

Reviewers
craig.topper
asb
Summary

Now with existing macros to imply elen and elen_fp for rvv, we should decouple
the implication between V and Zve*.

Diff Detail

Unit TestsFailed

TimeTest
90 msx64 debian > LLVM.MC/RISCV::attribute-arch.s

Event Timeline

eopXD created this revision.Jan 21 2022, 12:51 PM
Herald added subscribers: VincentWu, luke957, achieveartificialintelligence and 26 others. · View Herald TranscriptJan 21 2022, 12:51 PM
eopXD requested review of this revision.Jan 21 2022, 12:51 PM
Herald added projects: Restricted Project, Restricted Project. · View Herald TranscriptJan 21 2022, 12:51 PM
Herald added subscribers: llvm-commits, cfe-commits, MaskRay. · View Herald Transcript
eopXD updated this revision to Diff 402080.Jan 21 2022, 12:52 PM

Update code.

eopXD updated this revision to Diff 402085.Jan 21 2022, 12:53 PM

Update code.

Harbormaster completed remote builds in B144914: Diff 402085.Jan 21 2022, 3:04 PM
eopXD updated this revision to Diff 402170.Jan 21 2022, 8:50 PM

Update code: adjust testcase due to change of implication.

Harbormaster completed remote builds in B144978: Diff 402170.Jan 21 2022, 9:32 PM
eopXD updated this revision to Diff 402172.Jan 21 2022, 9:40 PM

Update code.

jacquesguan added a subscriber: jacquesguan.Jan 21 2022, 10:23 PM

I did some similar change in my revision https://reviews.llvm.org/D117854.

eopXD abandoned this revision.Jan 21 2022, 10:25 PM
In D117920#3263202, @jacquesguan wrote:

I did some similar change in my revision https://reviews.llvm.org/D117854.

Yeah I guess we can do that all in one commit.
Thank you for doing it.

Harbormaster completed remote builds in B144980: Diff 402172.Jan 21 2022, 10:28 PM

Revision Contents

PathSize
llvm/
lib/
Support/
5 lines
test/
MC/
RISCV/
28 lines

Diff 402170

llvm/lib/Support/RISCVISAInfo.cpp

Show First 20 Lines • Show All 726 Lines • ▼ Show 20 LinesError RISCVISAInfo::checkDependency() {
// Additional dependency checks. // Additional dependency checks.
// TODO: The 'q' extension requires rv64. // TODO: The 'q' extension requires rv64.
// TODO: It is illegal to specify 'e' extensions with 'f' and 'd'. // TODO: It is illegal to specify 'e' extensions with 'f' and 'd'.
return Error::success(); return Error::success();
} }
static const char *ImpliedExtsV[] = {"zvl128b", "zve64d", "f", "d"}; static const char *ImpliedExtsV[] = {"zvl128b", "zve32x", "f", "d"};
static const char *ImpliedExtsZfh[] = {"zfhmin"}; static const char *ImpliedExtsZfh[] = {"zfhmin"};
static const char *ImpliedExtsZve64d[] = {"zve64f"}; static const char *ImpliedExtsZve64d[] = {"zve64f"};
static const char *ImpliedExtsZve64f[] = {"zve64x", "zve32f"}; static const char *ImpliedExtsZve64f[] = {"zve64x", "zve32f"};
static const char *ImpliedExtsZve64x[] = {"zve32x", "zvl64b"}; static const char *ImpliedExtsZve64x[] = {"zve32x", "zvl64b"};
static const char *ImpliedExtsZve32f[] = {"zve32x"}; static const char *ImpliedExtsZve32f[] = {"zve32x"};
static const char *ImpliedExtsZve32x[] = {"zvl32b"}; static const char *ImpliedExtsZve32x[] = {"zvl32b"};
static const char *ImpliedExtsZvl65536b[] = {"zvl32768b"}; static const char *ImpliedExtsZvl65536b[] = {"zvl32768b"};
static const char *ImpliedExtsZvl32768b[] = {"zvl16384b"}; static const char *ImpliedExtsZvl32768b[] = {"zvl16384b"};
▲ Show 20 Lines • Show All 95 Lines • ▼ Show 20 Lines for (auto Ext : Exts) {
} }
} }
} }
void RISCVISAInfo::updateMaxELen() { void RISCVISAInfo::updateMaxELen() {
// handles EEW restriction by sub-extension zve // handles EEW restriction by sub-extension zve
for (auto Ext : Exts) { for (auto Ext : Exts) {
StringRef ExtName = Ext.first; StringRef ExtName = Ext.first;
if (ExtName == "v") {
MaxELen = MaxELenFp = 64;
}
bool IsZveExt = ExtName.consume_front("zve"); bool IsZveExt = ExtName.consume_front("zve");
if (IsZveExt) { if (IsZveExt) {
if (ExtName.back() == 'f') if (ExtName.back() == 'f')
MaxELenFp = std::max(MaxELenFp, 32u); MaxELenFp = std::max(MaxELenFp, 32u);
if (ExtName.back() == 'd') if (ExtName.back() == 'd')
MaxELenFp = std::max(MaxELenFp, 64u); MaxELenFp = std::max(MaxELenFp, 64u);
ExtName = ExtName.drop_back(); ExtName = ExtName.drop_back();
unsigned ZveELen; unsigned ZveELen;
Show All 36 Lines

llvm/test/MC/RISCV/attribute-arch.s

Show All 30 Lines
# CHECK: attribute 5, "rv32i2p0_m2p0_a2p0_f2p0_d2p0_c2p0" # CHECK: attribute 5, "rv32i2p0_m2p0_a2p0_f2p0_d2p0_c2p0"
.attribute arch, "rv32ima2p0_fdc" .attribute arch, "rv32ima2p0_fdc"
# CHECK: attribute 5, "rv32i2p0_m2p0_a2p0_f2p0_d2p0_c2p0" # CHECK: attribute 5, "rv32i2p0_m2p0_a2p0_f2p0_d2p0_c2p0"
## Experimental extensions require version string to be explicitly specified ## Experimental extensions require version string to be explicitly specified
.attribute arch, "rv32iv1p0" .attribute arch, "rv32iv1p0"
# CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0" # CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0"
.attribute arch, "rv32izba1p0" .attribute arch, "rv32izba1p0"
# CHECK: attribute 5, "rv32i2p0_zba1p0" # CHECK: attribute 5, "rv32i2p0_zba1p0"
.attribute arch, "rv32izbb1p0" .attribute arch, "rv32izbb1p0"
# CHECK: attribute 5, "rv32i2p0_zbb1p0" # CHECK: attribute 5, "rv32i2p0_zbb1p0"
.attribute arch, "rv32izbc1p0" .attribute arch, "rv32izbc1p0"
Show All 22 Lines
.attribute arch, "rv32ifzfhmin1p0" .attribute arch, "rv32ifzfhmin1p0"
# CHECK: attribute 5, "rv32i2p0_f2p0_zfhmin1p0" # CHECK: attribute 5, "rv32i2p0_f2p0_zfhmin1p0"
.attribute arch, "rv32ifzfh1p0" .attribute arch, "rv32ifzfh1p0"
# CHECK: attribute 5, "rv32i2p0_f2p0_zfh1p0_zfhmin1p0" # CHECK: attribute 5, "rv32i2p0_f2p0_zfh1p0_zfhmin1p0"
.attribute arch, "rv32iv1p0" .attribute arch, "rv32iv1p0"
# CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0" # CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0"
.attribute arch, "rv32iv1p0zvl32b1p0" .attribute arch, "rv32iv1p0zvl32b1p0"
# CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0" # CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0"
.attribute arch, "rv32iv1p0zvl64b1p0" .attribute arch, "rv32iv1p0zvl64b1p0"
# CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0" # CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0"
.attribute arch, "rv32iv1p0zvl128b1p0" .attribute arch, "rv32iv1p0zvl128b1p0"
# CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0" # CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0"
.attribute arch, "rv32iv1p0zvl256b1p0" .attribute arch, "rv32iv1p0zvl256b1p0"
# CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl256b1p0_zvl32b1p0_zvl64b1p0" # CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zvl128b1p0_zvl256b1p0_zvl32b1p0_zvl64b1p0"
.attribute arch, "rv32iv1p0zvl512b1p0" .attribute arch, "rv32iv1p0zvl512b1p0"
# CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl256b1p0_zvl32b1p0_zvl512b1p0_zvl64b1p0" # CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zvl128b1p0_zvl256b1p0_zvl32b1p0_zvl512b1p0_zvl64b1p0"
.attribute arch, "rv32iv1p0zvl1024b1p0" .attribute arch, "rv32iv1p0zvl1024b1p0"
# CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl1024b1p0_zvl128b1p0_zvl256b1p0_zvl32b1p0_zvl512b1p0_zvl64b1p0" # CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zvl1024b1p0_zvl128b1p0_zvl256b1p0_zvl32b1p0_zvl512b1p0_zvl64b1p0"
.attribute arch, "rv32iv1p0zvl2048b1p0" .attribute arch, "rv32iv1p0zvl2048b1p0"
# CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl1024b1p0_zvl128b1p0_zvl2048b1p0_zvl256b1p0_zvl32b1p0_zvl512b1p0_zvl64b1p0" # CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zvl1024b1p0_zvl128b1p0_zvl2048b1p0_zvl256b1p0_zvl32b1p0_zvl512b1p0_zvl64b1p0"
.attribute arch, "rv32iv1p0zvl4096b1p0" .attribute arch, "rv32iv1p0zvl4096b1p0"
# CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl1024b1p0_zvl128b1p0_zvl2048b1p0_zvl256b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0" # CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zvl1024b1p0_zvl128b1p0_zvl2048b1p0_zvl256b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0"
.attribute arch, "rv32iv1p0zvl8192b1p0" .attribute arch, "rv32iv1p0zvl8192b1p0"
# CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl1024b1p0_zvl128b1p0_zvl2048b1p0_zvl256b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0_zvl8192b1p0" # CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zvl1024b1p0_zvl128b1p0_zvl2048b1p0_zvl256b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0_zvl8192b1p0"
.attribute arch, "rv32iv1p0zvl16384b1p0" .attribute arch, "rv32iv1p0zvl16384b1p0"
# CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl1024b1p0_zvl128b1p0_zvl16384b1p0_zvl2048b1p0_zvl256b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0_zvl8192b1p0" # CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zvl1024b1p0_zvl128b1p0_zvl16384b1p0_zvl2048b1p0_zvl256b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0_zvl8192b1p0"
.attribute arch, "rv32iv1p0zvl32768b1p0" .attribute arch, "rv32iv1p0zvl32768b1p0"
# CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl1024b1p0_zvl128b1p0_zvl16384b1p0_zvl2048b1p0_zvl256b1p0_zvl32768b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0_zvl8192b1p0" # CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zvl1024b1p0_zvl128b1p0_zvl16384b1p0_zvl2048b1p0_zvl256b1p0_zvl32768b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0_zvl8192b1p0"
.attribute arch, "rv32iv1p0zvl65536b1p0" .attribute arch, "rv32iv1p0zvl65536b1p0"
# CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl1024b1p0_zvl128b1p0_zvl16384b1p0_zvl2048b1p0_zvl256b1p0_zvl32768b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0_zvl65536b1p0_zvl8192b1p0" # CHECK: attribute 5, "rv32i2p0_f2p0_d2p0_v1p0_zvl1024b1p0_zvl128b1p0_zvl16384b1p0_zvl2048b1p0_zvl256b1p0_zvl32768b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0_zvl65536b1p0_zvl8192b1p0"
.attribute arch, "rv32i_zve32x1p0" .attribute arch, "rv32i_zve32x1p0"
# CHECK: attribute 5, "rv32i2p0_zve32x1p0_zvl32b1p0" # CHECK: attribute 5, "rv32i2p0_zve32x1p0_zvl32b1p0"
.attribute arch, "rv32if_zve32f1p0" .attribute arch, "rv32if_zve32f1p0"
# CHECK: attribute 5, "rv32i2p0_f2p0_zve32f1p0_zve32x1p0_zvl32b1p0" # CHECK: attribute 5, "rv32i2p0_f2p0_zve32f1p0_zve32x1p0_zvl32b1p0"
.attribute arch, "rv32i_zve64x1p0" .attribute arch, "rv32i_zve64x1p0"
Show All 10 Lines