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Differential D97010

AMDGPU/ELF: Sort MACHs by value and add missing reserved MACHs
ClosedPublic

Authored by kzhuravl on Feb 18 2021, 5:00 PM.

Details

Reviewers
rampitec
tra
t-tye
Commits
rG71d1f785a5a6: AMDGPU/ELF: Sort MACHs by value and add missing reserved MACHs
Summary
  • Sort MACHs by its value
  • Add missing reserved MACHs
    • EF_AMDGPU_MACH_AMDGCN_RESERVED_0X3D
    • EF_AMDGPU_MACH_AMDGCN_RESERVED_0X3E

Diff Detail

Event Timeline

kzhuravl created this revision.Feb 18 2021, 5:00 PM
Herald added subscribers: tpr, dstuttard, yaxunl. · View Herald TranscriptFeb 18 2021, 5:00 PM
kzhuravl requested review of this revision.Feb 18 2021, 5:00 PM
Herald added a project: Restricted Project. · View Herald TranscriptFeb 18 2021, 5:00 PM
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kzhuravl updated this revision to Diff 324818.Feb 18 2021, 5:02 PM

Update docs.

Herald added subscribers: kerbowa, nhaehnle, jvesely. · View Herald TranscriptFeb 18 2021, 5:02 PM
kzhuravl mentioned this in D96906: [AMDGPU] gfx90a support.Feb 18 2021, 5:04 PM
rampitec accepted this revision.Feb 18 2021, 5:06 PM

Thanks, Konstantin!

This revision is now accepted and ready to land.Feb 18 2021, 5:06 PM
tra accepted this revision.Feb 18 2021, 5:34 PM
Closed by commit rG71d1f785a5a6: AMDGPU/ELF: Sort MACHs by value and add missing reserved MACHs (authored by kzhuravl). · Explain WhyFeb 18 2021, 5:46 PM
This revision was automatically updated to reflect the committed changes.
kzhuravl added a commit: rG71d1f785a5a6: AMDGPU/ELF: Sort MACHs by value and add missing reserved MACHs.

Revision Contents

PathSize
llvm/
include/
llvm/
BinaryFormat/
4 lines

Diff 324816

llvm/include/llvm/BinaryFormat/ELF.h

Show First 20 Lines • Show All 713 Lines • ▼ Show 20 Linesenum : unsigned {
EF_AMDGPU_MACH_AMDGCN_GFX803 = 0x02a, EF_AMDGPU_MACH_AMDGCN_GFX803 = 0x02a,
EF_AMDGPU_MACH_AMDGCN_GFX810 = 0x02b, EF_AMDGPU_MACH_AMDGCN_GFX810 = 0x02b,
EF_AMDGPU_MACH_AMDGCN_GFX900 = 0x02c, EF_AMDGPU_MACH_AMDGCN_GFX900 = 0x02c,
EF_AMDGPU_MACH_AMDGCN_GFX902 = 0x02d, EF_AMDGPU_MACH_AMDGCN_GFX902 = 0x02d,
EF_AMDGPU_MACH_AMDGCN_GFX904 = 0x02e, EF_AMDGPU_MACH_AMDGCN_GFX904 = 0x02e,
EF_AMDGPU_MACH_AMDGCN_GFX906 = 0x02f, EF_AMDGPU_MACH_AMDGCN_GFX906 = 0x02f,
EF_AMDGPU_MACH_AMDGCN_GFX908 = 0x030, EF_AMDGPU_MACH_AMDGCN_GFX908 = 0x030,
EF_AMDGPU_MACH_AMDGCN_GFX909 = 0x031, EF_AMDGPU_MACH_AMDGCN_GFX909 = 0x031,
EF_AMDGPU_MACH_AMDGCN_GFX90A = 0x03f,
EF_AMDGPU_MACH_AMDGCN_GFX90C = 0x032, EF_AMDGPU_MACH_AMDGCN_GFX90C = 0x032,
EF_AMDGPU_MACH_AMDGCN_GFX1010 = 0x033, EF_AMDGPU_MACH_AMDGCN_GFX1010 = 0x033,
EF_AMDGPU_MACH_AMDGCN_GFX1011 = 0x034, EF_AMDGPU_MACH_AMDGCN_GFX1011 = 0x034,
EF_AMDGPU_MACH_AMDGCN_GFX1012 = 0x035, EF_AMDGPU_MACH_AMDGCN_GFX1012 = 0x035,
EF_AMDGPU_MACH_AMDGCN_GFX1030 = 0x036, EF_AMDGPU_MACH_AMDGCN_GFX1030 = 0x036,
EF_AMDGPU_MACH_AMDGCN_GFX1031 = 0x037, EF_AMDGPU_MACH_AMDGCN_GFX1031 = 0x037,
EF_AMDGPU_MACH_AMDGCN_GFX1032 = 0x038, EF_AMDGPU_MACH_AMDGCN_GFX1032 = 0x038,
EF_AMDGPU_MACH_AMDGCN_GFX1033 = 0x039, EF_AMDGPU_MACH_AMDGCN_GFX1033 = 0x039,
EF_AMDGPU_MACH_AMDGCN_GFX602 = 0x03a, EF_AMDGPU_MACH_AMDGCN_GFX602 = 0x03a,
EF_AMDGPU_MACH_AMDGCN_GFX705 = 0x03b, EF_AMDGPU_MACH_AMDGCN_GFX705 = 0x03b,
EF_AMDGPU_MACH_AMDGCN_GFX805 = 0x03c, EF_AMDGPU_MACH_AMDGCN_GFX805 = 0x03c,
EF_AMDGPU_MACH_AMDGCN_RESERVED_0X3D = 0x03d,
EF_AMDGPU_MACH_AMDGCN_RESERVED_0X3E = 0x03e,
EF_AMDGPU_MACH_AMDGCN_GFX90A = 0x03f,
// First/last AMDGCN-based processors. // First/last AMDGCN-based processors.
EF_AMDGPU_MACH_AMDGCN_FIRST = EF_AMDGPU_MACH_AMDGCN_GFX600, EF_AMDGPU_MACH_AMDGCN_FIRST = EF_AMDGPU_MACH_AMDGCN_GFX600,
EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX90A, EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX90A,
// Indicates if the "xnack" target feature is enabled for all code contained // Indicates if the "xnack" target feature is enabled for all code contained
// in the object. // in the object.
EF_AMDGPU_XNACK = 0x100, EF_AMDGPU_XNACK = 0x100,
▲ Show 20 Lines • Show All 891 Lines • Show Last 20 Lines