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- User Since
- Jan 26 2017, 7:07 AM (125 w, 6 d)
Mon, Jun 24
Mon, Jun 24
tpr added a comment to D63712: [AMDGPU] Fix +DumpCode to print an entry label for the first function.
Possibly, but our majority use case is to not need the disassembly, and our thinking is that we don't want to change the tool flow between the majority case and the minority case. So can we get this fix in please?
Mon, Jun 24, 2:31 PM · Restricted Project
tpr committed rGd2fdb956e044: [AMDGPU] Allow any value in unused src0 field in v_nop (authored by tpr).
[AMDGPU] Allow any value in unused src0 field in v_nop
[AMDGPU] Allow any value in unused src0 field in v_nop
Mon, Jun 24, 10:36 AM · Restricted Project
tpr added reviewers for D63724: [AMDGPU] Allow any value in unused src0 field in v_nop: rampitec, kzhuravl.
Mon, Jun 24, 9:27 AM · Restricted Project
Mon, Jun 24, 9:27 AM · Restricted Project
tpr added a comment to D63712: [AMDGPU] Fix +DumpCode to print an entry label for the first function.
I don't think anyone is a fan of dumpcode. But we're still in the position that the proper disassembler does not support gfx6 or gfx7, and we need to get this particular problem fixed in the short term.
Mon, Jun 24, 6:13 AM · Restricted Project
Wed, Jun 19
Wed, Jun 19
tpr added a comment to D63510: [LiveInterval] Removed bogus empty subrange assert.
For this bug, whatever we do with a mir test, it is not going to be reliable in failing if the bug is present. Maybe there is a unit testing framework for LiveRangeCalc tests that I could add a test to.
Wed, Jun 19, 12:04 PM · Restricted Project
tpr added inline comments to D63510: [LiveInterval] Removed bogus empty subrange assert.
Wed, Jun 19, 12:01 PM · Restricted Project
tpr added inline comments to D63510: [LiveInterval] Removed bogus empty subrange assert.
Wed, Jun 19, 2:30 AM · Restricted Project
Tue, Jun 18
Tue, Jun 18
tpr added reviewers for D63510: [LiveInterval] Removed bogus empty subrange assert: MatzeB, qcolombet.
Tue, Jun 18, 12:29 PM · Restricted Project
Tue, Jun 18, 12:29 PM · Restricted Project
Thu, Jun 13
Thu, Jun 13
tpr added reviewers for D63198: [StructurizeCFG] Enable -structurizecfg-relaxed-uniform-regions by default: nhaehnle, arsenm, kzhuravl.
Thu, Jun 13, 3:33 AM · Restricted Project
Wed, Jun 12
Wed, Jun 12
tpr updated the diff for D63198: [StructurizeCFG] Enable -structurizecfg-relaxed-uniform-regions by default.
V2: Lit test fix.
Wed, Jun 12, 12:26 PM · Restricted Project
Wed, Jun 12, 6:17 AM · Restricted Project
tpr added inline comments to D63160: [AMDGPU] Custom lower INSERT_SUBVECTOR v3, v4, v5, v8.
Wed, Jun 12, 3:32 AM · Restricted Project
tpr updated the diff for D63160: [AMDGPU] Custom lower INSERT_SUBVECTOR v3, v4, v5, v8.
V2: Addressed review comments re test.
Wed, Jun 12, 3:30 AM · Restricted Project
Tue, Jun 11
Tue, Jun 11
Tue, Jun 11, 1:10 PM · Restricted Project
Thu, May 30
Thu, May 30
tpr committed rG7fecdf36cc5b: [AMDGPU] Added target-specific attribute amdgpu-max-memory-clause (authored by tpr).
[AMDGPU] Added target-specific attribute amdgpu-max-memory-clause
[AMDGPU] Added target-specific attribute amdgpu-max-memory-clause
Thu, May 30, 11:43 AM · Restricted Project
tpr updated the diff for D62572: [AMDGPU] Added target feature +disable-form-clauses.
V2: Target-specific attribute instead of target feature, as suggested by Stas.
Thu, May 30, 8:25 AM · Restricted Project
Wed, May 29
Wed, May 29
Wed, May 29, 1:14 AM · Restricted Project
Wed, May 29, 1:12 AM · Restricted Project
May 21 2019
May 21 2019
tpr added a comment to D60762: [SelectionDAG] Legalize vaargs that require vector splitting.
LGTM, but I don't think I know the legalization code well enough to approve this.
May 21 2019, 6:35 AM · Restricted Project
May 16 2019
May 16 2019
tpr committed rGe3cbdaf1b5e7: [CodeGen] Fixed de-optimization of legalize subvector extract (authored by tpr).
[CodeGen] Fixed de-optimization of legalize subvector extract
[CodeGen] Fixed de-optimization of legalize subvector extract
May 16 2019, 2:46 PM · Restricted Project
tpr added a comment to D60457: [CodeGen] Fixed de-optimization of legalize subvector extract.
Is someone now able to approve this? Eli?
May 16 2019, 10:22 AM · Restricted Project
May 14 2019
May 14 2019
[AMDGPU] Fixed +DumpCode
tpr closed D60682: [AMDGPU] Fixed +DumpCode.
May 14 2019, 9:14 AM · Restricted Project
tpr added inline comments to D60457: [CodeGen] Fixed de-optimization of legalize subvector extract.
May 14 2019, 8:09 AM · Restricted Project
tpr updated the diff for D60457: [CodeGen] Fixed de-optimization of legalize subvector extract.
V4: update_mir_test_checks the test.
May 14 2019, 8:06 AM · Restricted Project
May 8 2019
May 8 2019
tpr added a comment to D60682: [AMDGPU] Fixed +DumpCode.
Ping: Could someone approve this please? Thanks.
May 8 2019, 2:36 AM · Restricted Project
tpr added a comment to D60457: [CodeGen] Fixed de-optimization of legalize subvector extract.
Hi Samuel. Sorry for the delay; I kind of lost track of this change.
May 8 2019, 2:31 AM · Restricted Project
Apr 17 2019
Apr 17 2019
tpr committed rG7c55c8d8c347: [AMDGPU] Avoid DAG combining assert with fneg(fadd(A,0)) (authored by tpr).
[AMDGPU] Avoid DAG combining assert with fneg(fadd(A,0))
[AMDGPU] Avoid DAG combining assert with fneg(fadd(A,0))
Apr 17 2019, 10:26 PM · Restricted Project
tpr committed rG59e8bd3093dc: [AMDGPU] Flag new raw/struct atomic ops as source of divergence (authored by tpr).
[AMDGPU] Flag new raw/struct atomic ops as source of divergence
[AMDGPU] Flag new raw/struct atomic ops as source of divergence
Apr 17 2019, 7:03 AM · Restricted Project
tpr added inline comments to D60457: [CodeGen] Fixed de-optimization of legalize subvector extract.
Apr 17 2019, 3:12 AM · Restricted Project
tpr updated the diff for D60457: [CodeGen] Fixed de-optimization of legalize subvector extract.
V3: Further reduced test case.
Apr 17 2019, 3:12 AM · Restricted Project
tpr updated the diff for D60457: [CodeGen] Fixed de-optimization of legalize subvector extract.
V2: Addressed review comments.
Apr 17 2019, 3:05 AM · Restricted Project
tpr updated the diff for D60731: [AMDGPU] Flag new raw/struct atomic ops as source of divergence.
V2: Addressed review comment: moved tests.
Apr 17 2019, 2:16 AM · Restricted Project
Apr 15 2019
Apr 15 2019
tpr added reviewers for D60600: [InstCombine] Fix a vector-of-pointers instcombine undef bug.: reames, spatel.
Apr 15 2019, 2:51 PM · Restricted Project
tpr added a reviewer for D60731: [AMDGPU] Flag new raw/struct atomic ops as source of divergence: nhaehnle.
Apr 15 2019, 2:30 PM · Restricted Project
Apr 15 2019, 2:30 PM · Restricted Project
tpr added a comment to D60633: [AMDGPU] Avoid DAG combining assert with fneg(fadd(A,0)).
Bug for adding remaining test cases is https://bugs.llvm.org/show_bug.cgi?id=41500
Apr 15 2019, 7:55 AM · Restricted Project
tpr updated the diff for D60633: [AMDGPU] Avoid DAG combining assert with fneg(fadd(A,0)).
V3: Addressed review comments.
Apr 15 2019, 7:55 AM · Restricted Project
tpr added a comment to D60682: [AMDGPU] Fixed +DumpCode.
PS I'm only speaking for LLPC. I don't know if Mesa uses it.
Apr 15 2019, 6:18 AM · Restricted Project
tpr added a comment to D60682: [AMDGPU] Fixed +DumpCode.
I think the only obstacle is getting round to doing the LLPC changes. So this is hopefully a short term fix until we can get around to it.
Apr 15 2019, 6:18 AM · Restricted Project
tpr committed rG842be38162ec: [AMDGPU] Fixed incorrect test in vcnd/vcmp optimization (authored by tpr).
[AMDGPU] Fixed incorrect test in vcnd/vcmp optimization
[AMDGPU] Fixed incorrect test in vcnd/vcmp optimization
Apr 15 2019, 3:35 AM · Restricted Project
Apr 15 2019, 3:18 AM · Restricted Project
tpr created D60682: [AMDGPU] Fixed +DumpCode.
Apr 15 2019, 3:17 AM · Restricted Project
tpr added a comment to D60633: [AMDGPU] Avoid DAG combining assert with fneg(fadd(A,0)).
I have cut down the test a bit more and put it into fneg-combines.ll. I did not manage to repro any problems with the other cases that I added fixes for.
Apr 15 2019, 3:06 AM · Restricted Project
tpr updated the diff for D60633: [AMDGPU] Avoid DAG combining assert with fneg(fadd(A,0)).
V2: Cut down test a bit more and put it in fneg-combines.ll.
Apr 15 2019, 3:03 AM · Restricted Project
Apr 13 2019
Apr 13 2019
tpr added reviewers for D60652: [AMDGPU] Fixed incorrect test in vcnd/vcmp optimization: vpykhtin, rampitec.
I did not add a test because I believe that we do not currently set the source modifiers in codegen, so this code never gets exercised.
Apr 13 2019, 9:36 AM · Restricted Project
Apr 13 2019, 9:32 AM · Restricted Project
Apr 12 2019
Apr 12 2019
tpr added reviewers for D60633: [AMDGPU] Avoid DAG combining assert with fneg(fadd(A,0)): arsenm, rampitec.
That's the best bugpoint could do with the test.
Apr 12 2019, 1:22 PM · Restricted Project
Apr 12 2019, 1:16 PM · Restricted Project
Apr 9 2019
Apr 9 2019
tpr added reviewers for D60457: [CodeGen] Fixed de-optimization of legalize subvector extract: hakzsam, arsenm, efriedma.
Apr 9 2019, 6:10 AM · Restricted Project
tpr added a comment to D58902: [AMDGPU] Support for v3i32/v3f32.
Hopefully fixed by D60457.
Apr 9 2019, 5:57 AM · Restricted Project
Apr 9 2019, 5:50 AM · Restricted Project
Apr 1 2019
Apr 1 2019
tpr added a comment to D58902: [AMDGPU] Support for v3i32/v3f32.
Hi Samuel
Apr 1 2019, 2:11 AM · Restricted Project
Mar 29 2019
Mar 29 2019
LGTM modulo the wrong license on the new file.
Mar 27 2019
Mar 27 2019
OK thanks Matt.
Mar 27 2019, 9:46 AM · Restricted Project
Mar 27 2019, 2:14 AM · Restricted Project
Mar 27 2019, 2:14 AM · Restricted Project
Mar 22 2019
Mar 22 2019
tpr committed rG94c163c34e4d: InstCombineSimplifyDemanded: Allow v3 results for AMDGCN buffer and image… (authored by tpr).
InstCombineSimplifyDemanded: Allow v3 results for AMDGCN buffer and image…
InstCombineSimplifyDemanded: Allow v3 results for AMDGCN buffer and image…
tpr closed D58906: InstCombineSimplifyDemanded: Allow v3 results for amdgcn buffer and image intrinsics.
Mar 22 2019, 8:54 AM · Restricted Project
tpr committed rG6f0191a55a53: [AMDGPU] Use three- and five-dword result type in image ops (authored by tpr).
[AMDGPU] Use three- and five-dword result type in image ops
[AMDGPU] Use three- and five-dword result type in image ops
Mar 22 2019, 8:20 AM · Restricted Project
tpr committed rG677387d8dc9e: [AMDGPU] Implemented dwordx3 variants of buffer/tbuffer load/store intrinsics (authored by tpr).
[AMDGPU] Implemented dwordx3 variants of buffer/tbuffer load/store intrinsics
tpr committed rL356755: [AMDGPU] Implemented dwordx3 variants of buffer/tbuffer load/store intrinsics.
[AMDGPU] Implemented dwordx3 variants of buffer/tbuffer load/store intrinsics
Mar 22 2019, 7:57 AM · Restricted Project
[AMDGPU] Added v5i32 and v5f32 register classes
[AMDGPU] Added v5i32 and v5f32 register classes
Mar 22 2019, 3:10 AM · Restricted Project
Mar 21 2019
Mar 21 2019
[AMDGPU] Support for v3i32/v3f32
tpr committed rL356659: [AMDGPU] Support for v3i32/v3f32.
[AMDGPU] Support for v3i32/v3f32
Mar 21 2019, 5:00 AM · Restricted Project
Mar 20 2019
Mar 20 2019
[AMDGPU] Do not generate spurious PAL metadata
[AMDGPU] Do not generate spurious PAL metadata
Mar 20 2019, 3:00 PM · Restricted Project
tpr added reviewers for D59613: [AMDGPU] Do not generate spurious PAL metadata: scott.linder, kzhuravl, hliao.
Mar 20 2019, 2:13 PM · Restricted Project
Mar 20 2019, 2:10 PM · Restricted Project
Thanks for the better test Matt. But I'll abandon this one in favor of Michael's improved fix D59608.
Mar 20 2019, 1:15 PM · Restricted Project
Thanks Michael; that is much better than my fix in D59556. Let's go with this one and I'll abandon my one.
Mar 20 2019, 1:14 PM · Restricted Project
[AMDGPU] Added MsgPack format PAL metadata
[AMDGPU] Added MsgPack format PAL metadata
Mar 20 2019, 11:48 AM · Restricted Project
tpr committed rGd737b551e97e: [AMDGPU] Factored PAL metadata handling out into its own class (authored by tpr).
[AMDGPU] Factored PAL metadata handling out into its own class
[AMDGPU] Factored PAL metadata handling out into its own class
Mar 20 2019, 10:42 AM · Restricted Project