[PowerPC][PC Rel] Implement option to omit Power10 instructions from stubs

[Conanap]

Summary

Implemented the option to omit Power10 instructions from save stubs via the option --no-power10-stubs or --power10-stubs=no on lld. --power10-stubs= will override the other option. --power10-stubs=auto also exists to use the default behaviour (ie allow Power10 instructions in stubs).

[amyk]

A few general comments.

lld/ELF/Config.h

74

We have a "yes", but does it need to be here, too?

lld/ELF/Driver.cpp

764

Add documentation for the function.

777

Do we need to handle power10_stubs?

lld/ELF/Options.td

453

nit: maybe use the full word instructions here and in the following lines.

455

Describe the default behaviour?

lld/ELF/Thunks.cpp

925

Unrelated change?

930–952

Can we maybe try to have a more descriptive name than inst2? (here and in the other places)

lld/test/ELF/ppc64-toc-call-to-pcrel.s

29

No need for the extra #

[Conanap]

Fixed some formatting and comments.

[Conanap]

Addressed comments

lld/ELF/Config.h

74

After a bit of discussion, since we don't have a concrete implementation for the "yes" option yet, the consensus is to keep it out for now. I'll remove it from the help message as well.

lld/ELF/Driver.cpp

777

That option is handled by the variable NoP10; I'll add a comment to make that more clear.

lld/ELF/Thunks.cpp

925

This change was made so that the commented instruction would better line up with the new instructions added for better readablity.

[stefanp]

I have a few comments. Most of them are nits but there is a functional issue as well.

For the testing:
Do we have a test for the PPC64R2SaveStub in the situation where the offset fits in 34 bits?

lld/ELF/Driver.cpp

769

nit:
You can probably get rid of this temp and have the condition down below change to:

if (!args.hasArg(OPT_power10_stubs_eq) &&
    args.hasArg(OPT_no_power10_stubs))
  return P10Stub::No;

Mainly because you only use NoP10 in one place at this point.

lld/ELF/Options.td

448

nit:
This is not checked in getP10StubOpt.
This is no longer an alias for power10-stubs=yes it is an alias for default.

lld/ELF/Thunks.cpp

937

This sequence does not match with what you are using as an offset.
The tocOffset is the difference between the TOC pointer (in r2) and the address of the destination function (the callee). However, the add instructions are using that offset and adding it to zero (addis r12, 0, top of offset) which is not the TOC pointer. At the end of this sequence the register r12 will not have the address of the callee but simply the difference between that address and the TOC pointer.

Since you have a valid r2 and are computing the offset from the TOC pointer you should be adding to that.

940

Same here as above.

977

nit:
The variable d is only used in one place so you can just inline it.
Also, for the future try to avoid single letter variable names.

983

You need to have the off-8 in both cases. The way that this is done is quite confusing beause in one case you subtract 8 in the lambda and in the other you just subtract here inline. I would say just subtract in the computation of off and then you don't have to do it twice in two different places.

Secondly, instead of casting to uint16_t you are better off just using a mask (off & 0xffff).

1014

nit:
Similar to above it is probably better to compute off with the -8 included than to add the adjustment to the lambdas.

1058

I see that these lambdas are used in a lot of places to do the same thing. It might be better to have a static function instead of defining the same lambda three times.

1060

nit: Same as above. Just add compute the offset with the 8 difference here.

lld/test/ELF/ppc64-pcrel-call-to-toc.s

18

nit:
Do the LE version of the test instead of the BE version.

llvm/include/llvm/Object/ELF.h

95

Are these two instruction masks used?

[Conanap]

Removed lambda functions and made a static function, included a R2SaveStub test case that covers if it fits in 34 bits with option --no-power10-stubs.

[MaskRay]

Implement option to omit P10 instructions from stubs

Please mention the option name directly.
Please avoid P10 - the abbreviation is confusing.

lld/ELF/Config.h

74

In this case it can be a simple boolean

lld/ELF/Driver.cpp

768

Delete the comment. it is not useful

771

value

lld/ELF/Thunks.cpp

1010

Delete the stray comment or clarify.

1057

Delete the stray comment or clarify.

1063

space before //

[stefanp]

There is one more thing that does not look quite right. It may be an encoding problem for one of the instructions. I found it in the test but you will have to trace it back to the place where it is generated in order to fix it.

lld/ELF/Driver.cpp

771

You may even be able to inline this since it is only used in one place that I can see.

lld/ELF/Options.td

453

nit:
Is this line too long? Or does it just appear too long in my browser. If the length is ok ignore my comment.

lld/ELF/Thunks.cpp

935

nit:
You can mark both as const.
Also below in this same function.

lld/test/ELF/ppc64-pcrel-call-to-toc.s

55

This is not correct.
You should be adding to r11 and not r12 here.
ie.

addis 12, 11, -1

The encoding above may not be correct.

[Conanap]

Addressed comments, fixed an incorrect encoding.

[Conanap]

Added a note on one of the functions

lld/ELF/Driver.cpp

766

For this function here, I realize we can inline all the ifs into a giant return statement - is there any opinions on this? I thought the if statements might make this a bit more readable, but if it is preferred that there is only 1 return statement I can make that change as well.

[stefanp]

Just nits this time around.

lld/ELF/Driver.cpp

766

Personally I'm happy with it like this. I'm not a fan of huge if statements but I could be persuaded otherwise depending on what other reviewers have to say...

lld/ELF/Options.td

454

nit:
instsructions -> instructions

lld/ELF/Thunks.cpp

941

nit:
addi r12, 2, offset -> addi r12, r2, offset

lld/test/ELF/ppc64-pcrel-call-to-extern.s

110

nit:
Same thing here. Please fix the comment.
0x20148 = 131400 and not 131416

135

nit:
Please fix these comments.
0x10150 does not equal 65888.

160

nit:
This comment too.

0x10030168 - 0x10030010 = 0x158
0x150 = 336

I'm not going to comment on all of these. Please take a look at the comments where numbers have changed and make sure that they are correct.

[Conanap]

Fixed up a few comments

[stefanp]

I just have one final nit otherwise LGTM. Feel free to fix that on commit.
Please wait a couple of days and see if @MaskRay has any further comments.

lld/test/ELF/ppc64-pcrel-call-to-extern.s

135

nit:
I think these numbers are still wrong.

0x10030160 - 0x10020010 = 0x10150 not 0x10160

I think it should be: 0x10030170

[amyk]

Thanks for answering the questions I previously had on this patch.

lld/ELF/Driver.cpp

764

nit: remove the space after = and before flags.

[Conanap]

Updated 2 test cases and some nits

[MaskRay]

The used code sequence has 2 bugs so the output will crash. I fixed them in 7198c87f42f6c15d76b127c1c63530e9b4d5dd39 and added my notes to https://maskray.me/blog/2023-02-26-linker-notes-on-power-isa

lld/ELF/Config.h

 
 // For -z noseparate-code, -z separate-code and -z separate-loadable-segments.
 enum class SeparateSegmentKind { None, Code, Loadable };
 
 // For -z *stack
 enum class GnuStackKind { None, Exec, NoExec };
 
 struct SymbolVersion {
   llvm::StringRef name;
   bool isExternCpp;
   bool hasWildcard;
 };
 
 // This struct contains symbols version definition that
 // can be found in version script if it is used for link.
 struct VersionDefinition {
   llvm::StringRef name;
struct Configuration {
   GnuStackKind zGnustack;
   ICFLevel icf;
   OrphanHandlingPolicy orphanHandling;
   SortSectionPolicy sortSection;
   StripPolicy strip;
   UnresolvedPolicy unresolvedSymbols;
   UnresolvedPolicy unresolvedSymbolsInShlib;
   Target2Policy target2;
+  bool Power10Stub;
   ARMVFPArgKind armVFPArgs = ARMVFPArgKind::Default;
   BuildIdKind buildId = BuildIdKind::None;
   SeparateSegmentKind zSeparate;
   ELFKind ekind = ELFNoneKind;
   uint16_t emachine = llvm::ELF::EM_NONE;
   llvm::Optional<uint64_t> imageBase;
   uint64_t commonPageSize;
   uint64_t maxPageSize;

lld/ELF/Driver.cpp

if (s == "warn")
     return OrphanHandlingPolicy::Warn;
   if (s == "error")
     return OrphanHandlingPolicy::Error;
   if (s != "place")
     error("unknown --orphan-handling mode: " + s);
   return OrphanHandlingPolicy::Place;
 }
 
+// Parses --power10-stubs= flags, to disable or enable Power 10
+// instructions in stubs.
+static bool getP10StubOpt(opt::InputArgList &args) {
+
+  if (args.getLastArgValue(OPT_power10_stubs_eq)== "no")
+    return false;
+
+  if (!args.hasArg(OPT_power10_stubs_eq) &&
+      args.hasArg(OPT_no_power10_stubs))
+    return false;
+
+  return true;
+}
+
 // Parse --build-id or --build-id=<style>. We handle "tree" as a
 // synonym for "sha1" because all our hash functions including
 // -build-id=sha1 are actually tree hashes for performance reasons.
 static std::pair<BuildIdKind, std::vector<uint8_t>>
 getBuildId(opt::InputArgList &args) {
   auto *arg = args.getLastArg(OPT_build_id, OPT_build_id_eq);
   if (!arg)
     return {BuildIdKind::None, {}};
static void readConfigs(opt::InputArgList &args) {
   config->zShstk = hasZOption(args, "shstk");
   config->zStackSize = args::getZOptionValue(args, OPT_z, "stack-size", 0);
   config->zStartStopGC =
       getZFlag(args, "start-stop-gc", "nostart-stop-gc", false);
   config->zStartStopVisibility = getZStartStopVisibility(args);
   config->zText = getZFlag(args, "text", "notext", true);
   config->zWxneeded = hasZOption(args, "wxneeded");
   setUnresolvedSymbolPolicy(args);
+  config->Power10Stub = getP10StubOpt(args);
 
   if (opt::Arg *arg = args.getLastArg(OPT_eb, OPT_el)) {
     if (arg->getOption().matches(OPT_eb))
       config->optEB = true;
     else
       config->optEL = true;
   }
 

lld/ELF/Options.td

defm rsp_quoting: Eq<"rsp-quoting", "Quoting style for response files">,
   MetaVarName<"[posix,windows]">;
 
 def v: Flag<["-"], "v">, HelpText<"Display the version number">;
 
 def verbose: F<"verbose">, HelpText<"Verbose mode">;
 
 def version: F<"version">, HelpText<"Display the version number and exit">;
 
+def power10_stubs: F<"power10-stubs">, HelpText<"Alias for --power10-stubs=auto">;
+
+def no_power10_stubs: F<"no-power10-stubs">, HelpText<"Alias for --power10-stubs=no">;
+
+def power10_stubs_eq:
+  J<"power10-stubs=">, HelpText<
+                     "Enables Power10 instructions in all stubs without options, "
+                     "options override previous flags."
+                     "auto: Allow Power10 instructions in stubs if applicable."
+                     "no:   No Power10 instructions in stubs.">;
+
 defm version_script: Eq<"version-script", "Read a version script">;
 
 defm warn_backrefs: BB<"warn-backrefs",
     "Warn about backward symbol references to fetch archive members",
     "Do not warn about backward symbol references to fetch archive members (default)">;
 
 defm warn_backrefs_exclude
     : EEq<"warn-backrefs-exclude",

lld/ELF/Thunks.h

 // For a Relocation to symbol S create a Thunk to be added to a synthetic
 // ThunkSection.
 Thunk *addThunk(const InputSection &isec, Relocation &rel);
 
 void writePPC32PltCallStub(uint8_t *buf, uint64_t gotPltVA,
                            const InputFile *file, int64_t addend);
 void writePPC64LoadAndBranch(uint8_t *buf, int64_t offset);
 
+static inline uint16_t computeHiBits(uint32_t toCompute) {
+  return (toCompute + 0x8000) >> 16;
+}
+
 } // namespace elf
 } // namespace lld
 
 #endif

lld/ELF/Thunks.cpp

bool getMayUseShortThunk() {
     if (!mayUseShortThunk)
       return false;
     if (!isInt<26>(computeOffset())) {
       mayUseShortThunk = false;
       return false;
     }
     return true;
   }
-  uint32_t size() override { return getMayUseShortThunk() ? 8 : 20; }
+  uint32_t size() override { return getMayUseShortThunk() ? 8 : 32; }
   void writeTo(uint8_t *buf) override;
   void addSymbols(ThunkSection &isec) override;
 
 private:
   // Transitioning from long to short can create layout oscillations in
   // certain corner cases which would prevent the layout from converging.
   // This is similar to the handling for ARMThunk.
   bool mayUseShortThunk = true;
   int64_t computeOffset() const {
     return destination.getVA() - (getThunkTargetSym()->getVA() + 4);
   }
 };
 
 // PPC64 R12 Setup Stub
 // When a caller that does not maintain a toc-pointer performs a local call to
 // a callee which requires a toc-pointer then we need this stub to place the
 // callee's global entry point into r12 without a save of R2.
 class PPC64R12SetupStub final : public Thunk {
 public:
   PPC64R12SetupStub(Symbol &dest) : Thunk(dest, 0) { alignment = 16; }
-  uint32_t size() override { return 16; }
+  uint32_t size() override { return 32; }
   void writeTo(uint8_t *buf) override;
   void addSymbols(ThunkSection &isec) override;
 };
 
 // PPC64 PC-relative PLT Stub
 // When a caller that does not maintain a toc-pointer performs an extern call
 // then this stub is needed for:
 // 1) Loading the target functions address from the procedure linkage table into
 //    r12 for use by the target functions global entry point, and into the count
 //    register with pc-relative instructions.
 // 2) Transferring control to the target function through an indirect branch.
 class PPC64PCRelPLTStub final : public Thunk {
 public:
   PPC64PCRelPLTStub(Symbol &dest) : Thunk(dest, 0) { alignment = 16; }
-  uint32_t size() override { return 16; }
+  uint32_t size() override { return 32; }
   void writeTo(uint8_t *buf) override;
   void addSymbols(ThunkSection &isec) override;
   bool isCompatibleWith(const InputSection &isec,
                         const Relocation &rel) const override;
 };
 
 // A bl instruction uses a signed 24 bit offset, with an implicit 4 byte
 // alignment. This gives a possible 26 bits of 'reach'. If the call offset is
 // larger than that we need to emit a long-branch thunk. The target address
 // of the callee is stored in a table to be accessed TOC-relative. Since the
 // call must be local (a non-local call will have a PltCallStub instead) the
 // table stores the address of the callee's local entry point. For
 // position-independent code a corresponding relative dynamic relocation is
 // used.
 class PPC64LongBranchThunk : public Thunk {
 public:
-  uint32_t size() override { return 16; }
+  uint32_t size() override { return 32; }
   void writeTo(uint8_t *buf) override;
   void addSymbols(ThunkSection &isec) override;
   bool isCompatibleWith(const InputSection &isec,
                         const Relocation &rel) const override;
 
 protected:
   PPC64LongBranchThunk(Symbol &dest, int64_t addend) : Thunk(dest, addend) {}
 };

 // we need to emit a pc-rel based long-branch thunk. The target address of
 // the callee is computed with a PC-relative offset.
 class PPC64PCRelLongBranchThunk final : public Thunk {
 public:
   PPC64PCRelLongBranchThunk(Symbol &dest, int64_t addend)
       : Thunk(dest, addend) {
     alignment = 16;
   }
-  uint32_t size() override { return 16; }
+  uint32_t size() override { return 32; }
   void writeTo(uint8_t *buf) override;
   void addSymbols(ThunkSection &isec) override;
   bool isCompatibleWith(const InputSection &isec,
                         const Relocation &rel) const override;
 };
 
 } // end anonymous namespace
 

 
 bool PPC64PltCallStub::isCompatibleWith(const InputSection &isec,
                                         const Relocation &rel) const {
   return rel.type == R_PPC64_REL24 || rel.type == R_PPC64_REL14;
 }
 
 void PPC64R2SaveStub::writeTo(uint8_t *buf) {
   const int64_t offset = computeOffset();
-  write32(buf + 0, 0xf8410018);                         // std  r2,24(r1)
+  write32(buf + 0, 0xf8410018); // std  r2,24(r1)
   // The branch offset needs to fit in 26 bits.
   if (getMayUseShortThunk()) {
     write32(buf + 4, 0x48000000 | (offset & 0x03fffffc)); // b    <offset>
   } else if (isInt<34>(offset)) {
+    int nextInstOffset;
+    if (!config->Power10Stub) {
+      uint64_t tocOffset = destination.getVA() - getPPC64TocBase();
+      if (tocOffset >> 16 > 0) {
+        const uint64_t addi = ADDI_R12_TO_R12_NO_DISP | (tocOffset & 0xffff);
+        const uint64_t addis = ADDIS_R12_TO_R2_NO_DISP | ((tocOffset >> 16) & 0xffff);
+        write32(buf + 4, addis); // addis r12, r2 , top of offset
+        write32(buf + 8, addi);  // addi  r12, r12, bottom of offset
+        nextInstOffset = 12;
+      } else {
+        const uint64_t addi = ADDI_R12_TO_R2_NO_DISP | (tocOffset & 0xffff);
+        write32(buf + 4, addi); // addi r12, r2, offset
+        nextInstOffset = 8;
+      }
+    } else {
       const uint64_t paddi = PADDI_R12_NO_DISP |
                              (((offset >> 16) & 0x3ffff) << 32) |
                              (offset & 0xffff);
       writePrefixedInstruction(buf + 4, paddi); // paddi r12, 0, func@pcrel, 1
-    write32(buf + 12, MTCTR_R12);             // mtctr r12
-    write32(buf + 16, BCTR);                  // bctr
+      nextInstOffset = 12;
+    }
+    write32(buf + nextInstOffset, MTCTR_R12); // mtctr r12
+    write32(buf + nextInstOffset + 4, BCTR);  // bctr
   } else {
     in.ppc64LongBranchTarget->addEntry(&destination, addend);
     const int64_t offsetFromTOC =
         in.ppc64LongBranchTarget->getEntryVA(&destination, addend) -
         getPPC64TocBase();
     writePPC64LoadAndBranch(buf + 4, offsetFromTOC);
   }
 }
 
 void PPC64R2SaveStub::addSymbols(ThunkSection &isec) {
   Defined *s = addSymbol(saver.save("__toc_save_" + destination.getName()),
                          STT_FUNC, 0, isec);
   s->needsTocRestore = true;
 }
 
 void PPC64R12SetupStub::writeTo(uint8_t *buf) {
   int64_t offset = destination.getVA() - getThunkTargetSym()->getVA();
   if (!isInt<34>(offset))
     reportRangeError(buf, offset, 34, destination, "R12 setup stub offset");
+
+  int nextInstOffset;
+  if (!config->Power10Stub) {
+    uint32_t off = destination.getVA(addend) - getThunkTargetSym()->getVA() - 8;
+    write32(buf + 0, 0x7c0802a6);                      // mflr r12
+    write32(buf + 4, 0x429f0005);                      // bcl 20,31,.+4
+    write32(buf + 8, 0x7d6802a6);                      // mflr r11
+    write32(buf + 12, 0x7d8803a6);                     // mtlr r12
+    write32(buf + 16, 0x3d8b0000 | computeHiBits(off));// addis r12,r11,off@ha
+    write32(buf + 20, 0x398c0000 | (off & 0xffff));    // addi r12,r12,off@l
+    nextInstOffset = 24;
+  } else {
     uint64_t paddi = PADDI_R12_NO_DISP | (((offset >> 16) & 0x3ffff) << 32) |
                      (offset & 0xffff);
-
     writePrefixedInstruction(buf + 0, paddi); // paddi r12, 0, func@pcrel, 1
-  write32(buf + 8, MTCTR_R12);              // mtctr r12
-  write32(buf + 12, BCTR);                  // bctr
+    nextInstOffset = 8;
+  }
+  write32(buf + nextInstOffset, MTCTR_R12); // mtctr r12
+  write32(buf + nextInstOffset + 4, BCTR);  // bctr
 }
 
 void PPC64R12SetupStub::addSymbols(ThunkSection &isec) {
   addSymbol(saver.save("__gep_setup_" + destination.getName()), STT_FUNC, 0,
             isec);
 }
 
 void PPC64PCRelPLTStub::writeTo(uint8_t *buf) {
+  int nextInstOffset = 0;
   int64_t offset = destination.getGotPltVA() - getThunkTargetSym()->getVA();
+
+  if (config->Power10Stub) {
     if (!isInt<34>(offset))
       reportRangeError(buf, offset, 34, destination,
                        "PC-relative PLT stub offset");
-  uint64_t pld =
-      PLD_R12_NO_DISP | (((offset >> 16) & 0x3ffff) << 32) | (offset & 0xffff);
-
+    const uint64_t pld = PLD_R12_NO_DISP | (((offset >> 16) & 0x3ffff) << 32) |
+                   (offset & 0xffff);
     writePrefixedInstruction(buf + 0, pld); // pld r12, func@plt@pcrel
-  write32(buf + 8, MTCTR_R12);            // mtctr r12
-  write32(buf + 12, BCTR);                // bctr
+    nextInstOffset = 8;
+  } else {
+    uint32_t off = destination.getVA(addend) - getThunkTargetSym()->getVA() - 8;
+    write32(buf + 0, 0x7c0802a6);            // mflr r12
+    write32(buf + 4, 0x429f0005);            // bcl 20,31,.+4
+    write32(buf + 8, 0x7d6802a6);            // mflr r11
+    write32(buf + 12, 0x7d8803a6);           // mtlr r12
+    write32(buf + 16, 0x3d8b0000 | computeHiBits(off)); // addis r12,r11,off@ha
+    write32(buf + 20, 0x398c0000 | (off & 0xffff)); // addi r12,r12,off@l
+    nextInstOffset = 24;
+  }
+  write32(buf + nextInstOffset, MTCTR_R12); // mtctr r12
+  write32(buf + nextInstOffset + 4, BCTR);  // bctr
 }
 
 void PPC64PCRelPLTStub::addSymbols(ThunkSection &isec) {
   addSymbol(saver.save("__plt_pcrel_" + destination.getName()), STT_FUNC, 0,
             isec);
 }
 
 bool PPC64PCRelPLTStub::isCompatibleWith(const InputSection &isec,
bool PPC64LongBranchThunk::isCompatibleWith(const InputSection &isec,
   return rel.type == R_PPC64_REL24 || rel.type == R_PPC64_REL14;
 }
 
 void PPC64PCRelLongBranchThunk::writeTo(uint8_t *buf) {
   int64_t offset = destination.getVA() - getThunkTargetSym()->getVA();
   if (!isInt<34>(offset))
     reportRangeError(buf, offset, 34, destination,
                      "PC-relative long branch stub offset");
+
+  int nextInstOffset;
+  if (!config->Power10Stub) {
+    uint32_t off = destination.getVA(addend) - getThunkTargetSym()->getVA() - 8;
+    write32(buf + 0, 0x7c0802a6);                      // mflr r12
+    write32(buf + 4, 0x429f0005);                      // bcl 20,31,.+4
+    write32(buf + 8, 0x7d6802a6);                      // mflr r11
+    write32(buf + 12, 0x7d8803a6);                     // mtlr r12
+    write32(buf + 16, 0x3d8b0000 | computeHiBits(off)); // addis r12,r11,off@ha
+    write32(buf + 20, 0x398c0000 | (off & 0xffff));    // addi r12,r12,off@l
+    nextInstOffset = 24;
+  } else {
     uint64_t paddi = PADDI_R12_NO_DISP | (((offset >> 16) & 0x3ffff) << 32) |
                      (offset & 0xffff);
-
     writePrefixedInstruction(buf + 0, paddi); // paddi r12, 0, func@pcrel, 1
-  write32(buf + 8, MTCTR_R12);              // mtctr r12
-  write32(buf + 12, BCTR);                  // bctr
+    nextInstOffset = 8;
+  }
+  write32(buf + nextInstOffset, MTCTR_R12); // mtctr r12
+  write32(buf + nextInstOffset + 4, BCTR);  // bctr
 }
 
 void PPC64PCRelLongBranchThunk::addSymbols(ThunkSection &isec) {
   addSymbol(saver.save("__long_branch_pcrel_" + destination.getName()),
             STT_FUNC, 0, isec);
 }
 
 bool PPC64PCRelLongBranchThunk::isCompatibleWith(const InputSection &isec,

lld/test/ELF/ppc64-call-reach.s

 # CHECK:  10010024:       b  0x12010020
 
 # NEGOFFSET-LABEL: test
 # NEGOFFSET:  10010014:       bl 0xe010014
 # NEGOFFSET:  10010024:       b  0xe010024
 
 # THUNK-LABEL: <test>:
 # THUNK: 10010014:       bl 0x10010030
-# THUNK: 10010024:       b 0x10010040
+# THUNK: 10010024:       b 0x10010050
 
 # .branch_lt[0]
 # THUNK-LABEL: <__long_branch_callee>:
 # THUNK-NEXT: 10010030:       addis 12, 2, 1
 # THUNK-NEXT:                 ld 12, -32760(12)
 # THUNK-NEXT:                 mtctr 12
 # THUNK-NEXT:                 bctr
 
 # .branch_lt[1]
 # THUNK-LABEL: <__long_branch_tail_callee>:
-# THUNK-NEXT: 10010040:       addis 12, 2, 1
+# THUNK-NEXT: 10010050:       addis 12, 2, 1
 # THUNK-NEXT:                 ld 12, -32752(12)
 # THUNK-NEXT:                 mtctr 12
 # THUNK-NEXT:                 bctr
 
 # The offset from the TOC to the .branch_lt section  is (-1 << 16) - 32768.
 #                Name             Type            Address          Off    Size
 # BRANCHLT:     .got              PROGBITS        0000000010020000 020000 000008
 # BRANCHLT:     .branch_lt        PROGBITS        0000000010030008 020008 000010
 # BRANCHLT-NOT: .plt

lld/test/ELF/ppc64-long-branch-localentry-offset.s

 # REQUIRES: ppc
 
 # RUN: llvm-mc -filetype=obj -triple=ppc64le %s -o %t.o
 # RUN: ld.lld %t.o -z separate-code -o %t
 # RUN: llvm-nm %t | FileCheck %s
 
 # CHECK-DAG: 0000000010010000 t __long_branch_callee
-# CHECK-DAG: 0000000010010010 T _start
-# CHECK-DAG: 0000000012010008 T callee
+# CHECK-DAG: 0000000010010020 T _start
+# CHECK-DAG: 0000000012010018 T callee
 
 # The bl instruction jumps to the local entry. The distance requires a long branch stub:
 # localentry(callee) - _start = 0x12010008+8 - 0x10010010 = 0x2000000
 
 # We used to compute globalentry(callee) - _start and caused a "R_PPC64_REL24
 # out of range" error because we didn't create the stub.
 
 .globl _start

lld/test/ELF/ppc64-long-branch-pi.s

 # REQUIRES: ppc
 # RUN: llvm-mc -filetype=obj -triple=ppc64le %s -o %t.o
 # RUN: echo 'SECTIONS { \
 # RUN:       .text_low 0x2000: { *(.text_low) } \
 # RUN:       .text_high 0x2002000 : { *(.text_high) } \
 # RUN:       }' > %t.script
 # RUN: ld.lld -pie -T %t.script %t.o -o %t
 # RUN: llvm-readelf -S %t | FileCheck --check-prefix=SEC-PIE %s
 # RUN: llvm-readobj -r %t | FileCheck --check-prefix=RELOC %s
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 
 # RUN: ld.lld -shared -T %t.script %t.o -o %t.so
 # RUN: llvm-readelf -S %t.so | FileCheck --check-prefix=SEC-SHARED %s
 # RUN: llvm-objdump -d --no-show-raw-insn %t.so | FileCheck %s
 
 # SEC-PIE:    Name       Type     Address          Off     Size   ES Flg Lk Inf Al
-# SEC-PIE:    .got       PROGBITS 00000000020020f0 20120f0 000008 00  WA  0   0  8
-# SEC-PIE:    .branch_lt NOBITS   0000000002002100 2012100 000020 00  WA  0   0  8
+# SEC-PIE:    .got       PROGBITS 0000000002002100 2012100 000008 00  WA  0   0  8
+# SEC-PIE:    .branch_lt NOBITS   0000000002002110 2012110 000020 00  WA  0   0  8
 
 # SEC-SHARED: Name       Type     Address          Off     Size   ES Flg Lk Inf Al
-# SEC-SHARED: .got       PROGBITS 00000000020020d0 20120d0 000008 00  WA  0   0  8
-# SEC-SHARED: .branch_lt NOBITS   00000000020020e0 20120e0 000020 00  WA  0   0  8
+# SEC-SHARED: .got       PROGBITS 00000000020020e0 20120e0 000008 00  WA  0   0  8
+# SEC-SHARED: .branch_lt NOBITS   00000000020020f0 20120f0 000020 00  WA  0   0  8
 
 # RELOC:      .rela.dyn {
-# RELOC-NEXT:   0x20020F8 R_PPC64_RELATIVE - 0x8000
-# RELOC-NEXT:   0x2002100 R_PPC64_RELATIVE - 0x2002000
-# RELOC-NEXT:   0x2002108 R_PPC64_RELATIVE - 0x2002008
-# RELOC-NEXT:   0x2002110 R_PPC64_RELATIVE - 0x200200C
-# RELOC-NEXT:   0x2002118 R_PPC64_RELATIVE - 0x2000
+# RELOC-NEXT:   0x2002108 R_PPC64_RELATIVE - 0x8000
+# RELOC-NEXT:   0x2002110 R_PPC64_RELATIVE - 0x2002000
+# RELOC-NEXT:   0x2002118 R_PPC64_RELATIVE - 0x2002008
+# RELOC-NEXT:   0x2002120 R_PPC64_RELATIVE - 0x200200C
+# RELOC-NEXT:   0x2002128 R_PPC64_RELATIVE - 0x2000
 # RELOC-NEXT: }
 
 # CHECK:      <_start>:
 # CHECK-NEXT:     2000:       bl 0x2010
 # CHECK-NEXT:                 bl 0x2002000
-# CHECK-NEXT:                 bl 0x2020
 # CHECK-NEXT:                 bl 0x2030
+# CHECK-NEXT:                 bl 0x2050
 
 ## &.branch_lt[0] - .TOC. = .branch_lt - (.got+0x8000) = -32752
 # CHECK:      <__long_branch_>:
 # CHECK-NEXT:     2010:       addis 12, 2, 0
 # CHECK-NEXT:                 ld 12, -32752(12)
 # CHECK-NEXT:                 mtctr 12
 # CHECK-NEXT:                 bctr
 
 ## &.branch_lt[1] - .TOC. = .branch_lt - (.got+0x8000) = -32744
 # CHECK:      <__long_branch_>:
-# CHECK-NEXT:     2020:       addis 12, 2, 0
+# CHECK-NEXT:     2030:       addis 12, 2, 0
 # CHECK-NEXT:                 ld 12, -32744(12)
 # CHECK-NEXT:                 mtctr 12
 # CHECK-NEXT:                 bctr
 
 ## &.branch_lt[2] - .TOC. = .branch_lt - (.got+0x8000) = -32736
 # CHECK:      <__long_branch_>:
-# CHECK-NEXT:     2030:       addis 12, 2, 0
+# CHECK-NEXT:     2050:       addis 12, 2, 0
 # CHECK-NEXT:                 ld 12, -32736(12)
 # CHECK-NEXT:                 mtctr 12
 # CHECK-NEXT:                 bctr
 
 .section .text_low, "ax", %progbits
 .globl _start
 _start:
 bl .text_high     # Need a thunk

lld/test/ELF/ppc64-long-branch-rel14.s

 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 
 # SEC: There are no relocations in this file.
 
 # CHECK-LABEL: <_start>:
 # CHECK-NEXT:  2000: bt 2, 0x2020
 # CHECK-NEXT:        bt+ 2, 0x2020
 # CHECK-NEXT:        bf 2, 0xa004
-# CHECK-NEXT:        bt 2, 0x2030
+# CHECK-NEXT:        bt 2, 0x2040
 # CHECK-NEXT:        blr
 # CHECK-NEXT:        trap
 # CHECK-NEXT:        trap
 # CHECK-NEXT:        trap
 # CHECK-EMPTY:
 # CHECK-NEXT: <__long_branch_high>:
 # CHECK-NEXT:  2020: addis 12, 2, 0
 # CHECK-NEXT:        ld 12, {{.*}}(12)
 # CHECK-NEXT:        mtctr 12
 # CHECK-NEXT:        bctr
+# CHECK-NEXT:        ...
 # CHECK-EMPTY:
 
 # CHECK-NEXT: <__long_branch_>:
-# CHECK-NEXT:  2030: addis 12, 2, 0
+# CHECK-NEXT:  2040: addis 12, 2, 0
 # CHECK-NEXT:        ld 12, {{.*}}(12)
 # CHECK-NEXT:        mtctr 12
 # CHECK-NEXT:        bctr
 
 .section .text_low, "ax", @progbits
 .globl _start
 _start:
 beq high           # Need a thunk

lld/test/ELF/ppc64-long-branch.s

 # RUN: llvm-mc -filetype=obj -triple=ppc64 %s -o %t.o
 # RUN: ld.lld -T %t.script %t.o -o %t
 # RUN: llvm-readelf -S -r %t | FileCheck --check-prefix=SEC %s
 # RUN: llvm-readelf -x .branch_lt %t | FileCheck --check-prefix=BRANCH-BE %s
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 # RUN: llvm-nm --no-sort %t | FileCheck --check-prefix=NM %s
 
 # SEC: Name       Type     Address          Off     Size   ES Flg Lk Inf Al
-# SEC: .got       PROGBITS 0000000002002030 2002030 000008 00  WA  0   0  8
-# SEC: .branch_lt PROGBITS 0000000002002038 2002038 000018 00  WA  0   0  8
+# SEC: .got       PROGBITS 0000000002002040 2002040 000008 00  WA  0   0  8
+# SEC: .branch_lt PROGBITS 0000000002002048 2002048 000018 00  WA  0   0  8
 
 # SEC: There are no relocations in this file.
 
 ## high@localentry (high+8), .text_high+16 and .text_low+8
-# BRANCH-LE:      0x02002038 08200002 00000000 10200002 00000000
-# BRANCH-LE-NEXT: 0x02002048 08200000 00000000
-# BRANCH-BE:      0x02002038 00000000 02002008 00000000 02002010
-# BRANCH-BE-NEXT: 0x02002048 00000000 00002008
+# BRANCH-LE:      0x02002048 08200002 00000000 10200002 00000000
+# BRANCH-LE-NEXT: 0x02002058 08200000 00000000
+# BRANCH-BE:      0x02002048 00000000 02002008 00000000 02002010
+# BRANCH-BE-NEXT: 0x02002058 00000000 00002008
 
 # CHECK:      <_start>:
 # CHECK-NEXT:     2000:       bl 0x2020
 # CHECK-NEXT:                 bl 0x2020
 # CHECK-NEXT:                 bl 0x2020
 # CHECK-NEXT:                 bl 0x2002008
 
 ## &.branch_lt[0] - .TOC. = .branch_lt - (.got+0x8000) = -32760
 # CHECK:      <__long_branch_high>:
 # CHECK-NEXT:     2020:       addis 12, 2, 0
 # CHECK-NEXT:                 ld 12, -32760(12)
 # CHECK-NEXT:                 mtctr 12
 # CHECK-NEXT:                 bctr
 
 ## &.branch_lt[1] - .TOC. = .branch_lt - (.got+0x8000) = -32752
 # CHECK:      <__long_branch_>:
-# CHECK-NEXT:     2030:       addis 12, 2, 0
+# CHECK-NEXT:     2040:       addis 12, 2, 0
 # CHECK-NEXT:                 ld 12, -32752(12)
 # CHECK-NEXT:                 mtctr 12
 # CHECK-NEXT:                 bctr
 
 .section .text_low, "ax", %progbits
 .globl _start
 _start:
 bl high          # Need a thunk
 bl high          # Need a thunk
 bl high          # Need a thunk
 bl high
 bl .text_high+16 # Need a thunk
 blr
 
 # CHECK:      Disassembly of section .text_high:
 # CHECK-EMPTY:
 # CHECK-NEXT: <high>:
 # CHECK-NEXT:  2002000:       addis 2, 12, 1
-# CHECK-NEXT:                 addi 2, 2, -32720
+# CHECK-NEXT:                 addi 2, 2, -32704
 # CHECK-NEXT:                 bl 0x2008
 # CHECK-NEXT:                 bl 0x2002020
 # CHECK:      <__long_branch_>:
 # CHECK-NEXT:  2002020:       addis 12, 2, 0
 # CHECK-NEXT:                 ld 12, -32744(12)
 # CHECK-NEXT:                 mtctr 12
 # CHECK-NEXT:                 bctr
 

lld/test/ELF/ppc64-pcrel-call-to-extern.s

 # RUN: llvm-mc -filetype=obj -triple=powerpc64 %s -o %t2.o
 # RUN: ld.lld --shared %t2.o -o %t2.so
 # RUN: ld.lld -T %t.script %t1.o %t2.so -o %t
 # RUN: llvm-readelf -s %t | FileCheck %s --check-prefix=SYMBOL
 # RUN: llvm-readelf -S -d %t | FileCheck %s --check-prefix=SEC
 # RUN: llvm-readobj -r %t | FileCheck %s --check-prefix=REL
 # RUN: llvm-objdump -d --no-show-raw-insn --mcpu=pwr10 %t | FileCheck %s
 
+# RUN: llvm-mc -filetype=obj -triple=powerpc64le --defsym AUX=1 %s -o %t1.o
+# RUN: llvm-mc -filetype=obj -triple=powerpc64le %s -o %t2.o
+# RUN: ld.lld --shared %t2.o -o %t2.so
+# RUN: ld.lld -T %t.script %t1.o %t2.so -o %t --no-power10-stubs
+# RUN: llvm-readelf -s %t | FileCheck %s --check-prefix=SYMBOL-NOP10
+# RUN: llvm-readelf -S -d %t | FileCheck %s --check-prefix=SEC-NOP10
+# RUN: llvm-readobj -r %t | FileCheck %s --check-prefix=REL-NOP10
+# RUN: llvm-objdump -d --no-show-raw-insn --mcpu=pwr10 %t | FileCheck %s --check-prefix=CHECK-NOP10
+
+# RUN: llvm-mc -filetype=obj -triple=powerpc64 --defsym AUX=1 %s -o %t1.o
+# RUN: llvm-mc -filetype=obj -triple=powerpc64 %s -o %t2.o
+# RUN: ld.lld --shared %t2.o -o %t2.so
+# RUN: ld.lld -T %t.script %t1.o %t2.so -o %t --no-power10-stubs
+# RUN: llvm-readelf -s %t | FileCheck %s --check-prefix=SYMBOL-NOP10
+# RUN: llvm-readelf -S -d %t | FileCheck %s --check-prefix=SEC-NOP10
+# RUN: llvm-readobj -r %t | FileCheck %s --check-prefix=REL-NOP10
+# RUN: llvm-objdump -d --no-show-raw-insn --mcpu=pwr10 %t | FileCheck %s --check-prefix=CHECK-NOP10
+
 ## The test is created to check that when a function without TOC access an
 ## external function, a r12 setup stub is inserted.
 
 # SYMBOL: Symbol table '.dynsym' contains 4 entries:
 # SYMBOL:      1: 0000000000000000     0 NOTYPE  GLOBAL DEFAULT                UND callee_global_stother0
 # SYMBOL-NEXT: 2: 0000000000000000     0 NOTYPE  GLOBAL DEFAULT [<other: 0x20>] UND callee_global_stother1
 # SYMBOL-NEXT: 3: 0000000000000000     0 NOTYPE  GLOBAL DEFAULT [<other: 0x60>] UND callee_global_TOC
 
 # SYMBOL: Symbol table '.symtab' contains 12 entries:
 # SYMBOL:      2: 0000000010010000     0 NOTYPE  LOCAL  DEFAULT [<other: 0x20>]   6 caller1
 # SYMBOL-NEXT: 3: 0000000010020000     0 NOTYPE  LOCAL  DEFAULT [<other: 0x20>]   7 caller2
 # SYMBOL-NEXT: 4: 0000000010030000     0 NOTYPE  LOCAL  DEFAULT [<other: 0x20>]   8 caller3
-# SYMBOL:      6: 0000000010010010    16 FUNC    LOCAL  DEFAULT                  6 __plt_pcrel_callee_global_stother0
-# SYMBOL-NEXT: 7: 0000000010020010    16 FUNC    LOCAL  DEFAULT                  7 __plt_pcrel_callee_global_stother1
-# SYMBOL-NEXT: 8: 0000000010030010    16 FUNC    LOCAL  DEFAULT                  8 __plt_pcrel_callee_global_TOC
+# SYMBOL:      6: 0000000010010010    32 FUNC    LOCAL  DEFAULT                  6 __plt_pcrel_callee_global_stother0
+# SYMBOL-NEXT: 7: 0000000010020010    32 FUNC    LOCAL  DEFAULT                  7 __plt_pcrel_callee_global_stother1
+# SYMBOL-NEXT: 8: 0000000010030010    32 FUNC    LOCAL  DEFAULT                  8 __plt_pcrel_callee_global_TOC
 # SYMBOL-NEXT: 9: 0000000000000000     0 NOTYPE  GLOBAL DEFAULT                UND callee_global_stother0
 # SYMBOL-NEXT: 10: 0000000000000000     0 NOTYPE  GLOBAL DEFAULT [<other: 0x20>] UND callee_global_stother1
 # SYMBOL-NEXT: 11: 0000000000000000     0 NOTYPE  GLOBAL DEFAULT [<other: 0x60>] UND callee_global_TOC
 
+# SYMBOL-NOP10: Symbol table '.symtab' contains 12 entries:
+# SYMBOL-NOP10:      2: 0000000010010000     0 NOTYPE  LOCAL  DEFAULT [<other: 0x20>]   6 caller1
+# SYMBOL-NOP10-NEXT: 3: 0000000010020000     0 NOTYPE  LOCAL  DEFAULT [<other: 0x20>]   7 caller2
+# SYMBOL-NOP10-NEXT: 4: 0000000010030000     0 NOTYPE  LOCAL  DEFAULT [<other: 0x20>]   8 caller3
+# SYMBOL-NOP10:      6: 0000000010010010    32 FUNC    LOCAL  DEFAULT                  6 __plt_pcrel_callee_global_stother0
+# SYMBOL-NOP10-NEXT: 7: 0000000010020010    32 FUNC    LOCAL  DEFAULT                  7 __plt_pcrel_callee_global_stother1
+# SYMBOL-NOP10-NEXT: 8: 0000000010030010    32 FUNC    LOCAL  DEFAULT                  8 __plt_pcrel_callee_global_TOC
+# SYMBOL-NOP10-NEXT: 9: 0000000000000000     0 NOTYPE  GLOBAL DEFAULT                UND callee_global_stother0
+# SYMBOL-NOP10-NEXT: 10: 0000000000000000     0 NOTYPE  GLOBAL DEFAULT [<other: 0x20>] UND callee_global_stother1
+# SYMBOL-NOP10-NEXT: 11: 0000000000000000     0 NOTYPE  GLOBAL DEFAULT [<other: 0x60>] UND callee_global_TOC
+
 ## DT_PLTGOT points to .plt
-# SEC: .plt              NOBITS          0000000010030148 040148 000028 00  WA  0   0  8
-# SEC: 0x0000000000000003 (PLTGOT)      0x10030148
+# SEC: .plt              NOBITS          0000000010030158 040158 000028 00  WA  0   0  8
+# SEC-OG: .plt              NOBITS          0000000010030148 040148 000028 00  WA  0   0  8
+# SEC: 0x0000000000000003 (PLTGOT)      0x10030158
+# SEC-OG: 0x0000000000000003 (PLTGOT)      0x10030158
+
+## DT_PLTGOT points to .plt
+# SEC-NOP10: .plt              NOBITS          0000000010030158 040158 000028 00  WA  0   0  8
+# SEC-NOP10: 0x0000000000000003 (PLTGOT)      0x10030158
 
 ## The first 2 entries in the .plt are reserved for the dynamic linkers
 ## usage. The JMP_SLOT relocations are stored at .plt[2], .plt[3], .plt[4].
 ## Check that we emit 3 R_PPC64_JMP_SLOT in .rela.plt.
 # REL:      .rela.plt {
-# REL-NEXT:   0x10030158 R_PPC64_JMP_SLOT callee_global_stother0 0x0
-# REL-NEXT:   0x10030160 R_PPC64_JMP_SLOT callee_global_stother1 0x0
-# REL-NEXT:   0x10030168 R_PPC64_JMP_SLOT callee_global_TOC 0x0
+# REL-NEXT:   0x10030168 R_PPC64_JMP_SLOT callee_global_stother0 0x0
+# REL-NEXT-OG:   0x10030158 R_PPC64_JMP_SLOT callee_global_stother0 0x0
+# REL-NEXT:   0x10030170 R_PPC64_JMP_SLOT callee_global_stother1 0x0
+# REL-NEXT-OG:   0x10030160 R_PPC64_JMP_SLOT callee_global_stother1 0x0
+# REL-NEXT:   0x10030178 R_PPC64_JMP_SLOT callee_global_TOC 0x0
+# REL-NEXT-OG:   0x10030168 R_PPC64_JMP_SLOT callee_global_TOC 0x0
 # REL-NEXT: }
 
+# REL-NOP10:      .rela.plt {
+# REL-NOP10-NEXT:   0x10030168 R_PPC64_JMP_SLOT callee_global_stother0 0x0
+# REL-NOP10-NEXT:   0x10030170 R_PPC64_JMP_SLOT callee_global_stother1 0x0
+# REL-NOP10-NEXT:   0x10030178 R_PPC64_JMP_SLOT callee_global_TOC 0x0
+# REL-NOP10-NEXT: }
+
 # CHECK-LABEL: <caller1>:
 # CHECK:       10010000: bl 0x10010010
 # CHECK-NEXT:  10010004: blr
 
-## .plt[2] - 0x10010010 = 0x10030158 - 0x10010010 = 0x20148 = 131400
+# CHECK-NOP10-LABEL: <caller1>:
+# CHECK-NOP10:       10010000: bl 0x10010010
+# CHECK-NOP10-NEXT:  10010004: blr
+
+## .plt[2] - 0x10010010 = 0x10030168 - 0x10010010 = 0x20158 = 131416
 # CHECK-LABEL: <__plt_pcrel_callee_global_stother0>:
-# CHECK:       10010010: pld 12, 131400(0), 1
+# CHECK:       10010010: pld 12, 131416(0), 1
 # CHECK-NEXT:  10010018: mtctr 12
 # CHECK-NEXT:  1001001c: bctr
 
+## No P10; branch to next inst to get addr
+# CHECK-NOP10-LABEL: <__plt_pcrel_callee_global_stother0>:
+# CHECK-NOP10:       10010010: mflr 0
+# CHECK-NOP10-NEXT:  10010014: bcl 20, 31, 0x10010018
+# CHECK-NOP10:       10010018: mflr 11
+# CHECK-NOP10:       1001001c: mtlr 12
+# CHECK-NOP10:       10010020: addis 12, 11, -4097
+# CHECK-NOP10:       10010024: addi  12, 12, -24
+# CHECK-NOP10-NEXT:  10010028: mtctr 12
+# CHECK-NOP10-NEXT:  1001002c: bctr
+
 # CHECK-LABEL: <caller2>:
 # CHECK:       10020000: bl 0x10020010
 # CHECK-NEXT:  10020004: blr
 
-## .plt[3] - 0x10020010 = 0x10030160 - 0x10020010 = 0x10150 = 65872
+# CHECK-NOP10-LABEL: <caller2>:
+# CHECK-NOP10:       10020000: bl 0x10020010
+# CHECK-NOP10-NEXT:  10020004: blr
+
+## .plt[3] - 0x10020010 = 0x10030170 - 0x10020010 = 0x10160 = 65888
 # CHECK-LABEL: <__plt_pcrel_callee_global_stother1>:
-# CHECK:       10020010: pld 12, 65872(0), 1
+# CHECK:       10020010: pld 12, 65888(0), 1
 # CHECK-NEXT:  10020018: mtctr 12
 # CHECK-NEXT:  1002001c: bctr
 
+## no P10; branch to next inst to get addr
+# CHECK-NOP10-LABEL: <__plt_pcrel_callee_global_stother1>:
+# CHECK-NOP10:       10020010: mflr 0
+# CHECK-NOP10-NEXT:  10020014: bcl 20, 31, 0x10020018
+# CHECK-NOP10-NEXT:  10020018: mflr 11
+# CHECK-NOP10-NEXT:  1002001c: mtlr 12
+# CHECK-NOP10-NEXT:  10020020: addis 12, 11, -4098
+# CHECK-NOP10-NEXT:  10020024: addi 12, 12, -24
+# CHECK-NOP10-NEXT:  10020028: mtctr 12
+# CHECK-NOP10-NEXT:  1002002c: bctr
+
 # CHECK-LABEL: <caller3>:
 # CHECK:       10030000: bl 0x10030010
 # CHECK-NEXT:  10030004: blr
 
-## .plt[4] - 0x10030010 = 0x10030168 - 0x10030010 = 0x150 = 344
+# CHECK-NOP10-LABEL: <caller3>:
+# CHECK-NOP10:       10030000: bl 0x10030010
+# CHECK-NOP10-NEXT:  10030004: blr
+
+## .plt[4] - 0x10030010 = 0x10030178 - 0x10030010 = 0x168 = 360
 # CHECK-LABEL: <__plt_pcrel_callee_global_TOC>:
-# CHECK:       10030010: pld 12, 344(0), 1
+# CHECK:       10030010: pld 12, 360(0), 1
 # CHECK-NEXT:  10030018: mtctr 12
 # CHECK-NEXT:  1003001c: bctr
 
+## no P10; branch to next inst to get addr
+# CHECK-NOP10-LABEL: <__plt_pcrel_callee_global_TOC>:
+# CHECK-NOP10-NEXT:  10030010: mflr 0
+# CHECK-NOP10-NEXT:  10030014: bcl 20, 31, 0x10030018
+# CHECK-NOP10-NEXT:  10030018: mflr 11
+# CHECK-NOP10-NEXT:  1003001c: mtlr 12
+# CHECK-NOP10-NEXT:  10030020: addis 12, 11, -4099
+# CHECK-NOP10-NEXT:  10030024: addi 12, 12, -24
+# CHECK-NOP10-NEXT:  10030028: mtctr 12
+# CHECK-NOP10-NEXT:  1003002c: bctr
+
 .ifdef AUX
 .section .text_caller1, "ax", %progbits
 caller1:
   .localentry caller1, 1
   bl callee_global_stother0@notoc
   blr
 .section .text_caller2, "ax", %progbits
 caller2:

lld/test/ELF/ppc64-pcrel-call-to-toc.s

 # RUN: llvm-readelf -s %t | FileCheck %s --check-prefix=SYMBOL
 # RUN: llvm-objdump -d --no-show-raw-insn --mcpu=pwr10 %t | FileCheck %s
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64 %s -o %t.o
 # RUN: ld.lld -T %t.script %t.o -o %t
 # RUN: llvm-readelf -s %t | FileCheck %s --check-prefix=SYMBOL
 # RUN: llvm-objdump -d --no-show-raw-insn --mcpu=pwr10 %t | FileCheck %s
 
+# RUN: llvm-mc -filetype=obj -triple=powerpc64le %s -o %t.o
+# RUN: ld.lld -T %t.script %t.o -o %t --no-power10-stubs
+# RUN: llvm-readelf -s %t | FileCheck %s --check-prefix=SYMBOL
+# RUN: llvm-objdump -d --no-show-raw-insn --mcpu=pwr10 %t \
+# RUN: | FileCheck %s --check-prefix=CHECK-NOP10
+
 ## When a function without TOC accesses a function using TOC, an r12 setup stub
 ## is inserted
 
 # SYMBOL:      1: 0000000010010000 0 NOTYPE LOCAL DEFAULT 1 func
 # SYMBOL-NEXT: 2: 0000000010020000 0 NOTYPE LOCAL DEFAULT [<other: 0x60>] 2 callee
 # SYMBOL:      4: 0000000010030000 0 NOTYPE LOCAL DEFAULT [<other: 0x20>] 3 caller
-# SYMBOL:      6: 0000000010030010 16 FUNC LOCAL DEFAULT 3 __gep_setup_callee
+# SYMBOL:      6: 0000000010030010 32 FUNC LOCAL DEFAULT 3 __gep_setup_callee
 
 # CHECK-LABEL: <func>:
 # CHECK-NEXT:  blr
 
 # CHECK-LABEL: <callee>:
 # CHECK:       bl 0x10010000
 # CHECK-NEXT:  addis 4, 2, -1
-# CHECK-NEXT:  lwz 4, 32744(4)
+# CHECK-NEXT:  lwz 4, 32728(4)
 # CHECK-NEXT:  blr
 
 # CHECK-LABEL: <caller>:
 # CHECK-NEXT:  bl 0x10030010
 # CHECK-NEXT:  blr
 
 # CHECK-LABEL: <__gep_setup_callee>:
 # CHECK-NEXT:  paddi 12, 0, -65552, 1
 # CHECK-NEXT:  mtctr 12
 # CHECK-NEXT:  bctr
 
+# CHECK-NOP10-LABEL: <__gep_setup_callee>:
+# CHECK-NOP10-NEXT:  mflr 0
+# CHECK-NOP10-NEXT:  bcl 20, 31, 0x10030018
+# CHECK-NOP10-NEXT:  mflr 11
+# CHECK-NOP10-NEXT:  mtlr 12
+# CHECK-NOP10-NEXT:  addis 12, 11, -1
+# CHECK-NOP10-NEXT:  addi 12, 12, -24
+# CHECK-NOP10-NEXT:  mtctr 12
+# CHECK-NOP10-NEXT:  bctr
+
 .section .text_func, "ax", %progbits
 func:
   blr
 
 .section .text_callee, "ax", %progbits
 callee:
 .Lfunc_gep1:
   addis 2, 12, .TOC.-.Lfunc_gep1@ha

lld/test/ELF/ppc64-plt-stub-compatible.s

 .ifdef T1
 .globl callee
 callee:
   blr
 .endif
 
 # T2-LABEL: <p9codegen>:
 # T2-NEXT:    10010300: addis 2, 12, 1
-# T2-NEXT:    10010304: addi 2, 2, -32384
+# T2-NEXT:    10010304: addi 2, 2, -32368
 # T2-NEXT:    10010308: addis 4, 2, -1
-# T2-NEXT:    1001030c: lwa 3, 32428(4)
+# T2-NEXT:    1001030c: lwa 3, 32412(4)
 # T2-NEXT:    10010310: bl 0x10010330
 # T2-NEXT:    10010314: ld 2, 24(1)
 # T2-NEXT:    10010318: blr
 
 # T2-LABEL: <p10codegen>:
 # T2-NEXT:    1001031c: plwa 3, 16(0), 1
 # T2-NEXT:    10010324: bl 0x10010350
 # T2-NEXT:    10010328: blr
 
 # T2-LABEL: <__plt_callee>:
 # T2-NEXT:    10010330: std 2, 24(1)
 # T2-NEXT:    10010334: addis 12, 2, 0
 # T2-NEXT:    10010338: ld 12, -32744(12)
 # T2-NEXT:    1001033c: mtctr 12
 # T2-NEXT:    10010340: bctr
 
 # T2-LABEL: <__plt_pcrel_callee>:
-# T2-NEXT:    10010350: pld 12, 328(0), 1
+# T2-NEXT:    10010350: pld 12, 344(0), 1
 # T2-NEXT:    10010358: mtctr 12
 # T2-NEXT:    1001035c: bctr
 .ifdef T2
 .section .text_start, "ax", %progbits
 p9codegen:
 .Lfunc_gep0:
   addis 2, 12, .TOC.-.Lfunc_gep0@ha
   addi 2, 2, .TOC.-.Lfunc_gep0@l

 
 # T3-LABEL: <p10codegen>:
 # T3-NEXT:    10010300: plwa 3, 44(0), 1
 # T3-NEXT:    10010308: bl 0x10010330
 # T3-NEXT:    1001030c: blr
 
 # T3-LABEL: <p9codegen>:
 # T3-NEXT:    10010310: addis 2, 12, 1
-# T3-NEXT:    10010314: addi 2, 2, -32408
+# T3-NEXT:    10010314: addi 2, 2, -32392
 # T3-NEXT:    10010318: addis 4, 2, -1
-# T3-NEXT:    1001031c: lwa 3, 32436(4)
-# T3-NEXT:    10010320: bl 0x10010340
+# T3-NEXT:    1001031c: lwa 3, 32420(4)
+# T3-NEXT:    10010320: bl 0x10010350
 # T3-NEXT:    10010324: ld 2, 24(1)
 # T3-NEXT:    10010328: blr
 
 # T3-LABEL: <__plt_pcrel_callee>:
-# T3-NEXT:    10010330: pld 12, 352(0), 1
+# T3-NEXT:    10010330: pld 12, 368(0), 1
 # T3-NEXT:    10010338: mtctr 12
 # T3-NEXT:    1001033c: bctr
 
 # T3-LABEL: <__plt_callee>:
-# T3-NEXT:    10010340: std 2, 24(1)
-# T3-NEXT:    10010344: addis 12, 2, 0
-# T3-NEXT:    10010348: ld 12, -32744(12)
-# T3-NEXT:    1001034c: mtctr 12
-# T3-NEXT:    10010350: bctr
+# T3-NEXT:    10010350: std 2, 24(1)
+# T3-NEXT:    10010354: addis 12, 2, 0
+# T3-NEXT:    10010358: ld 12, -32744(12)
+# T3-NEXT:    1001035c: mtctr 12
+# T3-NEXT:    10010360: bctr
 .ifdef T3
 .section .text_start, "ax", %progbits
 p10codegen:
   .localentry   main, 1
   plwa 3, Global@PCREL(0), 1
   bl callee@notoc
   blr
 p9codegen:

lld/test/ELF/ppc64-tls-pcrel-gd.s

x:
   .long 0
 .globl  y
 y:
   .long 0
 
 #--- asm
 
 # GD-RELOC: Relocation section '.rela.dyn' at offset 0x100b8 contains 4 entries:
-# GD-RELOC: 0000000001001160  0000000100000044 R_PPC64_DTPMOD64       0000000000000000 x + 0
-# GD-RELOC: 0000000001001168  000000010000004e R_PPC64_DTPREL64       0000000000000000 x + 0
-# GD-RELOC: 0000000001001170  0000000300000044 R_PPC64_DTPMOD64       0000000000000000 y + 0
-# GD-RELOC: 0000000001001178  000000030000004e R_PPC64_DTPREL64       0000000000000000 y + 0
+# GD-RELOC: 0000000001001170  0000000100000044 R_PPC64_DTPMOD64       0000000000000000 x + 0
+# GD-RELOC: 0000000001001178  000000010000004e R_PPC64_DTPREL64       0000000000000000 x + 0
+# GD-RELOC: 0000000001001180  0000000300000044 R_PPC64_DTPMOD64       0000000000000000 y + 0
+# GD-RELOC: 0000000001001188  000000030000004e R_PPC64_DTPREL64       0000000000000000 y + 0
 
 # GD-SYM:   Symbol table '.dynsym' contains 4 entries:
 # GD-SYM:   0000000000000000     0 TLS     GLOBAL DEFAULT   UND x
 # GD-SYM:   0000000000000000     0 TLS     GLOBAL DEFAULT   UND y
 
 
 # GDTOIE-RELOC: Relocation section '.rela.dyn' at offset 0x{{.*}} contains 2 entries:
 # GDTOIE-RELOC: 00000000010010e0  0000000100000049 R_PPC64_TPREL64        0000000000000000 x + 0
 # GDTOIE-RELOC: 00000000010010e8  0000000300000049 R_PPC64_TPREL64        0000000000000000 y + 0
 
 # GDTOIE-SYM: Symbol table '.dynsym' contains 4 entries:
 # GDTOIE-SYM:   0000000000000000     0 TLS     GLOBAL DEFAULT   UND x
 # GDTOIE-SYM:   0000000000000000     0 TLS     GLOBAL DEFAULT   UND y
 
 
 # GDTOLE-RELOC: There are no relocations in this file.
 
 # GDTOLE-SYM: Symbol table '.symtab' contains 5 entries:
 # GDTOLE-SYM: 0000000000000000     0 TLS     GLOBAL DEFAULT     3 x
 # GDTOLE-SYM: 0000000000000004     0 TLS     GLOBAL DEFAULT     3 y
 
 # GD-LABEL: <GDTwoVal>:
-# GD-NEXT:    paddi 3, 0, 352, 1
+# GD-NEXT:    paddi 3, 0, 368, 1
 # GD-NEXT:    bl
-# GD-NEXT:    paddi 3, 0, 356, 1
+# GD-NEXT:    paddi 3, 0, 372, 1
 # GD-NEXT:    bl
 # GD-NEXT:    blr
 # GDTOIE-LABEL: <GDTwoVal>:
 # GDTOIE-NEXT:    pld 3, 224(0), 1
 # GDTOIE-NEXT:    add 3, 3, 13
 # GDTOIE-NEXT:    pld 3, 220(0), 1
 # GDTOIE-NEXT:    add 3, 3, 13
 # GDTOIE-NEXT:    blr

lld/test/ELF/ppc64-toc-call-to-pcrel-long-jump.s

 # REQUIRES: ppc
 # RUN: split-file %s %t
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le %t/asm -o %t.o
 # RUN: ld.lld -T %t/lts %t.o -o %t_le
 # RUN: llvm-objdump --mcpu=pwr10 --no-show-raw-insn -d %t_le | FileCheck %s
 # RUN: llvm-readelf -s %t_le | FileCheck %s --check-prefix=SYM
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64 %t/asm -o %t.o
 # RUN: ld.lld -T %t/lts %t.o -o %t_be
 # RUN: llvm-objdump --mcpu=pwr10 --no-show-raw-insn -d %t_be | FileCheck %s
 # RUN: llvm-readelf -s %t_be | FileCheck %s --check-prefix=SYM
 
+# RUN: llvm-mc -filetype=obj -triple=powerpc64le %t/asm -o %t.o
+# RUN: ld.lld -T %t/lts %t.o -o %t_le --no-power10-stubs
+# RUN: llvm-objdump --mcpu=pwr10 --no-show-raw-insn -d %t_le | FileCheck %s --check-prefix=NoP10
+# RUN: llvm-readelf -s %t_le | FileCheck %s --check-prefix=SYM
+
 # SYM:      Symbol table '.symtab' contains 9 entries:
 # SYM:      1: 0000000010010000     0 NOTYPE  LOCAL  DEFAULT [<other: 0x20>]   1 callee
 # SYM-NEXT: 2: 0000000010020008     0 NOTYPE  LOCAL  DEFAULT                  2 caller_close
 # SYM-NEXT: 3: 0000000020020008     0 NOTYPE  LOCAL  DEFAULT [<other: 0x60>]   3 caller
 # SYM-NEXT: 4: 0000000520020008     0 NOTYPE  LOCAL  DEFAULT                  4 caller_far
-# SYM-NEXT: 5: 0000000520028038     0 NOTYPE  LOCAL  HIDDEN                   6 .TOC.
+# SYM-NEXT: 5: 0000000520028040     0 NOTYPE  LOCAL  HIDDEN                   6 .TOC.
 # SYM-NEXT: 6: 0000000010020020     8 FUNC    LOCAL  DEFAULT                  2 __toc_save_callee
-# SYM-NEXT: 7: 0000000020020020    20 FUNC    LOCAL  DEFAULT                  3 __toc_save_callee
-# SYM-NEXT: 8: 0000000520020020    20 FUNC    LOCAL  DEFAULT                  4 __toc_save_callee
+# SYM-NEXT: 7: 0000000020020020    32 FUNC    LOCAL  DEFAULT                  3 __toc_save_callee
+# SYM-NEXT: 8: 0000000520020020    32 FUNC    LOCAL  DEFAULT                  4 __toc_save_callee
 
 #--- lts
 PHDRS {
   callee PT_LOAD FLAGS(0x1 | 0x4);
   close PT_LOAD FLAGS(0x1 | 0x4);
   caller PT_LOAD FLAGS(0x1 | 0x4);
   far PT_LOAD FLAGS(0x1 | 0x4);
 }

 # CHECK:         bl 0x20020020
 # CHECK-NEXT:    ld 2, 24(1)
 # CHECK-NEXT:    blr
 # CHECK-LABEL: <__toc_save_callee>:
 # CHECK:         std 2, 24(1)
 # CHECK-NEXT:    paddi 12, 0, -268501028, 1
 # CHECK-NEXT:    mtctr 12
 # CHECK-NEXT:    bctr
+
+# NoP10-LABEL: <caller>:
+# NoP10:         bl 0x20020020
+# NoP10-NEXT:    ld 2, 24(1)
+# NoP10-NEXT:    blr
+# NoP10-LABEL: <__toc_save_callee>:
+# NoP10-NEXT:         std 2, 24(1)
+# NoP10-NEXT:    addis 12, 2, -4098
+# NoP10-NEXT:    addi 12, 12, 32704
+# NoP10-NEXT:    mtctr 12
+# NoP10-NEXT:    bctr
 .section .text_caller, "ax", %progbits
 .Lfunc_toc2:
   .quad .TOC.-.Lfunc_gep2
 caller:
 .Lfunc_gep2:
   ld 2, .Lfunc_toc2-.Lfunc_gep2(12)
   add 2, 2, 12
 .Lfunc_lep2:

lld/test/ELF/ppc64-toc-call-to-pcrel.s

 # REQUIRES: ppc
 # RUN: echo 'SECTIONS { \
 # RUN:       .text_callee 0x10010000 : { *(.text_callee) } \
 # RUN:       .text_caller 0x10020000 : { *(.text_caller) } \
 # RUN:       }' > %t.script
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le %s -o %t.o
 # RUN: ld.lld -T %t.script %t.o -o %t
 # RUN: llvm-readelf -s %t | FileCheck %s --check-prefix=SYMBOL
 # RUN: llvm-objdump -d --no-show-raw-insn --mcpu=future %t | FileCheck %s
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64 %s -o %t.o
 # RUN: ld.lld -T %t.script %t.o -o %t
 # RUN: llvm-readelf -s %t | FileCheck %s --check-prefix=SYMBOL
 # RUN: llvm-objdump -d --no-show-raw-insn --mcpu=future %t | FileCheck %s
 
+# RUN: llvm-mc -filetype=obj -triple=powerpc64 %s -o %t.o
+# RUN: ld.lld -T %t.script %t.o -o %t --no-power10-stubs
+# RUN: llvm-readelf -s %t | FileCheck %s --check-prefix=SYMBOL
+# RUN: llvm-objdump -d --no-show-raw-insn --mcpu=future %t \
+# RUN: | FileCheck %s
+
 # The point of this test is to make sure that when a function with TOC access
 # a local function with st_other=1, a TOC save stub is inserted.
 
 # SYMBOL: Symbol table '.symtab' contains 7 entries
 # SYMBOL: 10010000     0 NOTYPE  LOCAL  DEFAULT [<other: 0x20>]   1 callee
 # SYMBOL: 10020000     0 NOTYPE  LOCAL  DEFAULT [<other: 0x60>]   2 caller
 # SYMBOL: 10020020     0 NOTYPE  LOCAL  DEFAULT [<other: 0x60>]   2 caller_14
 # SYMBOL: 10020040     8 FUNC    LOCAL  DEFAULT                   2 __toc_save_callee
 
 # CHECK-LABEL: callee
 # CHECK:       blr
 
 # CHECK-LABEL: caller
 # CHECK:       bl 0x10020040
 # CHECK-NEXT:  ld 2, 24(1)

llvm/include/llvm/Object/ELF.h

 }
 
 static inline Error createError(const Twine &Err) {
   return make_error<StringError>(Err, object_error::parse_failed);
 }
 
 enum PPCInstrMasks : uint64_t {
   PADDI_R12_NO_DISP = 0x0610000039800000,
+  ADDIS_R12_TO_R2_NO_DISP = 0x3D820000,
+  ADDI_R12_TO_R2_NO_DISP = 0x39820000,
+  ADDI_R12_TO_R12_NO_DISP = 0x398C0000,
   PLD_R12_NO_DISP = 0x04100000E5800000,
   MTCTR_R12 = 0x7D8903A6,
   BCTR = 0x4E800420,
 };
 
 template <class ELFT> class ELFFile;
 
 template <class T> struct DataRegion {
   // This constructor is used when we know the start and the size of a data
   // region. We assume that Arr does not go past the end of the file.
   DataRegion(ArrayRef<T> Arr) : First(Arr.data()), Size(Arr.size()) {}