This patch defines vwmacc[u|su|us] intrinsics and lower to V instructions.
We work with @rogfer01 from BSC to come out this patch.
Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: ShihPo Hung <shihpo.hung@sifive.com>
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| Differential D93675
[RISCV] Add intrinsics for vwmacc[u|su|us] instructions ClosedPublic Authored by arcbbb on Dec 22 2020, 1:29 AM.
Details Summary This patch defines vwmacc[u|su|us] intrinsics and lower to V instructions. We work with @rogfer01 from BSC to come out this patch. Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Diff Detail
Event TimelineHerald added subscribers: NickHung, luismarques, apazos and 24 others. · View Herald TranscriptDec 22 2020, 1:29 AM Comment Actions LGTM
This revision is now accepted and ready to land.Dec 22 2020, 10:52 AM Closed by commit rG426878399803: [RISCV] Add intrinsics for vwmacc[u|su|us] instructions (authored by arcbbb). · Explain WhyDec 22 2020, 6:24 PM This revision was automatically updated to reflect the committed changes.
Revision Contents
Diff 313466 llvm/include/llvm/IR/IntrinsicsRISCV.td
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
llvm/test/CodeGen/RISCV/rvv/vwmacc-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vwmacc-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv64.ll
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Drop the space between llvm_anyint_ty and ']'