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[RISCV] Add intrinsics for vfmv.f.s and vfmv.s.f
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Authored by craig.topper on Dec 16 2020, 3:59 PM.

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Summary

Similar to D93365, but for floating point. No need for special ISD opcodes though. We can directly isel these from intrinsics. I had to use anyfloat_ty instead of anyvector_ty in the intrinsics to make LLVMVectorElementType not crash when imported into the -gen-dag-isel tablegen backend.

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craig.topper created this revision.Dec 16 2020, 3:59 PM
craig.topper requested review of this revision.Dec 16 2020, 3:59 PM
Herald added a project: Restricted Project. · View Herald TranscriptDec 16 2020, 3:59 PM
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This revision is now accepted and ready to land.Dec 17 2020, 12:48 AM
frasercrmck added inline comments.Dec 17 2020, 1:10 AM
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
1276

Is this the opposite of ToFPR32? Should we thus define FromFPR32? At any rate we can presumably defvar inst = !cast<Instruction>... to reduce code duplication.

Use defvar to simplify code.

Not sure if makes sense to add FromFPR32. This might be the only instruction that goes that direction.

frasercrmck accepted this revision.Dec 17 2020, 2:38 AM

Use defvar to simplify code.

Not sure if makes sense to add FromFPR32. This might be the only instruction that goes that direction.

Fair enough. We can create a helper out of it if and when it's required.

This revision was automatically updated to reflect the committed changes.