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[RISCV] Define vsll/vsrl/vsra intrinsics.
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Authored by HsiangKai on Dec 13 2020, 11:05 PM.

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Summary

Define vsll/vsrl/vsra intrinsics and lower to V instructions.

We work with @rogfer01 from BSC to come out this patch.

Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Hsiangkai Wang <kai.wang@sifive.com>

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Event Timeline

HsiangKai created this revision.Dec 13 2020, 11:05 PM
HsiangKai requested review of this revision.Dec 13 2020, 11:05 PM
Herald added a project: Restricted Project. · View Herald TranscriptDec 13 2020, 11:05 PM
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HsiangKai updated this revision to Diff 311588.Dec 14 2020, 7:25 AM
rogfer01 added inline comments.Dec 14 2020, 11:58 PM
llvm/test/CodeGen/RISCV/rvv/vsll.ll
12

Related to @craig.topper comment at https://reviews.llvm.org/D93175#2452890 do we want the ,ta,mu markers appear here?

I'd say so but maybe we have to to update earlier tests in the way?

HsiangKai added inline comments.Dec 15 2020, 12:08 AM
llvm/test/CodeGen/RISCV/rvv/vsll.ll
12

I agree. We should have ",ta,mu" in vsetvli instructions. I think I missed the modification in some test cases. I will update them. Thanks for pointing it out.

HsiangKai edited the summary of this revision. (Show Details)

Update test cases.

This revision is now accepted and ready to land.Dec 15 2020, 11:21 AM
This revision was landed with ongoing or failed builds.Dec 15 2020, 2:32 PM
This revision was automatically updated to reflect the committed changes.