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[ARM][AArch64] Add Cortex-A78C Support for Clang and LLVM
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Authored by MarkMurrayARM on Dec 10 2020, 4:02 AM.

Details

Summary

This patch upstreams support for the Armv8-a Cortex-A78C
processor for AArch64 and ARM.

In detail:

  • Adding cortex-a78c as cpu option for aarch64 and arm targets in clang
  • Adding Cortex-A78C CPU name and ProcessorModel in llvm

Details of the CPU can be found here:
https://www.arm.com/products/silicon-ip-cpu/cortex-a/cortex-a78c

Diff Detail

Event Timeline

MarkMurrayARM created this revision.Dec 10 2020, 4:02 AM
MarkMurrayARM requested review of this revision.Dec 10 2020, 4:02 AM
Herald added projects: Restricted Project, Restricted Project. · View Herald TranscriptDec 10 2020, 4:02 AM
DavidSpickett added inline comments.
llvm/unittests/Support/TargetParserTest.cpp
818

I assume this was left in from debugging, if not it should be its own change.
(considering this file is already using gtest, you could refactor to ASSERT_EQ the flags and get the messages for free)

ktkachov added inline comments.
llvm/lib/Target/AArch64/AArch64.td
673–686

According to the TRM at https://developer.arm.com/documentation/102226/0001 Cortex-A78C also supports Pointer Authetication and the Flag Manipulation instructions as well (CFINV, RMIF etc). I think this feature set doesn't reflect that?

miyuki added a subscriber: miyuki.Dec 10 2020, 4:27 AM
miyuki added inline comments.
llvm/unittests/Support/TargetParserTest.cpp
46

I suggest using LLVM I/O facilities instead of std::cout and stderr instead of stdout. E.g.

#include "llvm/Support/raw_ostream.h"
#include "llvm/Support/Format.h"
//...
errs() << "ExpectedFlags = " << format_hex(ExpectedFlags, 8) <<
//...
MarkMurrayARM added inline comments.Dec 10 2020, 5:37 AM
llvm/lib/Target/AArch64/AArch64.td
673–686

ktkachov: FeaturePA?

llvm/unittests/Support/TargetParserTest.cpp
818

I like the idea of ASSERT_EQ, but I need the numbers to be in hex.

DavidSpickett added inline comments.Dec 10 2020, 5:50 AM
llvm/unittests/Support/TargetParserTest.cpp
818
ktkachov added inline comments.Dec 15 2020, 1:22 AM
llvm/lib/Target/AArch64/AArch64.td
673–686

Ah indeed for pointer authentication. I think it also needs FeatureFMI for the flag manipulation instructions?

MarkMurrayARM edited the summary of this revision. (Show Details)Dec 15 2020, 1:30 AM
MarkMurrayARM edited the summary of this revision. (Show Details)

Address review comments.

MarkMurrayARM marked 4 inline comments as done.Dec 15 2020, 3:54 AM

Marked addressed comments as "done". Some debug code has been abandoned.

MarkMurrayARM added a reviewer: miyuki.
MarkMurrayARM added a reviewer: DavidSpickett.

Incorporate reviewer comments. Rebase.

MarkMurrayARM marked an inline comment as done.Dec 24 2020, 2:33 AM
dmgreen added inline comments.
llvm/include/llvm/Support/ARMTargetParser.def
300

RAS is already a part of ARMV8_2A. I think this should include ARM::AEK_FP16 | ARM::AEK_DOTPROD though, like the cortex-a78.

llvm/lib/Target/AArch64/AArch64.td
679

There are some missing here too from the above A78, like FeatureRCPC and FeatureSSBS (and DotProd)

Address review comments.

MarkMurrayARM marked 2 inline comments as done.Dec 24 2020, 7:05 AM
dmgreen added inline comments.Dec 24 2020, 7:38 AM
llvm/include/llvm/Support/AArch64TargetParser.def
142

This needs changing too.

llvm/lib/Target/ARM/ARM.td
1280

+ProcA78C

1285

DotProd here too I would think.

More review comments.

MarkMurrayARM marked 3 inline comments as done.Dec 24 2020, 8:36 AM
dmgreen accepted this revision.Dec 24 2020, 8:37 AM

Thanks. I think this LGTM now.

This revision is now accepted and ready to land.Dec 24 2020, 8:37 AM
MarkMurrayARM closed this revision.Jan 25 2021, 3:41 AM