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[ARM] MVE vector of 64bit types
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Authored by dmgreen on Jul 8 2019, 2:33 AM.

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Summary

We need to make sure that we are sensibly dealing with vectors of type v2i64 and v2f64, even if most of the time we cannot generate native operations for them. This mostly adds a lot of testing, plus fixes up a couple of the issues found. And, Or and xor can be legal for v2i64, and shifts combining needs a slight fixup.

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rL LLVM

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dmgreen created this revision.Jul 8 2019, 2:33 AM
dmgreen updated this revision to Diff 208352.Jul 8 2019, 3:32 AM

Updates tests

SjoerdMeijer added inline comments.Jul 9 2019, 2:48 AM
llvm/lib/Target/ARM/ARMISelLowering.cpp
337 ↗(On Diff #208352)

Do we need to predicate this on MVE?

dmgreen marked an inline comment as done.Jul 9 2019, 3:05 AM
dmgreen added inline comments.
llvm/lib/Target/ARM/ARMISelLowering.cpp
337 ↗(On Diff #208352)

Yep, we only call this if we have MVEIntegerOps. Neon is handled elsewhere and I think will promote all and/or/xors to v4i32.

SjoerdMeijer accepted this revision.Jul 9 2019, 3:48 AM

looks good to me

llvm/lib/Target/ARM/ARMISelLowering.cpp
337 ↗(On Diff #208352)

Ah, of course, cheers

This revision is now accepted and ready to land.Jul 9 2019, 3:48 AM
This revision was automatically updated to reflect the committed changes.