[DwarfDebug] Dump call site debug info into DWARF

[djtodoro]

Summary

Dump DWARF information about call sites and call site parameters into debug info sections.

The patch also provides an interface for interpretation of instructions that could load values of call site parameters in order to generate DWARF info about call site parameters.

Authors: @asowda, @NikolaPrica, @djtodoro, @ivanbaev

[djtodoro]

-Minor refactor

[aprantl]

Only a few superficial comments inline, I'll need to read this more carefully.

test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir

97

We probably don't most (all) of these attributes. If we can remove them that would be better, since they are a maintenance nightmare.

tools/llvm-dwarfdump/Statistics.cpp

401

Looks like these are untested?

[djtodoro]

test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir

97

Oh, we didn't want to push this :)
This will be removed.

tools/llvm-dwarfdump/Statistics.cpp

401

We will add tests.
Thanks!

[djtodoro]

-Rebase
-Update tests

[djtodoro]

-Rebase

[aprantl]

include/llvm/CodeGen/TargetInstrInfo.h

1691

Should this return an optional DIExpression? Is Op also an out parameter?

lib/CodeGen/AsmPrinter/DwarfDebug.cpp

523

Could we include what is being analyzed in the function name?

584

clang-format

618

Process

[djtodoro]

@aprantl Thanks for your comments!

include/llvm/CodeGen/TargetInstrInfo.h

1691

Yes, Op is also an out parameter and that is why we didn't use an optional DIExpression as return value here.

lib/CodeGen/AsmPrinter/DwarfDebug.cpp

523

collectCallSiteParameters is maybe more appropriate name since we are collecting parameters info here.

[djtodoro]

-Rebase
-Addressing comments
-Rename interpretationAnalysis()--> collectCallSiteParameters()
-Refactor the code

[aprantl]

include/llvm/CodeGen/TargetInstrInfo.h

1691

So why not return Optional<std::pair<const MachineOperand *, DIExpression *>> or is that worse?

lib/CodeGen/AsmPrinter/DwarfDebug.h

258

aren't registers usually unsigned?

lib/CodeGen/AsmPrinter/DwarfExpression.cpp

469

I'm confused by this. What's happening here?

[dstenb]

test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir

56

Would it be possible to split the test into two separate basic blocks (or perhaps even different functions) for the different calls to foo? I think that might help the readability a bit.

90

Do you need the lifetime intrinsics for the test, or can they be removed?

96

Can be removed.

128–133

I think that most of the attributes that are default-valued can be removed. In addition to these, also hasWinCFI, registers, constants, machineFunctionInfo, and perhaps much in frameInfo.

[NikolaPrica]

@dstenb Thank you for your comments! We will address them!

include/llvm/CodeGen/TargetInstrInfo.h

1691

Yea. Sure. We will refactor it.

lib/CodeGen/AsmPrinter/DwarfExpression.cpp

469

This should be:

emitBRreg(Op->getArg(1), 0);

For call site parameter value we need to fetch the content of a register.
This additional DW_OP_reg is used because describeLoadedValue can produce expression that includes 2 registers (needed to support LEA instructions). We should probably add assertion here since this is only used for parameter location description and delete else.
We will make comment for this.

[aprantl]

lib/CodeGen/AsmPrinter/DwarfExpression.cpp

469

IIUC, the Verifier should reject any DIExpressions containing DW_OP_entry_values, because it doesn't know about DW_OP_reg operations. That means you are not calling the verifier on any of the expressions generated by LiveDebugValues. Could we add an assert(DIExpr->isValid()) somewhere there? Or alternatively shouldn't the machine verifier also call DIExpression::isValid on all DBG_VALUEs? The latter would be even better.

[vsk]

Thanks for working on this. I haven't gotten to 'collectCallSiteParameters' or the x86-specific bits yet, but have some initial feedback which I hope is useful --

lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp

937

Does this switch the Dwarf4 + tuning=LLDB over to using GNU attributes? If so, can we either avoid that, or teach LLDB about the new attributes?

955

IIRC Dwarf5 specifies DW_AT_call_origin here. Is the GNU spec different? If so, why?

964

IIRC Dwarf5 allows DW_AT_call_return_pc here. Same question -- does the GNU spec disallow this, and if so, why?

970

This encodes the exact same information as DW_AT_call_return_pc above, just expressed as an offset from the binary load address as opposed to an offset from the start of the function. Why include both (specifically in the !ApplyGNUAttrs case)?

972

I alluded to this in a different comment -- and maybe this was already settled in which case I apologize for missing it -- but I'm not sure we should assume that Dwarf4 implies 'apply GNU attributes'. Assuming this means teaching LLDB about the GNU attributes, which I'd like to avoid doing unless it's important for LLDB to be able to debug GNU binaries.

978

I see the ApplyGNUAttrs ? A : B pattern repeated a lot. Maybe it'd be worthwhile to have a getDwarf5OrGNUAttribute helper which takes the official Dwarf5 attribute as an input, and returns either a) that same Dwarf5 attribute, or b) the appropriate GNU attribute.

lib/CodeGen/AsmPrinter/DwarfCompileUnit.h

234–235

Document CallReg?

lib/CodeGen/AsmPrinter/DwarfDebug.cpp

669–671

This comment is now stale, as the logic no longer ignores indirect calls.

724

Could you split this up into multiple calls to dbgs() s.t there's just one copy of each debug string ('CallSiteEntry', 'IsTail', etc.)?

[dstenb]

lib/CodeGen/AsmPrinter/DwarfDebug.cpp

583

This avoid looking at the first instruction in the block, which could load an argument. Perhaps this should be a do-while loop instead?

I have not been able to land in such a case when compiling C code on x86-64 (I don't know if it is even possible), but I encountered such cases with our downstream target.

[djtodoro]

@aprantl, @vsk and @dstenb. Thanks for your comments!

Thanks for working on this. I haven't gotten to 'collectCallSiteParameters' or the x86-specific bits yet, but have some initial feedback which I hope is useful --

@vsk It is useful for sure! :)

lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp

937

Sure. We will avoid it. We see that LLDB uses DWARF 5 symbols even in DWARF 4 case.
We will generate GNU attributes only in GDB + DWARF 4 tune.

955

It is different. It generates DW_AT_abstract_origin in that case because DW_AT_call_origin was part of DWARF 5.

964

The same as previous.

970

I see. We knew it was redundant. We will leave in the case of DWARF 5 that info, but GDB needs absolute address in the case of DWARF 4. For representing absolute address of a call DW_AT_low_pc is used.

978

Sure. We added that.

lib/CodeGen/AsmPrinter/DwarfDebug.cpp

583

Yes, thanks for this! We improved this!

724

Sure.

lib/CodeGen/AsmPrinter/DwarfDebug.h

258

Yes, thanks!

lib/CodeGen/AsmPrinter/DwarfExpression.cpp

469

DW_OP_reg is used only in situations when we want to describe an expression over two registers (example: Loading a parameter's value with LEA instruction. Please see X86InstrInfo::describeLoadedValue()). We can discuss about potential alternatives for that.

DW_OP_entry_values uses advantages from @entry values (read from DW_TAG_call_site_parameter info) when representing normal values. In debugger we would have a new feature for printing of new kind of value (i.e. print val@entry). GDB already has that support.
Without the part for producing DW_OP_entry_values (in LiveDebugValues) we would see just those val@entry and there won't be cases of improving normal values of a parameters.
For now, we generate DW_OP_entry_values with a simple register location, but the register is read from DBG_VALUE operand (We don't need DW_OP_reg in DIExpression for that). DIExpression has only entry value DWARF operand and the size of following expression (for now it is always 1, because the rest of expression will be only register from DBG_VALUE).

The conclusion is that there are two separate parts here:

1. Introduction debug info for call site parameters (DW_TAG_call_site_parameter) that is used for printing @entry value within debugger
2. Introduction of new kind of DWARF operand (DW_OP_entry_value) that can use benefits of @entry values when representing normal values of function parameters

[djtodoro]

-Refactor the code
-Trim existing tests
-Improve production of call site info
-Rebase

[aprantl]

I think we're getting there!

docs/LangRef.rst

4701

"a" physical register

4702

... after AsmPrinter to describe a call site ...

better be specific.

4703

This opcode is only generated by the ... pass.

lib/CodeGen/AsmPrinter/DwarfCompileUnit.h

238

tuning

[djtodoro]

@aprantl Thanks!

[djtodoro]

-Address suggestions

[aprantl]

docs/LangRef.rst

4708

when trying to describe -> to describe

it better get it right :-)

lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp

927

opcode -> attribute

lib/IR/DebugInfoMetadata.cpp

855

I think this must also check that we are inside an entry value.

[djtodoro]

lib/IR/DebugInfoMetadata.cpp

855

DW_OP_reg is used only in situations when we want to describe an expression over two registers (example: Loading a parameter's value with LEA instruction. Please see X86InstrInfo::describeLoadedValue()). We can discuss about potential alternatives for that.

DW_OP_entry_values uses advantages from @entry values (read from DW_TAG_call_site_parameter info) when representing normal values. In debugger we would have a new feature for printing of new kind of value (i.e. print val@entry). GDB already has that support.
Without the part for producing DW_OP_entry_values (in LiveDebugValues) we would see just those val@entry and there won't be cases of improving normal values of a parameters.
For now, we generate DW_OP_entry_values with a simple register location, but the register is read from DBG_VALUE operand (We don't need DW_OP_reg in DIExpression for that). DIExpression has only entry value DWARF operand and the size of following expression (for now it is always 1, because the rest of expression will be only register from DBG_VALUE).

The conclusion is that there are two separate parts here:

Introduction debug info for call site parameters (DW_TAG_call_site_parameter) that is used for printing @entry value within debugger
Introduction of new kind of DWARF operand (DW_OP_entry_value) that can use benefits of @entry values when representing normal values of function parameters

According to this comment this new DW_OP_reg operand will only be used in the situation when an instruction, that loads a value into parameter forwarding register, is dealing with multiple registers (please see test case test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir). The DIExpression that contains the DW_OP_reg will be used only for printing the DW_AT_GNU_call_site_value and if we remove this part the only thing that will happen is that we will have less number of call site parameters generated (because without the DW_AT_GNU_call_site_value a DW_TAG_GNU_call_site_parameter is useless and if don't manage to describe loaded value we are avoiding the production of call site parameters debug info).

[djtodoro]

-Address suggestions

[djtodoro]

-Add check for a frame reg when describing a parameter value

[djtodoro]

-Refactor the code a bit
-Rebase

[dstenb]

lib/CodeGen/AsmPrinter/DwarfDebug.cpp

556

Nit: interpret

lib/Target/X86/X86InstrInfo.cpp

7130

If neither this nor the isFI() condition are true then Op will be used uninitialized on line 7135 and onward. (I got a -Wsometimes-unintialized warning for this.)

[djtodoro]

@dstenb Thanks a lot for your comments!

[djtodoro]

-Addressing comments

[djtodoro]

-Rebase tests

[djtodoro]

-Rebase

[dstenb]

llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp

473 ↗

(On Diff #205799)

Is the fallthrough intentional here, or a merge artifact?

[djtodoro]

llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp

473 ↗

(On Diff #205799)

We forgot to update this on to Phabricator. Thanks!

[djtodoro]

-Fixing unintentional code during the rebase process

[dstenb]

Thanks a lot for your work with this patch series! It seems very useful.

Sorry for coming with this post-merge question, but I encountered it first now when trying to adapt this to our downstream target; what limitations are imposed on the MachineOperand pointer that the describeLoadedValue returns? For example, in our downstream target we materialize 0 with a sub $reg, $reg, so we'd have to return a pointer to a MachineOperand that is not part of the instruction. Is that allowed? I guess x86 has the same issue as it materializes 0 with xor.

Perhaps it would be possible to make the hook return a MachineOperand object instead? It could simplify the code a bit in such cases. Or would that be too expensive?

[djtodoro]

@dstenb Thanks a lot!

That seems like a good catch and we should support such scenario.

I think that it will be expensive to return a MachineOperand object. Could you please provide us with more info about the case? Can we describe such situation through the DIExpression instead?

[uweigand]

This commit broke codegen on SystemZ, we're now failing both the test-suite and the multistage bootstrap. Unfortunately this wasn't detected earlier since the SystemZ build bot was down.

The regressions go away when I revert the change to TargetRegisterInfo::isCallerPreservedPhysReg, i.e. change it back to always returning false. Note that this change is the only modification in this patch that has any effect on actual code generation (as opposed to debug info generation) -- was this really intentional?

I have not yet debugged the failure in detail, but I believe the isCallerPreservedPhysReg change is in fact incorrect -- this function was not intended to just mirror getCallPreservedMask (which simply describes the function call ABI), but rather to handle special cases like the PowerPC TOC register, which is not just simply preserved across calls, but rather is invariant throughout the whole function. This is why this check is used to eliminate invariant stores in MachineLICM. The change in this patch breaks that semantics.

This really needs to be fixed before the LLVM 9 release.

[djtodoro]

@uweigand Thanks for that! The commit is reverted with the rL365886.

We didn't want to change the generated code, so we just made a quick fix for this. This should solve the problem.

[djtodoro]

-Make a wrapper around the getCallPreservedMask() and use it in order to avoid changes in generated code

[dstenb]

In D60716#1580513, @djtodoro wrote:

@dstenb Thanks a lot!

That seems like a good catch and we should support such scenario.

I think that it will be expensive to return a MachineOperand object.

The size of MachineOperand is 32 bytes on x86-64, and the class only contains POD fields, so I guess it should be fairly cheap to copy such objects, or initialize them with compile-time known values? Though, perhaps that would still cause a noticeable increase in compilation time.

I think it would be interesting to benchmark that at least.

Could you please provide us with more info about the case?

Here is an x86-64 reproducer.

extern void callee(int);
void caller() { callee(0); }

When compiled using -O2 -g -Xclang -femit-debug-entry-values it gives the following instruction to try to describe the parameter with:

$edi = XOR32rr undef $edi(tied-def 0), undef $edi, implicit-def dead $eflags

Can we describe such situation through the DIExpression instead?

Oh, maybe! Do you have some suggestions for how that could be done?

[djtodoro]

@dstenb Thanks a lot, that seems useful!

The size of MachineOperand is 32 bytes on x86-64, and the class only contains POD fields, so I guess it should be fairly cheap to copy such objects, or initialize them with compile-time known values? Though, perhaps that would still cause a noticeable increase in compilation time.

I think it would be interesting to benchmark that at least

Yes, I agree that we should definitely experiment with that.

Here is an x86-64 reproducer.

extern void callee(int);
void caller() { callee(0); }

When compiled using -O2 -g -Xclang -femit-debug-entry-values it gives the following instruction to try to describe the parameter with:

$edi = XOR32rr undef $edi(tied-def 0), undef $edi, implicit-def dead $eflags

Thanks for the test case, I also came up with some "real world" cases with situation like this.

Can we describe such situation through the DIExpression instead?

Oh, maybe! Do you have some suggestions for how that could be done?

I think we could make a DIExpression with the DW_OP_const* , 0 (within ParamLoadedValue) and then handle it properly in collectCallSiteParameters(). WDYT?
In addition, do you think that we could treat that situation like an improvement and create a separate thread for that (so we can re-land this with the latest fix)?

[uweigand]

Thanks for the quick revert! The new patch looks reasonable to me.

[djtodoro]

@uweigand Thanks for the note and comment!

[vsk]

This has been sitting on my review queue for too long, I'm really sorry for the delay here. I've still only gotten 2/3 of the way through this patch but will make time to finish the rest soon. Thanks for working on this!

I have a correctness concern in 'shouldInterpret'. My other concerns are about documentation/naming.

include/llvm/CodeGen/TargetInstrInfo.h

1689

Could you clarify what RHS mean, here?

lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp

972

const auto& Param?

lib/CodeGen/AsmPrinter/DwarfCompileUnit.h

230

Please document these methods and, if it's not too much trouble, mark them const.

240

As the descriptions of the parameters here is fairly complex, could you split the discussion of each parameter into a separate paragraph?

Also, is the parenthetical "(in the case of non-gdb tuning)" in the PCOffset description redundant?

240

Does CallReg=0 for direct calls?

244

Please document constructCallSiteParmEntryDIEs. Specifically, it would help to have a \ref to the function that creates the param array, and to have a note about whether or not the order of the parameters matters.

lib/CodeGen/AsmPrinter/DwarfDebug.cpp

543

Can we assert that this insertion into ArgsRegsForProcess occurs? I'm assuming that it's a bug if more than one argument is forward in the same register.

Super nit-pick, but, I don't think having 'ForProcess' in the name is very clear. Something like 'ForwardedRegWorklist' would be more in keeping with the naming in the rest of the compiler.

548

Could you add a comment explaining what RegsForEntryValues is before explaining ShouldTryEmitEntryVals?

552

The comment for 'shouldInterpret' should be updated to reflect the fact that it returns a register, not a bool. Also, consider using a more specific name, like 'getForwardingRegDefinedByMI'.

560

Is the first call to MO.getReg() just checking for undef? I wonder why TRI->isPhysicalRegister() does not make it redundant.

562

Can more than one Def be attached to an MI? 'MachineInstr::getNumDefs()' suggests it is possible. If so, then it seems like there is a bug here when more than one forwarding reg is clobbered by MI?

570

Why are DbgLocVal and Reg passed in by reference?

573

Consider using RegsForEntryValues.find() to avoid doing two lookups.

580

Consider using a for loop here. It will guarantee iterator increment and make it easier to continue early.

590

To simplify this, I suggest continuing early when Reg is undef.

593

These declarations for Op and Expr don't seem necessary.

607

Please use /*IsIndirect=*/IsSPorFP when calling the MachineLocation constructor.

610

I wonder whether two passes through the block are needed, as ArgsRegsForProcess may not be complete when it is referenced in shouldInterpret.

623

Not sure what '1' is for in '{dwarf::DW_OP_entry_value, 1}', perhaps a comment would help?

625

RegsForEntryValues.find to avoid two lookups?

lib/CodeGen/AsmPrinter/DwarfDebug.h

259

Consider adding some detail, like:

unsigned Register; ///< Parameter register at the callee entry point.
DbgValueLoc; ///< Corresponding location for the parameter value at the call site.

262

Assert that Reg isn't undef here?

265

Please mark the DbgCallSiteParam methods const.

test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir

30

Consider using 'FileCheck -implicit-check-not=DW_TAG_GNU_call_site_parameter %s' to catch all of them.

[djtodoro]

@vsk Thanks a lot for such nice review!

include/llvm/CodeGen/TargetInstrInfo.h

1689

Sure.

lib/CodeGen/AsmPrinter/DwarfCompileUnit.h

240

As the descriptions of the parameters here is fairly complex, could you split the discussion of each parameter into a separate paragraph?

Sure.

Also, is the parenthetical "(in the case of non-gdb tuning)" in the PCOffset description redundant?

The comment is updated in order to avoid the ambiguity. GDB uses PC info even for tail calls.

Does CallReg=0 for direct calls?

Yes.

lib/CodeGen/AsmPrinter/DwarfDebug.cpp

543

This only adds all the regs into the working list by iterating through the CallSiteInfo.

Super nit-pick, but, I don't think having 'ForProcess' in the name is very clear. Something like 'ForwardedRegWorklist' would be more in keeping with the naming in the rest of the compiler.

Thanks!!

548

Sure.

552

Thanks for this!

560

Yes..Thanks!

562

Hmm...Yes, we have not consider such situation. Thanks!

570

We can pass them as values, and let the compiler to optimize it for us.

610

The working list is complete at the moment. But, we are inserting new registers in order to try generating call site parameters values as entry values (after the loop ends). We are doing that only for the entry MBB (the simplest case), but since the GCC generates the call site values expression as entry values even for the MBBs other then the entry one, we have left the TODO comment for that.

623

Sure.

lib/CodeGen/AsmPrinter/DwarfDebug.h

259

Thanks!

test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir

30

We just wanted to emphasizes that we did not describe a call site parameter. Since all of this is controlled by an option, the implicit-check-not will require not to use the option on the same test case. But we put an error alerting that the CallSiteInfo (the MF attribute callSites) is provided but not used, so it will be difficult to use the implicit-check-not here.

[djtodoro]

-Addressing comments

[vsk]

lib/CodeGen/AsmPrinter/DwarfCompileUnit.h

240

nit, tuning

243

nit, matter, and its -> the

lib/CodeGen/AsmPrinter/DwarfDebug.cpp

543

I see. I had in mind:

bool InsertedReg = ForwardedRegWorklist.insert(ArgReg.Reg).second;
assert(InsertedReg && "Single register used to forward two arguments?");

If this is already checked elsewhere, there's no need for a duplicate assert.

572

After FwdReg from MO is pushed into Defs, shouldn't this loop should break? IIUC no other registers should be equal-to/alias FwdReg.

594

Should the basic block scan stop at branches in addition to calls to reduce compile time (MI::isCall() || MI::isBranch())?

595

If the scan reaches a call or a branch, shouldn't it break instead of returning? That way, the ShouldTryEmitEntryVals case can be finished. Perhaps there should be a test?

646

nit, extra indentation here?

lib/CodeGen/AsmPrinter/DwarfExpression.cpp

476

I don't understand the lowering of DW_OP_regx within addMachineRegExpression. Why should the lowering be different within/without parameter values? It seems like the DIExpression itself should be formed with DW_OP_bregx, if/when needed.

lib/CodeGen/TargetInstrInfo.cpp

1144

I do not think that casting the offset to unsigned is safe due to loss of precision. Also, note that the expression generated for the Offset=0 case is inefficient. Is there some way to reuse the code in DIExpression::appendOffset for this?

lib/IR/DebugInfoMetadata.cpp

855

@aprantl would you mind re-stating your concern? The dwarf standard says that DW_OP_reg<n> describes an object in a register. That seems like it would be valid outside of a DW_OP_entry_value block. Is it not?

lib/Target/X86/X86InstrInfo.cpp

7176

We should be able to factor out the logic in DIExpression::{append,prepend}Offset to simplify this.

[djtodoro]

@vsk Thanks for the comments!

lib/CodeGen/AsmPrinter/DwarfDebug.cpp

543

I see.. That makes sense.

572

Yes. Thanks!

594

Actually, that is not necessary, since this will never encounter a branch.

595

If it encounters a call that means we can not consider the 'DW_OP_entry_value' as valid expression with in a call site parameter value, since the call may clobber that, and we stop the analysis as is.

There is a test for that part within the test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir.

lib/CodeGen/AsmPrinter/DwarfExpression.cpp

476

Yes, thanks! That is better way for sure.

lib/CodeGen/TargetInstrInfo.cpp

1144

I agree, we can use the DIExpression::appendOffset.

lib/Target/X86/X86InstrInfo.cpp

7176

We can use that.

[djtodoro]

-Addressing comments

[vsk]

Thanks, lgtm.

[djtodoro]

@vsk Thanks a lot!

docs/LangRef.rst

- ``DW_OP_xderef`` provides extended dereference mechanism. The entry at the top
   of the stack is treated as an address. The second stack entry is treated as an
   address space identifier.
 - ``DW_OP_stack_value`` marks a constant value.
 - If an expression is marked with ``DW_OP_entry_value`` all register and
   memory read operations refer to the respective value at the function entry.
   The first operand of ``DW_OP_entry_value`` is the size of following
   DWARF expression.
   ``DW_OP_entry_value`` may appear after the ``LiveDebugValues`` pass.
   LLVM only supports entry values for function parameters
   that are unmodified throughout a function and that are described as
   simple register location descriptions.
   ``DW_OP_entry_value`` may also appear after the ``AsmPrinter`` pass when
   a call site parameter value (``DW_AT_call_site_parameter_value``)
   is represented as entry value of the parameter.
+- ``DW_OP_reg`` (or ``DW_OP_regx``) represents a physical register location.
+  The opcode is only generated by the ``AsmPrinter`` pass to describe
+  call site parameter value which requires an expression over two registers.
 
 DWARF specifies three kinds of simple location descriptions: Register, memory,
 and implicit location descriptions.  Note that a location description is
 defined over certain ranges of a program, i.e the location of a variable may
 change over the course of the program. Register and memory location
 descriptions describe the *concrete location* of a source variable (in the
 sense that a debugger might modify its value), whereas *implicit locations*
 describe merely the actual *value* of a source variable which might not exist

include/llvm/CodeGen/TargetInstrInfo.h

 class RegScavenger;
 class TargetRegisterClass;
 class TargetRegisterInfo;
 class TargetSchedModel;
 class TargetSubtargetInfo;
 
 template <class T> class SmallVectorImpl;
 
+using ParamLoadedValue = std::pair<const MachineOperand*, DIExpression*>;
+
 //---------------------------------------------------------------------------
 ///
 /// TargetInstrInfo - Interface to description of machine instruction set
 ///
 class TargetInstrInfo : public MCInstrInfo {
 public:
   TargetInstrInfo(unsigned CFSetupOpcode = ~0u, unsigned CFDestroyOpcode = ~0u,
                   unsigned CatchRetOpcode = ~0u, unsigned ReturnOpcode = ~0u)
llvm_unreachable("Target didn't implement "
                      "TargetInstrInfo::isFunctionSafeToOutlineFrom!");
   }
 
   /// Return true if the function should be outlined from by default.
   virtual bool shouldOutlineFromFunctionByDefault(MachineFunction &MF) const {
     return false;
   }
 
+  /// Produce RHS description of parameter's loading instruction \p MI.
+  virtual Optional<ParamLoadedValue>
+  describeLoadedValue(const MachineInstr &MI) const;
+
 private:
   unsigned CallFrameSetupOpcode, CallFrameDestroyOpcode;
   unsigned CatchRetOpcode;
   unsigned ReturnOpcode;
 };
 
 /// Provide DenseMapInfo for TargetInstrInfo::RegSubRegPair.
 template <> struct DenseMapInfo<TargetInstrInfo::RegSubRegPair> {

include/llvm/CodeGen/TargetRegisterInfo.h

public:
   virtual bool isConstantPhysReg(unsigned PhysReg) const { return false; }
 
   /// Physical registers that may be modified within a function but are
   /// guaranteed to be restored before any uses. This is useful for targets that
   /// have call sequences where a GOT register may be updated by the caller
   /// prior to a call and is guaranteed to be restored (also by the caller)
   /// after the call.
   virtual bool isCallerPreservedPhysReg(unsigned PhysReg,
-                                        const MachineFunction &MF) const {
-    return false;
-  }
+                                        const MachineFunction &MF) const;
 
   /// Prior to adding the live-out mask to a stackmap or patchpoint
   /// instruction, provide the target the opportunity to adjust it (mainly to
   /// remove pseudo-registers that should be ignored).
   virtual void adjustStackMapLiveOutMask(uint32_t *Mask) const {}
 
   /// Return a super-register of the specified register
   /// Reg so its sub-register of index SubIdx is Reg.

lib/CodeGen/AsmPrinter/DwarfCompileUnit.h

public:
   /// Construct a DIE for this subprogram scope.
   DIE &constructSubprogramScopeDIE(const DISubprogram *Sub,
                                    LexicalScope *Scope);
 
   DIE *createAndAddScopeChildren(LexicalScope *Scope, DIE &ScopeDIE);
 
   void constructAbstractSubprogramScopeDIE(LexicalScope *Scope);
 
+  dwarf::Tag getDwarf5OrGNUCallSiteTag(dwarf::Tag Tag);
+  dwarf::Attribute getDwarf5OrGNUCallSiteAttr(dwarf::Attribute Attr);
+
   /// Construct a call site entry DIE describing a call within \p Scope to a
   /// callee described by \p CalleeSP. \p IsTail specifies whether the call is
-  /// a tail call. \p PCOffset must be non-zero for non-tail calls or be the
-  /// function-local offset to PC value after the call instruction.
-  DIE &constructCallSiteEntryDIE(DIE &ScopeDIE, const DISubprogram &CalleeSP,
-                                 bool IsTail, const MCExpr *PCOffset);
+  /// a tail call. \p PCAddr (used for GDB + DWARF 4 tuning) points to
+  /// the PC value after the call instruction. \p PCOffset (used for
+  /// cases other than GDB + DWARF 4 tuning) must be non-zero for non-tail calls
+  /// (in the case of non-gdb tuning) or be the function-local offset to PC value
+  /// after the call instruction. \p CallReg is a register location
+  /// for an indirect call.
+  DIE &constructCallSiteEntryDIE(DIE &ScopeDIE, const DISubprogram *CalleeSP,
+                                 bool IsTail, const MCSymbol *PCAddr,
+                                 const MCExpr *PCOffset, unsigned CallReg);
+  void constructCallSiteParmEntryDIEs(DIE &CallSiteDIE,
+                                      SmallVector<DbgCallSiteParam, 4> &Params);
 
   /// Construct import_module DIE.
   DIE *constructImportedEntityDIE(const DIImportedEntity *Module);
 
   void finishSubprogramDefinition(const DISubprogram *SP);
   void finishEntityDefinition(const DbgEntity *Entity);
 
   /// Find abstract variable associated with Var.

lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp

void DwarfCompileUnit::constructAbstractSubprogramScopeDIE(
   ContextCU->applySubprogramAttributesToDefinition(SP, *AbsDef);
 
   if (!ContextCU->includeMinimalInlineScopes())
     ContextCU->addUInt(*AbsDef, dwarf::DW_AT_inline, None, dwarf::DW_INL_inlined);
   if (DIE *ObjectPointer = ContextCU->createAndAddScopeChildren(Scope, *AbsDef))
     ContextCU->addDIEEntry(*AbsDef, dwarf::DW_AT_object_pointer, *ObjectPointer);
 }
 
+dwarf::Tag DwarfCompileUnit::getDwarf5OrGNUCallSiteTag(dwarf::Tag Tag) {
+  bool ApplyGNUExtensions = DD->getDwarfVersion() == 4 && DD->tuneForGDB();
+  if (!ApplyGNUExtensions)
+    return Tag;
+  switch(Tag) {
+  case dwarf::DW_TAG_call_site:
+    return dwarf::DW_TAG_GNU_call_site;
+  case dwarf::DW_TAG_call_site_parameter:
+    return dwarf::DW_TAG_GNU_call_site_parameter;
+  default:
+    llvm_unreachable("unhandled call site tag");
+  }
+}
+
+dwarf::Attribute DwarfCompileUnit::getDwarf5OrGNUCallSiteAttr(dwarf::Attribute Attr) {
+  bool ApplyGNUExtensions = DD->getDwarfVersion() == 4 && DD->tuneForGDB();
+  if (!ApplyGNUExtensions)
+    return Attr;
+  switch(Attr) {
+  case dwarf::DW_AT_call_target:
+    return dwarf::DW_AT_GNU_call_site_target;
+  case dwarf::DW_AT_call_origin:
+    return dwarf::DW_AT_abstract_origin;
+  case dwarf::DW_AT_call_pc:
+    return dwarf::DW_AT_low_pc;
+  case dwarf::DW_AT_call_value:
+    return dwarf::DW_AT_GNU_call_site_value;
+  default:
+    llvm_unreachable("unhandled call site attribute");
+  }
+}
+
 DIE &DwarfCompileUnit::constructCallSiteEntryDIE(DIE &ScopeDIE,
-                                                 const DISubprogram &CalleeSP,
+                                                 const DISubprogram *CalleeSP,
                                                  bool IsTail,
-                                                 const MCExpr *PCOffset) {
+                                                 const MCSymbol *PCAddr,
+                                                 const MCExpr *PCOffset,
+                                                 unsigned CallReg) {
   // Insert a call site entry DIE within ScopeDIE.
   DIE &CallSiteDIE =
-      createAndAddDIE(dwarf::DW_TAG_call_site, ScopeDIE, nullptr);
+      createAndAddDIE(getDwarf5OrGNUCallSiteTag(dwarf::DW_TAG_call_site),
+                      ScopeDIE, nullptr);
 
-  // For the purposes of showing tail call frames in backtraces, a key piece of
-  // information is DW_AT_call_origin, a pointer to the callee DIE.
-  DIE *CalleeDIE = getOrCreateSubprogramDIE(&CalleeSP);
+  if (CallReg) {
+    // Indirect call.
+    addAddress(CallSiteDIE, getDwarf5OrGNUCallSiteAttr(dwarf::DW_AT_call_target),
+               MachineLocation(CallReg));
+  } else {
+    DIE *CalleeDIE = getOrCreateSubprogramDIE(CalleeSP);
     assert(CalleeDIE && "Could not create DIE for call site entry origin");
-  addDIEEntry(CallSiteDIE, dwarf::DW_AT_call_origin, *CalleeDIE);
+    addDIEEntry(CallSiteDIE, getDwarf5OrGNUCallSiteAttr(dwarf::DW_AT_call_origin),
+                *CalleeDIE);
+  }
 
-  if (IsTail) {
+  if (IsTail)
     // Attach DW_AT_call_tail_call to tail calls for standards compliance.
     addFlag(CallSiteDIE, dwarf::DW_AT_call_tail_call);
-  } else {
-    // Attach the return PC to allow the debugger to disambiguate call paths
-    // from one function to another.
+
+  if (DD->getDwarfVersion() == 4 && DD->tuneForGDB()) {
+    assert(PCAddr && "Missing PC information for a call");
+    addLabelAddress(CallSiteDIE, dwarf::DW_AT_low_pc, PCAddr);
+  } else if (!IsTail || DD->tuneForGDB()) {
     assert(PCOffset && "Missing return PC information for a call");
     addAddressExpr(CallSiteDIE, dwarf::DW_AT_call_return_pc, PCOffset);
   }
+
   return CallSiteDIE;
 }
 
+void DwarfCompileUnit::constructCallSiteParmEntryDIEs(
+    DIE &CallSiteDIE, SmallVector<DbgCallSiteParam, 4> &Params) {
+  for (auto &Param : Params) {
+    unsigned Register = Param.getRegister();
+    auto CallSiteDieParam =
+        DIE::get(DIEValueAllocator,
+                 getDwarf5OrGNUCallSiteTag(dwarf::DW_TAG_call_site_parameter));
+    insertDIE(CallSiteDieParam);
+    addAddress(*CallSiteDieParam, dwarf::DW_AT_location,
+               MachineLocation(Register));
+
+    DIELoc *Loc = new (DIEValueAllocator) DIELoc;
+    DIEDwarfExpression DwarfExpr(*Asm, *this, *Loc);
+    DwarfExpr.setCallSiteParamValueFlag();
+
+    DwarfDebug::emitDebugLocValue(*Asm, nullptr, Param.getValue(), DwarfExpr);
+
+    addBlock(*CallSiteDieParam,
+             getDwarf5OrGNUCallSiteAttr(dwarf::DW_AT_call_value),
+             DwarfExpr.finalize());
+
+    CallSiteDIE.addChild(CallSiteDieParam);
+  }
+}
+
 DIE *DwarfCompileUnit::constructImportedEntityDIE(
     const DIImportedEntity *Module) {
   DIE *IMDie = DIE::get(DIEValueAllocator, (dwarf::Tag)Module->getTag());
   insertDIE(Module, IMDie);
   DIE *EntityDie;
   auto *Entity = Module->getEntity();
   if (auto *NS = dyn_cast<DINamespace>(Entity))
     EntityDie = getOrCreateNameSpace(NS);

lib/CodeGen/AsmPrinter/DwarfDebug.h

dwarf::Tag getTag() const {
     return dwarf::DW_TAG_label;
   }
 
   static bool classof(const DbgEntity *N) {
     return N->getDbgEntityID() == DbgLabelKind;
   }
 };
 
+/// Used for tracking debug info about call site parameters.
+class DbgCallSiteParam {
+private:
+  unsigned Register;
+  DebugLocEntry::Value Value;
+public:
+  DbgCallSiteParam(unsigned Reg,
+                   DebugLocEntry::Value Val)
+      : Register(Reg), Value(Val) {}
+
+  unsigned getRegister() { return Register; }
+  DebugLocEntry::Value getValue() { return Value; }
+};
+
+/// Collection used for storing debug call site parameters.
+using ParamSet = SmallVector<DbgCallSiteParam, 4>;
+
 /// Helper used to pair up a symbol and its DWARF compile unit.
 struct SymbolCU {
   SymbolCU(DwarfCompileUnit *CU, const MCSymbol *Sym) : Sym(Sym), CU(CU) {}
 
   const MCSymbol *Sym;
   DwarfCompileUnit *CU;
 };
 

lib/CodeGen/AsmPrinter/DwarfDebug.cpp

 #include "DwarfUnit.h"
 #include "llvm/ADT/APInt.h"
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/DenseSet.h"
 #include "llvm/ADT/MapVector.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/StringRef.h"
+#include "llvm/ADT/Statistic.h"
 #include "llvm/ADT/Triple.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/BinaryFormat/Dwarf.h"
 #include "llvm/CodeGen/AccelTable.h"
 #include "llvm/CodeGen/AsmPrinter.h"
 #include "llvm/CodeGen/DIE.h"
 #include "llvm/CodeGen/LexicalScopes.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineModuleInfo.h"
 #include "llvm/CodeGen/MachineOperand.h"
 #include "llvm/CodeGen/TargetInstrInfo.h"
+#include "llvm/CodeGen/TargetLowering.h"
 #include "llvm/CodeGen/TargetRegisterInfo.h"
 #include "llvm/CodeGen/TargetSubtargetInfo.h"
 #include "llvm/DebugInfo/DWARF/DWARFExpression.h"
 #include "llvm/DebugInfo/DWARF/DWARFDataExtractor.h"
 #include "llvm/IR/Constants.h"
 #include "llvm/IR/DebugInfoMetadata.h"
 #include "llvm/IR/DebugLoc.h"
 #include "llvm/IR/Function.h"

 #include <string>
 #include <utility>
 #include <vector>
 
 using namespace llvm;
 
 #define DEBUG_TYPE "dwarfdebug"
 
+STATISTIC(NumCSParams, "Number of dbg call site params created");
+
 static cl::opt<bool>
 DisableDebugInfoPrinting("disable-debug-info-print", cl::Hidden,
                          cl::desc("Disable debug info printing"));
 
 static cl::opt<bool> UseDwarfRangesBaseAddressSpecifier(
     "use-dwarf-ranges-base-address-specifier", cl::Hidden,
     cl::desc("Use base address specifiers in debug_ranges"), cl::init(false));
 
if (auto *SkelCU = CU.getSkeleton()) {
           .constructAbstractSubprogramScopeDIE(Scope);
       if (CU.getCUNode()->getSplitDebugInlining())
         SkelCU->constructAbstractSubprogramScopeDIE(Scope);
     } else
       CU.constructAbstractSubprogramScopeDIE(Scope);
   }
 }
 
+/// Try to interpret values loaded into registers that forward parameters
+/// for \p CallMI. Store parameters with interpreted value into \p Params.
+static void collectCallSiteParameters(const MachineInstr *CallMI,
+                                      ParamSet &Params) {
+  auto *MF = CallMI->getMF();
+  auto CalleesMap = MF->getCallSitesInfo();
+  auto CallFwdRegsInfo = CalleesMap.find(CallMI);
+
+  // There is no information for the call instruction.
+  if (CallFwdRegsInfo == CalleesMap.end())
+    return;
+
+  auto *MBB = CallMI->getParent();
+  const auto &TRI = MF->getSubtarget().getRegisterInfo();
+  const auto &TII = MF->getSubtarget().getInstrInfo();
+  const auto &TLI = MF->getSubtarget().getTargetLowering();
+
+  // Skip the call instruction.
+  auto I = std::next(CallMI->getReverseIterator());
+
+  DenseSet<unsigned> ArgsRegsForProcess;
+  for (auto ArgReg : CallFwdRegsInfo->second)
+    ArgsRegsForProcess.insert(ArgReg.Reg);
+
+  // If we did not find loading a value into forwarding registers
+  // that means we can try generating 'DW_OP_entry_value' for the argument
+  // if a call is within entry MBB.
+  DenseMap<unsigned, unsigned> RegsForEntryValues;
+  bool ShouldTryEmitEntryVals = MBB->getIterator() == MF->begin();
+
+  // Return true if it is an instruction over a parameter's forwarding
+  // register that clobbers it.
+  auto shouldInterpret = [&](const MachineInstr &MI) -> unsigned {
+    if (MI.isDebugInstr())
+      return 0;
+    // If a MI clobbers a forwarding reg try to interpet
+    // a value loaded into the reg.
+    for (const MachineOperand &MO : MI.operands()) {
+      if (MO.isReg() && MO.isDef() && MO.getReg() &&
+          TRI->isPhysicalRegister(MO.getReg())) {
+        for (auto FwdReg : ArgsRegsForProcess)
+          if (TRI->regsOverlap(FwdReg, MO.getReg()))
+            return FwdReg;
+      }
+    }
+
+    return 0;
+  };
+
+  auto finishCallSiteParam = [&](DebugLocEntry::Value &DbgLocVal,
+                                 unsigned &Reg) {
+    unsigned FwdReg = Reg;
+    if (ShouldTryEmitEntryVals && RegsForEntryValues.count(Reg))
+      FwdReg = RegsForEntryValues[Reg];
+    DbgCallSiteParam CSParm(FwdReg, DbgLocVal);
+    Params.push_back(CSParm);
+    NumCSParams++;
+  };
+
+  // Search for a loading value in forwaring registers.
+  while (I != MBB->rend()) {
+    // If the next instruction is a call we can not
+    // interpet parameter's forwarding registers or
+    // we finished interpetation of all parameters.
+    if (I->isCall())
+      return;
+
+    if (ArgsRegsForProcess.empty())
+      return;
+
+    if (unsigned Reg = shouldInterpret(*I)) {
+      ArgsRegsForProcess.erase(Reg);
+      const MachineOperand *Op;
+      DIExpression *Expr;
+      if (auto ParamValue = TII->describeLoadedValue(*I)) {
+        Op = ParamValue->first;
+        Expr = ParamValue->second;
+        if (Op->isImm()) {
+          unsigned Val = Op->getImm();
+          DebugLocEntry::Value DbgLocVal(Expr, Val);
+          finishCallSiteParam(DbgLocVal, Reg);
+        } else if (Op->isReg()) {
+          unsigned RegLoc = Op->getReg();
+          unsigned SP = TLI->getStackPointerRegisterToSaveRestore();
+          unsigned FP = TRI->getFrameRegister(*MF);
+          bool IsSPorFP = (RegLoc == SP) || (RegLoc == FP);
+          if (TRI->isCallerPreservedPhysReg(RegLoc, *MF) || IsSPorFP) {
+            DebugLocEntry::Value DbgLocVal(
+                Expr, MachineLocation(RegLoc, IsSPorFP));
+            finishCallSiteParam(DbgLocVal, Reg);
+          } else if (ShouldTryEmitEntryVals) {
+            ArgsRegsForProcess.insert(RegLoc);
+            RegsForEntryValues[RegLoc] = Reg;
+          }
+        }
+      }
+    }
+
+    ++I;
+  }
+
+  // Emit call site parameter's value as entry value.
+  if (ShouldTryEmitEntryVals) {
+    DIExpression *EntryExpr = DIExpression::get(MF->getFunction().getContext(),
+                                                {dwarf::DW_OP_entry_value, 1});
+    for (auto RegEntry : ArgsRegsForProcess) {
+      unsigned FwdReg = RegsForEntryValues.count(RegEntry)
+                            ? RegsForEntryValues[RegEntry]
+                            : RegEntry;
+      DebugLocEntry::Value DbgLocVal(EntryExpr, MachineLocation(RegEntry));
+      DbgCallSiteParam CSParm(FwdReg, DbgLocVal);
+      Params.push_back(CSParm);
+      NumCSParams++;
+    }
+  }
+}
+
 void DwarfDebug::constructCallSiteEntryDIEs(const DISubprogram &SP,
                                             DwarfCompileUnit &CU, DIE &ScopeDIE,
                                             const MachineFunction &MF) {
   // Add a call site-related attribute (DWARF5, Sec. 3.3.1.3). Do this only if
   // the subprogram is required to have one.
   if (!SP.areAllCallsDescribed() || !SP.isDefinition())
     return;
 
   // Use DW_AT_call_all_calls to express that call site entries are present
   // for both tail and non-tail calls. Don't use DW_AT_call_all_source_calls
   // because one of its requirements is not met: call site entries for
   // optimized-out calls are elided.
   CU.addFlag(ScopeDIE, dwarf::DW_AT_call_all_calls);
 
   const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
   assert(TII && "TargetInstrInfo not found: cannot label tail calls");
+  const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
+  bool ApplyGNUExtensions = getDwarfVersion() == 4 && tuneForGDB();
 
   // Emit call site entries for each call or tail call in the function.
   for (const MachineBasicBlock &MBB : MF) {
     for (const MachineInstr &MI : MBB.instrs()) {
       // Skip instructions which aren't calls. Both calls and tail-calling jump
       // instructions (e.g TAILJMPd64) are classified correctly here.
       if (!MI.isCall())
         continue;
 
       // TODO: Add support for targets with delay slots (see: beginInstruction).
       if (MI.hasDelaySlot())
         return;
 
       // If this is a direct call, find the callee's subprogram.
+      // In the case of an indirect call find the register that holds
+      // the callee.
       const MachineOperand &CalleeOp = MI.getOperand(0);
-      if (!CalleeOp.isGlobal())
+      if (!CalleeOp.isGlobal() && !CalleeOp.isReg())
+        continue;
+
+      unsigned CallReg = 0;
+      const DISubprogram *CalleeSP = nullptr;
+      const Function *CalleeDecl = nullptr;
+      if (CalleeOp.isReg()) {
+        CallReg = CalleeOp.getReg();
+        if (!CallReg)
           continue;
-      const Function *CalleeDecl = dyn_cast<Function>(CalleeOp.getGlobal());
+      } else {
+        CalleeDecl = dyn_cast<Function>(CalleeOp.getGlobal());
         if (!CalleeDecl || !CalleeDecl->getSubprogram())
           continue;
+        CalleeSP = CalleeDecl->getSubprogram();
+      }
 
       // TODO: Omit call site entries for runtime calls (objc_msgSend, etc).
-      // TODO: Add support for indirect calls.
 
       bool IsTail = TII->isTailCall(MI);
 
-      // For tail calls, no return PC information is needed. For regular calls,
-      // the return PC is needed to disambiguate paths in the call graph which
-      // could lead to some target function.
+      // For tail calls, for non-gdb tuning, no return PC information is needed.
+      // For regular calls (and tail calls in GDB tuning), the return PC
+      // is needed to disambiguate paths in the call graph which could lead to
+      // some target function.
       const MCExpr *PCOffset =
-          IsTail ? nullptr : getFunctionLocalOffsetAfterInsn(&MI);
+          (IsTail && !tuneForGDB()) ? nullptr
+                                    : getFunctionLocalOffsetAfterInsn(&MI);
+
+      // Address of a call-like instruction for a normal call or a jump-like
+      // instruction for a tail call. This is needed for GDB + DWARF 4 tuning.
+      const MCSymbol *PCAddr =
+          ApplyGNUExtensions ? const_cast<MCSymbol*>(getLabelAfterInsn(&MI))
+                             : nullptr;
+
+      assert((IsTail || PCOffset || PCAddr) &&
+             "Call without return PC information");
 
-      assert((IsTail || PCOffset) && "Call without return PC information");
       LLVM_DEBUG(dbgs() << "CallSiteEntry: " << MF.getName() << " -> "
-                        << CalleeDecl->getName() << (IsTail ? " [tail]" : "")
+                        << (CalleeDecl ? CalleeDecl->getName()
+                                       : StringRef(TRI->getName(CallReg)))
+                        << (IsTail ? " [IsTail]" : "")
                         << "\n");
-      CU.constructCallSiteEntryDIE(ScopeDIE, *CalleeDecl->getSubprogram(),
-                                   IsTail, PCOffset);
+
+      DIE &CallSiteDIE =
+            CU.constructCallSiteEntryDIE(ScopeDIE, CalleeSP, IsTail, PCAddr,
+                                         PCOffset, CallReg);
+
+      // For now only GDB supports call site parameter debug info.
+      if (Asm->TM.Options.EnableDebugEntryValues &&
+          tuneForGDB()) {
+        ParamSet Params;
+        // Try to interpet values of call site parameters.
+        collectCallSiteParameters(&MI, Params);
+        CU.constructCallSiteParmEntryDIEs(CallSiteDIE, Params);
+      }
     }
   }
 }
 
 void DwarfDebug::addGnuPubAttributes(DwarfCompileUnit &U, DIE &D) const {
   if (!U.hasDwarfPubSections())
     return;
 

lib/CodeGen/AsmPrinter/DwarfExpression.h

protected:
   /// Sometimes we need to add a DW_OP_bit_piece to describe a subregister.
   unsigned SubRegisterSizeInBits : 16;
   unsigned SubRegisterOffsetInBits : 16;
 
   /// The kind of location description being produced.
   enum { Unknown = 0, Register, Memory, Implicit };
 
   /// The flags of location description being produced.
-  enum { EntryValue = 1 };
+  enum { EntryValue = 1, CallSiteParamValue };
 
   unsigned LocationKind : 3;
   unsigned LocationFlags : 2;
   unsigned DwarfVersion : 4;
 
 public:
   bool isUnknownLocation() const {
     return LocationKind == Unknown;
public:
   bool isImplicitLocation() const {
     return LocationKind == Implicit;
   }
 
   bool isEntryValue() const {
     return LocationFlags & EntryValue;
   }
 
+  bool isParameterValue() {
+    return LocationFlags & CallSiteParamValue;
+  }
+
 protected:
   /// Push a DW_OP_piece / DW_OP_bit_piece for emitting later, if one is needed
   /// to represent a subregister.
   void setSubRegisterPiece(unsigned SizeInBits, unsigned OffsetInBits) {
     assert(SizeInBits < 65536 && OffsetInBits < 65536);
     SubRegisterSizeInBits = SizeInBits;
     SubRegisterOffsetInBits = OffsetInBits;
   }
void setMemoryLocationKind() {
     LocationKind = Memory;
   }
 
   /// Lock this down to become an entry value location.
   void setEntryValueFlag() {
     LocationFlags |= EntryValue;
   }
 
+  /// Lock this down to become a call site parameter location.
+  void setCallSiteParamValueFlag() {
+    LocationFlags |= CallSiteParamValue;
+  }
+
   /// Emit a machine register location. As an optimization this may also consume
   /// the prefix of a DwarfExpression if a more efficient representation for
   /// combining the register location and the first operation exists.
   ///
   /// \param FragmentOffsetInBits     If this is one fragment out of a
   /// fragmented
   ///                                 location, this is the offset of the
   ///                                 fragment inside the entire variable.

lib/CodeGen/AsmPrinter/DwarfExpression.cpp

bool DwarfExpression::addMachineRegExpression(const TargetRegisterInfo &TRI,
   // expression. For example, it is not possible to apply a DW_OP_deref
   // operation to multiple DW_OP_pieces.
   if (HasComplexExpression && DwarfRegs.size() > 1) {
     DwarfRegs.clear();
     LocationKind = Unknown;
     return false;
   }
 
-  // Handle simple register locations.
-  if (!isMemoryLocation() && !HasComplexExpression) {
+  // Handle simple register locations. If we are supposed to
+  // emit a call site parameter expression and if that expression
+  // is just a register location, emit it with addBReg and offset 0,
+  // because we should emit a DWARF expression representing a value,
+  // rather than a location.
+  if (!isMemoryLocation() && !HasComplexExpression &&
+      (!isParameterValue() || isEntryValue())) {
     for (auto &Reg : DwarfRegs) {
       if (Reg.DwarfRegNo >= 0)
         addReg(Reg.DwarfRegNo, Reg.Comment);
       addOpPiece(Reg.Size);
     }
 
-    if (isEntryValue() && DwarfVersion >= 4)
+    if (isEntryValue() && !isParameterValue() && DwarfVersion >= 4)
       emitOp(dwarf::DW_OP_stack_value);
 
     DwarfRegs.clear();
     return true;
   }
 
   // Don't emit locations that cannot be expressed without DW_OP_stack_value.
   if (DwarfVersion < 4)
void DwarfExpression::addExpression(DIExpressionCursor &&ExprCursor,
   auto N = ExprCursor.peek();
   if (SubRegisterSizeInBits && N && (N->getOp() != dwarf::DW_OP_LLVM_fragment))
     maskSubRegister();
 
   Optional<DIExpression::ExprOperand> PrevConvertOp = None;
 
   while (ExprCursor) {
     auto Op = ExprCursor.take();
-    switch (Op->getOp()) {
+    uint64_t OpNum = Op->getOp();
+    if (OpNum >= dwarf::DW_OP_reg0 && OpNum <= dwarf::DW_OP_reg31) {
+      if (isParameterValue())
+        addBReg(OpNum - dwarf::DW_OP_reg0, 0);
+      else
+        emitOp(OpNum);
+      continue;
+    }
+
+    switch (OpNum) {
     case dwarf::DW_OP_LLVM_fragment: {
       unsigned SizeInBits = Op->getArg(1);
       unsigned FragmentOffset = Op->getArg(0);
       // The fragment offset must have already been adjusted by emitting an
       // empty DW_OP_piece / DW_OP_bit_piece before we emitted the base
       // location.
       assert(OffsetInBits >= FragmentOffset && "fragment offset not added?");
 
while (ExprCursor) {
     case dwarf::DW_OP_and:
     case dwarf::DW_OP_xor:
     case dwarf::DW_OP_shl:
     case dwarf::DW_OP_shr:
     case dwarf::DW_OP_shra:
     case dwarf::DW_OP_lit0:
     case dwarf::DW_OP_not:
     case dwarf::DW_OP_dup:
-      emitOp(Op->getOp());
+      emitOp(OpNum);
       break;
     case dwarf::DW_OP_deref:
       assert(!isRegisterLocation());
       if (!isMemoryLocation() && ::isMemoryLocation(ExprCursor))
         // Turning this into a memory location description makes the deref
         // implicit.
         LocationKind = Memory;
       else
case dwarf::DW_OP_swap:
       assert(!isRegisterLocation());
       emitOp(dwarf::DW_OP_swap);
       break;
     case dwarf::DW_OP_xderef:
       assert(!isRegisterLocation());
       emitOp(dwarf::DW_OP_xderef);
       break;
     case dwarf::DW_OP_deref_size:
       emitOp(dwarf::DW_OP_deref_size);
       emitData1(Op->getArg(0));
       break;
+    case dwarf::DW_OP_regx:
+      if (isParameterValue()) {
+        emitOp(dwarf::DW_OP_bregx);
+        emitUnsigned(Op->getArg(0));
+        emitSigned(Op->getArg(1));
+      } else {
+        emitOp(dwarf::DW_OP_regx);
+        emitUnsigned(Op->getArg(0));
+      }
+      break;
     default:
       llvm_unreachable("unhandled opcode found in expression");
     }
   }
 
-  if (isImplicitLocation())
+  if (isImplicitLocation() && !isParameterValue())
     // Turn this into an implicit location description.
     addStackValue();
 }
 
 /// add masking operations to stencil out a subregister.
 void DwarfExpression::maskSubRegister() {
   assert(SubRegisterSizeInBits && "no subregister was registered");
   if (SubRegisterOffsetInBits > 0)

lib/CodeGen/AsmPrinter/DwarfUnit.h

public:
 
   /// Insert DIE into the map.
   ///
   /// We delegate the request to DwarfDebug when the MDNode can be part of the
   /// type system, since DIEs for the type system can be shared across CUs and
   /// the mappings are kept in DwarfDebug.
   void insertDIE(const DINode *Desc, DIE *D);
 
+  void insertDIE(DIE *D);
+
   /// Add a flag that is true to the DIE.
   void addFlag(DIE &Die, dwarf::Attribute Attribute);
 
   /// Add an unsigned integer attribute data and value.
   void addUInt(DIEValueList &Die, dwarf::Attribute Attribute,
                Optional<dwarf::Form> Form, uint64_t Integer);
 
   void addUInt(DIEValueList &Block, dwarf::Form Form, uint64_t Integer);

lib/CodeGen/AsmPrinter/DwarfUnit.cpp

 void DwarfUnit::insertDIE(const DINode *Desc, DIE *D) {
   if (isShareableAcrossCUs(Desc)) {
     DU->insertDIE(Desc, D);
     return;
   }
   MDNodeToDieMap.insert(std::make_pair(Desc, D));
 }
 
+void DwarfUnit::insertDIE(DIE *D) {
+  MDNodeToDieMap.insert(std::make_pair(nullptr, D));
+}
+
 void DwarfUnit::addFlag(DIE &Die, dwarf::Attribute Attribute) {
   if (DD->getDwarfVersion() >= 4)
     Die.addValue(DIEValueAllocator, Attribute, dwarf::DW_FORM_flag_present,
                  DIEInteger(1));
   else
     Die.addValue(DIEValueAllocator, Attribute, dwarf::DW_FORM_flag,
                  DIEInteger(1));
 }

lib/CodeGen/TargetInstrInfo.cpp

 #include "llvm/CodeGen/PseudoSourceValue.h"
 #include "llvm/CodeGen/ScoreboardHazardRecognizer.h"
 #include "llvm/CodeGen/StackMaps.h"
 #include "llvm/CodeGen/TargetFrameLowering.h"
 #include "llvm/CodeGen/TargetLowering.h"
 #include "llvm/CodeGen/TargetRegisterInfo.h"
 #include "llvm/CodeGen/TargetSchedule.h"
 #include "llvm/IR/DataLayout.h"
+#include "llvm/IR/DebugInfoMetadata.h"
 #include "llvm/MC/MCAsmInfo.h"
 #include "llvm/MC/MCInstrItineraries.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/Target/TargetMachine.h"
 #include <cctype>
 
bool TargetInstrInfo::hasLowDefLatency(const TargetSchedModel &SchedModel,
   if (!ItinData || ItinData->isEmpty())
     return false;
 
   unsigned DefClass = DefMI.getDesc().getSchedClass();
   int DefCycle = ItinData->getOperandCycle(DefClass, DefIdx);
   return (DefCycle != -1 && DefCycle <= 1);
 }
 
+Optional<ParamLoadedValue>
+TargetInstrInfo::describeLoadedValue(const MachineInstr &MI) const {
+  const MachineOperand *Op;
+  DIExpression *Expr;
+
+  const MachineOperand *SrcRegOp, *DestRegOp;
+  const MachineFunction *MF = MI.getMF();
+  if (isCopyInstr(MI, SrcRegOp, DestRegOp)) {
+    Expr = DIExpression::get(MF->getFunction().getContext(), {});
+    Op = SrcRegOp;
+    return ParamLoadedValue(Op, Expr);
+  } else if (MI.isMoveImmediate()) {
+    Expr = DIExpression::get(MF->getFunction().getContext(), {});
+    Op = &MI.getOperand(1);
+    return ParamLoadedValue(Op, Expr);
+  } else if (MI.hasOneMemOperand()) {
+    int64_t Offset;
+    const auto &TRI = MF->getSubtarget().getRegisterInfo();
+    const auto &TII = MF->getSubtarget().getInstrInfo();
+    const MachineOperand *BaseOp;
+    if (!TII->getMemOperandWithOffset(MI, BaseOp, Offset, TRI))
+      return None;
+    unsigned CastedOffset = static_cast<unsigned>(Offset);
+    if (Offset > 0)
+      Expr = DIExpression::get(
+          MF->getFunction().getContext(),
+          {dwarf::DW_OP_plus_uconst, CastedOffset, dwarf::DW_OP_deref});
+    else
+      Expr = DIExpression::get(MF->getFunction().getContext(),
+                               {dwarf::DW_OP_constu, -CastedOffset,
+                                dwarf::DW_OP_minus, dwarf::DW_OP_deref});
+
+    Op = BaseOp;
+    return ParamLoadedValue(Op, Expr);
+  }
+
+  return None;
+}
+
 /// Both DefMI and UseMI must be valid.  By default, call directly to the
 /// itinerary. This may be overriden by the target.
 int TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,
                                        const MachineInstr &DefMI,
                                        unsigned DefIdx,
                                        const MachineInstr &UseMI,
                                        unsigned UseIdx) const {
   unsigned DefClass = DefMI.getDesc().getSchedClass();

lib/CodeGen/TargetRegisterInfo.cpp

if (!is_contained(Order, Phys))
       continue;
 
     // All clear, tell the register allocator to prefer this register.
     Hints.push_back(Phys);
   }
   return false;
 }
 
+bool
+TargetRegisterInfo::isCallerPreservedPhysReg(unsigned PhysReg,
+                                             const MachineFunction &MF) const {
+  if (PhysReg == 0)
+    return false;
+  const uint32_t *callerPreservedRegs =
+      getCallPreservedMask(MF, MF.getFunction().getCallingConv());
+  if (callerPreservedRegs) {
+    assert(isPhysicalRegister(PhysReg) && "Expected physical register");
+    return (callerPreservedRegs[PhysReg / 32] >> PhysReg % 32) & 1;
+  }
+  return false;
+}
+
 bool TargetRegisterInfo::canRealignStack(const MachineFunction &MF) const {
   return !MF.getFunction().hasFnAttribute("no-realign-stack");
 }
 
 bool TargetRegisterInfo::needsStackRealignment(
     const MachineFunction &MF) const {
   const MachineFrameInfo &MFI = MF.getFrameInfo();
   const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();

lib/DebugInfo/DWARF/DWARFDie.cpp

bool DWARFAttribute::mayHaveLocationDescription(dwarf::Attribute Attr) {
   case DW_AT_call_value:
   case DW_AT_call_origin:
   case DW_AT_call_target:
   case DW_AT_call_target_clobbered:
   case DW_AT_call_data_location:
   case DW_AT_call_data_value:
   // Extensions.
   case DW_AT_GNU_call_site_value:
+  case DW_AT_GNU_call_site_target:
     return true;
   default:
     return false;
   }
 }

lib/IR/DebugInfoMetadata.cpp

 }
 
 unsigned DIExpression::ExprOperand::getSize() const {
   switch (getOp()) {
   case dwarf::DW_OP_LLVM_convert:
   case dwarf::DW_OP_LLVM_fragment:
     return 3;
   case dwarf::DW_OP_constu:
+  case dwarf::DW_OP_consts:
   case dwarf::DW_OP_deref_size:
   case dwarf::DW_OP_plus_uconst:
   case dwarf::DW_OP_entry_value:
+  case dwarf::DW_OP_regx:
     return 2;
   default:
     return 1;
   }
 }
 
 bool DIExpression::isValid() const {
   for (auto I = expr_op_begin(), E = expr_op_end(); I != E; ++I) {
     // Check that there's space for the operand.
     if (I->get() + I->getSize() > E->get())
       return false;
 
+    uint64_t Op = I->getOp();
+    if (Op >= dwarf::DW_OP_reg0 && Op <= dwarf::DW_OP_reg31)
+      continue;
+
     // Check that the operand is valid.
-    switch (I->getOp()) {
+    switch (Op) {
     default:
       return false;
     case dwarf::DW_OP_LLVM_fragment:
       // A fragment operator must appear at the end.
       return I->get() + I->getSize() == E->get();
     case dwarf::DW_OP_stack_value: {
       // Must be the last one or followed by a DW_OP_LLVM_fragment.
       if (I->get() + I->getSize() == E->get())
for (auto I = expr_op_begin(), E = expr_op_end(); I != E; ++I) {
     case dwarf::DW_OP_shr:
     case dwarf::DW_OP_shra:
     case dwarf::DW_OP_deref:
     case dwarf::DW_OP_deref_size:
     case dwarf::DW_OP_xderef:
     case dwarf::DW_OP_lit0:
     case dwarf::DW_OP_not:
     case dwarf::DW_OP_dup:
+    case dwarf::DW_OP_regx:
       break;
     }
   }
   return true;
 }
 
 bool DIExpression::isImplicit() const {
   unsigned N = getNumElements();

lib/Target/X86/X86InstrInfo.h

public:
   MachineBasicBlock::iterator
   insertOutlinedCall(Module &M, MachineBasicBlock &MBB,
                      MachineBasicBlock::iterator &It, MachineFunction &MF,
                      const outliner::Candidate &C) const override;
 
 #define GET_INSTRINFO_HELPER_DECLS
 #include "X86GenInstrInfo.inc"
 
+  Optional<ParamLoadedValue>
+  describeLoadedValue(const MachineInstr &MI) const override;
+
 protected:
   /// Commutes the operands in the given instruction by changing the operands
   /// order and/or changing the instruction's opcode and/or the immediate value
   /// operand.
   ///
   /// The arguments 'CommuteOpIdx1' and 'CommuteOpIdx2' specify the operands
   /// to be commuted.
   ///

lib/Target/X86/X86InstrInfo.cpp

 #include "llvm/CodeGen/MachineDominators.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineModuleInfo.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/StackMaps.h"
 #include "llvm/IR/DerivedTypes.h"
 #include "llvm/IR/Function.h"
-#include "llvm/IR/LLVMContext.h"
+#include "llvm/IR/DebugInfoMetadata.h"
 #include "llvm/MC/MCAsmInfo.h"
 #include "llvm/MC/MCExpr.h"
 #include "llvm/MC/MCInst.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/Target/TargetOptions.h"
bool X86InstrInfo::isAssociativeAndCommutative(const MachineInstr &Inst) const {
   case X86::VMULSDZrr:
   case X86::VMULSSZrr:
     return Inst.getParent()->getParent()->getTarget().Options.UnsafeFPMath;
   default:
     return false;
   }
 }
 
+Optional<ParamLoadedValue>
+X86InstrInfo::describeLoadedValue(const MachineInstr &MI) const {
+  DIExpression *Expr;
+  const MachineOperand *Op;
+
+  switch (MI.getOpcode()) {
+  case X86::LEA32r:
+  case X86::LEA64r:
+  case X86::LEA64_32r: {
+    // Operand 4 could be global address. For now we do not support
+    // such situation.
+    if (!MI.getOperand(4).isImm() || !MI.getOperand(2).isImm())
+      return None;
+
+    const MachineOperand &Op1 = MI.getOperand(1);
+    const MachineOperand &Op2 = MI.getOperand(3);
+    const TargetRegisterInfo *TRI = &getRegisterInfo();
+    assert(Op2.isReg() &&
+           (Op2.getReg() == X86::NoRegister ||
+            TargetRegisterInfo::isPhysicalRegister(Op2.getReg())));
+
+    // Omit situations like:
+    // %rsi = lea %rsi, 4, ...
+    if ((Op1.isReg() && Op1.getReg() == MI.getOperand(0).getReg()) ||
+        Op2.getReg() == MI.getOperand(0).getReg())
+      return None;
+    else if ((Op1.isReg() && Op1.getReg() != X86::NoRegister &&
+              TRI->regsOverlap(Op1.getReg(), MI.getOperand(0).getReg())) ||
+             (Op2.getReg() != X86::NoRegister &&
+              TRI->regsOverlap(Op2.getReg(), MI.getOperand(0).getReg())))
+      return None;
+
+    int64_t Coef = MI.getOperand(2).getImm();
+    int64_t Offset = MI.getOperand(4).getImm();
+    SmallVector<uint64_t, 8> Elements;
+
+    if ((Op1.isReg() && Op1.getReg() != X86::NoRegister)) {
+      Op = &Op1;
+    } else if (Op1.isFI())
+      Op = &Op1;
+
+    if (Op && Op->isReg() && Op->getReg() == Op2.getReg() && Coef > 0) {
+      Elements.push_back(dwarf::DW_OP_constu);
+      Elements.push_back(Coef + 1);
+      Elements.push_back(dwarf::DW_OP_mul);
+    } else {
+      if (Op && Op2.getReg() != X86::NoRegister) {
+        int dwarfReg = TRI->getDwarfRegNum(Op2.getReg(), false);
+        if (dwarfReg < 0)
+          return None;
+        else if (dwarfReg < 32)
+          Elements.push_back(dwarf::DW_OP_reg0 + dwarfReg);
+        else {
+          Elements.push_back(dwarf::DW_OP_regx);
+          Elements.push_back(dwarfReg);
+        }
+      } else if (!Op) {
+        assert(Op2.getReg() != X86::NoRegister);
+        Op = &Op2;
+      }
+
+      if (Coef > 1) {
+        assert(Op2.getReg() != X86::NoRegister);
+        Elements.push_back(dwarf::DW_OP_constu);
+        Elements.push_back(Coef);
+        Elements.push_back(dwarf::DW_OP_mul);
+      }
+
+      if (((Op1.isReg() && Op1.getReg() != X86::NoRegister) || Op1.isFI()) &&
+          Op2.getReg() != X86::NoRegister) {
+        Elements.push_back(dwarf::DW_OP_plus);
+      }
+    }
+
+    if (Offset < 0) {
+      Elements.push_back(dwarf::DW_OP_constu);
+      Elements.push_back(-Offset);
+      Elements.push_back(dwarf::DW_OP_minus);
+    } else if (Offset > 0) {
+      Elements.push_back(dwarf::DW_OP_constu);
+      Elements.push_back(Offset);
+      Elements.push_back(dwarf::DW_OP_plus);
+    }
+
+    Expr = DIExpression::get(MI.getMF()->getFunction().getContext(), Elements);
+    return ParamLoadedValue(Op, Expr);;
+  }
+  default:
+    return TargetInstrInfo::describeLoadedValue(MI);
+  }
+}
+
 /// This is an architecture-specific helper function of reassociateOps.
 /// Set special operand attributes for new instructions after reassociation.
 void X86InstrInfo::setSpecialOperandAttr(MachineInstr &OldMI1,
                                          MachineInstr &OldMI2,
                                          MachineInstr &NewMI1,
                                          MachineInstr &NewMI2) const {
   // Integer instructions define an implicit EFLAGS source register operand as
   // the third source (fourth total) operand.

test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir

+# RUN: llc -debug-entry-values -start-after=machineverifier -filetype=obj %s -o -| llvm-dwarfdump -| FileCheck %s
+#
+# CHECK: DW_TAG_GNU_call_site
+# CHECK-NEXT:   DW_AT_abstract_origin {{.*}} "foo"
+# CHECK-NEXT:   DW_AT_low_pc
+# CHECK-EMPTY: 
+# CHECK-NEXT:   DW_TAG_GNU_call_site_parameter
+# CHECK-NEXT:     DW_AT_location      (DW_OP_reg2 RCX)
+# CHECK-NEXT:     DW_AT_GNU_call_site_value   (DW_OP_breg14 R14+0)
+# CHECK-EMPTY: 
+# CHECK-NEXT:   DW_TAG_GNU_call_site_parameter
+# CHECK-NEXT:     DW_AT_location      (DW_OP_reg1 RDX)
+# CHECK-NEXT:     DW_AT_GNU_call_site_value   (DW_OP_fbreg +8)
+# CHECK-EMPTY: 
+# CHECK-NEXT:   DW_TAG_GNU_call_site_parameter
+# CHECK-NEXT:     DW_AT_location      (DW_OP_reg5 RDI)
+# CHECK-NEXT:     DW_AT_GNU_call_site_value   (DW_OP_GNU_entry_value(DW_OP_reg4 RSI))
+# CHECK: DW_TAG_GNU_call_site
+# CHECK-NEXT:   DW_AT_abstract_origin {{.*}}"foo"
+# CHECK-NEXT:   DW_AT_low_pc
+# CHECK-EMPTY: 
+# CHECK-NEXT:   DW_TAG_GNU_call_site_parameter
+# CHECK-NEXT:     DW_AT_location      (DW_OP_reg2 RCX)
+# CHECK-NEXT:     DW_AT_GNU_call_site_value   (DW_OP_fbreg +8, DW_OP_deref)
+# CHECK-EMPTY: 
+# CHECK-NEXT:   DW_TAG_GNU_call_site_parameter
+# CHECK-NEXT:     DW_AT_location      (DW_OP_reg4 RSI)
+# CHECK-NEXT:     DW_AT_GNU_call_site_value   (DW_OP_lit4)
+# CHECK-NOT: DW_TAG_GNU_call_site_parameter
+#
+# Check that call site interpretation analysis can interpret instructions such
+# as move immediate, register to register moves, stack loading and LEA
+# instructions. Last negative check should verify that we are not producing
+# interpretation for RDX register since its loaded value is call clobberable.
+# Also check that we are generating proper call site debug entities.
+--- |
+  ; ModuleID = 'dbgcall-site-interpretation.c'
+  source_filename = "dbgcall-site-interpretation.c"
+  target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+  target triple = "x86_64-unknown-linux-gnu"
+  
+  ; Function Attrs: nounwind uwtable
+  define dso_local i32 @baa(i32 %arg1, i32 %arg2, i32 %arg3, i32 %arg4) local_unnamed_addr !dbg !9 {
+  entry:
+    %arg3.addr = alloca i32, align 4
+    %local2 = alloca i32, align 4
+    call void @llvm.dbg.value(metadata i32 %arg1, metadata !14, metadata !DIExpression()), !dbg !21
+    call void @llvm.dbg.value(metadata i32 %arg2, metadata !15, metadata !DIExpression()), !dbg !21
+    call void @llvm.dbg.value(metadata i32 %arg3, metadata !16, metadata !DIExpression()), !dbg !21
+    store i32 %arg3, i32* %arg3.addr, align 4
+    call void @llvm.dbg.value(metadata i32 %arg4, metadata !17, metadata !DIExpression()), !dbg !21
+    %0 = bitcast i32* %local2 to i8*, !dbg !21
+    call void @llvm.dbg.value(metadata i32* %arg3.addr, metadata !16, metadata !DIExpression(DW_OP_deref)), !dbg !21
+    %call = call i32 @foo(i32 %arg1, i32 %arg2, i32* nonnull %arg3.addr, i32 %arg4), !dbg !21
+    call void @llvm.dbg.value(metadata i32 %call, metadata !18, metadata !DIExpression()), !dbg !21
+    %cmp = icmp sgt i32 %arg1, %arg2, !dbg !21
+    %1 = load i32, i32* %arg3.addr, align 4, !dbg !21
+    call void @llvm.dbg.value(metadata i32 %1, metadata !16, metadata !DIExpression()), !dbg !21
+    %add = add nsw i32 %1, %arg1, !dbg !21
+    %add1 = add nsw i32 %arg4, %arg2, !dbg !21
+    %local1.0 = select i1 %cmp, i32 %add, i32 %add1, !dbg !21
+    call void @llvm.dbg.value(metadata i32 %local1.0, metadata !18, metadata !DIExpression()), !dbg !21
+    %rem = srem i32 %1, %arg1, !dbg !21
+    %tobool = icmp eq i32 %rem, 0, !dbg !21
+    %mul = mul nsw i32 %1, %arg1, !dbg !21
+    %add3 = add nsw i32 %1, %arg4, !dbg !21
+    %storemerge = select i1 %tobool, i32 %mul, i32 %add3, !dbg !21
+    call void @llvm.dbg.value(metadata i32 %storemerge, metadata !19, metadata !DIExpression()), !dbg !21
+    store i32 %storemerge, i32* %local2, align 4, !dbg !21
+    %cmp6 = icmp slt i32 %storemerge, %arg4, !dbg !21
+    %local3.0.v = select i1 %cmp6, i32 %local1.0, i32 %arg1, !dbg !21
+    %local3.0 = mul nsw i32 %local3.0.v, %storemerge, !dbg !21
+    call void @llvm.dbg.value(metadata i32 %local3.0, metadata !20, metadata !DIExpression()), !dbg !21
+    call void @llvm.dbg.value(metadata i32* %local2, metadata !19, metadata !DIExpression(DW_OP_deref)), !dbg !21
+    %call12 = call i32 @foo(i32 %local1.0, i32 4, i32* nonnull %local2, i32 %local3.0), !dbg !21
+    call void @llvm.dbg.value(metadata i32 %call12, metadata !14, metadata !DIExpression()), !dbg !21
+    %add13 = add nsw i32 %call12, 4, !dbg !21
+    ret i32 %add13, !dbg !21
+  }
+  
+  declare !dbg !4 dso_local i32 @foo(i32, i32, i32*, i32) local_unnamed_addr
+  
+  ; Function Attrs: nounwind readnone speculatable
+  declare void @llvm.dbg.value(metadata, metadata, metadata)
+  
+  !llvm.dbg.cu = !{!0}
+  !llvm.module.flags = !{!5, !6, !7}
+  !llvm.ident = !{!8}
+  
+  !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 9.0.0", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !3, nameTableKind: None)
+  !1 = !DIFile(filename: "dbgcall-site-interpretation.c", directory: "/dir")
+  !2 = !{}
+  !3 = !{!4}
+  !4 = !DISubprogram(name: "foo", scope: !1, file: !1, line: 9, flags: DIFlagPrototyped, spFlags: DISPFlagOptimized | DISPFlagDeclForCallSite, retainedNodes: !2)
+  !5 = !{i32 2, !"Dwarf Version", i32 4}
+  !6 = !{i32 2, !"Debug Info Version", i32 3}
+  !7 = !{i32 1, !"wchar_size", i32 4}
+  !8 = !{!"clang version 9.0.0"}
+  !9 = distinct !DISubprogram(name: "baa", scope: !1, file: !1, line: 10, type: !10, scopeLine: 10, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !13)
+  !10 = !DISubroutineType(types: !11)
+  !11 = !{!12, !12, !12, !12, !12}
+  !12 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+  !13 = !{!14, !15, !16, !17, !18, !19, !20}
+  !14 = !DILocalVariable(name: "arg1", arg: 1, scope: !9, file: !1, line: 10, type: !12)
+  !15 = !DILocalVariable(name: "arg2", arg: 2, scope: !9, file: !1, line: 10, type: !12, flags: DIFlagArgumentNotModified)
+  !16 = !DILocalVariable(name: "arg3", arg: 3, scope: !9, file: !1, line: 10, type: !12)
+  !17 = !DILocalVariable(name: "arg4", arg: 4, scope: !9, file: !1, line: 10, type: !12, flags: DIFlagArgumentNotModified)
+  !18 = !DILocalVariable(name: "local1", scope: !9, file: !1, line: 11, type: !12)
+  !19 = !DILocalVariable(name: "local2", scope: !9, file: !1, line: 11, type: !12)
+  !20 = !DILocalVariable(name: "local3", scope: !9, file: !1, line: 11, type: !12)
+  !21 = !DILocation(line: 10, column: 13, scope: !9)
+
+...
+---
+name:            baa
+liveins:         
+  - { reg: '$edi', virtual-reg: '' }
+  - { reg: '$esi', virtual-reg: '' }
+  - { reg: '$edx', virtual-reg: '' }
+  - { reg: '$ecx', virtual-reg: '' }
+fixedStack:      
+  - { id: 0, type: spill-slot, offset: -32, size: 8, alignment: 16, stack-id: 0, 
+      callee-saved-register: '$rbx', callee-saved-restored: true, debug-info-variable: '', 
+      debug-info-expression: '', debug-info-location: '' }
+  - { id: 1, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: 0, 
+      callee-saved-register: '$r14', callee-saved-restored: true, debug-info-variable: '', 
+      debug-info-expression: '', debug-info-location: '' }
+  - { id: 2, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: 0, 
+      callee-saved-register: '$r15', callee-saved-restored: true, debug-info-variable: '', 
+      debug-info-expression: '', debug-info-location: '' }
+stack:           
+  - { id: 0, name: arg3.addr, type: default, offset: -40, size: 4, alignment: 4, 
+      stack-id: 0, callee-saved-register: '', callee-saved-restored: true, 
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 1, name: local2, type: default, offset: -36, size: 4, alignment: 4, 
+      stack-id: 0, callee-saved-register: '', callee-saved-restored: true, 
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+callSites:       
+  - { bb: 0, offset: 23, fwdArgRegs: 
+      - { arg: 0, reg: '$edi' }
+      - { arg: 1, reg: '$esi' }
+      - { arg: 2, reg: '$rdx' }
+      - { arg: 3, reg: '$ecx' } }
+  - { bb: 0, offset: 49, fwdArgRegs: 
+      - { arg: 0, reg: '$edi' }
+      - { arg: 1, reg: '$esi' }
+      - { arg: 2, reg: '$rdx' }
+      - { arg: 3, reg: '$ecx' } }
+body:             |
+  bb.0.entry:
+    liveins: $ecx, $edi, $edx, $esi, $r15, $r14, $rbx
+  
+    DBG_VALUE $edi, $noreg, !14, !DIExpression(), debug-location !21
+    DBG_VALUE $esi, $noreg, !15, !DIExpression(), debug-location !21
+    DBG_VALUE $edx, $noreg, !16, !DIExpression(), debug-location !21
+    DBG_VALUE $ecx, $noreg, !17, !DIExpression(), debug-location !21
+    frame-setup PUSH64r killed $r15, implicit-def $rsp, implicit $rsp
+    CFI_INSTRUCTION def_cfa_offset 16
+    frame-setup PUSH64r killed $r14, implicit-def $rsp, implicit $rsp
+    CFI_INSTRUCTION def_cfa_offset 24
+    frame-setup PUSH64r killed $rbx, implicit-def $rsp, implicit $rsp
+    CFI_INSTRUCTION def_cfa_offset 32
+    $rsp = frame-setup SUB64ri8 $rsp, 16, implicit-def dead $eflags
+    CFI_INSTRUCTION def_cfa_offset 48
+    CFI_INSTRUCTION offset $rbx, -32
+    CFI_INSTRUCTION offset $r14, -24
+    CFI_INSTRUCTION offset $r15, -16
+    $r14d = MOV32rr $ecx, implicit-def $r14
+    DBG_VALUE $edx, $noreg, !16, !DIExpression(), debug-location !21
+    $r15d = MOV32rr $esi, implicit-def $r15
+    $ebx = MOV32rr $edi, implicit-def $rbx
+    $edi = MOV32rr $esi
+    MOV32mr $rsp, 1, $noreg, 8, $noreg, killed renamable $edx :: (store 4 into %ir.arg3.addr)
+    renamable $rdx = LEA64r $rsp, 1, $noreg, 8, $noreg
+    renamable $ecx = MOV32rr $r14d,
+    CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $edi, implicit $esi, implicit $rdx, implicit $ecx, implicit-def $rsp, implicit-def $ssp, implicit-def $eax, implicit-def $rax, debug-location !21
+    DBG_VALUE $noreg, $noreg, !18, !DIExpression(), debug-location !21
+    $rdx = MOV64rr renamable $rax
+    $ecx = KILL renamable $ecx, implicit-def $rcx 
+    renamable $eax = LEA64_32r renamable $rcx, 1, renamable $rbx, 0, $noreg, debug-location !21
+    renamable $edi = LEA64_32r renamable $r14, 1, renamable $r15, 0, $noreg, debug-location !21
+    CMP32rr renamable $ebx, renamable $r15d, implicit-def $eflags, implicit killed $r15, debug-location !21
+    renamable $edi = CMOV32rr killed renamable $edi, killed renamable $eax, 15, implicit killed $eflags, debug-location !21
+    DBG_VALUE $edi, $noreg, !18, !DIExpression(), debug-location !21
+    $eax = MOV32rr $ecx, debug-location !21
+    CDQ implicit-def $eax, implicit-def $edx, implicit $eax, debug-location !21
+    IDIV32r renamable $ebx, implicit-def dead $eax, implicit-def $edx, implicit-def dead $eflags, implicit $eax, implicit $edx, debug-location !21
+    $eax = MOV32rr $ecx, debug-location !21
+    renamable $eax = nsw IMUL32rr killed renamable $eax, renamable $ebx, implicit-def dead $eflags, debug-location !21
+    renamable $ecx = nsw ADD32rr renamable $ecx, renamable $r14d, implicit-def dead $eflags, implicit killed $rcx, implicit-def $rcx, debug-location !21
+    TEST32rr killed renamable $edx, renamable $edx, implicit-def $eflags, debug-location !21
+    renamable $ecx = CMOV32rr renamable $ecx, killed renamable $eax, 4, implicit killed $eflags, implicit killed $rcx, implicit-def $rcx, debug-location !21
+    DBG_VALUE $ecx, $noreg, !19, !DIExpression(), debug-location !21
+    MOV32mr $rsp, 1, $noreg, 12, $noreg, renamable $ecx, debug-location !21 :: (store 4 into %ir.local2)
+    CMP32rr renamable $ecx, renamable $r14d, implicit-def $eflags, implicit killed $r14, debug-location !21
+    renamable $ebx = CMOV32rr renamable $ebx, renamable $edi, 12, implicit killed $eflags, implicit killed $rbx, implicit-def $rbx, debug-location !21
+    renamable $ecx = nsw IMUL32rr renamable $ecx, renamable $ebx, implicit-def dead $eflags, implicit killed $rbx, implicit killed $rcx, implicit-def $rcx, debug-location !21
+    DBG_VALUE $rsp, $noreg, !19, !DIExpression(DW_OP_plus_uconst, 12, DW_OP_deref), debug-location !21
+    DBG_VALUE $ecx, $noreg, !20, !DIExpression(), debug-location !21
+    $esi = MOV32ri 4, debug-location !21
+    renamable $ecx = MOV32rm $rsp, 1, $noreg, 8, $noreg, implicit-def $rcx, debug-location !21 :: (dereferenceable load 4 from %ir.arg3.addr)
+    CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $edi, implicit $esi, implicit $rdx, implicit $ecx, implicit-def $rsp, implicit-def $ssp, implicit-def $eax, implicit-def $rax, debug-location !21
+    DBG_VALUE $eax, $noreg, !14, !DIExpression(), debug-location !21
+    renamable $eax = nsw ADD32ri8 killed renamable $eax, 4, implicit-def dead $eflags, debug-location !21
+    $rsp = frame-destroy ADD64ri8 $rsp, 16, implicit-def dead $eflags, debug-location !21
+    CFI_INSTRUCTION def_cfa_offset 32, debug-location !21
+    $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !21
+    CFI_INSTRUCTION def_cfa_offset 24, debug-location !21
+    $r14 = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !21
+    DBG_VALUE $ecx, $noreg, !17, !DIExpression(DW_OP_entry_value, 1), debug-location !21
+    CFI_INSTRUCTION def_cfa_offset 16, debug-location !21
+    $r15 = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !21
+    DBG_VALUE $esi, $noreg, !15, !DIExpression(DW_OP_entry_value, 1), debug-location !21
+    CFI_INSTRUCTION def_cfa_offset 8, debug-location !21
+    RETQ $eax, debug-location !21
+
+...

test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir

+# RUN: llc -debug-entry-values -start-after=machineverifier -filetype=obj %s -o -| llvm-dwarfdump -| FileCheck %s
+# CHECK: DW_TAG_GNU_call_site
+# CHECK-NEXT:   DW_AT_abstract_origin {{.*}} "foo")
+# CHECK-NEXT:   DW_AT_low_pc {{.*}} 
+# CHECK-EMPTY: 
+# CHECK-NEXT:   DW_TAG_GNU_call_site_parameter
+# CHECK-NEXT:     DW_AT_location      (DW_OP_reg9 R9)
+# CHECK-NEXT:     DW_AT_GNU_call_site_value   (DW_OP_breg15 R15+10)
+# CHECK-EMPTY: 
+# CHECK-NEXT:   DW_TAG_GNU_call_site_parameter
+# CHECK-NEXT:     DW_AT_location      (DW_OP_reg8 R8)
+# CHECK-NEXT:     DW_AT_GNU_call_site_value   (DW_OP_breg15 R15+0, DW_OP_lit2, DW_OP_mul, DW_OP_lit8, DW_OP_plus)
+# CHECK-EMPTY: 
+# CHECK-NEXT:   DW_TAG_GNU_call_site_parameter
+# CHECK-NEXT:     DW_AT_location      (DW_OP_reg1 RDX)
+# CHECK-NEXT:     DW_AT_GNU_call_site_value   (DW_OP_breg14 R14+0, DW_OP_lit5, DW_OP_mul, DW_OP_lit8, DW_OP_plus)
+# CHECK-EMPTY: 
+# CHECK-NEXT:   DW_TAG_GNU_call_site_parameter
+# CHECK-NEXT:     DW_AT_location      (DW_OP_reg4 RSI)
+# CHECK-NEXT:     DW_AT_GNU_call_site_value   (DW_OP_breg14 R14+0)
+# CHECK-EMPTY: 
+# CHECK-NEXT:   DW_TAG_GNU_call_site_parameter
+# CHECK-NEXT:     DW_AT_location      (DW_OP_reg5 RDI)
+# CHECK-NEXT:     DW_AT_GNU_call_site_value   (DW_OP_breg14 R14+0, DW_OP_breg15 R15+0, DW_OP_lit2, DW_OP_mul, DW_OP_plus, DW_OP_lit4, DW_OP_plus)
+# CHECK-EMPTY: 
+# CHECK-NEXT:   DW_TAG_GNU_call_site_parameter
+# CHECK-NEXT:     DW_AT_location      (DW_OP_reg2 RCX)
+# CHECK-NEXT:     DW_AT_GNU_call_site_value   (DW_OP_breg14 R14+0, DW_OP_breg15 R15+0, DW_OP_plus)
+# CHECK: DW_TAG_GNU_call_site
+# CHECK-NEXT:   DW_AT_abstract_origin {{.*}} "foo2")
+# CHECK-NEXT:   DW_AT_low_pc {{.*}}
+# CHECK-EMPTY: 
+# CHECK-NEXT:   DW_TAG_GNU_call_site_parameter
+# CHECK-NEXT:     DW_AT_location      (DW_OP_reg5 RDI)
+# CHECK-NEXT:     DW_AT_GNU_call_site_value   (DW_OP_breg14 R14+0, DW_OP_lit2, DW_OP_mul)
+--- |
+  ; ModuleID = 'dbgcall-site-lea-interpretation.ll'
+  source_filename = "dbgcall-site-lea-interpretation.c"
+  target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+  target triple = "x86_64-unknown-linux-gnu"
+  
+  define dso_local i32 @baa(i32 %arg1, i32 %arg2, i32 %arg3) local_unnamed_addr !dbg !10 {
+  entry:
+    %arg1.addr = alloca i32, align 4
+    %arg3.addr = alloca i32, align 4
+    %local1 = alloca i32, align 4
+    store i32 %arg1, i32* %arg1.addr, align 4
+    store i32 %arg3, i32* %arg3.addr, align 4
+    %0 = bitcast i32* %local1 to i8*, !dbg !14
+    %mul = mul nsw i32 %arg3, %arg1, !dbg !14
+    store i32 %mul, i32* %local1, align 4, !dbg !14
+    %add = add nsw i32 %arg2, %arg1, !dbg !14
+    %sub = sub nsw i32 %add, %arg3, !dbg !14
+    %call = call i32 @foo(i32 %mul, i32 %sub, i32* nonnull %local1, i32* nonnull %arg1.addr, i32* nonnull %arg3.addr, i32 %add), !dbg !14
+    %1 = load i32, i32* %local1, align 4, !dbg !14
+    %add2 = add nsw i32 %1, %call, !dbg !14
+    store i32 %add2, i32* %local1, align 4, !dbg !14
+    %call3 = call i32 @foo2(i32* nonnull %local1), !dbg !14
+    %2 = load i32, i32* %local1, align 4, !dbg !14
+    ret i32 %2, !dbg !14
+  }
+  
+  declare !dbg !4 dso_local i32 @foo(i32, i32, i32*, i32*, i32*, i32) local_unnamed_addr
+  
+  declare !dbg !5 dso_local i32 @foo2(i32*) local_unnamed_addr
+  
+  !llvm.dbg.cu = !{!0}
+  !llvm.module.flags = !{!6, !7, !8}
+  !llvm.ident = !{!9}
+  
+  !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 9.0.0", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !3, nameTableKind: None)
+  !1 = !DIFile(filename: "dbgcall-site-lea-interpretation.c", directory: "/dir")
+  !2 = !{}
+  !3 = !{!4, !5}
+  !4 = !DISubprogram(name: "foo", scope: !1, file: !1, line: 8, flags: DIFlagPrototyped, spFlags: DISPFlagOptimized | DISPFlagDeclForCallSite, retainedNodes: !2)
+  !5 = !DISubprogram(name: "foo2", scope: !1, file: !1, line: 9, flags: DIFlagPrototyped, spFlags: DISPFlagOptimized | DISPFlagDeclForCallSite, retainedNodes: !2)
+  !6 = !{i32 2, !"Dwarf Version", i32 4}
+  !7 = !{i32 2, !"Debug Info Version", i32 3}
+  !8 = !{i32 1, !"wchar_size", i32 4}
+  !9 = !{!"clang version 9.0.0"}
+  !10 = distinct !DISubprogram(name: "baa", scope: !1, file: !1, line: 11, type: !11, scopeLine: 11, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !2)
+  !11 = !DISubroutineType(types: !12)
+  !12 = !{!13, !13, !13, !13}
+  !13 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+  !14 = !DILocation(line: 11, column: 13, scope: !10)
+
+...
+---
+name:            baa
+liveins:         
+  - { reg: '$edi', virtual-reg: '' }
+  - { reg: '$esi', virtual-reg: '' }
+  - { reg: '$edx', virtual-reg: '' }
+fixedStack:      
+  - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: 0, 
+      callee-saved-register: '$rbx', callee-saved-restored: true, debug-info-variable: '', 
+      debug-info-expression: '', debug-info-location: '' }
+stack:           
+  - { id: 0, name: arg1.addr, type: default, offset: -20, size: 4, alignment: 4, 
+      stack-id: 0, callee-saved-register: '', callee-saved-restored: true, 
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 1, name: arg3.addr, type: default, offset: -24, size: 4, alignment: 4, 
+      stack-id: 0, callee-saved-register: '', callee-saved-restored: true, 
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 2, name: local1, type: default, offset: -28, size: 4, alignment: 4, 
+      stack-id: 0, callee-saved-register: '', callee-saved-restored: true, 
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+callSites:       
+  - { bb: 0, offset: 21, fwdArgRegs: 
+      - { arg: 0, reg: '$edi' }
+      - { arg: 1, reg: '$esi' }
+      - { arg: 2, reg: '$rdx' }
+      - { arg: 3, reg: '$rcx' }
+      - { arg: 4, reg: '$r8' }
+      - { arg: 5, reg: '$r9d' } }
+  - { bb: 0, offset: 24, fwdArgRegs: 
+      - { arg: 0, reg: '$rdi' } }
+body:             |
+  bb.0.entry:
+    liveins: $edi, $edx, $esi, $rbx
+  
+    frame-setup PUSH64r killed $rbx, implicit-def $rsp, implicit $rsp
+    CFI_INSTRUCTION def_cfa_offset 16
+    $rsp = frame-setup SUB64ri8 $rsp, 16, implicit-def dead $eflags
+    CFI_INSTRUCTION def_cfa_offset 32
+    CFI_INSTRUCTION offset $rbx, -16
+    $r9d = MOV32rr $esi
+    $r14 = MOV64rr $rsi
+    $r15 = MOV64rr $rdi
+    MOV32mr $rsp, 1, $noreg, 12, $noreg, renamable $edi :: (store 4 into %ir.arg1.addr)
+    MOV32mr $rsp, 1, $noreg, 8, $noreg, renamable $edx :: (store 4 into %ir.arg3.addr)
+    renamable $r9d = nsw ADD32rr killed renamable $r9d, renamable $edi, implicit-def dead $eflags, debug-location !14
+    $esi = MOV32rr $r9d, debug-location !14
+    renamable $esi = nsw SUB32rr killed renamable $esi, renamable $edx, implicit-def dead $eflags, debug-location !14
+    renamable $edx = nsw IMUL32rr killed renamable $edx, killed renamable $edi, implicit-def dead $eflags, debug-location !14
+    MOV32mr $rsp, 1, $noreg, 4, $noreg, renamable $edx, debug-location !14 :: (store 4 into %ir.local1)
+    renamable $rcx = LEA64r $r14, 1, $r15, 0, $noreg
+    renamable $rdi = LEA64r $r14, 2, $r15, 4, $noreg
+    renamable $rsi = LEA64r $r14, 1, $noreg, 0, $noreg
+    renamable $rdx = LEA64r $r14, 4, $r14, 8, $noreg
+    renamable $r8 = LEA64r $noreg, 2, $r15, 8, $noreg
+    renamable $r9 = LEA64r  $noreg, 1, $r15, 10, $noreg, implicit-def $r9d
+    CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $edi, implicit $esi, implicit $rdx, implicit $rcx, implicit $r8, implicit $r9d, implicit-def $rsp, implicit-def $ssp, implicit-def $eax, debug-location !14
+    ADD32mr $rsp, 1, $noreg, 4, $noreg, killed renamable $eax, implicit-def dead $eflags, debug-location !14 :: (store 4 into %ir.local1), (dereferenceable load 4 from %ir.local1)
+    $rdi = LEA64r $r14, 1, killed $r14, 0, $noreg
+    CALL64pcrel32 @foo2, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit-def $rsp, implicit-def $ssp, implicit-def dead $eax, debug-location !14
+    renamable $eax = MOV32rm $rsp, 1, $noreg, 4, $noreg, debug-location !14 :: (dereferenceable load 4 from %ir.local1)
+    $rsp = frame-destroy ADD64ri8 $rsp, 16, implicit-def dead $eflags, debug-location !14
+    CFI_INSTRUCTION def_cfa_offset 16, debug-location !14
+    $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !14
+    CFI_INSTRUCTION def_cfa_offset 8, debug-location !14
+    RETQ $eax, debug-location !14
+
+...

test/DebugInfo/MIR/X86/debug-call-site-param.mir

+# RUN: llc -debug-entry-values -filetype=obj -mtriple=x86_64-unknown-unknown -start-after=machineverifier -o - %s| llvm-dwarfdump - | FileCheck %s
+#
+# extern void foo(int *a, int b, int c, int d, int e, int f);
+# extern int getVal();
+#
+# void baa(int arg1, int arg2, int arg3) {
+#   int local1 = getVal();
+#   foo(&local1, arg2, 10, 15, arg3 + 3, arg1 + arg2);
+# }
+#
+# CHECK: DW_TAG_GNU_call_site
+# CHECK: DW_AT_abstract_origin {{.*}} "getVal"
+#
+# CHECK: DW_TAG_GNU_call_site
+# CHECK: DW_AT_abstract_origin {{.*}} "foo"
+# CHECK: DW_TAG_GNU_call_site_parameter
+# CHECK-NEXT:  DW_AT_location      (DW_OP_reg2 RCX)
+# CHECK-NEXT:  DW_AT_GNU_call_site_value   (DW_OP_lit15)
+# CHECK: DW_TAG_GNU_call_site_parameter
+# CHECK-NEXT: DW_AT_location      (DW_OP_reg1 RDX)
+# CHECK-NEXT: DW_AT_GNU_call_site_value   (DW_OP_lit10)
+# CHECK: DW_TAG_GNU_call_site_parameter
+# CHECK-NEXT: DW_AT_location      (DW_OP_reg4 RSI)
+# CHECK-NEXT: DW_AT_GNU_call_site_value   (DW_OP_breg3 RBX+0)
+# CHECK: DW_TAG_GNU_call_site_parameter
+# CHECK-NEXT: DW_AT_location      (DW_OP_reg5 RDI)
+# CHECK-NEXT: DW_AT_GNU_call_site_value   (DW_OP_fbreg +12)
+# CHECK: DW_TAG_GNU_call_site_parameter
+# CHECK-NEXT: DW_AT_location      (DW_OP_reg9 R9)
+# CHECK-NEXT: DW_AT_GNU_call_site_value   (DW_OP_breg15 R15+0, DW_OP_breg3 RBX+0, DW_OP_plus)
+# CHECK: DW_TAG_GNU_call_site_parameter
+# CHECK-NEXT: DW_AT_location      (DW_OP_reg8 R8)
+# CHECK-NEXT: DW_AT_GNU_call_site_value   (DW_OP_breg14 R14+3)
+
+--- |
+  ; ModuleID = 'test.c'
+  source_filename = "test.c"
+  target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+  target triple = "x86_64-unknown-linux-gnu"
+  
+  ; Function Attrs: nounwind uwtable
+  define dso_local void @baa(i32 %arg1, i32 %arg2, i32 %arg3) local_unnamed_addr !dbg !10 {
+  entry:
+    %local1 = alloca i32, align 4
+    call void @llvm.dbg.value(metadata i32 %arg1, metadata !15, metadata !DIExpression()), !dbg !19
+    call void @llvm.dbg.value(metadata i32 %arg2, metadata !16, metadata !DIExpression()), !dbg !20
+    call void @llvm.dbg.value(metadata i32 %arg3, metadata !17, metadata !DIExpression()), !dbg !21
+    %0 = bitcast i32* %local1 to i8*, !dbg !22
+    %call = tail call i32 (...) @getVal(), !dbg !23
+    call void @llvm.dbg.value(metadata i32 %call, metadata !18, metadata !DIExpression()), !dbg !24
+    store i32 %call, i32* %local1, align 4, !dbg !24, !tbaa !25
+    %add = add nsw i32 %arg3, 3, !dbg !29
+    %add1 = add nsw i32 %arg2, %arg1, !dbg !30
+    call void @llvm.dbg.value(metadata i32* %local1, metadata !18, metadata !DIExpression(DW_OP_deref)), !dbg !24
+    call void @foo(i32* nonnull %local1, i32 %arg2, i32 10, i32 15, i32 %add, i32 %add1), !dbg !31
+    ret void, !dbg !32
+  }
+  
+  declare !dbg !4 dso_local i32 @getVal(...) local_unnamed_addr
+  
+  declare !dbg !5 dso_local void @foo(i32*, i32, i32, i32, i32, i32) local_unnamed_addr
+  
+  ; Function Attrs: nounwind readnone speculatable
+  declare void @llvm.dbg.value(metadata, metadata, metadata)
+  
+  !llvm.dbg.cu = !{!0}
+  !llvm.module.flags = !{!6, !7, !8}
+  !llvm.ident = !{!9}
+  
+  !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 9.0.0", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !3, nameTableKind: None)
+  !1 = !DIFile(filename: "test.c", directory: "/dir")
+  !2 = !{}
+  !3 = !{!4, !5}
+  !4 = !DISubprogram(name: "getVal", scope: !1, file: !1, line: 2, spFlags: DISPFlagOptimized | DISPFlagDeclForCallSite, retainedNodes: !2)
+  !5 = !DISubprogram(name: "foo", scope: !1, file: !1, line: 1, flags: DIFlagPrototyped, spFlags: DISPFlagOptimized | DISPFlagDeclForCallSite, retainedNodes: !2)
+  !6 = !{i32 2, !"Dwarf Version", i32 4}
+  !7 = !{i32 2, !"Debug Info Version", i32 3}
+  !8 = !{i32 1, !"wchar_size", i32 4}
+  !9 = !{!"clang version 9.0.0"}
+  !10 = distinct !DISubprogram(name: "baa", scope: !1, file: !1, line: 4, type: !11, scopeLine: 4, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !14)
+  !11 = !DISubroutineType(types: !12)
+  !12 = !{null, !13, !13, !13}
+  !13 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+  !14 = !{!15, !16, !17, !18}
+  !15 = !DILocalVariable(name: "arg1", arg: 1, scope: !10, file: !1, line: 4, type: !13, flags: DIFlagArgumentNotModified)
+  !16 = !DILocalVariable(name: "arg2", arg: 2, scope: !10, file: !1, line: 4, type: !13, flags: DIFlagArgumentNotModified)
+  !17 = !DILocalVariable(name: "arg3", arg: 3, scope: !10, file: !1, line: 4, type: !13, flags: DIFlagArgumentNotModified)
+  !18 = !DILocalVariable(name: "local1", scope: !10, file: !1, line: 5, type: !13)
+  !19 = !DILocation(line: 4, column: 14, scope: !10)
+  !20 = !DILocation(line: 4, column: 24, scope: !10)
+  !21 = !DILocation(line: 4, column: 34, scope: !10)
+  !22 = !DILocation(line: 5, column: 3, scope: !10)
+  !23 = !DILocation(line: 5, column: 16, scope: !10)
+  !24 = !DILocation(line: 5, column: 7, scope: !10)
+  !25 = !{!26, !26, i64 0}
+  !26 = !{!"int", !27, i64 0}
+  !27 = !{!"omnipotent char", !28, i64 0}
+  !28 = !{!"Simple C/C++ TBAA"}
+  !29 = !DILocation(line: 6, column: 35, scope: !10)
+  !30 = !DILocation(line: 6, column: 45, scope: !10)
+  !31 = !DILocation(line: 6, column: 3, scope: !10)
+  !32 = !DILocation(line: 7, column: 1, scope: !10)
+
+...
+---
+name:            baa
+liveins:         
+  - { reg: '$edi', virtual-reg: '' }
+  - { reg: '$esi', virtual-reg: '' }
+  - { reg: '$edx', virtual-reg: '' }
+fixedStack:      
+  - { id: 0, type: spill-slot, offset: -32, size: 8, alignment: 16, stack-id: 0, 
+      callee-saved-register: '$rbx', callee-saved-restored: true, debug-info-variable: '', 
+      debug-info-expression: '', debug-info-location: '' }
+  - { id: 1, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: 0, 
+      callee-saved-register: '$r14', callee-saved-restored: true, debug-info-variable: '', 
+      debug-info-expression: '', debug-info-location: '' }
+  - { id: 2, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: 0, 
+      callee-saved-register: '$r15', callee-saved-restored: true, debug-info-variable: '', 
+      debug-info-expression: '', debug-info-location: '' }
+stack:           
+  - { id: 0, name: local1, type: default, offset: -36, size: 4, alignment: 4, 
+      stack-id: 0, callee-saved-register: '', callee-saved-restored: true, 
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+callSites:       
+  - { bb: 0, offset: 21, fwdArgRegs: [] }
+  - { bb: 0, offset: 31, fwdArgRegs: 
+      - { arg: 0, reg: '$rdi' }
+      - { arg: 1, reg: '$esi' }
+      - { arg: 2, reg: '$edx' }
+      - { arg: 3, reg: '$ecx' }
+      - { arg: 4, reg: '$r8d' }
+      - { arg: 5, reg: '$r9d' } }
+body:             |
+  bb.0.entry:
+    liveins: $edi, $edx, $esi, $r15, $r14, $rbx
+  
+    DBG_VALUE $edi, $noreg, !15, !DIExpression(), debug-location !19
+    DBG_VALUE $esi, $noreg, !16, !DIExpression(), debug-location !20
+    DBG_VALUE $edx, $noreg, !17, !DIExpression(), debug-location !21
+    frame-setup PUSH64r killed $r15, implicit-def $rsp, implicit $rsp
+    CFI_INSTRUCTION def_cfa_offset 16
+    frame-setup PUSH64r killed $r14, implicit-def $rsp, implicit $rsp
+    CFI_INSTRUCTION def_cfa_offset 24
+    frame-setup PUSH64r killed $rbx, implicit-def $rsp, implicit $rsp
+    CFI_INSTRUCTION def_cfa_offset 32
+    $rsp = frame-setup SUB64ri8 $rsp, 16, implicit-def dead $eflags
+    CFI_INSTRUCTION def_cfa_offset 48
+    CFI_INSTRUCTION offset $rbx, -32
+    CFI_INSTRUCTION offset $r14, -24
+    CFI_INSTRUCTION offset $r15, -16
+    $r14d = MOV32rr $edx, implicit-def $r14
+    $ebx = MOV32rr $esi, implicit-def $rbx
+    $r15d = MOV32rr $edi, implicit-def $r15
+    DBG_VALUE $r14d, $noreg, !17, !DIExpression(), debug-location !21
+    DBG_VALUE $ebx, $noreg, !16, !DIExpression(), debug-location !20
+    DBG_VALUE $r15d, $noreg, !15, !DIExpression(), debug-location !19
+    dead $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, implicit-def $al, debug-location !23
+    CALL64pcrel32 @getVal, csr_64, implicit $rsp, implicit $ssp, implicit $al, implicit-def $rsp, implicit-def $ssp, implicit-def $eax, debug-location !23
+    DBG_VALUE $eax, $noreg, !18, !DIExpression(), debug-location !24
+    MOV32mr $rsp, 1, $noreg, 12, $noreg, killed renamable $eax, debug-location !24 :: (store 4 into %ir.local1, !tbaa !25)
+    renamable $r8d = LEA64_32r killed renamable $r14, 1, $noreg, 3, $noreg, debug-location !29
+    renamable $r9d = LEA64_32r killed renamable $r15, 1, renamable $rbx, 0, $noreg, debug-location !30
+    DBG_VALUE $rsp, $noreg, !18, !DIExpression(DW_OP_plus_uconst, 12, DW_OP_deref), debug-location !24
+    renamable $rdi = LEA64r $rsp, 1, $noreg, 12, $noreg
+    $esi = MOV32rr $ebx, implicit killed $rbx, debug-location !31
+    $edx = MOV32ri 10, debug-location !31
+    $ecx = MOV32ri 15, debug-location !31
+    CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit $esi, implicit $edx, implicit killed $ecx, implicit $r8d, implicit $r9d, implicit-def $rsp, implicit-def $ssp, debug-location !31
+    $rsp = frame-destroy ADD64ri8 $rsp, 16, implicit-def dead $eflags, debug-location !32
+    CFI_INSTRUCTION def_cfa_offset 32, debug-location !32
+    $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !32
+    CFI_INSTRUCTION def_cfa_offset 24, debug-location !32
+    $r14 = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !32
+    CFI_INSTRUCTION def_cfa_offset 16, debug-location !32
+    $r15 = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !32
+    CFI_INSTRUCTION def_cfa_offset 8, debug-location !32
+    RETQ debug-location !32
+
+...

test/DebugInfo/X86/dwarf-callsite-related-attrs.ll

 ; $ clang++ -S -emit-llvm -o - -gdwarf-5 -o - -O1 tail2.cc
 ; volatile int sink;
 ; void __attribute__((noinline)) bat() { sink++; }
 ; void __attribute__((noinline)) bar() { sink++; }
 ; void __attribute__((noinline)) foo() {
 ;   bar(); bat();
 ;   bar(); bat();
 ; }
 ; int __attribute__((disable_tail_calls)) main() { foo(); }
 
 ; On Windows, we don't handle the relocations needed for AT_return_pc properly
 ; and fail with "failed to compute relocation: IMAGE_REL_AMD64_ADDR32".
 ; UNSUPPORTED: cygwin,windows-gnu,windows-msvc
 
 ; REQUIRES: object-emission
 ; RUN: %llc_dwarf -mtriple=x86_64-- < %s -o - | FileCheck %s -check-prefix=ASM
-; RUN: %llc_dwarf -mtriple=x86_64-- < %s -filetype=obj -o %t.o
+; RUN: %llc_dwarf -debugger-tune=lldb -mtriple=x86_64-- < %s -filetype=obj -o %t.o
 ; RUN: llvm-dwarfdump %t.o -o - | FileCheck %s -check-prefix=OBJ -implicit-check-not=DW_TAG_call_site
 ; RUN: llvm-dwarfdump -verify %t.o 2>&1 | FileCheck %s -check-prefix=VERIFY
 ; RUN: llvm-dwarfdump -statistics %t.o | FileCheck %s -check-prefix=STATS
 ; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis -o /dev/null
 
 ; VERIFY: No errors.
-; STATS: "call site entries":5
+; STATS: "call site DIEs":6
 
 @sink = global i32 0, align 4, !dbg !0
 
 ; ASM: DW_TAG_subprogram
 ; ASM:   DW_AT_call_all_calls
 ; OBJ: [[bat_sp:.*]]: DW_TAG_subprogram
 ; OBJ:   DW_AT_call_all_calls (true)
 ; OBJ:   DW_AT_name ("bat")

 ; ASM: DW_TAG_subprogram
 ; ASM: DW_AT_call_all_calls
 ; OBJ: DW_TAG_subprogram
 ; OBJ: DW_AT_call_all_calls (true)
 ; OBJ: DW_AT_name ("main")
 ; OBJ:   DW_TAG_call_site
 ; OBJ:     DW_AT_call_origin ([[foo_sp]])
 ; OBJ:     DW_AT_call_return_pc
+; OBJ:   DW_TAG_call_site
+; OBJ:     DW_AT_call_target
+; OBJ:     DW_AT_call_return_pc
 define i32 @main() !dbg !29 {
 entry:
   call void @_Z3foov(), !dbg !32
 
   %indirect_target = load void ()*, void ()** undef
   call void %indirect_target()
 
   call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()

test/tools/llvm-dwarfdump/X86/stats-dbg-callsite-info.ll

+; RUN: llc -debug-entry-values %s -o - -filetype=obj \
+; RUN:   | llvm-dwarfdump -statistics - | FileCheck %s
+;
+; The LLVM IR file was generated on this source code by using
+; option '-femit-param-entry-values'.
+;
+; extern void foo(int *a, int b, int c, int d, int e, int f);
+; extern int getVal();
+;
+; void baa(int arg1, int arg2, int arg3) {
+;   int local1 = getVal();
+;   foo(&local1, arg2, 10, 15, arg3 + 3, arg1 + arg2);
+; }
+;
+; CHECK: "call site DIEs":2
+; CHECK-SAME: "call site parameter DIEs":6
+;
+; ModuleID = 'test.c'
+source_filename = "test.c"
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+; Function Attrs: nounwind uwtable
+define dso_local void @baa(i32 %arg1, i32 %arg2, i32 %arg3) local_unnamed_addr #0 !dbg !10 {
+entry:
+  %local1 = alloca i32, align 4
+  call void @llvm.dbg.value(metadata i32 %arg1, metadata !15, metadata !DIExpression()), !dbg !19
+  call void @llvm.dbg.value(metadata i32 %arg2, metadata !16, metadata !DIExpression()), !dbg !20
+  call void @llvm.dbg.value(metadata i32 %arg3, metadata !17, metadata !DIExpression()), !dbg !21
+  %0 = bitcast i32* %local1 to i8*, !dbg !22
+  %call = tail call i32 (...) @getVal(), !dbg !23
+  call void @llvm.dbg.value(metadata i32 %call, metadata !18, metadata !DIExpression()), !dbg !24
+  store i32 %call, i32* %local1, align 4, !dbg !24
+  %add = add nsw i32 %arg3, 3, !dbg !24
+  %add1 = add nsw i32 %arg2, %arg1, !dbg !24
+  call void @llvm.dbg.value(metadata i32* %local1, metadata !18, metadata !DIExpression(DW_OP_deref)), !dbg !24
+  call void @foo(i32* nonnull %local1, i32 %arg2, i32 10, i32 15, i32 %add, i32 %add1), !dbg !24
+  ret void, !dbg !24
+}
+
+declare !dbg !4 dso_local i32 @getVal(...) local_unnamed_addr
+
+declare !dbg !5 dso_local void @foo(i32*, i32, i32, i32, i32, i32) local_unnamed_addr
+
+; Function Attrs: nounwind readnone speculatable
+declare void @llvm.dbg.value(metadata, metadata, metadata)
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!6, !7, !8}
+!llvm.ident = !{!9}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 9.0.0", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !3, nameTableKind: None)
+!1 = !DIFile(filename: "test.c", directory: "/dir")
+!2 = !{}
+!3 = !{!4, !5}
+!4 = !DISubprogram(name: "getVal", scope: !1, file: !1, line: 2, spFlags: DISPFlagOptimized | DISPFlagDeclForCallSite, retainedNodes: !2)
+!5 = !DISubprogram(name: "foo", scope: !1, file: !1, line: 1, flags: DIFlagPrototyped, spFlags: DISPFlagOptimized | DISPFlagDeclForCallSite, retainedNodes: !2)
+!6 = !{i32 2, !"Dwarf Version", i32 4}
+!7 = !{i32 2, !"Debug Info Version", i32 3}
+!8 = !{i32 1, !"wchar_size", i32 4}
+!9 = !{!"clang version 9.0.0"}
+!10 = distinct !DISubprogram(name: "baa", scope: !1, file: !1, line: 4, type: !11, scopeLine: 4, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !14)
+!11 = !DISubroutineType(types: !12)
+!12 = !{null, !13, !13, !13}
+!13 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+!14 = !{!15, !16, !17, !18}
+!15 = !DILocalVariable(name: "arg1", arg: 1, scope: !10, file: !1, line: 4, type: !13, flags: DIFlagArgumentNotModified)
+!16 = !DILocalVariable(name: "arg2", arg: 2, scope: !10, file: !1, line: 4, type: !13, flags: DIFlagArgumentNotModified)
+!17 = !DILocalVariable(name: "arg3", arg: 3, scope: !10, file: !1, line: 4, type: !13, flags: DIFlagArgumentNotModified)
+!18 = !DILocalVariable(name: "local1", scope: !10, file: !1, line: 5, type: !13)
+!19 = !DILocation(line: 4, column: 14, scope: !10)
+!20 = !DILocation(line: 4, column: 24, scope: !10)
+!21 = !DILocation(line: 4, column: 34, scope: !10)
+!22 = !DILocation(line: 5, column: 3, scope: !10)
+!23 = !DILocation(line: 5, column: 16, scope: !10)
+!24 = !DILocation(line: 5, column: 7, scope: !10)

tools/llvm-dwarfdump/Statistics.cpp

 
 /// Holds accumulated global statistics about DIEs.
 struct GlobalStats {
   /// Total number of PC range bytes covered by DW_AT_locations.
   unsigned ScopeBytesCovered = 0;
   /// Total number of PC range bytes in each variable's enclosing scope,
   /// starting from the first definition of the variable.
   unsigned ScopeBytesFromFirstDefinition = 0;
-  /// Total number of call site entries (DW_TAG_call_site) or
-  /// (DW_AT_call_file & DW_AT_call_line).
+  /// Total number of call site entries (DW_AT_call_file & DW_AT_call_line).
   unsigned CallSiteEntries = 0;
+  /// Total number of call site DIEs (DW_TAG_call_site).
+  unsigned CallSiteDIEs = 0;
+  /// Total number of call site parameter DIEs (DW_TAG_call_site_parameter).
+  unsigned CallSiteParamDIEs = 0;
   /// Total byte size of concrete functions. This byte size includes
   /// inline functions contained in the concrete functions.
   uint64_t FunctionSize = 0;
   /// Total byte size of inlined functions. This is the total number of bytes
   /// for the top inline functions within concrete functions. This can help
   /// tune the inline settings when compiling to match user expectations.
   uint64_t InlineFunctionSize = 0;
 };
static void collectStatsForDie(DWARFDie Die, std::string FnPrefix,
                                GlobalStats &GlobalStats) {
   bool HasLoc = false;
   bool HasSrcLoc = false;
   bool HasType = false;
   bool IsArtificial = false;
   uint64_t BytesCovered = 0;
   uint64_t OffsetToFirstDefinition = 0;
 
-  if (Die.getTag() == dwarf::DW_TAG_call_site) {
-    GlobalStats.CallSiteEntries++;
+  if (Die.getTag() == dwarf::DW_TAG_call_site ||
+      Die.getTag() == dwarf::DW_TAG_GNU_call_site) {
+    GlobalStats.CallSiteDIEs++;
+    return;
+  }
+
+  if (Die.getTag() == dwarf::DW_TAG_call_site_parameter ||
+      Die.getTag() == dwarf::DW_TAG_GNU_call_site_parameter) {
+    GlobalStats.CallSiteParamDIEs++;
     return;
   }
 
   if (Die.getTag() != dwarf::DW_TAG_formal_parameter &&
       Die.getTag() != dwarf::DW_TAG_variable &&
       Die.getTag() != dwarf::DW_TAG_member) {
     // Not a variable or constant member.
     return;
bool collectStatsForObjectFile(ObjectFile &Obj, DWARFContext &DICtx,
   printDatum(OS, "source functions", NumFunctions);
   printDatum(OS, "source functions with location", NumFuncsWithSrcLoc);
   printDatum(OS, "inlined functions", NumInlinedFunctions);
   printDatum(OS, "inlined funcs with abstract origins", NumAbstractOrigins);
   printDatum(OS, "unique source variables", VarParamUnique);
   printDatum(OS, "source variables", VarParamTotal);
   printDatum(OS, "variables with location", VarParamWithLoc);
   printDatum(OS, "call site entries", GlobalStats.CallSiteEntries);
+  printDatum(OS, "call site DIEs", GlobalStats.CallSiteDIEs);
+  printDatum(OS, "call site parameter DIEs", GlobalStats.CallSiteParamDIEs);
   printDatum(OS, "scope bytes total",
              GlobalStats.ScopeBytesFromFirstDefinition);
   printDatum(OS, "scope bytes covered", GlobalStats.ScopeBytesCovered);
   printDatum(OS, "total function size", GlobalStats.FunctionSize);
   printDatum(OS, "total inlined function size", GlobalStats.InlineFunctionSize);
   printDatum(OS, "total formal params", ParamTotal);
   printDatum(OS, "formal params with source location", ParamWithSrcLoc);
   printDatum(OS, "formal params with type", ParamWithType);