[RISCV] Prefer ShortForwardBranch over the fully generic Zicond expansion.

[craig.topper]

Summary

Short forward branch is shorter than (or (czero.eqz), (czero.nez)).

[reames]

LGTM

llvm/lib/Target/RISCV/RISCVISelLowering.cpp

if (FalseV.getOpcode() == ISD::AND &&
           ISD::OR, DL, VT, FalseV,
           DAG.getNode(RISCVISD::CZERO_EQZ, DL, VT, TrueV, CondV));
 
     // Try some other optimizations before falling back to generic lowering.
     if (SDValue V = combineSelectToBinOp(Op.getNode(), DAG, Subtarget))
       return V;
 
     // (select c, t, f) -> (or (czero_eqz t, c), (czero_nez f, c))
-    return DAG.getNode(ISD::OR, DL, VT,
-                       DAG.getNode(RISCVISD::CZERO_EQZ, DL, VT, TrueV, CondV),
-                       DAG.getNode(RISCVISD::CZERO_NEZ, DL, VT, FalseV, CondV));
+    // Unless we have the short forward branch optimization.
+    if (!Subtarget.hasShortForwardBranchOpt())
+      return DAG.getNode(
+          ISD::OR, DL, VT,
   }
 
   if (SDValue V = combineSelectToBinOp(Op.getNode(), DAG, Subtarget))
     return V;
 
   if (Op.hasOneUse()) {
     unsigned UseOpc = Op->use_begin()->getOpcode();
     if (isBinOp(UseOpc) && DAG.isSafeToSpeculativelyExecute(UseOpc)) {

llvm/test/CodeGen/RISCV/short-foward-branch-opt.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=riscv64 -mattr=+c -verify-machineinstrs < %s \
 ; RUN:   | FileCheck -check-prefix=NOSFB %s
 ; RUN: llc -mtriple=riscv64 -mcpu=sifive-u74 -verify-machineinstrs < %s \
-; RUN:   | FileCheck -check-prefix=SFB %s
+; RUN:   | FileCheck -check-prefixes=SFB,NOZICOND %s
+; RUN: llc -mtriple=riscv64 -mcpu=sifive-u74 -mattr=+experimental-zicond \
+; RUN:   -verify-machineinstrs < %s | FileCheck -check-prefixes=SFB,ZICOND %s
 
 ; The sifive-7-series can predicate a mv.
 
 define signext i32 @test1(i32 signext %x, i32 signext %y, i32 signext %z) {
 ; NOSFB-LABEL: test1:
 ; NOSFB:       # %bb.0:
 ; NOSFB-NEXT:    beqz a2, .LBB0_2
 ; NOSFB-NEXT:  # %bb.1:

 define signext i32 @test4(i32 signext %x, i32 signext %z) {
 ; NOSFB-LABEL: test4:
 ; NOSFB:       # %bb.0:
 ; NOSFB-NEXT:    snez a1, a1
 ; NOSFB-NEXT:    addi a1, a1, -1
 ; NOSFB-NEXT:    and a0, a0, a1
 ; NOSFB-NEXT:    ret
 ;
-; SFB-LABEL: test4:
-; SFB:       # %bb.0:
-; SFB-NEXT:    beqz a1, .LBB3_2
-; SFB-NEXT:  # %bb.1:
-; SFB-NEXT:    li a0, 0
-; SFB-NEXT:  .LBB3_2:
-; SFB-NEXT:    ret
+; NOZICOND-LABEL: test4:
+; NOZICOND:       # %bb.0:
+; NOZICOND-NEXT:    beqz a1, .LBB3_2
+; NOZICOND-NEXT:  # %bb.1:
+; NOZICOND-NEXT:    li a0, 0
+; NOZICOND-NEXT:  .LBB3_2:
+; NOZICOND-NEXT:    ret
+;
+; ZICOND-LABEL: test4:
+; ZICOND:       # %bb.0:
+; ZICOND-NEXT:    czero.nez a0, a0, a1
+; ZICOND-NEXT:    ret
   %c = icmp eq i32 %z, 0
   %b = select i1 %c, i32 %x, i32 0
   ret i32 %b
 }
 
 ; Same as above with select operands swapped.
 define signext i32 @test5(i32 signext %x, i32 signext %z) {
 ; NOSFB-LABEL: test5:
 ; NOSFB:       # %bb.0:
 ; NOSFB-NEXT:    seqz a1, a1
 ; NOSFB-NEXT:    addi a1, a1, -1
 ; NOSFB-NEXT:    and a0, a0, a1
 ; NOSFB-NEXT:    ret
 ;
-; SFB-LABEL: test5:
-; SFB:       # %bb.0:
-; SFB-NEXT:    bnez a1, .LBB4_2
-; SFB-NEXT:  # %bb.1:
-; SFB-NEXT:    li a0, 0
-; SFB-NEXT:  .LBB4_2:
-; SFB-NEXT:    ret
+; NOZICOND-LABEL: test5:
+; NOZICOND:       # %bb.0:
+; NOZICOND-NEXT:    bnez a1, .LBB4_2
+; NOZICOND-NEXT:  # %bb.1:
+; NOZICOND-NEXT:    li a0, 0
+; NOZICOND-NEXT:  .LBB4_2:
+; NOZICOND-NEXT:    ret
+;
+; ZICOND-LABEL: test5:
+; ZICOND:       # %bb.0:
+; ZICOND-NEXT:    czero.eqz a0, a0, a1
+; ZICOND-NEXT:    ret
   %c = icmp eq i32 %z, 0
   %b = select i1 %c, i32 0, i32 %x
   ret i32 %b
 }
 
 ; Test with false value -1.
 define signext i32 @test6(i32 signext %x, i32 signext %z) {
 ; NOSFB-LABEL: test6: