[VPlan] Update printOperands with dedicated mask printing.

[fhahn]

Summary

Building on generic mask handling, update printOperands with dedicated
printing for mask operands (clearly identifying them as a mask).

Depends on D157442.

[ABataev]

LG

llvm/lib/Transforms/Vectorize/VPlan.h

public:
   bool isMasked() const { return getNumOperands() != getNumNonMaskOperands(); }
 
   /// Return the mask used by this recipe. Note that a full mask is represented
   /// by a nullptr.
   VPValue *getMask() const {
     // Mask is optional and therefore the last operand.
     return isMasked() ? getOperand(getNumOperands() - 1) : nullptr;
   }
+
+#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
+  /// Print the operands to \p O.
+  void printOperands(raw_ostream &O, VPSlotTracker &SlotTracker) const;
+#endif
+
+  const_operand_range operands_without_mask() const {
+    auto End = isMasked() ? op_end() - 1 : op_end();
+    return const_operand_range(op_begin(), End);
+  }
 };
 
 // Helper macro to define common classof implementations for recipes.
 #define VP_CLASSOF_IMPL(VPDefID)                                               \
   static inline bool classof(const VPDef *D) {                                 \
     return D->getVPDefID() == VPDefID;                                         \
   }                                                                            \
   static inline bool classof(const VPValue *V) {                               \

llvm/lib/Transforms/Vectorize/VPlan.cpp

void VPValue::printAsOperand(raw_ostream &OS, VPSlotTracker &Tracker) const {
   }
 
   unsigned Slot = Tracker.getSlot(this);
   if (Slot == unsigned(-1))
     OS << "<badref>";
   else
     OS << "vp<%" << Tracker.getSlot(this) << ">";
 }
-
-void VPUser::printOperands(raw_ostream &O, VPSlotTracker &SlotTracker) const {
-  interleaveComma(operands(), O, [&O, &SlotTracker](VPValue *Op) {
-    Op->printAsOperand(O, SlotTracker);
-  });
-}
 #endif
 
 void VPInterleavedAccessInfo::visitRegion(VPRegionBlock *Region,
                                           Old2NewTy &Old2New,
                                           InterleavedAccessInfo &IAI) {
   ReversePostOrderTraversal<VPBlockShallowTraversalWrapper<VPBlockBase *>>
       RPOT(Region->getEntry());
   for (VPBlockBase *Base : RPOT) {

llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp

 }
 
 void VPRecipeBase::moveBefore(VPBasicBlock &BB,
                               iplist<VPRecipeBase>::iterator I) {
   removeFromParent();
   insertBefore(BB, I);
 }
 
+#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
+void VPRecipeBase::printOperands(raw_ostream &O,
+                                 VPSlotTracker &SlotTracker) const {
+  interleaveComma(operands_without_mask(), O, [&O, &SlotTracker](VPValue *Op) {
+    Op->printAsOperand(O, SlotTracker);
+  });
+  if (isMasked()) {
+    O << " (mask ";
+    getMask()->printAsOperand(O, SlotTracker);
+    O << ")";
+  }
+}
+#endif
+
 FastMathFlags VPRecipeWithIRFlags::getFastMathFlags() const {
   assert(OpType == OperationType::FPMathOp &&
          "recipe doesn't have fast math flags");
   FastMathFlags Res;
   Res.setAllowReassoc(FMFs.AllowReassoc);
   Res.setNoNaNs(FMFs.NoNaNs);
   Res.setNoInfs(FMFs.NoInfs);
   Res.setNoSignedZeros(FMFs.NoSignedZeros);

llvm/lib/Transforms/Vectorize/VPlanValue.h

public:
   };
 
 private:
   SmallVector<VPValue *, 2> Operands;
 
   VPUserID ID;
 
 protected:
-#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
-  /// Print the operands to \p O.
-  void printOperands(raw_ostream &O, VPSlotTracker &SlotTracker) const;
-#endif
-
   VPUser(ArrayRef<VPValue *> Operands, VPUserID ID) : ID(ID) {
     for (VPValue *Operand : Operands)
       addOperand(Operand);
   }
 
   VPUser(std::initializer_list<VPValue *> Operands, VPUserID ID)
       : VPUser(ArrayRef<VPValue *>(Operands), ID) {}
 

llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-forced.ll

 ; VPLANS-NEXT: Successor(s): vector loop
 ; VPLANS-EMPTY:
 ; VPLANS-NEXT: <x1> vector loop: {
 ; VPLANS-NEXT:   vector.body:
 ; VPLANS-NEXT:     EMIT vp<[[INDV:%[0-9]+]]> = CANONICAL-INDUCTION
 ; VPLANS-NEXT:     ACTIVE-LANE-MASK-PHI vp<[[LANEMASK_PHI:%[0-9]+]]> = phi vp<[[LANEMASK_ENTRY]]>, vp<[[LANEMASK_LOOP:%[0-9]+]]>
 ; VPLANS-NEXT:     vp<[[STEP:%[0-9]+]]>    = SCALAR-STEPS vp<[[INDV]]>, ir<1>
 ; VPLANS-NEXT:     CLONE ir<%gep> = getelementptr ir<%ptr>, vp<[[STEP]]>
-; VPLANS-NEXT:     WIDEN store ir<%gep>, ir<%val>, vp<[[LANEMASK_PHI]]>
+; VPLANS-NEXT:     WIDEN store ir<%gep>, ir<%val> (mask vp<[[LANEMASK_PHI]]>)
 ; VPLANS-NEXT:     EMIT vp<[[INC:%[0-9]+]]> = VF * Part + vp<[[INDV]]>
 ; VPLANS-NEXT:     EMIT vp<[[LANEMASK_LOOP]]> = active lane mask vp<[[INC]]>, vp<[[NEWTC]]>
 ; VPLANS-NEXT:     EMIT vp<[[INDV_UPDATE:%[0-9]+]]> = VF * UF + vp<[[INDV]]>
 ; VPLANS-NEXT:     EMIT vp<[[NOT:%[0-9]+]]> = not vp<[[LANEMASK_LOOP]]>
 ; VPLANS-NEXT:     EMIT branch-on-cond vp<[[NOT]]>
 ; VPLANS-NEXT:   No successors
 ; VPLANS-NEXT: }