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rengolin (Renato Golin)
Toolchain Engineer

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User Since
Oct 19 2012, 12:57 AM (501 w, 21 h)

Recent Activity

Today

rengolin added a comment to D126451: [Clang][CSKY] Add support about CSKYABIInfo.

I don't think it is largely similar to RISCV implementation except for the code structure and test reuse. And the test result is big different.

Fri, May 27, 3:57 AM · Restricted Project, Restricted Project

Yesterday

rengolin added a comment to D126451: [Clang][CSKY] Add support about CSKYABIInfo.

This looks good to me, but wait to make sure others see it, too.

Thu, May 26, 4:08 AM · Restricted Project, Restricted Project

Wed, May 25

rengolin added a comment to D92086: Generalized PatternMatch & InstSimplify.

First, I think this is a good idea and can eventually mitigate the general problem of intrinsics vs. instructions in other LLVM passes.

Wed, May 25, 1:36 AM · Restricted Project, Restricted Project

Thu, May 12

rengolin added a comment to D125404: [SPIRV] Add simple tests to improve test coverage.

And what about build failures? It seems, these are not related to my patch...

Thu, May 12, 6:30 AM · Restricted Project, Restricted Project
rengolin added a comment to D125404: [SPIRV] Add simple tests to improve test coverage.

Concerning "[[#]] instead of {{[0-9]+}}":
This style {{[0-9]+}} is widely used in SPIRV-LLVM-Translator's tests repository. So, it has to change nearly 150-200 converted tests in LLVM-SPIRV-Backend' tests repository. (?) Moreover, it will break link to original source SPIRV-LLVM-Translator's tests.
Is it required?

Thu, May 12, 5:34 AM · Restricted Project, Restricted Project

Sat, May 7

rengolin added inline comments to D124977: [NFC][Clang] Modify expect of fail test or XFAIL because CSKY align is different.
Sat, May 7, 6:20 AM · Restricted Project, Restricted Project

Fri, May 6

rengolin added inline comments to D124977: [NFC][Clang] Modify expect of fail test or XFAIL because CSKY align is different.
Fri, May 6, 4:42 AM · Restricted Project, Restricted Project

Apr 21 2022

rengolin added a comment to D123988: [LoongArch] Add basic floating-point instructions definition.

https://llvm.org/docs/CodeReview.html#lgtm-how-a-patch-is-accepted says "If it is likely that others will want to review a recently-posted patch, especially if there might be objections, but no one else has done so yet, it is also polite to provide a qualified approval (e.g., “LGTM, but please wait for a couple of days in case others wish to review”). If approval is received very quickly, a patch author may also elect to wait before committing (and this is certainly considered polite for non-trivial patches). Especially given the global nature of our community, this waiting time should be at least 24 hours. Please also be mindful of weekends and major holidays."

Apr 21 2022, 1:00 AM · Restricted Project, Restricted Project

Apr 20 2022

rengolin accepted D123988: [LoongArch] Add basic floating-point instructions definition.

LGTM, thanks!

Apr 20 2022, 10:24 AM · Restricted Project, Restricted Project

Apr 19 2022

rengolin added a comment to D123988: [LoongArch] Add basic floating-point instructions definition.

Looks reasonable to me. Some nits on file naming and definition placement. Thanks!

Apr 19 2022, 9:31 AM · Restricted Project, Restricted Project

Apr 14 2022

rengolin accepted D116464: [SPIRV 5/6] Add LegalizerInfo, InstructionSelector and utilities.

Thanks @iliya-diyachkov, it looks cleaner, even if still very long. A table generated output will hopefully fix this soon.

Apr 14 2022, 1:57 AM · Restricted Project, Restricted Project

Apr 13 2022

rengolin added inline comments to D116464: [SPIRV 5/6] Add LegalizerInfo, InstructionSelector and utilities.
Apr 13 2022, 7:30 AM · Restricted Project, Restricted Project

Apr 6 2022

rengolin committed rG060ff6633708: Add support for more archs in `Triple::getArchTypeForLLVMName` (authored by antoniofrighetto).
Add support for more archs in `Triple::getArchTypeForLLVMName`
Apr 6 2022, 2:44 AM · Restricted Project, Restricted Project
rengolin closed D122003: Add support for more archs in `Triple::getArchTypeForLLVMName`.
Apr 6 2022, 2:44 AM · Restricted Project, Restricted Project
rengolin added a comment to D116465: [SPIRV 6/6] Add the module analysis pass and the simplest tests.

Apologies, it seems I was looking into a very old version of the review!

Apr 6 2022, 2:07 AM · Restricted Project, Restricted Project
rengolin added a comment to D116465: [SPIRV 6/6] Add the module analysis pass and the simplest tests.

This one still has some unactioned comments...

Apr 6 2022, 1:35 AM · Restricted Project, Restricted Project
rengolin accepted D122003: Add support for more archs in `Triple::getArchTypeForLLVMName`.

Thanks!

Apr 6 2022, 1:27 AM · Restricted Project, Restricted Project

Apr 5 2022

rengolin added a comment to D116463: [SPIRV 4/6] Add target lowering, TargetMachine and AsmPrinter.

Seems most (all?) comments were addressed, @arsenm is there anything critical that needs done before the merge of the first batch?

Apr 5 2022, 3:42 PM · Restricted Project, Restricted Project
rengolin added a comment to D122003: Add support for more archs in `Triple::getArchTypeForLLVMName`.

Honestly, I don't see why this commit would be a problem without tests, given there aren't tests for the rest. It seems like an obvious omission to me.

Apr 5 2022, 6:55 AM · Restricted Project, Restricted Project

Mar 31 2022

rengolin accepted D121445: [Clang][CSKY] Add the CSKY target and compiler driver.

I have met this before because the downloading of patch will ignore empty files. You can have a check that your apply does not contain new empty files in multilib_csky_linux_sdk.

Mar 31 2022, 3:35 AM · Restricted Project, Restricted Project, Restricted Project

Mar 30 2022

rengolin added a comment to D121445: [Clang][CSKY] Add the CSKY target and compiler driver.

I just applied this to a recent HEAD and got a few warnings. Please make sure there are no new warnings on changes / new files.

Mar 30 2022, 6:07 AM · Restricted Project, Restricted Project, Restricted Project

Mar 22 2022

rengolin added a comment to D122003: Add support for more archs in `Triple::getArchTypeForLLVMName`.

My original point was that this change is so small and unrelated to anything at the moment that it would be better for whatever s390x or i386 change that needs it, to introduce it then, not beforehand.

Mar 22 2022, 5:10 AM · Restricted Project, Restricted Project
rengolin added a comment to D122003: Add support for more archs in `Triple::getArchTypeForLLVMName`.

This is already tested by its users (via lookupTarget) in all sorts of places, but not this change in particular, which is the problem.

Mar 22 2022, 3:27 AM · Restricted Project, Restricted Project

Mar 17 2022

rengolin added a comment to D121445: [Clang][CSKY] Add the CSKY target and compiler driver.

I'm surprised these tests are passing for you. Perhaps you're not building or running them all.

Mar 17 2022, 3:57 AM · Restricted Project, Restricted Project, Restricted Project
rengolin added inline comments to D121445: [Clang][CSKY] Add the CSKY target and compiler driver.
Mar 17 2022, 3:51 AM · Restricted Project, Restricted Project, Restricted Project

Mar 11 2022

rengolin added a comment to D121445: [Clang][CSKY] Add the CSKY target and compiler driver.

I don't know enough about your toolchain requirements, but this looks good to me.

Mar 11 2022, 1:37 AM · Restricted Project, Restricted Project, Restricted Project

Feb 28 2022

rengolin added a comment to D120545: [LoongArch] Add EncoderMethods for transformed immediate operands.

With the nit, this looks good to me too, thanks!

Feb 28 2022, 8:22 AM · Restricted Project, Restricted Project

Feb 19 2022

rengolin added a comment to D119804: [docs] HowToCrossCompileLLVM.rst: update cmake options.

I'm confused about which GCC comment should be updated. Would you please point out that file or that line?
I'll plan to create a new patch to fix that.

Feb 19 2022, 6:04 AM · Restricted Project
rengolin added a comment to D119804: [docs] HowToCrossCompileLLVM.rst: update cmake options.

I think you forgot to upload the new diff for the GCC comment. It's looking the same as before for me.

Feb 19 2022, 5:11 AM · Restricted Project
rengolin added a comment to D119804: [docs] HowToCrossCompileLLVM.rst: update cmake options.

I think you forgot to upload the new diff for the GCC comment. It's looking the same as before for me.

Feb 19 2022, 5:04 AM · Restricted Project
rengolin accepted D119804: [docs] HowToCrossCompileLLVM.rst: update cmake options.

Nice catch, thanks!

Feb 19 2022, 3:51 AM · Restricted Project

Feb 10 2022

rengolin added a comment to D115859: [LoongArch 2/6] Add ELF machine flag and relocs for upcoming LoongArch target.

Hi I think I know what to do and am trying to fix it myself. Thanks for trying!

Feb 10 2022, 11:41 AM · Restricted Project
rengolin added a comment to D115859: [LoongArch 2/6] Add ELF machine flag and relocs for upcoming LoongArch target.

If I'm making a wild guess, it doesn't look like LoongArch.def is mentioned as a textual header in module.modulemap.

Feb 10 2022, 11:39 AM · Restricted Project
rengolin added a comment to D115859: [LoongArch 2/6] Add ELF machine flag and relocs for upcoming LoongArch target.

(The LLDB bot builds with -DLLVM_ENABLE_MODULES=On)

Feb 10 2022, 11:36 AM · Restricted Project
rengolin added a comment to D115859: [LoongArch 2/6] Add ELF machine flag and relocs for upcoming LoongArch target.

So I committed 695b629edd03 removing that newline. It's a wild guess, it's not relevant and it shouldn't hurt, but if that's what it was (because macros are stupid), then let me know.

Feb 10 2022, 11:13 AM · Restricted Project
rengolin added a comment to D115859: [LoongArch 2/6] Add ELF machine flag and relocs for upcoming LoongArch target.

Hi it seems like this patch caused an error in the lldb build machines:

/Users/buildslave/jenkins/workspace/lldb-cmake/llvm-project/llvm/include/llvm/BinaryFormat/ELF.h:877:1: error: expected identifier
#include "ELFRelocs/LoongArch.def"
^

Feb 10 2022, 10:56 AM · Restricted Project
rengolin committed rG695b629edd03: Wild guess to fix LLDB bot (authored by rengolin).
Wild guess to fix LLDB bot
Feb 10 2022, 10:51 AM
rengolin added a comment to D115857: [LoongArch 1/6] Add triples loongarch{32,64} for the upcoming LoongArch target.

Than you @SixWeining, the 6 patches have been merged now.

Feb 10 2022, 2:33 AM · Restricted Project
rengolin committed rGaf3bc0d76265: [LoongArch][test] (6/6) Add encoding and mnemonics tests (authored by SixWeining).
[LoongArch][test] (6/6) Add encoding and mnemonics tests
Feb 10 2022, 2:24 AM
rengolin committed rG6caee4890971: [Utils][LoongArch](5/6) Add a --bits-endian option to extract-section.py (authored by SixWeining).
[Utils][LoongArch](5/6) Add a --bits-endian option to extract-section.py
Feb 10 2022, 2:24 AM
rengolin committed rG33388ae866cf: [LoongArch 4/6] Add basic tablegen infra for LoongArch (authored by SixWeining).
[LoongArch 4/6] Add basic tablegen infra for LoongArch
Feb 10 2022, 2:24 AM
rengolin committed rG444c6d261a91: [LoongArch 3/6] Add target stub for LoongArch (authored by SixWeining).
[LoongArch 3/6] Add target stub for LoongArch
Feb 10 2022, 2:24 AM
rengolin committed rGe53e6ec6ef74: [LoongArch 2/6] Add ELF machine flag and relocs for upcoming LoongArch target (authored by SixWeining).
[LoongArch 2/6] Add ELF machine flag and relocs for upcoming LoongArch target
Feb 10 2022, 2:24 AM
rengolin closed D115862: [LoongArch][test] (6/6) Add encoding and mnemonics tests.
Feb 10 2022, 2:24 AM · Restricted Project
rengolin closed D116100: [Utils][LoongArch](5/6) Add a --bits-endian option to extract-section.py.
Feb 10 2022, 2:24 AM · Restricted Project
rengolin committed rG42fd2bfc9065: [LoongArch 1/6] Add triples loongarch{32,64} for the upcoming LoongArch target (authored by SixWeining).
[LoongArch 1/6] Add triples loongarch{32,64} for the upcoming LoongArch target
Feb 10 2022, 2:24 AM
rengolin closed D115861: [LoongArch 4/6] Add basic tablegen infra for LoongArch.
Feb 10 2022, 2:24 AM · Restricted Project
rengolin closed D115860: [LoongArch 3/6] Add target stub for LoongArch.
Feb 10 2022, 2:24 AM · Restricted Project
rengolin closed D115859: [LoongArch 2/6] Add ELF machine flag and relocs for upcoming LoongArch target.
Feb 10 2022, 2:23 AM · Restricted Project
rengolin closed D115857: [LoongArch 1/6] Add triples loongarch{32,64} for the upcoming LoongArch target.
Feb 10 2022, 2:23 AM · Restricted Project

Feb 8 2022

rengolin added a comment to D115862: [LoongArch][test] (6/6) Add encoding and mnemonics tests.

@xen0n @myhsu are you happy with this patch?

Feb 8 2022, 3:33 AM · Restricted Project
rengolin accepted D115861: [LoongArch 4/6] Add basic tablegen infra for LoongArch.

AFAICS, all issues have been fixed and the last contentious was about changing naming on the GNU side, which is completely out of scope in this series.

Feb 8 2022, 3:30 AM · Restricted Project
rengolin accepted D116100: [Utils][LoongArch](5/6) Add a --bits-endian option to extract-section.py.

Sure, no problems. Let's just land all patches at once, in order, after they're all approved.

Feb 8 2022, 3:24 AM · Restricted Project
rengolin accepted D115860: [LoongArch 3/6] Add target stub for LoongArch.
Feb 8 2022, 3:23 AM · Restricted Project
rengolin accepted D115857: [LoongArch 1/6] Add triples loongarch{32,64} for the upcoming LoongArch target.

Sorry, this fell out of my radar. Looks good to me, thanks for the hard work!

Feb 8 2022, 3:22 AM · Restricted Project

Feb 4 2022

rengolin added a comment to D116465: [SPIRV 6/6] Add the module analysis pass and the simplest tests.

So if we don't have obvious solutions for the 1st and 2nd issues, I would add this suggestion to the TODO list (we'll take it in mind during further code revisions) and go forward with the existing GlobalTypesAndRegNumPass.

Feb 4 2022, 2:56 AM · Restricted Project, Restricted Project

Feb 3 2022

rengolin added a comment to D116465: [SPIRV 6/6] Add the module analysis pass and the simplest tests.

Not sure how we can control the VReg IDs emitted for the types - it seems it'd require customizing IRTranslator which is not allowed by the current GlobalISel design. Am I missing something?

Feb 3 2022, 9:01 AM · Restricted Project, Restricted Project
rengolin added a comment to D116465: [SPIRV 6/6] Add the module analysis pass and the simplest tests.

And as far as I understand your suggestion this de-duplicated variant will break the verifier (after generation):

func1
  %0 = OpTypeInt 32
  %1 = OpTypeInt 64
  ...
  %4 = OpIAdd %1 %2 %3
  ...
func2
  // (no definition of %1)
  ... 
  %4 = OpIMul %1 %2 %3
  ...
Feb 3 2022, 4:25 AM · Restricted Project, Restricted Project
rengolin added a comment to D116465: [SPIRV 6/6] Add the module analysis pass and the simplest tests.

Which stage are you talking about here: InstPrinter, any post-InstructionSelection pass, etc? On gMIR level I don't understand how that'd work if we define VReg %1 in func f1 and then use it in both f1 and f2.

Feb 3 2022, 2:17 AM · Restricted Project, Restricted Project

Feb 2 2022

rengolin added a comment to D116465: [SPIRV 6/6] Add the module analysis pass and the simplest tests.

I didn't mean the duplicated types/constants would survive into codegen, but I get your meaning, it would have to be commoned up at some point.

Feb 2 2022, 2:23 PM · Restricted Project, Restricted Project
rengolin added a comment to D116465: [SPIRV 6/6] Add the module analysis pass and the simplest tests.

Then let me describe the problem in more details, I'd like us all to be on the same page with this.

Feb 2 2022, 10:10 AM · Restricted Project, Restricted Project
rengolin added a comment to D116465: [SPIRV 6/6] Add the module analysis pass and the simplest tests.

@rengolin what would be considered as a proper implementation?

Feb 2 2022, 9:18 AM · Restricted Project, Restricted Project
rengolin added a comment to D116465: [SPIRV 6/6] Add the module analysis pass and the simplest tests.

I'm still not convinced that these passes are the right way to go, but I won't block if others think it has merit, even if just temporary, until the proper implementation emerges.

Feb 2 2022, 3:52 AM · Restricted Project, Restricted Project
rengolin added a comment to D116464: [SPIRV 5/6] Add LegalizerInfo, InstructionSelector and utilities.

Too many comments for me to follow and check, I'll let @MaskRay and @arsenm approve this one.

Feb 2 2022, 3:48 AM · Restricted Project, Restricted Project
rengolin added a comment to D116463: [SPIRV 4/6] Add target lowering, TargetMachine and AsmPrinter.

@MaskRay last round?

Feb 2 2022, 3:47 AM · Restricted Project, Restricted Project
rengolin added a comment to D116462: [SPIRV 3/6] Add MC layer, object file support and InstPrinter.

@MaskRay last round?

Feb 2 2022, 3:47 AM · Restricted Project, Restricted Project
rengolin updated subscribers of D115786: [SPIR-V 2/6] Add SPIRV{InstrFormats,InstrInfo,RegisterInfo,RegisterBanks...}.td.

@MaskRay last round?

Feb 2 2022, 3:47 AM · Restricted Project, Restricted Project
rengolin added a comment to D115009: [SPIRV 1/6] Add stub for SPIRV backend.

@MaskRay last round?

Feb 2 2022, 3:46 AM · Restricted Project, Restricted Project
rengolin added a comment to D116463: [SPIRV 4/6] Add target lowering, TargetMachine and AsmPrinter.

Phab comments are out of place in Subtarget, so I'll let @arsenm approve this one if his comments were addressed.

Feb 2 2022, 3:46 AM · Restricted Project, Restricted Project
rengolin accepted D116462: [SPIRV 3/6] Add MC layer, object file support and InstPrinter.

All comments were addressed and this looks good to go. Thanks!

Feb 2 2022, 3:41 AM · Restricted Project, Restricted Project
rengolin accepted D115786: [SPIR-V 2/6] Add SPIRV{InstrFormats,InstrInfo,RegisterInfo,RegisterBanks...}.td.

All comments seem to have been addressed and the patch itself is very mechanical in nature, so LGTM.

Feb 2 2022, 3:38 AM · Restricted Project, Restricted Project
rengolin accepted D115009: [SPIRV 1/6] Add stub for SPIRV backend.

This looks good to me as the first patch.

Feb 2 2022, 3:37 AM · Restricted Project, Restricted Project
rengolin added a comment to D115009: [SPIRV 1/6] Add stub for SPIRV backend.

In addition to the regular builds, I also checked the special ones that Fengrui Song listed earlier (all with and without -DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD=SPIRV). I fixed a few issues in the 3th-6th patches, so now all additional builds (as well as the regular ones) are build-able, and built llcs successfully pass LIT testing (including added SPIRV's LIT tests).

Feb 2 2022, 3:33 AM · Restricted Project, Restricted Project

Jan 26 2022

rengolin added inline comments to D115861: [LoongArch 4/6] Add basic tablegen infra for LoongArch.
Jan 26 2022, 9:27 AM · Restricted Project
rengolin added inline comments to D115861: [LoongArch 4/6] Add basic tablegen infra for LoongArch.
Jan 26 2022, 2:16 AM · Restricted Project

Jan 21 2022

rengolin added reviewers for D117793: Fix for spurious UBSan reports when no file descriptors are available.: eugenis, vitalybuka, samsonov.

That's correct, but without a different way to determine accessibility, we should not report likely false positives. The goal for UBSan is not to report too many false positives, and in the given circumstances, many reports would be false positives.

Jan 21 2022, 3:03 AM · Restricted Project, Restricted Project

Jan 20 2022

rengolin added inline comments to D117793: Fix for spurious UBSan reports when no file descriptors are available..
Jan 20 2022, 10:25 AM · Restricted Project, Restricted Project
rengolin updated subscribers of D117793: Fix for spurious UBSan reports when no file descriptors are available..
Jan 20 2022, 10:20 AM · Restricted Project, Restricted Project

Jan 12 2022

rengolin added a comment to D116879: [llvm] Allow auto-vectorization of sincos() using libmvec.

I have beefed up my testcase to demonstrate why I had to choose the _ZGVdN4vvv_sincos() variant for correctness, even though _ZGVdN4vl8l8_sincos() would be desirable from a performance perspective:
We have no control over what pointers the user is passing in in different loop iterations.

Jan 12 2022, 2:29 AM · Restricted Project, Restricted Project
rengolin added inline comments to D115786: [SPIR-V 2/6] Add SPIRV{InstrFormats,InstrInfo,RegisterInfo,RegisterBanks...}.td.
Jan 12 2022, 1:17 AM · Restricted Project, Restricted Project

Jan 10 2022

rengolin added inline comments to D116879: [llvm] Allow auto-vectorization of sincos() using libmvec.
Jan 10 2022, 1:02 AM · Restricted Project, Restricted Project

Jan 9 2022

rengolin added a comment to D116879: [llvm] Allow auto-vectorization of sincos() using libmvec.

I haven't figured out how to link to https://bugs.llvm.org/show_bug.cgi?id=51530 so that it would automatically get closed on merging. I suppose this isn't possible anymore with bugzilla being frozen?

Jan 9 2022, 3:01 AM · Restricted Project, Restricted Project

Jan 7 2022

rengolin added inline comments to D115861: [LoongArch 4/6] Add basic tablegen infra for LoongArch.
Jan 7 2022, 2:46 AM · Restricted Project
rengolin added a comment to D115857: [LoongArch 1/6] Add triples loongarch{32,64} for the upcoming LoongArch target.

Those triples used in this patch are only for triple-parsing test and I think it doesn't affect triple definitions by gcc.

Jan 7 2022, 1:25 AM · Restricted Project

Jan 6 2022

rengolin accepted D115859: [LoongArch 2/6] Add ELF machine flag and relocs for upcoming LoongArch target.
Jan 6 2022, 1:30 AM · Restricted Project

Jan 2 2022

rengolin added inline comments to D116464: [SPIRV 5/6] Add LegalizerInfo, InstructionSelector and utilities.
Jan 2 2022, 7:20 AM · Restricted Project, Restricted Project
rengolin added a comment to D116463: [SPIRV 4/6] Add target lowering, TargetMachine and AsmPrinter.

Yes, some missing features will be added later. What about frame lowering, the SPIRV target is very special: it uses only virtual registers. It does not operate with stack frame explicitly and does not generate a function prologue/epilogue. So it does not actually utilize frame lowering and we do not plan to add more functionality there.

Jan 2 2022, 7:10 AM · Restricted Project, Restricted Project

Jan 1 2022

rengolin added a comment to D116465: [SPIRV 6/6] Add the module analysis pass and the simplest tests.

You don't seem to have tests checking if the encoding of the instructions are correct when printing or parsing, leaving the Printer/Parser completely untested.

Jan 1 2022, 2:06 PM · Restricted Project, Restricted Project
rengolin added a comment to D116464: [SPIRV 5/6] Add LegalizerInfo, InstructionSelector and utilities.

This is a much larger patch and I don't know the target well enough. I have a few general comments inline but would be nice if someone that knows the target better to have a look?

Jan 1 2022, 1:54 PM · Restricted Project, Restricted Project
rengolin added a comment to D116463: [SPIRV 4/6] Add target lowering, TargetMachine and AsmPrinter.

I'm guessing that the missing bits (ex. frame lowering) will be implemented in following patches.

Jan 1 2022, 1:23 PM · Restricted Project, Restricted Project
rengolin added a comment to D116462: [SPIRV 3/6] Add MC layer, object file support and InstPrinter.

Same as the others, looks like a standard MC patch. I do have some inline comments, though.

Jan 1 2022, 1:16 PM · Restricted Project, Restricted Project
rengolin added a comment to D115786: [SPIR-V 2/6] Add SPIRV{InstrFormats,InstrInfo,RegisterInfo,RegisterBanks...}.td.

Nit: The name of this patch is still "[2/n]"

Jan 1 2022, 1:08 PM · Restricted Project, Restricted Project
rengolin added a comment to D115786: [SPIR-V 2/6] Add SPIRV{InstrFormats,InstrInfo,RegisterInfo,RegisterBanks...}.td.

Can't see anything wrong with it but I don't know the SPIRV ISA, so...

Jan 1 2022, 1:07 PM · Restricted Project, Restricted Project
rengolin added a comment to D115009: [SPIRV 1/6] Add stub for SPIRV backend.

Hi, this looks good as the first patch. Will keep looking for the others.

Jan 1 2022, 12:58 PM · Restricted Project, Restricted Project

Dec 28 2021

rengolin committed rGc5e8eb9783a6: Documentation for the process of adding new targets (authored by rengolin).
Documentation for the process of adding new targets
Dec 28 2021, 1:05 PM
rengolin closed D116331: Documentation for the process of adding new targets.

Thanks!

Dec 28 2021, 1:01 PM · Restricted Project
rengolin added a comment to D116331: Documentation for the process of adding new targets.

LGTM; thanks for adding this. Reading through https://llvm.org/docs/DeveloperPolicy.html#adding-a-new-target, consider adding these numbered points under the bulleted list of points under The basic rules for a back-end to be upstreamed in experimental mode are:.

Dec 28 2021, 12:59 PM · Restricted Project
rengolin updated subscribers of D116331: Documentation for the process of adding new targets.
Dec 28 2021, 4:39 AM · Restricted Project
rengolin requested review of D116331: Documentation for the process of adding new targets.
Dec 28 2021, 4:34 AM · Restricted Project

Dec 22 2021

rengolin added a comment to D115861: [LoongArch 4/6] Add basic tablegen infra for LoongArch.

I can't see anything wrong with this patch. It seems to have all the bits to start a target in the right places.

Dec 22 2021, 5:26 AM · Restricted Project