rengolin (Renato Golin)
Toolchain Engineer

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User Details

User Since
Oct 19 2012, 12:57 AM (235 w, 4 d)

Recent Activity

Today

rengolin added a comment to D32460: ADT: handle special case of ARM environment for SuSE.

This could have side-effects, too, especially when going through textual IR, no?

Tue, Apr 25, 1:44 AM

Yesterday

rengolin added inline comments to D30086: Add generic IR vector reductions.
Mon, Apr 24, 8:59 AM
rengolin added inline comments to D30086: Add generic IR vector reductions.
Mon, Apr 24, 8:52 AM
rengolin added inline comments to D30086: Add generic IR vector reductions.
Mon, Apr 24, 8:25 AM
rengolin committed rL301176: [DWARF] Move test to x86 directory.
[DWARF] Move test to x86 directory
Mon, Apr 24, 5:50 AM
rengolin added reviewers for D32427: Fix float abi for SUSE ARM triples: compnerd, rovka, joerg.

I'm not sure this will work at all. Not because it doesn't make sense (it does), but because of several bugs in the soft vs. hard float implementation in the Triple related classes all the way to the back-end.

Mon, Apr 24, 5:47 AM
rengolin accepted D32426: Add SUSE vendor.

LGTM. Thanks!

Mon, Apr 24, 4:27 AM
rengolin added a comment to D32426: Add SUSE vendor.

We have some unit tests for Triple. Can you add some, pls?

Mon, Apr 24, 4:18 AM

Sun, Apr 23

rengolin committed rL301111: Revert "[APInt] Fix a few places that use APInt::getRawData to operate within….
Revert "[APInt] Fix a few places that use APInt::getRawData to operate within…
Sun, Apr 23, 5:28 AM
rengolin added a reverting commit for rL4: LLVM initial checkin: rL301111: Revert "[APInt] Fix a few places that use APInt::getRawData to operate within….
Sun, Apr 23, 5:28 AM
rengolin added a reverting commit for rL1: New repository initialized by cvs2svn.: rL301111: Revert "[APInt] Fix a few places that use APInt::getRawData to operate within….
Sun, Apr 23, 5:28 AM
rengolin added a reverting commit for rL3: This commit was manufactured by cvs2svn to create branch 'llvm'.: rL301111: Revert "[APInt] Fix a few places that use APInt::getRawData to operate within….
Sun, Apr 23, 5:28 AM
rengolin committed rL301110: Revert "[APInt] Add ashrInPlace method and implement ashr using it. Also fix a….
Revert "[APInt] Add ashrInPlace method and implement ashr using it. Also fix a…
Sun, Apr 23, 5:15 AM

Fri, Apr 21

rengolin accepted D32347: Add support for openSUSE ARM Triples.

Ok, I see no harm in letting you work upstream, since no one should be relying on the correct behaviour on opensuse for now. LGTM. Thanks!

Fri, Apr 21, 5:32 AM
rengolin added reviewers for D32347: Add support for openSUSE ARM Triples: rovka, compnerd.

Yes openSUSE prefers the "hl" prefix to mean HardFloat.

Fri, Apr 21, 5:15 AM
rengolin added a comment to D32347: Add support for openSUSE ARM Triples.

Nothing new here, pretty much standard. No "gnueabihf"?

Fri, Apr 21, 5:09 AM
rengolin added a comment to D31081: [ARM] ScheduleDAGRRList::DelayForLiveRegsBottomUp must consider OptionalDefs.

I agree with James, refactoring OptionalDef is a task too big for this patch.

Fri, Apr 21, 3:40 AM

Thu, Apr 20

rengolin added a comment to D32282: [ARM] ACLE Chapter 9 support.

Perfect, thank you! LGTM.

Thu, Apr 20, 5:25 AM
rengolin added inline comments to D32282: [ARM] ACLE Chapter 9 support.
Thu, Apr 20, 4:42 AM
rengolin accepted D32018: [MVT][SVE] Scalable vector MVTs (2/3).

All three patches look good to me, now. Thanks Graham for the extended work on them, I think we have a solid foundation in which to start the SVE upstreaming.

Thu, Apr 20, 3:16 AM
rengolin accepted D32017: [MVT][SVE] Scalable vector MVTs (1/3).
Thu, Apr 20, 3:15 AM
rengolin accepted D32019: [MVT][SVE] Scalable vector MVTs (3/3).

Nice! Thanks Graham! This looks good to me, now.

Thu, Apr 20, 3:14 AM
rengolin added inline comments to D32282: [ARM] ACLE Chapter 9 support.
Thu, Apr 20, 3:12 AM
rengolin added a comment to D32281: [ARM] ACLE Chapter 9 intrinsics.

Hi Sam,

Thu, Apr 20, 2:54 AM
rengolin accepted D32282: [ARM] ACLE Chapter 9 support.

Hi Sam,

Thu, Apr 20, 2:46 AM

Wed, Apr 19

rengolin accepted D32225: [ARM] Fix handling of mapping symbols when changing sections.

Good catch, thanks! LGTM.

Wed, Apr 19, 10:05 AM
rengolin accepted D31949: [AArch64] Fix handling of zero immediate in fmov instructions.

LGTM. Thanks!

Wed, Apr 19, 10:03 AM
rengolin accepted D31948: [AArch64] Fix handling of integer fp immediates.

Sorry, LGTM. Thanks!

Wed, Apr 19, 10:03 AM
rengolin added a comment to D32019: [MVT][SVE] Scalable vector MVTs (3/3).

Right, the code looks good now, but I'm worried about tests... We don't seem to have unit tests on this area and I'm not sure how we'd create one (not terribly familiar here).

Wed, Apr 19, 5:54 AM
rengolin added a comment to D32017: [MVT][SVE] Scalable vector MVTs (1/3).

Right, this one is ok, but the other two patches also don't have tests either, and they're certainly not NFC.

Wed, Apr 19, 5:50 AM
rengolin added a comment to D32017: [MVT][SVE] Scalable vector MVTs (1/3).

Looks good to me to, but, what about tests?

Wed, Apr 19, 5:22 AM
rengolin committed rL300668: Revert "ARMFrameLowering: Reserve emergency spill slot for large arguments".
Revert "ARMFrameLowering: Reserve emergency spill slot for large arguments"
Wed, Apr 19, 2:15 AM

Tue, Apr 18

rengolin added reviewers for D32175: Add the llvm asan support: zatrazz, peter.smith.
Tue, Apr 18, 9:39 AM
rengolin added reviewers for D32172: Port asan to FreeBSD AArch64: zatrazz, peter.smith.
Tue, Apr 18, 9:39 AM
rengolin accepted D31879: [ARM] Add diag string for movw/movt immediates in assembly.

LGTM. Thanks!

Tue, Apr 18, 6:56 AM
rengolin accepted D31813: [ARM] Add hardware build attributes in assembler.

Makes sense. LGTM. Thanks!

Tue, Apr 18, 6:23 AM
rengolin accepted D32163: [ARM,AArch64] Define __ELF__ for arm-none-eabihf and AArch64.
Tue, Apr 18, 6:22 AM
rengolin added inline comments to D32019: [MVT][SVE] Scalable vector MVTs (3/3).
Tue, Apr 18, 6:21 AM
rengolin added a comment to D31813: [ARM] Add hardware build attributes in assembler.

Why do you need this to be passed through Clang? I thought this was just a debug/test tool to use llvm-mc, not an argument to actual code compilation.

Tue, Apr 18, 4:30 AM
rengolin accepted D31530: [ARM] Use new assembler diags for ARM.

I guess this will be a long road anyway, so we should cope with some vague messages now, and add better ones with time.

Tue, Apr 18, 4:28 AM
rengolin accepted D31812: [ARM] Add hardware build attributes in assembler.

Makes sense. LGTM. Thanks!

Tue, Apr 18, 4:25 AM
rengolin added inline comments to D31812: [ARM] Add hardware build attributes in assembler.
Tue, Apr 18, 3:08 AM
rengolin accepted D32132: [AArch64][clang] Pass cpu/arch information to assembler for AArch64..

Silly omission. LGTM. Thanks!

Tue, Apr 18, 2:53 AM
rengolin updated subscribers of D31947: [scudo] Android support groundwork.

To be more specific, thread_local is supported via emutls (llvm/projects/compiler-rt/lib/builtins/emutls.c), which itself calls malloc to allocate the TLS.
Which unfortunately doesn't work well for an allocator that replaces malloc.

Tue, Apr 18, 2:51 AM

Sat, Apr 15

rengolin accepted D32103: [ARM] Use TableGen patterns to select vtbl. NFC..

Nice cleanup! LGTM, thanks!

Sat, Apr 15, 6:27 AM

Thu, Apr 13

rengolin added a comment to D32018: [MVT][SVE] Scalable vector MVTs (2/3).

Right, then it looks ok.

Thu, Apr 13, 10:50 AM
rengolin added inline comments to D32019: [MVT][SVE] Scalable vector MVTs (3/3).
Thu, Apr 13, 10:49 AM
rengolin added inline comments to D32017: [MVT][SVE] Scalable vector MVTs (1/3).
Thu, Apr 13, 10:40 AM
rengolin added inline comments to D32018: [MVT][SVE] Scalable vector MVTs (2/3).
Thu, Apr 13, 10:39 AM
rengolin accepted D32007: [lsan] Reenable lsan tests on ARM bots.

Thanks for looking into this. LGTM!

Thu, Apr 13, 4:44 AM · Restricted Project

Wed, Apr 12

rengolin added a comment to D29631: SystemZTargetTransformInfo cost functions and some common code changes.

Ok, I created the lit.config file like the others in r300078

Wed, Apr 12, 11:16 AM
rengolin committed rL300081: [SystemZ] Fix more target specific tests.
[SystemZ] Fix more target specific tests
Wed, Apr 12, 11:15 AM
rengolin added a comment to D29631: SystemZTargetTransformInfo cost functions and some common code changes.

Ah! Makes sense. Then maybe just adding the lit.config file to SystemZ directory would do?

If you can force a specific triple to be used, then yes. If you can only require a specific target to be present, then it may happen to avoid the failures, but there is no guarantee that it will always work.

Wed, Apr 12, 10:28 AM
rengolin committed rL300078: [SystemZ] Fix target specific tests.
[SystemZ] Fix target specific tests
Wed, Apr 12, 10:27 AM
rengolin added a comment to D29631: SystemZTargetTransformInfo cost functions and some common code changes.

All these tests fail on Hexagon as well. From what I found out, it seems that "opt -analyze" ignores the mtriple option---you could set it to xyz and the test would still run and produce some output. The Hexagon bot only builds the Hexagon backend, and sets the default triple to hexagon-unknown-elf. I'm guessing that this causes Hexagon's costs to be printed regardless of the mtriple setting, which could lead to these failures.

Wed, Apr 12, 9:57 AM
rengolin added a comment to D29631: SystemZTargetTransformInfo cost functions and some common code changes.

Sorry - one test update unfortunately didn't go in at the first attempt, but it's fixed now.

Wed, Apr 12, 9:13 AM
rengolin added a comment to D31965: [SLP] Enable 64-bit wide vectorization for Cyclone.

I am wondering if we should have subtarget "owners" and then we could just file bugs (tasks) to enable such features on the "other" subtargets. As I said I had a good results with SW data prefetching but for example the ARM microarchs didn't add support for this.

Wed, Apr 12, 8:49 AM
rengolin added a reviewer for D31965: [SLP] Enable 64-bit wide vectorization for Cyclone: evandro.

Rolling it out for Cyclone-only is just a way to get this going in a controllable manner. Other subtargets can roll it this out as people find the time to benchmark and tune this.

Wed, Apr 12, 7:45 AM
rengolin added a comment to D29631: SystemZTargetTransformInfo cost functions and some common code changes.

Hum, seems some of the costs are wrong in your tests:

Wed, Apr 12, 5:57 AM
rengolin committed rL300044: [LSAN] Disable on ARM/Thumb for good.
[LSAN] Disable on ARM/Thumb for good
Wed, Apr 12, 3:25 AM
rengolin committed rL300042: Revert "[lsan] Fix typo in test/lsan/lit.common.cfg".
Revert "[lsan] Fix typo in test/lsan/lit.common.cfg"
Wed, Apr 12, 2:57 AM
rengolin added a reviewer for D31965: [SLP] Enable 64-bit wide vectorization for Cyclone: kristof.beyls.

Hi Adam,

Wed, Apr 12, 2:42 AM
rengolin accepted D29631: SystemZTargetTransformInfo cost functions and some common code changes.

Hi Jonas,

Wed, Apr 12, 2:32 AM

Tue, Apr 11

rengolin added a comment to D27105: [Constants] Add "stepvector" to represent the sequence 0,1,2,3... [IR support for SVE scalable vectors 4/4].

After reading the SVE docs, I realised that what I requested here (start + step) is exactly what SVE has for the INDEX instruction. I don't think that having a constant step in this way makes sense, even for SVE.

Tue, Apr 11, 11:29 AM
rengolin added a comment to D27101: [Type] Extend VectorType to support scalable vectors. [IR support for SVE scalable vectors 1/4].

Hi Paul,

Tue, Apr 11, 11:04 AM
rengolin added inline comments to D31949: [AArch64] Fix handling of zero immediate in fmov instructions.
Tue, Apr 11, 10:49 AM
rengolin added inline comments to D31948: [AArch64] Fix handling of integer fp immediates.
Tue, Apr 11, 10:41 AM
rengolin added a reviewer for D31801: Performance enhancements for Cavium ThunderX2 T99: kristof.beyls.

Wow, great additions, thanks!

Tue, Apr 11, 3:31 AM

Wed, Apr 5

rengolin committed rL299563: [Zorg|ARM] Remove old builders from the list.
[Zorg|ARM] Remove old builders from the list
Wed, Apr 5, 10:12 AM
rengolin committed rL299558: [ARM] Try to re-enable MachineBranchProb.ll for ARM/AArch64.
[ARM] Try to re-enable MachineBranchProb.ll for ARM/AArch64
Wed, Apr 5, 9:39 AM
rengolin accepted D31389: [ARM] Remove a dead ADD during the creation of TBBs.

Much clearer. Thanks! LGTM.

Wed, Apr 5, 7:49 AM
rengolin added inline comments to D28570: Limit sincos to Linux.
Wed, Apr 5, 5:30 AM

Tue, Apr 4

rengolin requested changes to D31625: [SDAG] Fix CombineTo ordering in visitZERO_EXTEND and visitSIGN_EXTEND.

The fact that this review keeps going between all-checks and no-checks is enough to make me distrust the change.

Tue, Apr 4, 2:49 PM
rengolin added inline comments to D31674: [AsmParser]Emit an error if a macro has two (or more) parameters sharing the same name.
Tue, Apr 4, 2:43 PM
rengolin added reviewers for D31674: [AsmParser]Emit an error if a macro has two (or more) parameters sharing the same name: joerg, compnerd.
Tue, Apr 4, 2:42 PM
rengolin added inline comments to D31607: [ARM] Use table-gen'd assembly operand diags in ARM asm parser.
Tue, Apr 4, 10:53 AM
rengolin added inline comments to D31607: [ARM] Use table-gen'd assembly operand diags in ARM asm parser.
Tue, Apr 4, 9:16 AM
rengolin accepted D31606: [AsmParser] Add DiagnosticString to AsmOperands in tablegen.

Used by D31607, tested there. LGTM. Thanks!

Tue, Apr 4, 9:15 AM
rengolin added a comment to D31625: [SDAG] Fix CombineTo ordering in visitZERO_EXTEND and visitSIGN_EXTEND.

This is specifically what Chandler requested on a similar previous patch (see https://reviews.llvm.org/D31286).

Tue, Apr 4, 8:09 AM
rengolin accepted D31607: [ARM] Use table-gen'd assembly operand diags in ARM asm parser.

Oh, this is *much* better, thanks!

Tue, Apr 4, 8:03 AM

Mon, Apr 3

rengolin added a comment to D31530: [ARM] Use new assembler diags for ARM.

Hi Oliver,

Mon, Apr 3, 10:23 AM
rengolin added inline comments to D31333: ARMAsmParser: clean up of isImmediate functions.
Mon, Apr 3, 5:58 AM
rengolin added a comment to D31417: [OpenMP] Add support for omp simd pragmas without runtime.

Hi Graham,

Mon, Apr 3, 4:53 AM
rengolin added inline comments to D31389: [ARM] Remove a dead ADD during the creation of TBBs.
Mon, Apr 3, 4:12 AM
rengolin added a comment to D31333: ARMAsmParser: clean up of isImmediate functions.

Hi Sjord,

Mon, Apr 3, 4:02 AM

Sat, Apr 1

rengolin accepted D31570: Revert "Remove autoconf support".

Down with the new, huzza to the old!

Sat, Apr 1, 10:40 AM
rengolin committed rL299302: [Zorg] Moving LLD ARM bot back to Clang builder.
[Zorg] Moving LLD ARM bot back to Clang builder
Sat, Apr 1, 5:19 AM

Fri, Mar 31

rengolin added a comment to D31530: [ARM] Use new assembler diags for ARM.

Most of my motivating examples come from hand-written Thumb code, where there are a lot of different immediate ranges, and the assembler often just gives a "requires arm-mode" error, which is useless on a Cortex-M target that doesn't have ARM mode.

Fri, Mar 31, 6:46 AM
rengolin added a comment to D31530: [ARM] Use new assembler diags for ARM.

Do you think it's ok to develop this as ARM-specific code first then refactor it once we have stabilised it, or would it be better to start with the target-independent core?

Fri, Mar 31, 6:26 AM
rengolin added a comment to D31530: [ARM] Use new assembler diags for ARM.

Hi Oliver,

Fri, Mar 31, 4:20 AM

Wed, Mar 29

rengolin accepted D31236: Refactor getHostCPUName to allow testing on non-native hardware..

LGTM. Thanks!

Wed, Mar 29, 10:10 AM
rengolin added a comment to D31417: [OpenMP] Add support for omp simd pragmas without runtime.

The other alternative I thought of was to perform the filtering in ParseOpenMP.cpp instead, but I need to figure out how to delete or skip tokens there without cluttering up the rest of the OpenMP parsing.

Wed, Mar 29, 9:10 AM
rengolin added a comment to D31417: [OpenMP] Add support for omp simd pragmas without runtime.

Hi Graham,

Wed, Mar 29, 8:12 AM

Mon, Mar 27

rengolin committed rL298887: [ARM] Mark falky test unsupported until we find the cause.
[ARM] Mark falky test unsupported until we find the cause
Mon, Mar 27, 3:51 PM

Mar 22 2017

rengolin added a comment to D31197: [ARM] Add a driver option for +no-neg-immediates.

Right, I can see the use case, but I'm still not convinced it's worth the flag. I'm also not against it, so I'll let for someone else to approve.

Mar 22 2017, 9:49 AM
rengolin accepted D31242: [ARM] t2_so_imm_neg had a subtle bug in the conversion, and could trigger UB by negating (int)-2147483648. By pure luck, none of the pre-existing tests triggered this; so I'm adding one..

Right. LGTM. Thanks!

Mar 22 2017, 8:20 AM
rengolin added inline comments to D31242: [ARM] t2_so_imm_neg had a subtle bug in the conversion, and could trigger UB by negating (int)-2147483648. By pure luck, none of the pre-existing tests triggered this; so I'm adding one..
Mar 22 2017, 8:11 AM
rengolin added inline comments to D31236: Refactor getHostCPUName to allow testing on non-native hardware..
Mar 22 2017, 5:32 AM
rengolin added a comment to D31197: [ARM] Add a driver option for +no-neg-immediates.

Hi Sanne,

Mar 22 2017, 5:08 AM
rengolin added inline comments to D31236: Refactor getHostCPUName to allow testing on non-native hardware..
Mar 22 2017, 3:27 AM