- User Since
- Oct 19 2012, 12:57 AM (316 w, 5 d)
Perfect, LGTM. Thanks!
So, IIUC, the way you only get the interleave info on instructions and map to VPlan is because we don't yet have scalar evolution in VPlan, so we need to do that in Instruction and then map to VPInstruction.
Mon, Nov 12
Just had a look again and it's looking great, thanks Florian!
Sat, Nov 10
I had no idea Hurd was still alive, but hey!
Thu, Nov 8
Sat, Nov 3
This looks ok to me, but I'd rather more people look at it before approving.
Wed, Oct 31
Tue, Oct 30
Right, I don't see anything wrong with it, but I'm adding other back-end maintainers and Jakob, TableGen's maintainer, so we're sure this is as harmless as I seem to think it is. :)
Sat, Oct 27
Reverted in r345465. Will take a look and land again when fixed. Thanks!
Fri, Oct 26
This is looking good to me, thanks!
Tue, Oct 23
I also have a list somewhere, that I will add once I find it.
Sat, Oct 20
Tue, Oct 16
Mon, Oct 15
(very gentle ping) :)
Oct 12 2018
Oct 11 2018
Oh, you've done that. The diff isn't clear.
The failure in Arm had nothing to do with not being ELF, but the asm syntax was different.
I'm wondering... should we choose between dot and png? Or should we always print the dot file and, upon --png flag, also the png file?
Thanks Florian, your regex version is still easy to use and much cleaner.
Oct 10 2018
Seems trivial. instructionsWithoutDebug is just an iterator filter and there are no early continues in the body of the outer loop, so this actually saves time.
Good catch! LGTM, thanks!
Oct 9 2018
Could also be an architectural flag, giving this is a particular behaviour from Exynos. Then a simple splitsJumpTables() or whatever check would be enough.
Changes to comment:
- Improved comments on isConditionalRdxPattern
- Removed instcombine pass from test
- Added write negative test
- Fix typo in CHECK line
Oct 8 2018
Oct 4 2018
Are there no other ways to identify an outliner function, say a function flag or a needed pattern, so we can change the verifier instead, and not fail when called-saved regs are used?
Oct 2 2018
Oct 1 2018
Adding more people that work around triples...
This is a slight duplication of what we already have in ARMSubtarget.h, and given that this is *only* relevant for AArch32, I see no point in this being in the Triple.
Sep 27 2018
The other two reviews were approved. This one can now be closed. Thanks!
Thanks Peter. LGTM!
Thanks Peter! LGTM.
Sep 14 2018
Corrections are always welcome. Please submit an update to this thread (or a new patch) to fix the changes you propose.
If j-s doesn't exists (remember, most of that list came from the ancient days of llvm, so could very easily be completely wrong, but "works"), I all for removing it and making a new (correct) CPU name as the default for armv6k.
Sep 13 2018
Sep 11 2018
Thanks Florian! LGTM too.
Aug 30 2018
Very detailed, using the modern infrastructure and helpful even to those not using clang or wanting to run external benchmarks.
Jul 19 2018
Hi Evandro, looks great, short and simple!
Moved getMemInstAlignment and getMemInstAddressSpace to IR/Instructions.h which already contains similar helpers. Should I rename them to getLoadStoreAlignment and getLoadStoreAddressSpace to be more in line with the existing getLoadStorePointerOperand?
I'll let Florian/Hideki reply about timeframes and strategies, and will just focus on specific items you list.
Jul 18 2018
I like the idea of the interleave analysis to be at a higher ground, but we have to be careful with LV-specific logic and only hoist what it truly generic.
Jun 21 2018
Thanks! I'm happy with Eli is happy. :)
Jun 20 2018
Jun 19 2018
Jun 8 2018
Adding some reviewers + folks on the original review:
Jun 1 2018
May 31 2018
I'm guessing this is a fix for: http://lab.llvm.org:8011/builders/clang-cmake-thumbv8-full-sh/builds/185
May 23 2018
SPEC06 results look too noisy to conclude anything, especially bzip, xalan and povray. Can you find a more stable machine?
May 18 2018
May 15 2018
May 10 2018
We can't add SPEC, as it's commercial. I'm not sure about others, but please make sure they are open source.
May 4 2018
LGTM with the line removed. :)
Nice catch! Sorry for the delay, LGTM.
May 1 2018
Apr 30 2018
This does look like a heavy hammer for a small fix. From the optimisation guides, CSEL and MOV have the same latency/bandwidth and the condition is probably pipelined in anyway.
This seems like an improvement, but we have to be careful with wide variations and little gain. The geomean is almost null but the standard deviation is higher than 75% of the results.