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rengolin (Renato Golin)
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User Since
Oct 19 2012, 12:57 AM (361 w, 3 d)

Recent Activity

Fri, Sep 20

rengolin accepted D67835: [docs] Remove trailing whitespaces. NFC.
Fri, Sep 20, 7:49 AM · Restricted Project

Mon, Sep 16

rengolin added a comment to D67601: TLI: Remove DAG argument from getRegisterByName.

I think this function probably ought to be renamed. It's really not clear from its name that it's intended for such a narrow purpose -- _only_ for implementing the read_register/write_register intrinsics.

Mon, Sep 16, 7:46 AM
rengolin added a comment to D67602: GlobalISel: Handle llvm.read_register.

Added some context comments in D67601.

Mon, Sep 16, 7:37 AM
rengolin added a comment to D67601: TLI: Remove DAG argument from getRegisterByName.

For context, read_register was introduced to allow use of the "global named register" GNU extension.

Mon, Sep 16, 7:28 AM

Wed, Sep 4

rengolin committed rL370872: Request commit access for rengolin.
Request commit access for rengolin
Wed, Sep 4, 3:40 AM

Aug 6 2019

rengolin added a comment to D62997: [LV] Share the LV illegality reporting with LoopVectorize. NFC..

Nope, Asan failures from the sanitizer commit.

Aug 6 2019, 9:42 AM · Restricted Project

Aug 1 2019

rengolin added reviewers for D65572: Fix static linking failure with --unwindlib=libunwind: compnerd, mstorsjo, jroelofs, theraven.

This is a tricky one which may vary depending on the libraries available on different systems. Which toolchain is this? Can you add more context?

Aug 1 2019, 6:48 AM · Restricted Project

Jul 30 2019

rengolin accepted D65404: [AArch64] Disable __ARM_FEATURE_SVE without ACLE..

I see, makes sense. LGTM, thanks!

Jul 30 2019, 1:56 AM · Restricted Project

Jul 29 2019

rengolin added a comment to D65404: [AArch64] Disable __ARM_FEATURE_SVE without ACLE..

I understand (and agree with) the reasoning of this patch, but wouldn't this also make it harder to test the current behaviour?

Jul 29 2019, 10:44 AM · Restricted Project
rengolin accepted D65385: [AArch64][AsmParser] Remove SVE and SVE2 from ARMTargetParser.

Right, ArchExtKind was supposed to be shared between Arm and AArch64, but that ship has sailed a long time ago. LGTM, thanks!

Jul 29 2019, 9:29 AM · Restricted Project

Jul 26 2019

rengolin accepted D65327: [AArch64][SVE2] Rename bitperm feature to sve2-bitperm.
Jul 26 2019, 6:10 AM · Restricted Project

Jul 24 2019

rengolin added a comment to D65197: [LV] Tail-loop Folding.

Before we had the monoropo reviewers frequently asked to split patches into the LLVM and Clang part. With the monorepo, I am not sure the rule still needs to be followed. At least, I did not expect LLVM documentation in a clang patch, so sorry for the non-applicable comment.

Jul 24 2019, 6:38 AM · Restricted Project

Jul 23 2019

rengolin added a comment to D53137: Scalable vector core instruction support + size queries.

I would find it much easier to review with an incremental strategy based on regression tests. For instance, with ToT opt, the attached testcase fails (error: '%r' defined with type '<4 x i1>' but expected '<vscale x 4 x i1>'). I would add a patch to fix that, and maybe other similar, really simple cases. We could then proceed to more complex examples, run some of the passes that come after the vectorizer on them, and progressively fix the places required to make them pass, with focused tests for each hurdle that we run into. It shouldn't be too hard to reduce such snippets from the tests you've already been running.

Jul 23 2019, 3:41 AM · Restricted Project, Restricted Project
rengolin added a reviewer for D53137: Scalable vector core instruction support + size queries: rovka.
Jul 23 2019, 3:26 AM · Restricted Project, Restricted Project

Jul 19 2019

rengolin accepted D62997: [LV] Share the LV illegality reporting with LoopVectorize. NFC..

Better this way, let's keep the changes contained to one per patch. If there's interest to change that behaviour or not, it should not hold this patch, which looks good to me now. Thanks!

Jul 19 2019, 5:05 AM · Restricted Project

Jul 18 2019

rengolin requested changes to D62997: [LV] Share the LV illegality reporting with LoopVectorize. NFC..
Jul 18 2019, 3:38 AM · Restricted Project
rengolin added a comment to D62997: [LV] Share the LV illegality reporting with LoopVectorize. NFC..

@hsaito The test no_switch.ll failed because remarks aren't written now by default, so without -pass-remarks-analysis. I've just removed the corresponding check from the test. But, I think, the NFC label from diff/commit should also be removed in this case because the behavior is changed a little bit. No other problems with tests in the LoopVectorize directory. If this diff is applied, the entire set of tests passes.

Jul 18 2019, 3:34 AM · Restricted Project

Jul 5 2019

rengolin accepted D63614: [System Model] [TTI] Update cache and prefetch TTI interfaces.

As far as I can see this is an NFC refactoring with obvious benefits to readability and extensibility. LGTM too. :)

Jul 5 2019, 9:37 AM · Restricted Project

Jul 2 2019

rengolin added a comment to D53613: RFC: Explicit Vector Length Intrinsics and Attributes.

It's best to submit a new review.
Else no one sees the description as a mail.

Jul 2 2019, 2:01 AM · Restricted Project
rengolin updated subscribers of D53613: RFC: Explicit Vector Length Intrinsics and Attributes.

Adding llvm-commits for wider audience

Jul 2 2019, 1:45 AM · Restricted Project

Jun 24 2019

rengolin accepted D63705: [ConstantFolding] Use hasVectorInstrinsicScalarOpd. NFC.
Jun 24 2019, 4:53 AM · Restricted Project
rengolin accepted D63704: [Scalarizer] Add scalarizer support for smul.fix.sat.

lgtm, thanks!

Jun 24 2019, 4:53 AM · Restricted Project

Jun 21 2019

rengolin added a comment to D62997: [LV] Share the LV illegality reporting with LoopVectorize. NFC..

The diff has been updated: private methods were removed, the function 'reportVectorizationFailure' was moved to LoopVectorize.cpp and declared in LoopVectorize.h (namespace llvm). I've removed the passName parameter and pass LV_NAME as pass name to ORE but this change breaks 3 regression tests:

Jun 21 2019, 11:07 AM · Restricted Project

Jun 17 2019

rengolin added a comment to D62997: [LV] Share the LV illegality reporting with LoopVectorize. NFC..

I agree with Hideki, this could be in LoopVectorize.h.

Jun 17 2019, 3:13 PM · Restricted Project

Jun 14 2019

rengolin added a comment to D62997: [LV] Share the LV illegality reporting with LoopVectorize. NFC..

Sorry Pavel, tough week. it's at the top of my list.

Jun 14 2019, 1:34 AM · Restricted Project

Jun 10 2019

rengolin added a comment to D32530: [SVE][IR] Scalable Vector IR Type.

@huntergr do you have an account on bugzilla? I couldn't CC you on that bug.

Jun 10 2019, 2:25 AM · Restricted Project

Jun 6 2019

rengolin committed rG9e97caf59474: [LV] Wrap LV illegality reporting in a function. NFC. (authored by rengolin).
[LV] Wrap LV illegality reporting in a function. NFC.
Jun 6 2019, 12:14 PM
rengolin closed D62478: [LV] Wrap LV illegality reporting in a function. NFC..

Committed as r362736

Jun 6 2019, 12:13 PM · Restricted Project
rengolin committed rL362736: [LV] Wrap LV illegality reporting in a function. NFC..
[LV] Wrap LV illegality reporting in a function. NFC.
Jun 6 2019, 12:13 PM

Jun 5 2019

rengolin accepted D62478: [LV] Wrap LV illegality reporting in a function. NFC..

Much cleaner, thanks! I think we should deal with extending the functionality in a separate patch, since that's already a good localized improvement.

Jun 5 2019, 1:17 PM · Restricted Project

May 28 2019

rengolin added a comment to D62478: [LV] Wrap LV illegality reporting in a function. NFC..

I don't understand why having a function with a lot of arguments is better than a private method getting access to the class' members. Why are private methods in C++ at all, they also are used only from class methods and can be replaced with static util functions getting required class members as arguments.

May 28 2019, 10:53 AM · Restricted Project
rengolin added a comment to D62478: [LV] Wrap LV illegality reporting in a function. NFC..

I believe the LoopVectorize class also should use this function since there are a number of occurrences of the same pattern

May 28 2019, 10:37 AM · Restricted Project

May 27 2019

rengolin added a comment to D62478: [LV] Wrap LV illegality reporting in a function. NFC..

@rengolin It is because the function uses OptimizationRemarkEmitter *ORE, a member of the LoopVectorizationLegality class.

May 27 2019, 1:14 PM · Restricted Project
rengolin added a comment to D62478: [LV] Wrap LV illegality reporting in a function. NFC..

Looks nice, thanks! Though, does it need to be a member function? Why not just a local static function?

May 27 2019, 5:35 AM · Restricted Project

May 22 2019

rengolin added a comment to D62110: [LV] prevent potential divide by zero. NFC.

LoopVectorizationCostModel::expectedCost default initializes its return value, an instance of LoopVectorizationCostModel::VectorizationCostTy declared as:

using VectorizationCostTy = std::pair<unsigned, bool>;

so looks like it's possible.

May 22 2019, 2:57 AM · Restricted Project

May 20 2019

rengolin added a comment to D62110: [LV] prevent potential divide by zero. NFC.

Can expectedCost ever return zero?

May 20 2019, 12:43 AM · Restricted Project

May 8 2019

rengolin accepted D61638: [LV] Move getScalarizationOverhead and vector call cost computations to CM. (NFC).

looks obviously good to me. thanks!

May 8 2019, 2:33 PM · Restricted Project

Apr 30 2019

rengolin accepted D61030: [PassManagerBuilder] Add option for interleaved loops, for loop vectorize..
Apr 30 2019, 2:07 PM · Restricted Project
rengolin added inline comments to D61030: [PassManagerBuilder] Add option for interleaved loops, for loop vectorize..
Apr 30 2019, 6:22 AM · Restricted Project

Apr 24 2019

rengolin added a comment to D32530: [SVE][IR] Scalable Vector IR Type.

Exactly. Non-constant values can become constant. Constant values can be guarded by vscale-dependent runtime guards (both hand-written and compiler generated). My preference is to leave this not restricted to vscale == 1 values, but rather allow all values that can be supported at runtime, and have it be UB if, at runtime, the relevant index is not available.

Apr 24 2019, 9:25 AM · Restricted Project

Apr 15 2019

rengolin added a comment to D32530: [SVE][IR] Scalable Vector IR Type.

So if we wanted to keep them as intrinsics for now, I think we have one of three options:

  1. Leave discussion on more complicated shuffles until later, and only use scalable autovectorization on loops which don't need anything more than splats.
Apr 15 2019, 6:52 AM · Restricted Project

Apr 13 2019

rengolin added a comment to D32530: [SVE][IR] Scalable Vector IR Type.

If we are going for more than element-wise Instructions, we need to have well defined and agreed semantics for each of those, and that should be part of the LangRef for each such Instruction.

Apr 13 2019, 12:54 PM · Restricted Project

Apr 6 2019

rengolin added inline comments to D32530: [SVE][IR] Scalable Vector IR Type.
Apr 6 2019, 3:02 AM · Restricted Project

Apr 5 2019

rengolin added a comment to D32530: [SVE][IR] Scalable Vector IR Type.
  • Clarified that the runtime multiple is constant across all scalable vector types, even if the constant value isn't known at compile time.
  • Removed extra whitespace.
Apr 5 2019, 6:16 AM · Restricted Project
rengolin added inline comments to D32530: [SVE][IR] Scalable Vector IR Type.
Apr 5 2019, 1:54 AM · Restricted Project

Mar 20 2019

rengolin added inline comments to D59149: [LV] move useEmulatedMaskMemRefHack() functionality to TTI..
Mar 20 2019, 2:08 AM · Restricted Project

Mar 19 2019

rengolin added inline comments to D59149: [LV] move useEmulatedMaskMemRefHack() functionality to TTI..
Mar 19 2019, 2:31 AM · Restricted Project

Mar 16 2019

rengolin added a comment to D59335: [RFC] Enable vectorization on Neon even without fast-math.

I'm curious as to how will we generate these flags.

Mar 16 2019, 5:49 AM · Restricted Project
rengolin added a comment to D59335: [RFC] Enable vectorization on Neon even without fast-math.

langref part seems to be missing.

I'll add it if/once reviewers are okay with this approach.

Mar 16 2019, 5:36 AM · Restricted Project
rengolin added a comment to D59149: [LV] move useEmulatedMaskMemRefHack() functionality to TTI..

Cost model for emulated masked load/store is completely broken.

comment is still valid. What would it take to address this properly?

Each target to run many applications/benchmarks to come up with the "right" adjustment to the cost model. No way around that.

Mar 16 2019, 5:32 AM · Restricted Project

Mar 13 2019

rengolin added a comment to D59149: [LV] move useEmulatedMaskMemRefHack() functionality to TTI..

The concept of "hacked" is lost when you move up to TTI. I'd change the logic to reflect that this is making it "prohibitively expensive" instead of "hacked value".

Mar 13 2019, 7:49 AM · Restricted Project

Mar 7 2019

rengolin added a comment to D59108: [Docs] Add top level CONTRIBUTING.md..

I'm not against moving docs there but I think there should be a conversation about the broader subject of docs, github, wiki, etc.

Mar 7 2019, 1:21 PM · Restricted Project
rengolin added reviewers for D47770: [MVT][SVE] Add EVT strings and Type mapping: rengolin, greened.
Mar 7 2019, 11:35 AM · Restricted Project
rengolin added a reviewer for D53137: Scalable vector core instruction support + size queries: greened.
Mar 7 2019, 11:35 AM · Restricted Project, Restricted Project

Feb 27 2019

rengolin added a comment to D53927: [AArch64] Enable libm vectorized functions via SLEEF.

I'm trying to understand what log10 behavior got changed. Could someone out where that change is?

Feb 27 2019, 12:28 PM · Restricted Project
rengolin added a comment to D53927: [AArch64] Enable libm vectorized functions via SLEEF.

I'm not sure what the proposed split would consist of.

Feb 27 2019, 10:37 AM · Restricted Project
rengolin added a comment to D53927: [AArch64] Enable libm vectorized functions via SLEEF.

Hi @steleman, that wasn't a "loaded question", it was an honest one. Let me try to clarify what that means for all parties.

Feb 27 2019, 1:28 AM · Restricted Project

Feb 19 2019

rengolin committed rG89d4a9d6e4e0: second test on git-llvm-push (authored by rengolin).
second test on git-llvm-push
Feb 19 2019, 2:06 PM
rengolin committed rL354390: second test on git-llvm-push.
second test on git-llvm-push
Feb 19 2019, 2:05 PM
rengolin committed rG9845da93e125: Testing git-llvm-push script (authored by rengolin).
Testing git-llvm-push script
Feb 19 2019, 1:32 PM
rengolin committed rL354383: Testing git-llvm-push script.
Testing git-llvm-push script
Feb 19 2019, 1:31 PM

Feb 18 2019

rengolin added a comment to D54791: [AArch64] Fix disassembly of SXTL and UXTL aliases.

@t.p.northover Is this the correct behaviour for Apple's syntax?

Feb 18 2019, 3:26 AM · Restricted Project
rengolin accepted D23610: [ARM] Add pre-defined macros for ROPI and RWPI.

Sorry for the delay, this fell out of my radar and just saw the ping now.

Feb 18 2019, 3:24 AM · Restricted Project

Feb 16 2019

rengolin added a comment to D53927: [AArch64] Enable libm vectorized functions via SLEEF.

Perfect, thanks!

Feb 16 2019, 1:38 AM · Restricted Project

Feb 15 2019

rengolin added a comment to D53927: [AArch64] Enable libm vectorized functions via SLEEF.

@bryanpkc debug build makes sense, thanks! @steleman, I'd rather just order now and try to rector later. This patch has changed enough tunes already. :-)

Feb 15 2019, 4:33 PM · Restricted Project
rengolin accepted D53927: [AArch64] Enable libm vectorized functions via SLEEF.

Just did a rebuild after moving lgamma after isoc99. No warnings, no errors, and no difference in my test results ...

Feb 15 2019, 5:52 AM · Restricted Project
rengolin added a comment to D53927: [AArch64] Enable libm vectorized functions via SLEEF.

Thanks Stephan, now looks good.

Feb 15 2019, 4:48 AM · Restricted Project
rengolin added a comment to D53927: [AArch64] Enable libm vectorized functions via SLEEF.

Thanks for your answers, they make sense. Other than the mistake I made on disabling exp calls (you were right), looks fine.

Feb 15 2019, 2:37 AM · Restricted Project
rengolin accepted D53928: Enable builtins necessary for SLEEF [AArch64] vectorized trigonometry libm functions.

Thanks, LGTM!

Feb 15 2019, 2:28 AM · Restricted Project

Feb 14 2019

rengolin added a comment to D53927: [AArch64] Enable libm vectorized functions via SLEEF.

Because __tgamma_r_finite doesn't exist, at least on Linux. :-)

See /usr/include/bits/math-finite.h.

Feb 14 2019, 5:16 AM · Restricted Project
rengolin added a comment to D53927: [AArch64] Enable libm vectorized functions via SLEEF.

tgamma stands for "true gamma", and it is the function name specified in the ANSI C standard.

Feb 14 2019, 3:37 AM · Restricted Project
rengolin edited reviewers for D57504: RFC: Prototype & Roadmap for vector predication in LLVM, added: mkuper, rkruppe, fhahn; removed: programmerjake.
Feb 14 2019, 2:58 AM · Restricted Project
rengolin added inline comments to D53927: [AArch64] Enable libm vectorized functions via SLEEF.
Feb 14 2019, 2:52 AM · Restricted Project

Feb 13 2019

rengolin added a comment to D53928: Enable builtins necessary for SLEEF [AArch64] vectorized trigonometry libm functions.

Funny thing is, SVML is also only supported, AFAIK, for Intel. I agree that we should emit errors, but we should also emit a similar error on SVML.

Feb 13 2019, 5:44 AM · Restricted Project
rengolin added a comment to D53927: [AArch64] Enable libm vectorized functions via SLEEF.

I have a few comments inline, mostly harmless, as the change is almost entirely mechanical and makes sense.

Feb 13 2019, 4:46 AM · Restricted Project

Feb 9 2019

rengolin added a comment to D53928: Enable builtins necessary for SLEEF [AArch64] vectorized trigonometry libm functions.

@hfinkel There are changes in this patch, as well as its LLVM counterpart D53927. Please, re-review.

Feb 9 2019, 5:09 AM · Restricted Project
rengolin requested changes to D53927: [AArch64] Enable libm vectorized functions via SLEEF.
Feb 9 2019, 5:08 AM · Restricted Project
rengolin reopened D53927: [AArch64] Enable libm vectorized functions via SLEEF.

Right, this is a completely different patch and it seems that the original proposal hadn't been tested thoroughly.

Feb 9 2019, 5:08 AM · Restricted Project
rengolin requested changes to D53928: Enable builtins necessary for SLEEF [AArch64] vectorized trigonometry libm functions.

Since the previous version was approved already, I'm "requesting changes" so that we can look at it again, together with D53927 to make sure it's still the right way to go.

Feb 9 2019, 5:07 AM · Restricted Project

Feb 8 2019

rengolin added a reviewer for D57953: [Jump Threading] Convert conditional branches into unconditional branches using GVN results: jfb.
Feb 8 2019, 8:30 AM
rengolin added a comment to D57953: [Jump Threading] Convert conditional branches into unconditional branches using GVN results.

Adding llvm-commits for wider audience

Feb 8 2019, 8:13 AM
rengolin updated subscribers of D57953: [Jump Threading] Convert conditional branches into unconditional branches using GVN results.
Feb 8 2019, 8:12 AM

Feb 6 2019

rengolin added inline comments to D57837: [LV] Prevent interleaving if computeMaxVF returned None..
Feb 6 2019, 2:02 PM · Restricted Project

Jan 31 2019

rengolin accepted D57529: Add .dword direcrive support for aarch64 mc.

dword is indeed widely used. I'm surprised we didn't support that yet. Apparently, neither does Arm, only X86, Mips and RiscV.

Jan 31 2019, 11:35 AM

Jan 30 2019

rengolin accepted D53695: Scalable VectorType RFC.

I didn't move it to the proposals directory, since I'm not sure if we would lose the inline comments that way.

Jan 30 2019, 8:23 AM

Jan 29 2019

rengolin added a comment to D30247: Epilog loop vectorization.

BTW, targets that have efficient masked operations may also find it useful for cycles and size to vectorize (including epilogs) under -Os, and following r345705 possibly also with enable-masked-interleaved-mem-accesses turned on.

Jan 29 2019, 9:08 AM · Restricted Project

Jan 23 2019

rengolin accepted D57044: [AArch64] OOptimize floating point materialization.

LGTM, thanks!

Jan 23 2019, 9:05 AM · Restricted Project
rengolin added a comment to D53355: Introducing VPPHINode .

Sorry for this long reply. As Satish has pointed out in his review, this VPPHINode will be used to generate blending.

Jan 23 2019, 6:53 AM

Jan 22 2019

rengolin added a comment to D57044: [AArch64] OOptimize floating point materialization.

Sounds good. Please add simple tests for +inf and -inf on both double and float. Perhaps also float to double and vice versa from the IR constant (like the changed test shows), too. Thanks!

Jan 22 2019, 5:34 AM · Restricted Project

Jan 20 2019

rengolin added a comment to D53927: [AArch64] Enable libm vectorized functions via SLEEF.

Hal approved the Clang side, so this one looks good, too.

Jan 20 2019, 2:28 AM · Restricted Project

Jan 10 2019

rengolin added a comment to D53927: [AArch64] Enable libm vectorized functions via SLEEF.

Perhaps best to ping Clang's commit, as that's the review that is blocking this one.

Jan 10 2019, 2:07 AM · Restricted Project

Dec 19 2018

rengolin added a comment to D53927: [AArch64] Enable libm vectorized functions via SLEEF.

Thanks! I've updated the reviewers on the Clang review (D53928).

Dec 19 2018, 7:26 AM · Restricted Project
rengolin added reviewers for D53928: Enable builtins necessary for SLEEF [AArch64] vectorized trigonometry libm functions: rsmith, chandlerc, rnk, ABataev.

Adding clang/omp developers for proper review. Please feel free to add more.

Dec 19 2018, 7:16 AM · Restricted Project

Dec 17 2018

rengolin requested changes to D55445: [cmake] Update config.guess to gnuconfig git 2018-12-07.

If you git log cmake/config.guess you'll see that all the past changes either remove functionality or add obvious parts that shouldn't inflict on copyright.

Dec 17 2018, 5:06 AM

Dec 14 2018

rengolin accepted D53816: [TableGen:AsmWriter] Cope with consecutive tied operands..

Right, that's all very hypothetical, but the change is harmless otherwise and generally an improvement of the code. I can't see any impact this would have in code generation or compilation time, so LGTM.

Dec 14 2018, 3:39 AM
rengolin updated subscribers of D55427: [libcxx] Call __count_bool_true for bitset count.

Getting a bit late in this discussion, as we had an internal one just recently.

Dec 14 2018, 3:16 AM

Dec 13 2018

rengolin added a comment to D53349: [VPlan] Changes to implement VPlan based predication for VPlan-native path..

Right, I'm happy with the patch and will let @fhahn do the final review and approval. Thanks!

Dec 13 2018, 3:21 AM

Dec 12 2018

rengolin added a comment to D53927: [AArch64] Enable libm vectorized functions via SLEEF.

Where, when, how and by whom are these #pragmas inserted? Are they silently inserted by clang? Do they have to be manually inserted in existing code?
What is the effect of these #pragmas? The ARM closed-source commercial compiler requires OpenMP. How will these #pragmas be implemented in the open-source clang? Will they import OpenMP interfaces in the open-source clang as well?
If importing OpenMP interfaces is not triggered by the insertion of these #pragmas, why is the argument to -fveclib called 'openmp'? I would find it baffling to have to type -fveclib=openmp on compile-line, but ending up not using OpenMP.

I think you should post these questions as a reply to the RFC.

Dec 12 2018, 2:03 AM · Restricted Project
rengolin added a comment to D53349: [VPlan] Changes to implement VPlan based predication for VPlan-native path..

As a starting point, this sure looks good to me. Thanks!

Dec 12 2018, 1:54 AM

Dec 11 2018

rengolin added inline comments to D53927: [AArch64] Enable libm vectorized functions via SLEEF.
Dec 11 2018, 2:15 PM · Restricted Project