[TargetParser] Generate RISCVTargetParserDef only if RISCV is enabled.

[fpetrogalli]

Summary

This remove the dependency from the RISCV TableGen target definitions
for builds that do not build the RISCV target.

[craig.topper]

Does this improve build times by a significant amount?

[fpetrogalli]

Fix a bug in the way I was setting the cmake variable.

[fpetrogalli]

In D156710#4547365, @craig.topper wrote:

Does this improve build times by a significant amount?

I'd say ~0.75x speedup when building LLVMTargetParser. Mostly because the build of LLVMTargetParser now requires less dependencies (in my specific case, from 188 to 165).

Of course this does not reflect on a full compiler build...

% cmake ../llvm-project/llvm -G Ninja -DCMAKE_BUILD_TYPE=Release -DLLVM_ENABLE_ASSERTIONS=ON -DLLVM_TARGETS_TO_BUILD="AArch64;ARM;X86"
% time ninja -j1 LLVMTargetParser
[165/165] Linking CXX static library lib/libLLVMTargetParser.a
ninja -j1 LLVMTargetParser  44.86s user 4.55s system 98% cpu 50.027 total

% cmake ../llvm-project/llvm -G Ninja -DCMAKE_BUILD_TYPE=Release -DLLVM_ENABLE_ASSERTIONS=ON -DLLVM_TARGETS_TO_BUILD="AArch64;ARM;X86;RISCV"
% time ninja -j1 LLVMTargetParser
[188/188] Linking CXX static library lib/libLLVMTargetParser.a
ninja -j1 LLVMTargetParser  56.60s user 5.70s system 98% cpu 1:03.45 total

[jroelofs]

llvm/lib/TargetParser/RISCVTargetParser.cpp

42

Will this cause invalid to show up in -mcpu=help? ISTM it would be better if the list were empty when it's not enabled.

[jrtc27]

Doesn't this change the behaviour of clang -emit-llvm, which is supposed to work the same regardless of what targets you have enabled? If so, NAK.

[fpetrogalli]

In D156710#4547858, @jrtc27 wrote:

Doesn't this change the behaviour of clang -emit-llvm, which is supposed to work the same regardless of what targets you have enabled? If so, NAK.

Ah - very good point! I didn't know about this. I will abandon the change.

Thanks,

Francesco

llvm/CMakeLists.txt

 
 # Put this before tblgen. Else we have a circular dependence.
 add_subdirectory(lib/Demangle)
 add_subdirectory(lib/Support)
 add_subdirectory(lib/TableGen)
 
 add_subdirectory(utils/TableGen)
 
+# Some of the RISCV-specific bits in LLVMTargetParser are generated
+# via TableGen. Do not bother in autogenerating the enums needed by
+# RISCV if we are not building a compiler that targets RISCV.
+set(RISCV_AUTOGEN_TARGETPARSER OFF)
+if("RISCV" IN_LIST LLVM_TARGETS_TO_BUILD)
+  set (RISCV_AUTOGEN_TARGETPARSER ON)
+endif()
+
 add_subdirectory(include)
 
 add_subdirectory(lib)
 
 if( LLVM_INCLUDE_UTILS )
   add_subdirectory(utils/FileCheck)
   add_subdirectory(utils/PerfectShuffle)
   add_subdirectory(utils/count)

llvm/include/llvm/TargetParser/CMakeLists.txt

+if(RISCV_AUTOGEN_TARGETPARSER)
   set(LLVM_TARGET_DEFINITIONS ${PROJECT_SOURCE_DIR}/lib/Target/RISCV/RISCV.td)
   tablegen(LLVM RISCVTargetParserDef.inc -gen-riscv-target-def -I ${PROJECT_SOURCE_DIR}/lib/Target/RISCV/)
   add_public_tablegen_target(RISCVTargetParserTableGen)
+endif()

llvm/lib/TargetParser/CMakeLists.txt

add_llvm_component_library(LLVMTargetParser
   X86TargetParser.cpp
 
   ADDITIONAL_HEADER_DIRS
   Unix
   Windows
 
   LINK_COMPONENTS
   Support
-
-  DEPENDS
-  RISCVTargetParserTableGen
   )
+
+if (RISCV_AUTOGEN_TARGETPARSER)
+  add_dependencies(LLVMTargetParser RISCVTargetParserTableGen)
+  target_compile_options(LLVMTargetParser PRIVATE -DRISCV_AUTOGEN_TARGETPARSER)
+endif()

llvm/lib/TargetParser/RISCVTargetParser.cpp

 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/TargetParser/Triple.h"
 
 namespace llvm {
 namespace RISCV {
 
 enum CPUKind : unsigned {
+#ifdef RISCV_AUTOGEN_TARGETPARSER
 #define PROC(ENUM, NAME, DEFAULT_MARCH) CK_##ENUM,
 #define TUNE_PROC(ENUM, NAME) CK_##ENUM,
 #include "llvm/TargetParser/RISCVTargetParserDef.inc"
+#endif
 };
 
 struct CPUInfo {
   StringLiteral Name;
   StringLiteral DefaultMarch;
   bool is64Bit() const { return DefaultMarch.starts_with("rv64"); }
 };
 
 constexpr CPUInfo RISCVCPUInfo[] = {
+#ifdef RISCV_AUTOGEN_TARGETPARSER
 #define PROC(ENUM, NAME, DEFAULT_MARCH)                              \
   {NAME, DEFAULT_MARCH},
 #include "llvm/TargetParser/RISCVTargetParserDef.inc"
+#else
+    {"invalid", "invalid"}
+#endif
 };
 
 static const CPUInfo *getCPUInfoByName(StringRef CPU) {
   for (auto &C : RISCVCPUInfo)
     if (C.Name == CPU)
       return &C;
   return nullptr;
 }
 
 bool parseCPU(StringRef CPU, bool IsRV64) {
   const CPUInfo *Info = getCPUInfoByName(CPU);
 
   if (!Info)
     return false;
   return Info->is64Bit() == IsRV64;
 }
 
 bool parseTuneCPU(StringRef TuneCPU, bool IsRV64) {
+#ifdef RISCV_AUTOGEN_TARGETPARSER
   std::optional<CPUKind> Kind =
       llvm::StringSwitch<std::optional<CPUKind>>(TuneCPU)
 #define TUNE_PROC(ENUM, NAME) .Case(NAME, CK_##ENUM)
   #include "llvm/TargetParser/RISCVTargetParserDef.inc"
       .Default(std::nullopt);
 
   if (Kind.has_value())
     return true;
-
+#else
+  return false;
+#endif
   // Fallback to parsing as a CPU.
   return parseCPU(TuneCPU, IsRV64);
 }
 
 StringRef getMArchFromMcpu(StringRef CPU) {
   const CPUInfo *Info = getCPUInfoByName(CPU);
   if (!Info)
     return "";
   return Info->DefaultMarch;
 }
 
 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) {
   for (const auto &C : RISCVCPUInfo) {
     if (IsRV64 == C.is64Bit())
       Values.emplace_back(C.Name);
   }
 }
 
 void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) {
   for (const auto &C : RISCVCPUInfo) {
     if (IsRV64 == C.is64Bit())
       Values.emplace_back(C.Name);
   }
+#ifdef RISCV_AUTOGEN_TARGETPARSER
 #define TUNE_PROC(ENUM, NAME) Values.emplace_back(StringRef(NAME));
 #include "llvm/TargetParser/RISCVTargetParserDef.inc"
+#endif
 }
 
 } // namespace RISCV
 } // namespace llvm