This patch enables some fp16 vector type builtins that don't use fp arithmetic instruction for zvfhmin without zvfh.
Include following builtins:
vector load/store, vector reinterpret, vmerge_vvm, vmv_v.
Differential D151869
[RISCV] Enable more builtin for zvfhmin without zvfh jacquesguan on Jun 1 2023, 2:03 AM. Authored by
Details This patch enables some fp16 vector type builtins that don't use fp arithmetic instruction for zvfhmin without zvfh. vector load/store, vector reinterpret, vmerge_vvm, vmv_v.
Diff Detail
Event TimelineComment Actions I think the topic of this patch is not accurate. The compiler already support these intrinsics with zvfh specified. Implementing zvfhmin is relaxing the implementation and let some of the intrinsics available when only zvfhmin and not zvfm is specified. So I think we can adjust the patch description a bit. I think you may relax the extension specified, which is currently zvfh, to using zvfhmin, under the existing test cases under clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated to verify your implementation. |