[MC] Always encode instruction into SmallVector

[aengelke]

Summary

All users of MCCodeEmitter::encodeInstruction use a raw_svector_ostream
to encode the instruction into a SmallVector. The raw_ostream however
incurs some overhead for the actual encoding.

This change allows an MCCodeEmitter to directly emit an instruction into
a SmallVector without using a raw_ostream and therefore allow for
performance improvments in encoding. A default path that uses existing
raw_ostream implementations is provided.

[aengelke]

Attempt to fix bolt

[RKSimon]

As I said on D145792 - it'd help us more if we could address any obviously missed perf in raw_svector_ostream first before trying a refactor like this.

[aengelke]

I don't think there are "obviously missed" problems; IMHO the main problem is the abstraction itself, which for every write involves a function call (raw_ostream::write, unlikely to be inlined due to size and unlikely to be optimizable as the buffer pointers/mode are mutable members) and an indirect function call (write_impl, extremely unlikely to be devirtualized due to general code complexity). The impact of the latter could probably be reduced by buffering in raw_svector_ostream, but that'd be a substantial and massively breaking change with unknown (and hardly quantifiable) benefits. If you have any suggestions for more generally applicable approaches, I'd be happy to try them; but right now getting rid of the (apparently completely unneeded) abstraction appears to be the easiest, least intrusive, and most performant change.

[MaskRay]

LGTM, but make sure @RKSimon is happy as well.

In D145791#4185462, @aengelke wrote:

I don't think there are "obviously missed" problems; IMHO the main problem is the abstraction itself, which for every write involves a function call (raw_ostream::write, unlikely to be inlined due to size and unlikely to be optimizable as the buffer pointers/mode are mutable members) and an indirect function call (write_impl, extremely unlikely to be devirtualized due to general code complexity). The impact of the latter could probably be reduced by buffering in raw_svector_ostream, but that'd be a substantial and massively breaking change with unknown (and hardly quantifiable) benefits. If you have any suggestions for more generally applicable approaches, I'd be happy to try them; but right now getting rid of the (apparently completely unneeded) abstraction appears to be the easiest, least intrusive, and most performant change.

The change makes sense to me. It removes an unneeded abstraction and simplifies many call sites.
raw_ostream::write =(inlinable)=> flush_tied_then_write (unneeded TiedStream check) =(virtual function call)=> raw_svector_ostream::write_impl ==> SmallVector append(ItTy in_start, ItTy in_end) (range; less efficient then push_back).

Every step adds some overhead.

[Amir]

BOLT changes LGTM

[aengelke]

@RKSimon Are you ok with these two patches or do you have any concerns/alternative ideas?

[aengelke]

@RKSimon ping? We get a consistent 0.5%–1.5% compile-time improvement from these changes.

[RKSimon]

In D145791#4245926, @aengelke wrote:

@RKSimon ping? We get a consistent 0.5%–1.5% compile-time improvement from these changes.

Sorry - I missed this entirely! LGTM

bolt/include/bolt/Core/BinaryContext.h

computeInstructionSize(const MCInst &Inst,
                          const MCCodeEmitter *Emitter = nullptr) const {
     if (auto Size = MIB->getAnnotationWithDefault<uint32_t>(Inst, "Size"))
       return Size;
 
     if (!Emitter)
       Emitter = this->MCE.get();
     SmallString<256> Code;
     SmallVector<MCFixup, 4> Fixups;
-    raw_svector_ostream VecOS(Code);
-    Emitter->encodeInstruction(Inst, VecOS, Fixups, *STI);
+    Emitter->encodeInstruction(Inst, Code, Fixups, *STI);
     return Code.size();
   }
 
   /// Compute the native code size for a range of instructions.
   /// Note: this can be imprecise wrt the final binary since happening prior to
   /// relaxation, as well as wrt the original binary because of opcode
   /// shortening.MCCodeEmitter is not thread safe and each thread should operate
   /// with its own copy of it.

bolt/lib/Core/BinaryContext.cpp

bool BinaryContext::validateInstructionEncoding(
   MCInst Inst;
   uint64_t InstSize;
   DisAsm->getInstruction(Inst, InstSize, InputSequence, 0, nulls());
   assert(InstSize == InputSequence.size() &&
          "Disassembled instruction size does not match the sequence.");
 
   SmallString<256> Code;
   SmallVector<MCFixup, 4> Fixups;
-  raw_svector_ostream VecOS(Code);
 
-  MCE->encodeInstruction(Inst, VecOS, Fixups, *STI);
+  MCE->encodeInstruction(Inst, Code, Fixups, *STI);
   auto OutputSequence = ArrayRef<uint8_t>((uint8_t *)Code.data(), Code.size());
   if (InputSequence != OutputSequence) {
     if (opts::Verbosity > 1) {
       errs() << "BOLT-WARNING: mismatched encoding detected\n"
              << "      input: " << InputSequence << '\n'
              << "     output: " << OutputSequence << '\n';
     }
     return false;

bolt/lib/Core/BinaryFunction.cpp

for (uint64_t Offset = 0; Offset < getSize(); Offset += Size) {
     }
 
     if (!TargetSymbol && !HasRel)
       continue;
 
     // Emit the instruction using temp emitter and generate relocations.
     SmallString<256> Code;
     SmallVector<MCFixup, 4> Fixups;
-    raw_svector_ostream VecOS(Code);
-    Emitter.MCE->encodeInstruction(Instruction, VecOS, Fixups, *BC.STI);
+    Emitter.MCE->encodeInstruction(Instruction, Code, Fixups, *BC.STI);
 
     // Create relocation for every fixup.
     for (const MCFixup &Fixup : Fixups) {
       std::optional<Relocation> Rel = BC.MIB->createRelocation(Fixup, *BC.MAB);
       if (!Rel) {
         Success = false;
         continue;
       }

llvm/include/llvm/MC/MCCodeEmitter.h

 class raw_ostream;
 template<typename T> class SmallVectorImpl;
 
 /// MCCodeEmitter - Generic instruction encoding interface.
 class MCCodeEmitter {
 protected: // Can only create subclasses.
   MCCodeEmitter();
 
+  /// EncodeInstruction - Encode the given \p Inst to bytes on the output stream
+  /// \p OS. Allows for an implementation of encodeInstruction that uses streams
+  /// instead of a SmallVector.
+  virtual void encodeInstruction(const MCInst &Inst, raw_ostream &OS,
+                                 SmallVectorImpl<MCFixup> &Fixups,
+                                 const MCSubtargetInfo &STI) const {}
+
 public:
   MCCodeEmitter(const MCCodeEmitter &) = delete;
   MCCodeEmitter &operator=(const MCCodeEmitter &) = delete;
   virtual ~MCCodeEmitter();
 
   /// Lifetime management
   virtual void reset() {}
 
   /// Emit the prefixes of given instruction on the output stream.
   ///
   /// \param Inst a single low-level machine instruction.
   /// \param OS output stream.
   virtual void emitPrefix(const MCInst &Inst, raw_ostream &OS,
                           const MCSubtargetInfo &STI) const {}
-  /// EncodeInstruction - Encode the given \p Inst to bytes on the output
-  /// stream \p OS.
-  virtual void encodeInstruction(const MCInst &Inst, raw_ostream &OS,
+  /// EncodeInstruction - Encode the given \p Inst to bytes and append to \p CB.
+  virtual void encodeInstruction(const MCInst &Inst, SmallVectorImpl<char> &CB,
                                  SmallVectorImpl<MCFixup> &Fixups,
-                                 const MCSubtargetInfo &STI) const = 0;
+                                 const MCSubtargetInfo &STI) const;
 };
 
 } // end namespace llvm
 
 #endif // LLVM_MC_MCCODEEMITTER_H

llvm/include/llvm/MCA/CodeEmitter.h

 
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/SmallString.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/MC/MCAsmBackend.h"
 #include "llvm/MC/MCCodeEmitter.h"
 #include "llvm/MC/MCInst.h"
 #include "llvm/MC/MCSubtargetInfo.h"
-#include "llvm/Support/raw_ostream.h"
 
 namespace llvm {
 namespace mca {
 
 /// A utility class used to compute instruction encodings for a code region.
 ///
 /// It provides a simple API to compute and return instruction encodings as
 /// strings. Encodings are cached internally for later usage.
 class CodeEmitter {
   const MCSubtargetInfo &STI;
   const MCAsmBackend &MAB;
   const MCCodeEmitter &MCE;
 
   SmallString<256> Code;
-  raw_svector_ostream VecOS;
   ArrayRef<MCInst> Sequence;
 
   // An EncodingInfo pair stores <base, length> information.  Base (i.e. first)
   // is an index to the `Code`. Length (i.e. second) is the encoding size.
   using EncodingInfo = std::pair<unsigned, unsigned>;
 
   // A cache of encodings.
   SmallVector<EncodingInfo, 16> Encodings;
 
   EncodingInfo getOrCreateEncodingInfo(unsigned MCID);
 
 public:
   CodeEmitter(const MCSubtargetInfo &ST, const MCAsmBackend &AB,
               const MCCodeEmitter &CE, ArrayRef<MCInst> S)
-      : STI(ST), MAB(AB), MCE(CE), VecOS(Code), Sequence(S),
-        Encodings(S.size()) {}
+      : STI(ST), MAB(AB), MCE(CE), Sequence(S), Encodings(S.size()) {}
 
   StringRef getEncoding(unsigned MCID) {
     EncodingInfo EI = getOrCreateEncodingInfo(MCID);
     return StringRef(&Code[EI.first], EI.second);
   }
 };
 
 } // namespace mca
 } // namespace llvm
 
 #endif // LLVM_MCA_CODEEMITTER_H

llvm/lib/MC/MCAsmStreamer.cpp

void MCAsmStreamer::emitCGProfileEntry(const MCSymbolRefExpr *From,
   EmitEOL();
 }
 
 void MCAsmStreamer::AddEncodingComment(const MCInst &Inst,
                                        const MCSubtargetInfo &STI) {
   raw_ostream &OS = getCommentOS();
   SmallString<256> Code;
   SmallVector<MCFixup, 4> Fixups;
-  raw_svector_ostream VecOS(Code);
 
   // If we have no code emitter, don't emit code.
   if (!getAssembler().getEmitterPtr())
     return;
 
-  getAssembler().getEmitter().encodeInstruction(Inst, VecOS, Fixups, STI);
+  getAssembler().getEmitter().encodeInstruction(Inst, Code, Fixups, STI);
 
   // If we are showing fixups, create symbolic markers in the encoded
   // representation. We do this by making a per-bit map to the fixup item index,
   // then trying to display it as nicely as possible.
   SmallVector<uint8_t, 64> FixupMap;
   FixupMap.resize(Code.size() * 8);
   for (unsigned i = 0, e = Code.size() * 8; i != e; ++i)
     FixupMap[i] = 0;

llvm/lib/MC/MCAssembler.cpp

bool MCAssembler::relaxInstruction(MCAsmLayout &Layout,
   getBackend().relaxInstruction(Relaxed, *F.getSubtargetInfo());
 
   // Encode the new instruction.
   //
   // FIXME-PERF: If it matters, we could let the target do this. It can
   // probably do so more efficiently in many cases.
   SmallVector<MCFixup, 4> Fixups;
   SmallString<256> Code;
-  raw_svector_ostream VecOS(Code);
-  getEmitter().encodeInstruction(Relaxed, VecOS, Fixups, *F.getSubtargetInfo());
+  getEmitter().encodeInstruction(Relaxed, Code, Fixups, *F.getSubtargetInfo());
 
   // Update the fragment.
   F.setInst(Relaxed);
   F.getContents() = Code;
   F.getFixups() = Fixups;
 
   return true;
 }

llvm/lib/MC/MCCodeEmitter.cpp

 //===- MCCodeEmitter.cpp - Instruction Encoding ---------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #include "llvm/MC/MCCodeEmitter.h"
+#include "llvm/Support/raw_ostream.h"
 
 using namespace llvm;
 
 MCCodeEmitter::MCCodeEmitter() = default;
 
 MCCodeEmitter::~MCCodeEmitter() = default;
+
+void MCCodeEmitter::encodeInstruction(const MCInst &Inst,
+                                      SmallVectorImpl<char> &CB,
+                                      SmallVectorImpl<MCFixup> &Fixups,
+                                      const MCSubtargetInfo &STI) const {
+  raw_svector_ostream OS(CB);
+  encodeInstruction(Inst, OS, Fixups, STI);
+}

llvm/lib/MC/MCELFStreamer.cpp

if (OldSTI && NewSTI && OldSTI != NewSTI)
     report_fatal_error("A Bundle can only have one Subtarget.");
 }
 
 void MCELFStreamer::emitInstToData(const MCInst &Inst,
                                    const MCSubtargetInfo &STI) {
   MCAssembler &Assembler = getAssembler();
   SmallVector<MCFixup, 4> Fixups;
   SmallString<256> Code;
-  raw_svector_ostream VecOS(Code);
-  Assembler.getEmitter().encodeInstruction(Inst, VecOS, Fixups, STI);
+  Assembler.getEmitter().encodeInstruction(Inst, Code, Fixups, STI);
 
   for (auto &Fixup : Fixups)
     fixSymbolsInTLSFixups(Fixup.getValue());
 
   // There are several possibilities here:
   //
   // If bundling is disabled, append the encoded instruction to the current data
   // fragment (or create a new such fragment if the current fragment is not a

llvm/lib/MC/MCMachOStreamer.cpp

 #include "llvm/MC/MCSectionMachO.h"
 #include "llvm/MC/MCSymbol.h"
 #include "llvm/MC/MCSymbolMachO.h"
 #include "llvm/MC/MCValue.h"
 #include "llvm/MC/SectionKind.h"
 #include "llvm/MC/TargetRegistry.h"
 #include "llvm/Support/Casting.h"
 #include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/raw_ostream.h"
 #include <cassert>
 #include <vector>
 
 namespace llvm {
 class MCInst;
 class MCStreamer;
 class MCSubtargetInfo;
 class Triple;

 }
 
 void MCMachOStreamer::emitInstToData(const MCInst &Inst,
                                      const MCSubtargetInfo &STI) {
   MCDataFragment *DF = getOrCreateDataFragment();
 
   SmallVector<MCFixup, 4> Fixups;
   SmallString<256> Code;
-  raw_svector_ostream VecOS(Code);
-  getAssembler().getEmitter().encodeInstruction(Inst, VecOS, Fixups, STI);
+  getAssembler().getEmitter().encodeInstruction(Inst, Code, Fixups, STI);
 
   // Add the fixups and data.
   for (MCFixup &Fixup : Fixups) {
     Fixup.setOffset(Fixup.getOffset() + DF->getContents().size());
     DF->getFixups().push_back(Fixup);
   }
   DF->setHasInstructions(STI);
   DF->getContents().append(Code.begin(), Code.end());

llvm/lib/MC/MCObjectStreamer.cpp

if (getAssembler().getRelaxAll() && getAssembler().isBundlingEnabled())
     llvm_unreachable("All instructions should have already been relaxed");
 
   // Always create a new, separate fragment here, because its size can change
   // during relaxation.
   MCRelaxableFragment *IF = new MCRelaxableFragment(Inst, STI);
   insert(IF);
 
   SmallString<128> Code;
-  raw_svector_ostream VecOS(Code);
-  getAssembler().getEmitter().encodeInstruction(Inst, VecOS, IF->getFixups(),
+  getAssembler().getEmitter().encodeInstruction(Inst, Code, IF->getFixups(),
                                                 STI);
   IF->getContents().append(Code.begin(), Code.end());
 }
 
 #ifndef NDEBUG
 static const char *const BundlingNotImplementedMsg =
   "Aligned bundling is not implemented for this object format";
 #endif

llvm/lib/MC/MCSPIRVStreamer.cpp

 
 using namespace llvm;
 
 void MCSPIRVStreamer::emitInstToData(const MCInst &Inst,
                                      const MCSubtargetInfo &STI) {
   MCAssembler &Assembler = getAssembler();
   SmallVector<MCFixup, 0> Fixups;
   SmallString<256> Code;
-  raw_svector_ostream VecOS(Code);
-  Assembler.getEmitter().encodeInstruction(Inst, VecOS, Fixups, STI);
+  Assembler.getEmitter().encodeInstruction(Inst, Code, Fixups, STI);
 
   // Append the encoded instruction to the current data fragment (or create a
   // new such fragment if the current fragment is not a data fragment).
   MCDataFragment *DF = getOrCreateDataFragment();
 
   DF->setHasInstructions(STI);
   DF->getContents().append(Code.begin(), Code.end());
 }

llvm/lib/MC/MCWasmStreamer.cpp

for (auto &Fixup : F.getFixups())
     fixSymbolsInTLSFixups(Fixup.getValue());
 }
 
 void MCWasmStreamer::emitInstToData(const MCInst &Inst,
                                     const MCSubtargetInfo &STI) {
   MCAssembler &Assembler = getAssembler();
   SmallVector<MCFixup, 4> Fixups;
   SmallString<256> Code;
-  raw_svector_ostream VecOS(Code);
-  Assembler.getEmitter().encodeInstruction(Inst, VecOS, Fixups, STI);
+  Assembler.getEmitter().encodeInstruction(Inst, Code, Fixups, STI);
 
   for (auto &Fixup : Fixups)
     fixSymbolsInTLSFixups(Fixup.getValue());
 
   // Append the encoded instruction to the current data fragment (or create a
   // new such fragment if the current fragment is not a data fragment).
   MCDataFragment *DF = getOrCreateDataFragment();
 

llvm/lib/MC/MCWinCOFFStreamer.cpp

: MCObjectStreamer(Context, std::move(MAB), std::move(OW), std::move(CE)),
       CurSymbol(nullptr) {}
 
 void MCWinCOFFStreamer::emitInstToData(const MCInst &Inst,
                                        const MCSubtargetInfo &STI) {
   MCDataFragment *DF = getOrCreateDataFragment();
 
   SmallVector<MCFixup, 4> Fixups;
   SmallString<256> Code;
-  raw_svector_ostream VecOS(Code);
-  getAssembler().getEmitter().encodeInstruction(Inst, VecOS, Fixups, STI);
+  getAssembler().getEmitter().encodeInstruction(Inst, Code, Fixups, STI);
 
   // Add the fixups and data.
   for (unsigned i = 0, e = Fixups.size(); i != e; ++i) {
     Fixups[i].setOffset(Fixups[i].getOffset() + DF->getContents().size());
     DF->getFixups().push_back(Fixups[i]);
   }
   DF->setHasInstructions(STI);
   DF->getContents().append(Code.begin(), Code.end());

llvm/lib/MC/MCXCOFFStreamer.cpp

void MCXCOFFStreamer::emitZerofill(MCSection *Section, MCSymbol *Symbol,
   report_fatal_error("Zero fill not implemented for XCOFF.");
 }
 
 void MCXCOFFStreamer::emitInstToData(const MCInst &Inst,
                                      const MCSubtargetInfo &STI) {
   MCAssembler &Assembler = getAssembler();
   SmallVector<MCFixup, 4> Fixups;
   SmallString<256> Code;
-  raw_svector_ostream VecOS(Code);
-  Assembler.getEmitter().encodeInstruction(Inst, VecOS, Fixups, STI);
+  Assembler.getEmitter().encodeInstruction(Inst, Code, Fixups, STI);
 
   // Add the fixups and data.
   MCDataFragment *DF = getOrCreateDataFragment(&STI);
   const size_t ContentsSize = DF->getContents().size();
   auto &DataFragmentFixups = DF->getFixups();
   for (auto &Fixup : Fixups) {
     Fixup.setOffset(Fixup.getOffset() + ContentsSize);
     DataFragmentFixups.push_back(Fixup);

llvm/lib/MCA/CodeEmitter.cpp

CodeEmitter::EncodingInfo CodeEmitter::getOrCreateEncodingInfo(unsigned MCID) {
 
   SmallVector<llvm::MCFixup, 2> Fixups;
   const MCInst &Inst = Sequence[MCID];
   MCInst Relaxed(Sequence[MCID]);
   if (MAB.mayNeedRelaxation(Inst, STI))
     MAB.relaxInstruction(Relaxed, STI);
 
   EI.first = Code.size();
-  MCE.encodeInstruction(Relaxed, VecOS, Fixups, STI);
+  MCE.encodeInstruction(Relaxed, Code, Fixups, STI);
   EI.second = Code.size() - EI.first;
   return EI;
 }
 
 } // namespace mca
 } // namespace llvm

llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp

#ifdef EXPENSIVE_CHECKS
     // some negative lit tests that depend on being able to continue through
     // here even when pseudo instructions haven't been lowered.
     //
     // We also overestimate branch sizes with the offset bug.
     if (!MI->isPseudo() && STI.isCPUStringValid(STI.getCPU()) &&
         (!STI.hasOffset3fBug() || !MI->isBranch())) {
       SmallVector<MCFixup, 4> Fixups;
       SmallVector<char, 16> CodeBytes;
-      raw_svector_ostream CodeStream(CodeBytes);
 
       std::unique_ptr<MCCodeEmitter> InstEmitter(createSIMCCodeEmitter(
           *STI.getInstrInfo(), OutContext));
-      InstEmitter->encodeInstruction(TmpInst, CodeStream, Fixups, STI);
+      InstEmitter->encodeInstruction(TmpInst, CodeBytes, Fixups, STI);
 
       assert(CodeBytes.size() == STI.getInstrInfo()->getInstSizeInBytes(*MI));
     }
 #endif
 
     if (DumpCodeInstEmitter) {
       // Disassemble instruction/operands to text
       DisasmLines.resize(DisasmLines.size() + 1);
       std::string &DisasmLine = DisasmLines.back();
       raw_string_ostream DisasmStream(DisasmLine);
 
       AMDGPUInstPrinter InstPrinter(*TM.getMCAsmInfo(), *STI.getInstrInfo(),
                                     *STI.getRegisterInfo());
       InstPrinter.printInst(&TmpInst, 0, StringRef(), STI, DisasmStream);
 
       // Disassemble instruction/operands to hex representation.
       SmallVector<MCFixup, 4> Fixups;
       SmallVector<char, 16> CodeBytes;
-      raw_svector_ostream CodeStream(CodeBytes);
 
       DumpCodeInstEmitter->encodeInstruction(
-          TmpInst, CodeStream, Fixups, MF->getSubtarget<MCSubtargetInfo>());
+          TmpInst, CodeBytes, Fixups, MF->getSubtarget<MCSubtargetInfo>());
       HexLines.resize(HexLines.size() + 1);
       std::string &HexLine = HexLines.back();
       raw_string_ostream HexStream(HexLine);
 
       for (size_t i = 0; i < CodeBytes.size(); i += 4) {
         unsigned int CodeDWord = *(unsigned int *)&CodeBytes[i];
         HexStream << format("%s%08X", (i > 0 ? " " : ""), CodeDWord);
       }
 
       DisasmStream.flush();
       DisasmLineMaxLen = std::max(DisasmLineMaxLen, DisasmLine.size());
     }
   }
 }

llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp

class HexagonAsmBackend : public MCAsmBackend {
   std::unique_ptr <MCInst *> RelaxTarget;
   MCInst * Extender;
   unsigned MaxPacketSize;
 
   void ReplaceInstruction(MCCodeEmitter &E, MCRelaxableFragment &RF,
                           MCInst &HMB) const {
     SmallVector<MCFixup, 4> Fixups;
     SmallString<256> Code;
-    raw_svector_ostream VecOS(Code);
-    E.encodeInstruction(HMB, VecOS, Fixups, *RF.getSubtargetInfo());
+    E.encodeInstruction(HMB, Code, Fixups, *RF.getSubtargetInfo());
 
     // Update the fragment.
     RF.setInst(HMB);
     RF.getContents() = Code;
     RF.getFixups() = Fixups;
   }
 
 public:

llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp

if (isFullyRelaxed(RF))
     // encoding size without impacting performance.
     return false;
 
   MCInst Relaxed = RF.getInst();
   relaxInstruction(Relaxed, *RF.getSubtargetInfo());
 
   SmallVector<MCFixup, 4> Fixups;
   SmallString<15> Code;
-  raw_svector_ostream VecOS(Code);
-  Emitter.encodeInstruction(Relaxed, VecOS, Fixups, *RF.getSubtargetInfo());
+  Emitter.encodeInstruction(Relaxed, Code, Fixups, *RF.getSubtargetInfo());
   const unsigned OldSize = RF.getContents().size();
   const unsigned NewSize = Code.size();
   assert(NewSize >= OldSize && "size decrease during relaxation?");
   unsigned Delta = NewSize - OldSize;
   if (Delta > RemainingSize)
     return false;
   RF.setInst(Relaxed);
   RF.getContents() = Code;

llvm/lib/Target/X86/X86MCInstLower.cpp

static void emitX86Nops(MCStreamer &OS, unsigned NumBytes,
                         const X86Subtarget *Subtarget);
 
 void X86AsmPrinter::StackMapShadowTracker::count(MCInst &Inst,
                                                  const MCSubtargetInfo &STI,
                                                  MCCodeEmitter *CodeEmitter) {
   if (InShadow) {
     SmallString<256> Code;
     SmallVector<MCFixup, 4> Fixups;
-    raw_svector_ostream VecOS(Code);
-    CodeEmitter->encodeInstruction(Inst, VecOS, Fixups, STI);
+    CodeEmitter->encodeInstruction(Inst, Code, Fixups, STI);
     CurrentShadowSize += Code.size();
     if (CurrentShadowSize >= RequiredShadowSize)
       InShadow = false; // The shadow is big enough. Stop counting.
   }
 }
 
 void X86AsmPrinter::StackMapShadowTracker::emitShadowPadding(
     MCStreamer &OutStreamer, const MCSubtargetInfo &STI) {
void X86AsmPrinter::LowerPATCHABLE_OP(const MachineInstr &MI,
   MCI.setOpcode(Opcode);
   for (auto &MO : drop_begin(MI.operands(), 2))
     if (auto MaybeOperand = MCIL.LowerMachineOperand(&MI, MO))
       MCI.addOperand(*MaybeOperand);
 
   SmallString<256> Code;
   if (!EmptyInst) {
     SmallVector<MCFixup, 4> Fixups;
-    raw_svector_ostream VecOS(Code);
-    CodeEmitter->encodeInstruction(MCI, VecOS, Fixups, getSubtargetInfo());
+    CodeEmitter->encodeInstruction(MCI, Code, Fixups, getSubtargetInfo());
   }
 
   if (Code.size() < MinSize) {
     if (MinSize == 2 && Subtarget->is32Bit() &&
         Subtarget->isTargetWindowsMSVC() &&
         (Subtarget->getCPU().empty() || Subtarget->getCPU() == "pentium3")) {
       // For compatibility reasons, when targetting MSVC, is is important to
       // generate a 'legacy' NOP in the form of a 8B FF MOV EDI, EDI. Some tools

llvm/tools/llvm-exegesis/lib/LlvmState.cpp

 //===-- LlvmState.cpp -------------------------------------------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #include "LlvmState.h"
 #include "Target.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/MC/MCCodeEmitter.h"
 #include "llvm/MC/MCContext.h"
 #include "llvm/MC/MCFixup.h"
 #include "llvm/MC/MCObjectFileInfo.h"
 #include "llvm/MC/TargetRegistry.h"
-#include "llvm/Support/raw_ostream.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/TargetParser/Host.h"
 
 namespace llvm {
 namespace exegesis {
 
 Expected<LLVMState> LLVMState::Create(std::string TripleName,
MCContext Context(TheTargetMachine->getTargetTriple(),
                     TheTargetMachine->getMCAsmInfo(),
                     TheTargetMachine->getMCRegisterInfo(),
                     TheTargetMachine->getMCSubtargetInfo());
   std::unique_ptr<const MCCodeEmitter> CodeEmitter(
       TheTargetMachine->getTarget().createMCCodeEmitter(
           *TheTargetMachine->getMCInstrInfo(), Context));
   assert(CodeEmitter && "unable to create code emitter");
   SmallVector<char, 16> Tmp;
-  raw_svector_ostream OS(Tmp);
   SmallVector<MCFixup, 4> Fixups;
-  CodeEmitter->encodeInstruction(Inst, OS, Fixups,
+  CodeEmitter->encodeInstruction(Inst, Tmp, Fixups,
                                  *TheTargetMachine->getMCSubtargetInfo());
   return Tmp.size() > 0;
 }
 
 } // namespace exegesis
 } // namespace llvm