[SDAG] try to convert bit set/clear to signbit test when trunc is free

[spatel]

Summary

This was noted as a regression in the post-commit feedback for D112634 (where we canonicalized IR differently).

For x86, this saves a few instruction bytes. AArch64 seems neutral.

[lebedev.ri]

Looks reasonable to me.

[RKSimon]

What about if we limited this to just feeding select / brcond ?

llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

3747

Move hasOneUse() to end of the if() condition as its heaviest test?

[MatzeB]

Oh I also had started working on the same thing (should have been more clear that about that when talking in the other diff).

Anyway you went for the same solution (and managed to do in a couple fewer lines than me), thanks for working on it!

Added a comment about interesting effects in some tests, either way LGTM.

llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

3749–3750

May want to check if NarrowVT is actually narrowed than the original type? (see test below).

llvm/test/CodeGen/X86/is_fpclass-fp80.ll

65–66 ↗

(On Diff #480206)

I wonder if this is better or worse than before...

[spatel]

llvm/test/CodeGen/X86/is_fpclass-fp80.ll

65–66 ↗

(On Diff #480206)

I looked closer at the debug spew on this test. It is not dependent on the fact that the top bit is masked (and so the trunc disappears). Before legalization, we actually are shrinking from an i80 to i64.

So we can make this patch more focused by predicating on a legal source type, and that avoids the regression (I count this as a small regression because it needs an extra instruction even if it's likely cheap).

The pattern where the top bit is masked seems to be transformed independently of this patch for x86 at least, so we might want a follow-up patch to deal with that pattern specifically.

[spatel]

Patch updated:

1. Added source type legality check to avoid possible regression on x86 test; this also inhibits what looked like a small win for RISCV.
2. Added TODO comment about easing that constraint.
3. Moved hasOneUse() check to end of predicates.

[spatel]

In D139363#3972195, @RKSimon wrote:

What about if we limited this to just feeding select / brcond ?

There's a maze of potential setcc and shift/logic folds, but I think this is the right match (more limited for now at least by the legality checks).

It should be better (less likely to miss folds) to adjust the larger pattern matches that reduce and/or of setcc via shifts/masks to recognize this form if needed.

[RKSimon]

LGTM - cheers

llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

if (Cond == ISD::SETNE && isNullConstant(N1) &&
       (getBooleanContents(OpVT) == TargetLowering::UndefinedBooleanContent ||
        getBooleanContents(OpVT) == TargetLowering::ZeroOrOneBooleanContent)) {
     unsigned NumEltBits = OpVT.getScalarSizeInBits();
     APInt UpperBits = APInt::getHighBitsSet(NumEltBits, NumEltBits - 1);
     if (DAG.MaskedValueIsZero(N0, UpperBits))
       return DAG.getBoolExtOrTrunc(N0, DL, VT, OpVT);
   }
 
+  // Try to eliminate a power-of-2 mask constant by converting to a signbit
+  // test in a narrow type that we can truncate to with no cost. Examples:
+  // (i32 X & 32768) == 0 --> (trunc X to i16) >= 0
+  // (i32 X & 32768) != 0 --> (trunc X to i16) < 0
+  // TODO: This conservatively checks for type legality on the source and
+  //       destination types. That may inhibit optimizations, but it also
+  //       allows setcc->shift transforms that may be more beneficial.
+  auto *AndC = dyn_cast<ConstantSDNode>(N0.getOperand(1));
+  if (AndC && isNullConstant(N1) && AndC->getAPIntValue().isPowerOf2() &&
+      isTypeLegal(OpVT) && N0.hasOneUse()) {
+    EVT NarrowVT = EVT::getIntegerVT(*DAG.getContext(),
+                                     AndC->getAPIntValue().getActiveBits());
+    if (isTruncateFree(OpVT, NarrowVT) && isTypeLegal(NarrowVT)) {
+      SDValue Trunc = DAG.getZExtOrTrunc(N0.getOperand(0), DL, NarrowVT);
+      SDValue Zero = DAG.getConstant(0, DL, NarrowVT);
+      return DAG.getSetCC(DL, VT, Trunc, Zero,
+                          Cond == ISD::SETEQ ? ISD::SETGE : ISD::SETLT);
+    }
+  }
+
   // Match these patterns in any of their permutations:
   // (X & Y) == Y
   // (X & Y) != Y
   SDValue X, Y;
   if (N0.getOperand(0) == N1) {
     X = N0.getOperand(1);
     Y = N0.getOperand(0);
   } else if (N0.getOperand(1) == N1) {

llvm/test/CodeGen/AArch64/signbit-test.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s
 
 define i64 @test_clear_mask_i64_i32(i64 %x) nounwind {
 ; CHECK-LABEL: test_clear_mask_i64_i32:
 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    mov w8, #42
-; CHECK-NEXT:    tst x0, #0x80000000
-; CHECK-NEXT:    csel x0, x8, x0, eq
+; CHECK-NEXT:    cmp w0, #0
+; CHECK-NEXT:    csel x0, x8, x0, ge
 ; CHECK-NEXT:    ret
 entry:
   %a = and i64 %x, 2147483648
   %r = icmp eq i64 %a, 0
   br i1 %r, label %t, label %f
 t:
   br label %f
 f:

llvm/test/CodeGen/X86/btq.ll

 
 if.end:
   ret void
 }
 
 define void @test2(i64 %foo) nounwind {
 ; CHECK-LABEL: test2:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    testl $-2147483648, %edi # imm = 0x80000000
-; CHECK-NEXT:    jne .LBB1_2
+; CHECK-NEXT:    testl %edi, %edi
+; CHECK-NEXT:    js .LBB1_2
 ; CHECK-NEXT:  # %bb.1: # %if.end
 ; CHECK-NEXT:    retq
 ; CHECK-NEXT:  .LBB1_2: # %if.then
 ; CHECK-NEXT:    jmp bar # TAILCALL
   %and = and i64 %foo, 2147483648
   %tobool = icmp eq i64 %and, 0
   br i1 %tobool, label %if.end, label %if.then
 
 if.then:
   tail call void @bar() nounwind
   br label %if.end
 
 if.end:
   ret void
 }

llvm/test/CodeGen/X86/masked_compressstore.ll

 ; SSE-NEXT:    jne LBB1_9
 ; SSE-NEXT:  LBB1_10: ## %else11
 ; SSE-NEXT:    testb $32, %al
 ; SSE-NEXT:    jne LBB1_11
 ; SSE-NEXT:  LBB1_12: ## %else14
 ; SSE-NEXT:    testb $64, %al
 ; SSE-NEXT:    jne LBB1_13
 ; SSE-NEXT:  LBB1_14: ## %else17
-; SSE-NEXT:    testb $-128, %al
-; SSE-NEXT:    jne LBB1_15
+; SSE-NEXT:    testb %al, %al
+; SSE-NEXT:    js LBB1_15
 ; SSE-NEXT:  LBB1_16: ## %else20
 ; SSE-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE-NEXT:    jne LBB1_17
 ; SSE-NEXT:  LBB1_18: ## %else23
 ; SSE-NEXT:    testl $512, %eax ## imm = 0x200
 ; SSE-NEXT:    jne LBB1_19
 ; SSE-NEXT:  LBB1_20: ## %else26
 ; SSE-NEXT:    testl $1024, %eax ## imm = 0x400

 ; SSE-NEXT:  LBB1_11: ## %cond.store13
 ; SSE-NEXT:    movhps %xmm2, (%rdi)
 ; SSE-NEXT:    addq $8, %rdi
 ; SSE-NEXT:    testb $64, %al
 ; SSE-NEXT:    je LBB1_14
 ; SSE-NEXT:  LBB1_13: ## %cond.store16
 ; SSE-NEXT:    movlps %xmm3, (%rdi)
 ; SSE-NEXT:    addq $8, %rdi
-; SSE-NEXT:    testb $-128, %al
-; SSE-NEXT:    je LBB1_16
+; SSE-NEXT:    testb %al, %al
+; SSE-NEXT:    jns LBB1_16
 ; SSE-NEXT:  LBB1_15: ## %cond.store19
 ; SSE-NEXT:    movhps %xmm3, (%rdi)
 ; SSE-NEXT:    addq $8, %rdi
 ; SSE-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE-NEXT:    je LBB1_18
 ; SSE-NEXT:  LBB1_17: ## %cond.store22
 ; SSE-NEXT:    movlps %xmm4, (%rdi)
 ; SSE-NEXT:    addq $8, %rdi

 ; AVX1OR2-NEXT:  LBB1_11: ## %cond.store13
 ; AVX1OR2-NEXT:    vmovhps %xmm1, (%rdi)
 ; AVX1OR2-NEXT:    addq $8, %rdi
 ; AVX1OR2-NEXT:  LBB1_12: ## %else14
 ; AVX1OR2-NEXT:    testb $64, %al
 ; AVX1OR2-NEXT:    vextractf128 $1, %ymm1, %xmm0
 ; AVX1OR2-NEXT:    jne LBB1_13
 ; AVX1OR2-NEXT:  ## %bb.14: ## %else17
-; AVX1OR2-NEXT:    testb $-128, %al
-; AVX1OR2-NEXT:    jne LBB1_15
+; AVX1OR2-NEXT:    testb %al, %al
+; AVX1OR2-NEXT:    js LBB1_15
 ; AVX1OR2-NEXT:  LBB1_16: ## %else20
 ; AVX1OR2-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX1OR2-NEXT:    jne LBB1_17
 ; AVX1OR2-NEXT:  LBB1_18: ## %else23
 ; AVX1OR2-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX1OR2-NEXT:    je LBB1_20
 ; AVX1OR2-NEXT:  LBB1_19: ## %cond.store25
 ; AVX1OR2-NEXT:    vmovhps %xmm2, (%rdi)

 ; AVX1OR2-NEXT:    vmovlps %xmm1, (%rdi)
 ; AVX1OR2-NEXT:    addq $8, %rdi
 ; AVX1OR2-NEXT:    testb $32, %al
 ; AVX1OR2-NEXT:    jne LBB1_11
 ; AVX1OR2-NEXT:    jmp LBB1_12
 ; AVX1OR2-NEXT:  LBB1_13: ## %cond.store16
 ; AVX1OR2-NEXT:    vmovlps %xmm0, (%rdi)
 ; AVX1OR2-NEXT:    addq $8, %rdi
-; AVX1OR2-NEXT:    testb $-128, %al
-; AVX1OR2-NEXT:    je LBB1_16
+; AVX1OR2-NEXT:    testb %al, %al
+; AVX1OR2-NEXT:    jns LBB1_16
 ; AVX1OR2-NEXT:  LBB1_15: ## %cond.store19
 ; AVX1OR2-NEXT:    vmovhps %xmm0, (%rdi)
 ; AVX1OR2-NEXT:    addq $8, %rdi
 ; AVX1OR2-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX1OR2-NEXT:    je LBB1_18
 ; AVX1OR2-NEXT:  LBB1_17: ## %cond.store22
 ; AVX1OR2-NEXT:    vmovlps %xmm2, (%rdi)
 ; AVX1OR2-NEXT:    addq $8, %rdi

 ; SSE2-NEXT:    jne LBB6_9
 ; SSE2-NEXT:  LBB6_10: ## %else11
 ; SSE2-NEXT:    testb $32, %al
 ; SSE2-NEXT:    jne LBB6_11
 ; SSE2-NEXT:  LBB6_12: ## %else14
 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    jne LBB6_13
 ; SSE2-NEXT:  LBB6_14: ## %else17
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    jne LBB6_15
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    js LBB6_15
 ; SSE2-NEXT:  LBB6_16: ## %else20
 ; SSE2-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE2-NEXT:    jne LBB6_17
 ; SSE2-NEXT:  LBB6_18: ## %else23
 ; SSE2-NEXT:    testl $512, %eax ## imm = 0x200
 ; SSE2-NEXT:    jne LBB6_19
 ; SSE2-NEXT:  LBB6_20: ## %else26
 ; SSE2-NEXT:    testl $1024, %eax ## imm = 0x400
 ; SSE2-NEXT:    jne LBB6_21
 ; SSE2-NEXT:  LBB6_22: ## %else29
 ; SSE2-NEXT:    testl $2048, %eax ## imm = 0x800
 ; SSE2-NEXT:    jne LBB6_23
 ; SSE2-NEXT:  LBB6_24: ## %else32
 ; SSE2-NEXT:    testl $4096, %eax ## imm = 0x1000
 ; SSE2-NEXT:    jne LBB6_25
 ; SSE2-NEXT:  LBB6_26: ## %else35
 ; SSE2-NEXT:    testl $8192, %eax ## imm = 0x2000
 ; SSE2-NEXT:    jne LBB6_27
 ; SSE2-NEXT:  LBB6_28: ## %else38
 ; SSE2-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; SSE2-NEXT:    jne LBB6_29
 ; SSE2-NEXT:  LBB6_30: ## %else41
-; SSE2-NEXT:    testl $32768, %eax ## imm = 0x8000
-; SSE2-NEXT:    jne LBB6_31
+; SSE2-NEXT:    testw %ax, %ax
+; SSE2-NEXT:    js LBB6_31
 ; SSE2-NEXT:  LBB6_32: ## %else44
 ; SSE2-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; SSE2-NEXT:    jne LBB6_33
 ; SSE2-NEXT:  LBB6_34: ## %else47
 ; SSE2-NEXT:    testl $131072, %eax ## imm = 0x20000
 ; SSE2-NEXT:    jne LBB6_35
 ; SSE2-NEXT:  LBB6_36: ## %else50
 ; SSE2-NEXT:    testl $262144, %eax ## imm = 0x40000

 ; SSE2-NEXT:    addq $4, %rdi
 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    je LBB6_14
 ; SSE2-NEXT:  LBB6_13: ## %cond.store16
 ; SSE2-NEXT:    movaps %xmm1, %xmm0
 ; SSE2-NEXT:    unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]
 ; SSE2-NEXT:    movss %xmm0, (%rdi)
 ; SSE2-NEXT:    addq $4, %rdi
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    je LBB6_16
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    jns LBB6_16
 ; SSE2-NEXT:  LBB6_15: ## %cond.store19
 ; SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]
 ; SSE2-NEXT:    movss %xmm1, (%rdi)
 ; SSE2-NEXT:    addq $4, %rdi
 ; SSE2-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE2-NEXT:    je LBB6_18
 ; SSE2-NEXT:  LBB6_17: ## %cond.store22
 ; SSE2-NEXT:    movss %xmm2, (%rdi)

 ; SSE2-NEXT:    addq $4, %rdi
 ; SSE2-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; SSE2-NEXT:    je LBB6_30
 ; SSE2-NEXT:  LBB6_29: ## %cond.store40
 ; SSE2-NEXT:    movaps %xmm3, %xmm0
 ; SSE2-NEXT:    unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm3[1]
 ; SSE2-NEXT:    movss %xmm0, (%rdi)
 ; SSE2-NEXT:    addq $4, %rdi
-; SSE2-NEXT:    testl $32768, %eax ## imm = 0x8000
-; SSE2-NEXT:    je LBB6_32
+; SSE2-NEXT:    testw %ax, %ax
+; SSE2-NEXT:    jns LBB6_32
 ; SSE2-NEXT:  LBB6_31: ## %cond.store43
 ; SSE2-NEXT:    shufps {{.*#+}} xmm3 = xmm3[3,3,3,3]
 ; SSE2-NEXT:    movss %xmm3, (%rdi)
 ; SSE2-NEXT:    addq $4, %rdi
 ; SSE2-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; SSE2-NEXT:    je LBB6_34
 ; SSE2-NEXT:  LBB6_33: ## %cond.store46
 ; SSE2-NEXT:    movss %xmm4, (%rdi)

 ; SSE42-NEXT:    jne LBB6_9
 ; SSE42-NEXT:  LBB6_10: ## %else11
 ; SSE42-NEXT:    testb $32, %al
 ; SSE42-NEXT:    jne LBB6_11
 ; SSE42-NEXT:  LBB6_12: ## %else14
 ; SSE42-NEXT:    testb $64, %al
 ; SSE42-NEXT:    jne LBB6_13
 ; SSE42-NEXT:  LBB6_14: ## %else17
-; SSE42-NEXT:    testb $-128, %al
-; SSE42-NEXT:    jne LBB6_15
+; SSE42-NEXT:    testb %al, %al
+; SSE42-NEXT:    js LBB6_15
 ; SSE42-NEXT:  LBB6_16: ## %else20
 ; SSE42-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE42-NEXT:    jne LBB6_17
 ; SSE42-NEXT:  LBB6_18: ## %else23
 ; SSE42-NEXT:    testl $512, %eax ## imm = 0x200
 ; SSE42-NEXT:    jne LBB6_19
 ; SSE42-NEXT:  LBB6_20: ## %else26
 ; SSE42-NEXT:    testl $1024, %eax ## imm = 0x400
 ; SSE42-NEXT:    jne LBB6_21
 ; SSE42-NEXT:  LBB6_22: ## %else29
 ; SSE42-NEXT:    testl $2048, %eax ## imm = 0x800
 ; SSE42-NEXT:    jne LBB6_23
 ; SSE42-NEXT:  LBB6_24: ## %else32
 ; SSE42-NEXT:    testl $4096, %eax ## imm = 0x1000
 ; SSE42-NEXT:    jne LBB6_25
 ; SSE42-NEXT:  LBB6_26: ## %else35
 ; SSE42-NEXT:    testl $8192, %eax ## imm = 0x2000
 ; SSE42-NEXT:    jne LBB6_27
 ; SSE42-NEXT:  LBB6_28: ## %else38
 ; SSE42-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; SSE42-NEXT:    jne LBB6_29
 ; SSE42-NEXT:  LBB6_30: ## %else41
-; SSE42-NEXT:    testl $32768, %eax ## imm = 0x8000
-; SSE42-NEXT:    jne LBB6_31
+; SSE42-NEXT:    testw %ax, %ax
+; SSE42-NEXT:    js LBB6_31
 ; SSE42-NEXT:  LBB6_32: ## %else44
 ; SSE42-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; SSE42-NEXT:    jne LBB6_33
 ; SSE42-NEXT:  LBB6_34: ## %else47
 ; SSE42-NEXT:    testl $131072, %eax ## imm = 0x20000
 ; SSE42-NEXT:    jne LBB6_35
 ; SSE42-NEXT:  LBB6_36: ## %else50
 ; SSE42-NEXT:    testl $262144, %eax ## imm = 0x40000

 ; SSE42-NEXT:  LBB6_11: ## %cond.store13
 ; SSE42-NEXT:    extractps $1, %xmm1, (%rdi)
 ; SSE42-NEXT:    addq $4, %rdi
 ; SSE42-NEXT:    testb $64, %al
 ; SSE42-NEXT:    je LBB6_14
 ; SSE42-NEXT:  LBB6_13: ## %cond.store16
 ; SSE42-NEXT:    extractps $2, %xmm1, (%rdi)
 ; SSE42-NEXT:    addq $4, %rdi
-; SSE42-NEXT:    testb $-128, %al
-; SSE42-NEXT:    je LBB6_16
+; SSE42-NEXT:    testb %al, %al
+; SSE42-NEXT:    jns LBB6_16
 ; SSE42-NEXT:  LBB6_15: ## %cond.store19
 ; SSE42-NEXT:    extractps $3, %xmm1, (%rdi)
 ; SSE42-NEXT:    addq $4, %rdi
 ; SSE42-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE42-NEXT:    je LBB6_18
 ; SSE42-NEXT:  LBB6_17: ## %cond.store22
 ; SSE42-NEXT:    movss %xmm2, (%rdi)
 ; SSE42-NEXT:    addq $4, %rdi

 ; SSE42-NEXT:  LBB6_27: ## %cond.store37
 ; SSE42-NEXT:    extractps $1, %xmm3, (%rdi)
 ; SSE42-NEXT:    addq $4, %rdi
 ; SSE42-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; SSE42-NEXT:    je LBB6_30
 ; SSE42-NEXT:  LBB6_29: ## %cond.store40
 ; SSE42-NEXT:    extractps $2, %xmm3, (%rdi)
 ; SSE42-NEXT:    addq $4, %rdi
-; SSE42-NEXT:    testl $32768, %eax ## imm = 0x8000
-; SSE42-NEXT:    je LBB6_32
+; SSE42-NEXT:    testw %ax, %ax
+; SSE42-NEXT:    jns LBB6_32
 ; SSE42-NEXT:  LBB6_31: ## %cond.store43
 ; SSE42-NEXT:    extractps $3, %xmm3, (%rdi)
 ; SSE42-NEXT:    addq $4, %rdi
 ; SSE42-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; SSE42-NEXT:    je LBB6_34
 ; SSE42-NEXT:  LBB6_33: ## %cond.store46
 ; SSE42-NEXT:    movss %xmm4, (%rdi)
 ; SSE42-NEXT:    addq $4, %rdi

 ; AVX1-NEXT:    jne LBB6_9
 ; AVX1-NEXT:  ## %bb.10: ## %else11
 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    jne LBB6_11
 ; AVX1-NEXT:  LBB6_12: ## %else14
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    jne LBB6_13
 ; AVX1-NEXT:  LBB6_14: ## %else17
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    jne LBB6_15
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    js LBB6_15
 ; AVX1-NEXT:  LBB6_16: ## %else20
 ; AVX1-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX1-NEXT:    jne LBB6_17
 ; AVX1-NEXT:  LBB6_18: ## %else23
 ; AVX1-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX1-NEXT:    jne LBB6_19
 ; AVX1-NEXT:  LBB6_20: ## %else26
 ; AVX1-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX1-NEXT:    jne LBB6_25
 ; AVX1-NEXT:  ## %bb.26: ## %else35
 ; AVX1-NEXT:    testl $8192, %eax ## imm = 0x2000
 ; AVX1-NEXT:    jne LBB6_27
 ; AVX1-NEXT:  LBB6_28: ## %else38
 ; AVX1-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; AVX1-NEXT:    jne LBB6_29
 ; AVX1-NEXT:  LBB6_30: ## %else41
-; AVX1-NEXT:    testl $32768, %eax ## imm = 0x8000
-; AVX1-NEXT:    jne LBB6_31
+; AVX1-NEXT:    testw %ax, %ax
+; AVX1-NEXT:    js LBB6_31
 ; AVX1-NEXT:  LBB6_32: ## %else44
 ; AVX1-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; AVX1-NEXT:    jne LBB6_33
 ; AVX1-NEXT:  LBB6_34: ## %else47
 ; AVX1-NEXT:    testl $131072, %eax ## imm = 0x20000
 ; AVX1-NEXT:    jne LBB6_35
 ; AVX1-NEXT:  LBB6_36: ## %else50
 ; AVX1-NEXT:    testl $262144, %eax ## imm = 0x40000

 ; AVX1-NEXT:  LBB6_11: ## %cond.store13
 ; AVX1-NEXT:    vextractps $1, %xmm0, (%rdi)
 ; AVX1-NEXT:    addq $4, %rdi
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    je LBB6_14
 ; AVX1-NEXT:  LBB6_13: ## %cond.store16
 ; AVX1-NEXT:    vextractps $2, %xmm0, (%rdi)
 ; AVX1-NEXT:    addq $4, %rdi
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    je LBB6_16
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    jns LBB6_16
 ; AVX1-NEXT:  LBB6_15: ## %cond.store19
 ; AVX1-NEXT:    vextractps $3, %xmm0, (%rdi)
 ; AVX1-NEXT:    addq $4, %rdi
 ; AVX1-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX1-NEXT:    je LBB6_18
 ; AVX1-NEXT:  LBB6_17: ## %cond.store22
 ; AVX1-NEXT:    vmovss %xmm1, (%rdi)
 ; AVX1-NEXT:    addq $4, %rdi

 ; AVX1-NEXT:  LBB6_27: ## %cond.store37
 ; AVX1-NEXT:    vextractps $1, %xmm0, (%rdi)
 ; AVX1-NEXT:    addq $4, %rdi
 ; AVX1-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; AVX1-NEXT:    je LBB6_30
 ; AVX1-NEXT:  LBB6_29: ## %cond.store40
 ; AVX1-NEXT:    vextractps $2, %xmm0, (%rdi)
 ; AVX1-NEXT:    addq $4, %rdi
-; AVX1-NEXT:    testl $32768, %eax ## imm = 0x8000
-; AVX1-NEXT:    je LBB6_32
+; AVX1-NEXT:    testw %ax, %ax
+; AVX1-NEXT:    jns LBB6_32
 ; AVX1-NEXT:  LBB6_31: ## %cond.store43
 ; AVX1-NEXT:    vextractps $3, %xmm0, (%rdi)
 ; AVX1-NEXT:    addq $4, %rdi
 ; AVX1-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; AVX1-NEXT:    je LBB6_34
 ; AVX1-NEXT:  LBB6_33: ## %cond.store46
 ; AVX1-NEXT:    vmovss %xmm2, (%rdi)
 ; AVX1-NEXT:    addq $4, %rdi

 ; AVX2-NEXT:    jne LBB6_9
 ; AVX2-NEXT:  ## %bb.10: ## %else11
 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    jne LBB6_11
 ; AVX2-NEXT:  LBB6_12: ## %else14
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    jne LBB6_13
 ; AVX2-NEXT:  LBB6_14: ## %else17
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    jne LBB6_15
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    js LBB6_15
 ; AVX2-NEXT:  LBB6_16: ## %else20
 ; AVX2-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX2-NEXT:    jne LBB6_17
 ; AVX2-NEXT:  LBB6_18: ## %else23
 ; AVX2-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX2-NEXT:    jne LBB6_19
 ; AVX2-NEXT:  LBB6_20: ## %else26
 ; AVX2-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX2-NEXT:    jne LBB6_25
 ; AVX2-NEXT:  ## %bb.26: ## %else35
 ; AVX2-NEXT:    testl $8192, %eax ## imm = 0x2000
 ; AVX2-NEXT:    jne LBB6_27
 ; AVX2-NEXT:  LBB6_28: ## %else38
 ; AVX2-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; AVX2-NEXT:    jne LBB6_29
 ; AVX2-NEXT:  LBB6_30: ## %else41
-; AVX2-NEXT:    testl $32768, %eax ## imm = 0x8000
-; AVX2-NEXT:    jne LBB6_31
+; AVX2-NEXT:    testw %ax, %ax
+; AVX2-NEXT:    js LBB6_31
 ; AVX2-NEXT:  LBB6_32: ## %else44
 ; AVX2-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; AVX2-NEXT:    jne LBB6_33
 ; AVX2-NEXT:  LBB6_34: ## %else47
 ; AVX2-NEXT:    testl $131072, %eax ## imm = 0x20000
 ; AVX2-NEXT:    jne LBB6_35
 ; AVX2-NEXT:  LBB6_36: ## %else50
 ; AVX2-NEXT:    testl $262144, %eax ## imm = 0x40000

 ; AVX2-NEXT:  LBB6_11: ## %cond.store13
 ; AVX2-NEXT:    vextractps $1, %xmm0, (%rdi)
 ; AVX2-NEXT:    addq $4, %rdi
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    je LBB6_14
 ; AVX2-NEXT:  LBB6_13: ## %cond.store16
 ; AVX2-NEXT:    vextractps $2, %xmm0, (%rdi)
 ; AVX2-NEXT:    addq $4, %rdi
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    je LBB6_16
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    jns LBB6_16
 ; AVX2-NEXT:  LBB6_15: ## %cond.store19
 ; AVX2-NEXT:    vextractps $3, %xmm0, (%rdi)
 ; AVX2-NEXT:    addq $4, %rdi
 ; AVX2-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX2-NEXT:    je LBB6_18
 ; AVX2-NEXT:  LBB6_17: ## %cond.store22
 ; AVX2-NEXT:    vmovss %xmm1, (%rdi)
 ; AVX2-NEXT:    addq $4, %rdi

 ; AVX2-NEXT:  LBB6_27: ## %cond.store37
 ; AVX2-NEXT:    vextractps $1, %xmm0, (%rdi)
 ; AVX2-NEXT:    addq $4, %rdi
 ; AVX2-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; AVX2-NEXT:    je LBB6_30
 ; AVX2-NEXT:  LBB6_29: ## %cond.store40
 ; AVX2-NEXT:    vextractps $2, %xmm0, (%rdi)
 ; AVX2-NEXT:    addq $4, %rdi
-; AVX2-NEXT:    testl $32768, %eax ## imm = 0x8000
-; AVX2-NEXT:    je LBB6_32
+; AVX2-NEXT:    testw %ax, %ax
+; AVX2-NEXT:    jns LBB6_32
 ; AVX2-NEXT:  LBB6_31: ## %cond.store43
 ; AVX2-NEXT:    vextractps $3, %xmm0, (%rdi)
 ; AVX2-NEXT:    addq $4, %rdi
 ; AVX2-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; AVX2-NEXT:    je LBB6_34
 ; AVX2-NEXT:  LBB6_33: ## %cond.store46
 ; AVX2-NEXT:    vmovss %xmm2, (%rdi)
 ; AVX2-NEXT:    addq $4, %rdi

 ; SSE2-NEXT:  LBB12_12: ## %else14
 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    pextrw $3, %xmm0, %ecx
 ; SSE2-NEXT:    je LBB12_14
 ; SSE2-NEXT:  ## %bb.13: ## %cond.store16
 ; SSE2-NEXT:    movb %cl, (%rdi)
 ; SSE2-NEXT:    incq %rdi
 ; SSE2-NEXT:  LBB12_14: ## %else17
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    je LBB12_16
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    jns LBB12_16
 ; SSE2-NEXT:  ## %bb.15: ## %cond.store19
 ; SSE2-NEXT:    movb %ch, (%rdi)
 ; SSE2-NEXT:    incq %rdi
 ; SSE2-NEXT:  LBB12_16: ## %else20
 ; SSE2-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE2-NEXT:    pextrw $4, %xmm0, %ecx
 ; SSE2-NEXT:    je LBB12_18
 ; SSE2-NEXT:  ## %bb.17: ## %cond.store22

 ; SSE42-NEXT:    jne LBB12_9
 ; SSE42-NEXT:  LBB12_10: ## %else11
 ; SSE42-NEXT:    testb $32, %al
 ; SSE42-NEXT:    jne LBB12_11
 ; SSE42-NEXT:  LBB12_12: ## %else14
 ; SSE42-NEXT:    testb $64, %al
 ; SSE42-NEXT:    jne LBB12_13
 ; SSE42-NEXT:  LBB12_14: ## %else17
-; SSE42-NEXT:    testb $-128, %al
-; SSE42-NEXT:    jne LBB12_15
+; SSE42-NEXT:    testb %al, %al
+; SSE42-NEXT:    js LBB12_15
 ; SSE42-NEXT:  LBB12_16: ## %else20
 ; SSE42-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE42-NEXT:    jne LBB12_17
 ; SSE42-NEXT:  LBB12_18: ## %else23
 ; SSE42-NEXT:    testl $512, %eax ## imm = 0x200
 ; SSE42-NEXT:    jne LBB12_19
 ; SSE42-NEXT:  LBB12_20: ## %else26
 ; SSE42-NEXT:    testl $1024, %eax ## imm = 0x400

 ; SSE42-NEXT:  LBB12_11: ## %cond.store13
 ; SSE42-NEXT:    pextrb $5, %xmm0, (%rdi)
 ; SSE42-NEXT:    incq %rdi
 ; SSE42-NEXT:    testb $64, %al
 ; SSE42-NEXT:    je LBB12_14
 ; SSE42-NEXT:  LBB12_13: ## %cond.store16
 ; SSE42-NEXT:    pextrb $6, %xmm0, (%rdi)
 ; SSE42-NEXT:    incq %rdi
-; SSE42-NEXT:    testb $-128, %al
-; SSE42-NEXT:    je LBB12_16
+; SSE42-NEXT:    testb %al, %al
+; SSE42-NEXT:    jns LBB12_16
 ; SSE42-NEXT:  LBB12_15: ## %cond.store19
 ; SSE42-NEXT:    pextrb $7, %xmm0, (%rdi)
 ; SSE42-NEXT:    incq %rdi
 ; SSE42-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE42-NEXT:    je LBB12_18
 ; SSE42-NEXT:  LBB12_17: ## %cond.store22
 ; SSE42-NEXT:    pextrb $8, %xmm0, (%rdi)
 ; SSE42-NEXT:    incq %rdi

 ; AVX1OR2-NEXT:    jne LBB12_9
 ; AVX1OR2-NEXT:  LBB12_10: ## %else11
 ; AVX1OR2-NEXT:    testb $32, %al
 ; AVX1OR2-NEXT:    jne LBB12_11
 ; AVX1OR2-NEXT:  LBB12_12: ## %else14
 ; AVX1OR2-NEXT:    testb $64, %al
 ; AVX1OR2-NEXT:    jne LBB12_13
 ; AVX1OR2-NEXT:  LBB12_14: ## %else17
-; AVX1OR2-NEXT:    testb $-128, %al
-; AVX1OR2-NEXT:    jne LBB12_15
+; AVX1OR2-NEXT:    testb %al, %al
+; AVX1OR2-NEXT:    js LBB12_15
 ; AVX1OR2-NEXT:  LBB12_16: ## %else20
 ; AVX1OR2-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX1OR2-NEXT:    jne LBB12_17
 ; AVX1OR2-NEXT:  LBB12_18: ## %else23
 ; AVX1OR2-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX1OR2-NEXT:    jne LBB12_19
 ; AVX1OR2-NEXT:  LBB12_20: ## %else26
 ; AVX1OR2-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX1OR2-NEXT:  LBB12_11: ## %cond.store13
 ; AVX1OR2-NEXT:    vpextrb $5, %xmm0, (%rdi)
 ; AVX1OR2-NEXT:    incq %rdi
 ; AVX1OR2-NEXT:    testb $64, %al
 ; AVX1OR2-NEXT:    je LBB12_14
 ; AVX1OR2-NEXT:  LBB12_13: ## %cond.store16
 ; AVX1OR2-NEXT:    vpextrb $6, %xmm0, (%rdi)
 ; AVX1OR2-NEXT:    incq %rdi
-; AVX1OR2-NEXT:    testb $-128, %al
-; AVX1OR2-NEXT:    je LBB12_16
+; AVX1OR2-NEXT:    testb %al, %al
+; AVX1OR2-NEXT:    jns LBB12_16
 ; AVX1OR2-NEXT:  LBB12_15: ## %cond.store19
 ; AVX1OR2-NEXT:    vpextrb $7, %xmm0, (%rdi)
 ; AVX1OR2-NEXT:    incq %rdi
 ; AVX1OR2-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX1OR2-NEXT:    je LBB12_18
 ; AVX1OR2-NEXT:  LBB12_17: ## %cond.store22
 ; AVX1OR2-NEXT:    vpextrb $8, %xmm0, (%rdi)
 ; AVX1OR2-NEXT:    incq %rdi

 ; AVX512F-NEXT:    jne LBB12_9
 ; AVX512F-NEXT:  LBB12_10: ## %else11
 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    jne LBB12_11
 ; AVX512F-NEXT:  LBB12_12: ## %else14
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    jne LBB12_13
 ; AVX512F-NEXT:  LBB12_14: ## %else17
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    jne LBB12_15
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    js LBB12_15
 ; AVX512F-NEXT:  LBB12_16: ## %else20
 ; AVX512F-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512F-NEXT:    jne LBB12_17
 ; AVX512F-NEXT:  LBB12_18: ## %else23
 ; AVX512F-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX512F-NEXT:    jne LBB12_19
 ; AVX512F-NEXT:  LBB12_20: ## %else26
 ; AVX512F-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX512F-NEXT:  LBB12_11: ## %cond.store13
 ; AVX512F-NEXT:    vpextrb $5, %xmm0, (%rdi)
 ; AVX512F-NEXT:    incq %rdi
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    je LBB12_14
 ; AVX512F-NEXT:  LBB12_13: ## %cond.store16
 ; AVX512F-NEXT:    vpextrb $6, %xmm0, (%rdi)
 ; AVX512F-NEXT:    incq %rdi
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    je LBB12_16
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    jns LBB12_16
 ; AVX512F-NEXT:  LBB12_15: ## %cond.store19
 ; AVX512F-NEXT:    vpextrb $7, %xmm0, (%rdi)
 ; AVX512F-NEXT:    incq %rdi
 ; AVX512F-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512F-NEXT:    je LBB12_18
 ; AVX512F-NEXT:  LBB12_17: ## %cond.store22
 ; AVX512F-NEXT:    vpextrb $8, %xmm0, (%rdi)
 ; AVX512F-NEXT:    incq %rdi

 ; AVX512VLDQ-NEXT:    jne LBB12_9
 ; AVX512VLDQ-NEXT:  LBB12_10: ## %else11
 ; AVX512VLDQ-NEXT:    testb $32, %al
 ; AVX512VLDQ-NEXT:    jne LBB12_11
 ; AVX512VLDQ-NEXT:  LBB12_12: ## %else14
 ; AVX512VLDQ-NEXT:    testb $64, %al
 ; AVX512VLDQ-NEXT:    jne LBB12_13
 ; AVX512VLDQ-NEXT:  LBB12_14: ## %else17
-; AVX512VLDQ-NEXT:    testb $-128, %al
-; AVX512VLDQ-NEXT:    jne LBB12_15
+; AVX512VLDQ-NEXT:    testb %al, %al
+; AVX512VLDQ-NEXT:    js LBB12_15
 ; AVX512VLDQ-NEXT:  LBB12_16: ## %else20
 ; AVX512VLDQ-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512VLDQ-NEXT:    jne LBB12_17
 ; AVX512VLDQ-NEXT:  LBB12_18: ## %else23
 ; AVX512VLDQ-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX512VLDQ-NEXT:    jne LBB12_19
 ; AVX512VLDQ-NEXT:  LBB12_20: ## %else26
 ; AVX512VLDQ-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX512VLDQ-NEXT:  LBB12_11: ## %cond.store13
 ; AVX512VLDQ-NEXT:    vpextrb $5, %xmm0, (%rdi)
 ; AVX512VLDQ-NEXT:    incq %rdi
 ; AVX512VLDQ-NEXT:    testb $64, %al
 ; AVX512VLDQ-NEXT:    je LBB12_14
 ; AVX512VLDQ-NEXT:  LBB12_13: ## %cond.store16
 ; AVX512VLDQ-NEXT:    vpextrb $6, %xmm0, (%rdi)
 ; AVX512VLDQ-NEXT:    incq %rdi
-; AVX512VLDQ-NEXT:    testb $-128, %al
-; AVX512VLDQ-NEXT:    je LBB12_16
+; AVX512VLDQ-NEXT:    testb %al, %al
+; AVX512VLDQ-NEXT:    jns LBB12_16
 ; AVX512VLDQ-NEXT:  LBB12_15: ## %cond.store19
 ; AVX512VLDQ-NEXT:    vpextrb $7, %xmm0, (%rdi)
 ; AVX512VLDQ-NEXT:    incq %rdi
 ; AVX512VLDQ-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512VLDQ-NEXT:    je LBB12_18
 ; AVX512VLDQ-NEXT:  LBB12_17: ## %cond.store22
 ; AVX512VLDQ-NEXT:    vpextrb $8, %xmm0, (%rdi)
 ; AVX512VLDQ-NEXT:    incq %rdi

 ; AVX512VLBW-NEXT:    jne LBB12_9
 ; AVX512VLBW-NEXT:  LBB12_10: ## %else11
 ; AVX512VLBW-NEXT:    testb $32, %al
 ; AVX512VLBW-NEXT:    jne LBB12_11
 ; AVX512VLBW-NEXT:  LBB12_12: ## %else14
 ; AVX512VLBW-NEXT:    testb $64, %al
 ; AVX512VLBW-NEXT:    jne LBB12_13
 ; AVX512VLBW-NEXT:  LBB12_14: ## %else17
-; AVX512VLBW-NEXT:    testb $-128, %al
-; AVX512VLBW-NEXT:    jne LBB12_15
+; AVX512VLBW-NEXT:    testb %al, %al
+; AVX512VLBW-NEXT:    js LBB12_15
 ; AVX512VLBW-NEXT:  LBB12_16: ## %else20
 ; AVX512VLBW-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512VLBW-NEXT:    jne LBB12_17
 ; AVX512VLBW-NEXT:  LBB12_18: ## %else23
 ; AVX512VLBW-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX512VLBW-NEXT:    jne LBB12_19
 ; AVX512VLBW-NEXT:  LBB12_20: ## %else26
 ; AVX512VLBW-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX512VLBW-NEXT:  LBB12_11: ## %cond.store13
 ; AVX512VLBW-NEXT:    vpextrb $5, %xmm0, (%rdi)
 ; AVX512VLBW-NEXT:    incq %rdi
 ; AVX512VLBW-NEXT:    testb $64, %al
 ; AVX512VLBW-NEXT:    je LBB12_14
 ; AVX512VLBW-NEXT:  LBB12_13: ## %cond.store16
 ; AVX512VLBW-NEXT:    vpextrb $6, %xmm0, (%rdi)
 ; AVX512VLBW-NEXT:    incq %rdi
-; AVX512VLBW-NEXT:    testb $-128, %al
-; AVX512VLBW-NEXT:    je LBB12_16
+; AVX512VLBW-NEXT:    testb %al, %al
+; AVX512VLBW-NEXT:    jns LBB12_16
 ; AVX512VLBW-NEXT:  LBB12_15: ## %cond.store19
 ; AVX512VLBW-NEXT:    vpextrb $7, %xmm0, (%rdi)
 ; AVX512VLBW-NEXT:    incq %rdi
 ; AVX512VLBW-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512VLBW-NEXT:    je LBB12_18
 ; AVX512VLBW-NEXT:  LBB12_17: ## %cond.store22
 ; AVX512VLBW-NEXT:    vpextrb $8, %xmm0, (%rdi)
 ; AVX512VLBW-NEXT:    incq %rdi

llvm/test/CodeGen/X86/masked_expandload.ll

 ; SSE-NEXT:    jne LBB3_9
 ; SSE-NEXT:  LBB3_10: ## %else14
 ; SSE-NEXT:    testb $32, %cl
 ; SSE-NEXT:    jne LBB3_11
 ; SSE-NEXT:  LBB3_12: ## %else18
 ; SSE-NEXT:    testb $64, %cl
 ; SSE-NEXT:    jne LBB3_13
 ; SSE-NEXT:  LBB3_14: ## %else22
-; SSE-NEXT:    testb $-128, %cl
-; SSE-NEXT:    jne LBB3_15
+; SSE-NEXT:    testb %cl, %cl
+; SSE-NEXT:    js LBB3_15
 ; SSE-NEXT:  LBB3_16: ## %else26
 ; SSE-NEXT:    testl $256, %ecx ## imm = 0x100
 ; SSE-NEXT:    jne LBB3_17
 ; SSE-NEXT:  LBB3_18: ## %else30
 ; SSE-NEXT:    testl $512, %ecx ## imm = 0x200
 ; SSE-NEXT:    jne LBB3_19
 ; SSE-NEXT:  LBB3_20: ## %else34
 ; SSE-NEXT:    testl $1024, %ecx ## imm = 0x400

 ; SSE-NEXT:  LBB3_11: ## %cond.load17
 ; SSE-NEXT:    movhps (%rsi), %xmm2 ## xmm2 = xmm2[0,1],mem[0,1]
 ; SSE-NEXT:    addq $8, %rsi
 ; SSE-NEXT:    testb $64, %cl
 ; SSE-NEXT:    je LBB3_14
 ; SSE-NEXT:  LBB3_13: ## %cond.load21
 ; SSE-NEXT:    movlps (%rsi), %xmm3 ## xmm3 = mem[0,1],xmm3[2,3]
 ; SSE-NEXT:    addq $8, %rsi
-; SSE-NEXT:    testb $-128, %cl
-; SSE-NEXT:    je LBB3_16
+; SSE-NEXT:    testb %cl, %cl
+; SSE-NEXT:    jns LBB3_16
 ; SSE-NEXT:  LBB3_15: ## %cond.load25
 ; SSE-NEXT:    movhps (%rsi), %xmm3 ## xmm3 = xmm3[0,1],mem[0,1]
 ; SSE-NEXT:    addq $8, %rsi
 ; SSE-NEXT:    testl $256, %ecx ## imm = 0x100
 ; SSE-NEXT:    je LBB3_18
 ; SSE-NEXT:  LBB3_17: ## %cond.load29
 ; SSE-NEXT:    movlps (%rsi), %xmm4 ## xmm4 = mem[0,1],xmm4[2,3]
 ; SSE-NEXT:    addq $8, %rsi

 ; AVX1-NEXT:    jne LBB3_9
 ; AVX1-NEXT:  LBB3_10: ## %else14
 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    jne LBB3_11
 ; AVX1-NEXT:  LBB3_12: ## %else18
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    jne LBB3_13
 ; AVX1-NEXT:  LBB3_14: ## %else22
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    jne LBB3_15
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    js LBB3_15
 ; AVX1-NEXT:  LBB3_16: ## %else26
 ; AVX1-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX1-NEXT:    jne LBB3_17
 ; AVX1-NEXT:  LBB3_18: ## %else30
 ; AVX1-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX1-NEXT:    jne LBB3_19
 ; AVX1-NEXT:  LBB3_20: ## %else34
 ; AVX1-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX1-NEXT:    vblendps {{.*#+}} ymm1 = ymm4[0,1,2,3],ymm1[4,5,6,7]
 ; AVX1-NEXT:    addq $8, %rdi
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    je LBB3_14
 ; AVX1-NEXT:  LBB3_13: ## %cond.load21
 ; AVX1-NEXT:    vbroadcastsd (%rdi), %ymm4
 ; AVX1-NEXT:    vblendps {{.*#+}} ymm1 = ymm1[0,1,2,3],ymm4[4,5],ymm1[6,7]
 ; AVX1-NEXT:    addq $8, %rdi
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    je LBB3_16
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    jns LBB3_16
 ; AVX1-NEXT:  LBB3_15: ## %cond.load25
 ; AVX1-NEXT:    vbroadcastsd (%rdi), %ymm4
 ; AVX1-NEXT:    vblendps {{.*#+}} ymm1 = ymm1[0,1,2,3,4,5],ymm4[6,7]
 ; AVX1-NEXT:    addq $8, %rdi
 ; AVX1-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX1-NEXT:    je LBB3_18
 ; AVX1-NEXT:  LBB3_17: ## %cond.load29
 ; AVX1-NEXT:    vmovsd (%rdi), %xmm4 ## xmm4 = mem[0],zero

 ; AVX2-NEXT:    jne LBB3_9
 ; AVX2-NEXT:  LBB3_10: ## %else14
 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    jne LBB3_11
 ; AVX2-NEXT:  LBB3_12: ## %else18
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    jne LBB3_13
 ; AVX2-NEXT:  LBB3_14: ## %else22
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    jne LBB3_15
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    js LBB3_15
 ; AVX2-NEXT:  LBB3_16: ## %else26
 ; AVX2-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX2-NEXT:    jne LBB3_17
 ; AVX2-NEXT:  LBB3_18: ## %else30
 ; AVX2-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX2-NEXT:    jne LBB3_19
 ; AVX2-NEXT:  LBB3_20: ## %else34
 ; AVX2-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX2-NEXT:    vpblendd {{.*#+}} ymm1 = ymm4[0,1,2,3],ymm1[4,5,6,7]
 ; AVX2-NEXT:    addq $8, %rdi
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    je LBB3_14
 ; AVX2-NEXT:  LBB3_13: ## %cond.load21
 ; AVX2-NEXT:    vpbroadcastq (%rdi), %ymm4
 ; AVX2-NEXT:    vpblendd {{.*#+}} ymm1 = ymm1[0,1,2,3],ymm4[4,5],ymm1[6,7]
 ; AVX2-NEXT:    addq $8, %rdi
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    je LBB3_16
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    jns LBB3_16
 ; AVX2-NEXT:  LBB3_15: ## %cond.load25
 ; AVX2-NEXT:    vpbroadcastq (%rdi), %ymm4
 ; AVX2-NEXT:    vpblendd {{.*#+}} ymm1 = ymm1[0,1,2,3,4,5],ymm4[6,7]
 ; AVX2-NEXT:    addq $8, %rdi
 ; AVX2-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX2-NEXT:    je LBB3_18
 ; AVX2-NEXT:  LBB3_17: ## %cond.load29
 ; AVX2-NEXT:    vmovq (%rdi), %xmm4 ## xmm4 = mem[0],zero

 ; SSE2-NEXT:    jne LBB8_9
 ; SSE2-NEXT:  LBB8_10: ## %else14
 ; SSE2-NEXT:    testb $32, %cl
 ; SSE2-NEXT:    jne LBB8_11
 ; SSE2-NEXT:  LBB8_12: ## %else18
 ; SSE2-NEXT:    testb $64, %cl
 ; SSE2-NEXT:    jne LBB8_13
 ; SSE2-NEXT:  LBB8_14: ## %else22
-; SSE2-NEXT:    testb $-128, %cl
-; SSE2-NEXT:    jne LBB8_15
+; SSE2-NEXT:    testb %cl, %cl
+; SSE2-NEXT:    js LBB8_15
 ; SSE2-NEXT:  LBB8_16: ## %else26
 ; SSE2-NEXT:    testl $256, %ecx ## imm = 0x100
 ; SSE2-NEXT:    jne LBB8_17
 ; SSE2-NEXT:  LBB8_18: ## %else30
 ; SSE2-NEXT:    testl $512, %ecx ## imm = 0x200
 ; SSE2-NEXT:    jne LBB8_19
 ; SSE2-NEXT:  LBB8_20: ## %else34
 ; SSE2-NEXT:    testl $1024, %ecx ## imm = 0x400
 ; SSE2-NEXT:    jne LBB8_21
 ; SSE2-NEXT:  LBB8_22: ## %else38
 ; SSE2-NEXT:    testl $2048, %ecx ## imm = 0x800
 ; SSE2-NEXT:    jne LBB8_23
 ; SSE2-NEXT:  LBB8_24: ## %else42
 ; SSE2-NEXT:    testl $4096, %ecx ## imm = 0x1000
 ; SSE2-NEXT:    jne LBB8_25
 ; SSE2-NEXT:  LBB8_26: ## %else46
 ; SSE2-NEXT:    testl $8192, %ecx ## imm = 0x2000
 ; SSE2-NEXT:    jne LBB8_27
 ; SSE2-NEXT:  LBB8_28: ## %else50
 ; SSE2-NEXT:    testl $16384, %ecx ## imm = 0x4000
 ; SSE2-NEXT:    jne LBB8_29
 ; SSE2-NEXT:  LBB8_30: ## %else54
-; SSE2-NEXT:    testl $32768, %ecx ## imm = 0x8000
-; SSE2-NEXT:    jne LBB8_31
+; SSE2-NEXT:    testw %cx, %cx
+; SSE2-NEXT:    js LBB8_31
 ; SSE2-NEXT:  LBB8_32: ## %else58
 ; SSE2-NEXT:    testl $65536, %ecx ## imm = 0x10000
 ; SSE2-NEXT:    jne LBB8_33
 ; SSE2-NEXT:  LBB8_34: ## %else62
 ; SSE2-NEXT:    testl $131072, %ecx ## imm = 0x20000
 ; SSE2-NEXT:    jne LBB8_35
 ; SSE2-NEXT:  LBB8_36: ## %else66
 ; SSE2-NEXT:    testl $262144, %ecx ## imm = 0x40000

 ; SSE2-NEXT:    movaps %xmm8, %xmm1
 ; SSE2-NEXT:    testb $64, %cl
 ; SSE2-NEXT:    je LBB8_14
 ; SSE2-NEXT:  LBB8_13: ## %cond.load21
 ; SSE2-NEXT:    movss (%rsi), %xmm8 ## xmm8 = mem[0],zero,zero,zero
 ; SSE2-NEXT:    shufps {{.*#+}} xmm8 = xmm8[0,0],xmm1[3,0]
 ; SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[0,1],xmm8[0,2]
 ; SSE2-NEXT:    addq $4, %rsi
-; SSE2-NEXT:    testb $-128, %cl
-; SSE2-NEXT:    je LBB8_16
+; SSE2-NEXT:    testb %cl, %cl
+; SSE2-NEXT:    jns LBB8_16
 ; SSE2-NEXT:  LBB8_15: ## %cond.load25
 ; SSE2-NEXT:    movss (%rsi), %xmm8 ## xmm8 = mem[0],zero,zero,zero
 ; SSE2-NEXT:    shufps {{.*#+}} xmm8 = xmm8[0,1],xmm1[2,3]
 ; SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[0,1],xmm8[2,0]
 ; SSE2-NEXT:    addq $4, %rsi
 ; SSE2-NEXT:    testl $256, %ecx ## imm = 0x100
 ; SSE2-NEXT:    je LBB8_18
 ; SSE2-NEXT:  LBB8_17: ## %cond.load29

 ; SSE2-NEXT:    movaps %xmm8, %xmm3
 ; SSE2-NEXT:    testl $16384, %ecx ## imm = 0x4000
 ; SSE2-NEXT:    je LBB8_30
 ; SSE2-NEXT:  LBB8_29: ## %cond.load53
 ; SSE2-NEXT:    movss (%rsi), %xmm8 ## xmm8 = mem[0],zero,zero,zero
 ; SSE2-NEXT:    shufps {{.*#+}} xmm8 = xmm8[0,0],xmm3[3,0]
 ; SSE2-NEXT:    shufps {{.*#+}} xmm3 = xmm3[0,1],xmm8[0,2]
 ; SSE2-NEXT:    addq $4, %rsi
-; SSE2-NEXT:    testl $32768, %ecx ## imm = 0x8000
-; SSE2-NEXT:    je LBB8_32
+; SSE2-NEXT:    testw %cx, %cx
+; SSE2-NEXT:    jns LBB8_32
 ; SSE2-NEXT:  LBB8_31: ## %cond.load57
 ; SSE2-NEXT:    movss (%rsi), %xmm8 ## xmm8 = mem[0],zero,zero,zero
 ; SSE2-NEXT:    shufps {{.*#+}} xmm8 = xmm8[0,1],xmm3[2,3]
 ; SSE2-NEXT:    shufps {{.*#+}} xmm3 = xmm3[0,1],xmm8[2,0]
 ; SSE2-NEXT:    addq $4, %rsi
 ; SSE2-NEXT:    testl $65536, %ecx ## imm = 0x10000
 ; SSE2-NEXT:    je LBB8_34
 ; SSE2-NEXT:  LBB8_33: ## %cond.load61

 ; SSE42-NEXT:    jne LBB8_9
 ; SSE42-NEXT:  LBB8_10: ## %else14
 ; SSE42-NEXT:    testb $32, %cl
 ; SSE42-NEXT:    jne LBB8_11
 ; SSE42-NEXT:  LBB8_12: ## %else18
 ; SSE42-NEXT:    testb $64, %cl
 ; SSE42-NEXT:    jne LBB8_13
 ; SSE42-NEXT:  LBB8_14: ## %else22
-; SSE42-NEXT:    testb $-128, %cl
-; SSE42-NEXT:    jne LBB8_15
+; SSE42-NEXT:    testb %cl, %cl
+; SSE42-NEXT:    js LBB8_15
 ; SSE42-NEXT:  LBB8_16: ## %else26
 ; SSE42-NEXT:    testl $256, %ecx ## imm = 0x100
 ; SSE42-NEXT:    jne LBB8_17
 ; SSE42-NEXT:  LBB8_18: ## %else30
 ; SSE42-NEXT:    testl $512, %ecx ## imm = 0x200
 ; SSE42-NEXT:    jne LBB8_19
 ; SSE42-NEXT:  LBB8_20: ## %else34
 ; SSE42-NEXT:    testl $1024, %ecx ## imm = 0x400
 ; SSE42-NEXT:    jne LBB8_21
 ; SSE42-NEXT:  LBB8_22: ## %else38
 ; SSE42-NEXT:    testl $2048, %ecx ## imm = 0x800
 ; SSE42-NEXT:    jne LBB8_23
 ; SSE42-NEXT:  LBB8_24: ## %else42
 ; SSE42-NEXT:    testl $4096, %ecx ## imm = 0x1000
 ; SSE42-NEXT:    jne LBB8_25
 ; SSE42-NEXT:  LBB8_26: ## %else46
 ; SSE42-NEXT:    testl $8192, %ecx ## imm = 0x2000
 ; SSE42-NEXT:    jne LBB8_27
 ; SSE42-NEXT:  LBB8_28: ## %else50
 ; SSE42-NEXT:    testl $16384, %ecx ## imm = 0x4000
 ; SSE42-NEXT:    jne LBB8_29
 ; SSE42-NEXT:  LBB8_30: ## %else54
-; SSE42-NEXT:    testl $32768, %ecx ## imm = 0x8000
-; SSE42-NEXT:    jne LBB8_31
+; SSE42-NEXT:    testw %cx, %cx
+; SSE42-NEXT:    js LBB8_31
 ; SSE42-NEXT:  LBB8_32: ## %else58
 ; SSE42-NEXT:    testl $65536, %ecx ## imm = 0x10000
 ; SSE42-NEXT:    jne LBB8_33
 ; SSE42-NEXT:  LBB8_34: ## %else62
 ; SSE42-NEXT:    testl $131072, %ecx ## imm = 0x20000
 ; SSE42-NEXT:    jne LBB8_35
 ; SSE42-NEXT:  LBB8_36: ## %else66
 ; SSE42-NEXT:    testl $262144, %ecx ## imm = 0x40000

 ; SSE42-NEXT:  LBB8_11: ## %cond.load17
 ; SSE42-NEXT:    insertps $16, (%rsi), %xmm1 ## xmm1 = xmm1[0],mem[0],xmm1[2,3]
 ; SSE42-NEXT:    addq $4, %rsi
 ; SSE42-NEXT:    testb $64, %cl
 ; SSE42-NEXT:    je LBB8_14
 ; SSE42-NEXT:  LBB8_13: ## %cond.load21
 ; SSE42-NEXT:    insertps $32, (%rsi), %xmm1 ## xmm1 = xmm1[0,1],mem[0],xmm1[3]
 ; SSE42-NEXT:    addq $4, %rsi
-; SSE42-NEXT:    testb $-128, %cl
-; SSE42-NEXT:    je LBB8_16
+; SSE42-NEXT:    testb %cl, %cl
+; SSE42-NEXT:    jns LBB8_16
 ; SSE42-NEXT:  LBB8_15: ## %cond.load25
 ; SSE42-NEXT:    insertps $48, (%rsi), %xmm1 ## xmm1 = xmm1[0,1,2],mem[0]
 ; SSE42-NEXT:    addq $4, %rsi
 ; SSE42-NEXT:    testl $256, %ecx ## imm = 0x100
 ; SSE42-NEXT:    je LBB8_18
 ; SSE42-NEXT:  LBB8_17: ## %cond.load29
 ; SSE42-NEXT:    movd (%rsi), %xmm8 ## xmm8 = mem[0],zero,zero,zero
 ; SSE42-NEXT:    pblendw {{.*#+}} xmm2 = xmm8[0,1],xmm2[2,3,4,5,6,7]

 ; SSE42-NEXT:  LBB8_27: ## %cond.load49
 ; SSE42-NEXT:    insertps $16, (%rsi), %xmm3 ## xmm3 = xmm3[0],mem[0],xmm3[2,3]
 ; SSE42-NEXT:    addq $4, %rsi
 ; SSE42-NEXT:    testl $16384, %ecx ## imm = 0x4000
 ; SSE42-NEXT:    je LBB8_30
 ; SSE42-NEXT:  LBB8_29: ## %cond.load53
 ; SSE42-NEXT:    insertps $32, (%rsi), %xmm3 ## xmm3 = xmm3[0,1],mem[0],xmm3[3]
 ; SSE42-NEXT:    addq $4, %rsi
-; SSE42-NEXT:    testl $32768, %ecx ## imm = 0x8000
-; SSE42-NEXT:    je LBB8_32
+; SSE42-NEXT:    testw %cx, %cx
+; SSE42-NEXT:    jns LBB8_32
 ; SSE42-NEXT:  LBB8_31: ## %cond.load57
 ; SSE42-NEXT:    insertps $48, (%rsi), %xmm3 ## xmm3 = xmm3[0,1,2],mem[0]
 ; SSE42-NEXT:    addq $4, %rsi
 ; SSE42-NEXT:    testl $65536, %ecx ## imm = 0x10000
 ; SSE42-NEXT:    je LBB8_34
 ; SSE42-NEXT:  LBB8_33: ## %cond.load61
 ; SSE42-NEXT:    movd (%rsi), %xmm8 ## xmm8 = mem[0],zero,zero,zero
 ; SSE42-NEXT:    pblendw {{.*#+}} xmm4 = xmm8[0,1],xmm4[2,3,4,5,6,7]

 ; AVX1-NEXT:    jne LBB8_9
 ; AVX1-NEXT:  LBB8_10: ## %else14
 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    jne LBB8_11
 ; AVX1-NEXT:  LBB8_12: ## %else18
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    jne LBB8_13
 ; AVX1-NEXT:  LBB8_14: ## %else22
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    jne LBB8_15
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    js LBB8_15
 ; AVX1-NEXT:  LBB8_16: ## %else26
 ; AVX1-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX1-NEXT:    jne LBB8_17
 ; AVX1-NEXT:  LBB8_18: ## %else30
 ; AVX1-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX1-NEXT:    jne LBB8_19
 ; AVX1-NEXT:  LBB8_20: ## %else34
 ; AVX1-NEXT:    testl $1024, %eax ## imm = 0x400
 ; AVX1-NEXT:    jne LBB8_21
 ; AVX1-NEXT:  LBB8_22: ## %else38
 ; AVX1-NEXT:    testl $2048, %eax ## imm = 0x800
 ; AVX1-NEXT:    jne LBB8_23
 ; AVX1-NEXT:  LBB8_24: ## %else42
 ; AVX1-NEXT:    testl $4096, %eax ## imm = 0x1000
 ; AVX1-NEXT:    jne LBB8_25
 ; AVX1-NEXT:  LBB8_26: ## %else46
 ; AVX1-NEXT:    testl $8192, %eax ## imm = 0x2000
 ; AVX1-NEXT:    jne LBB8_27
 ; AVX1-NEXT:  LBB8_28: ## %else50
 ; AVX1-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; AVX1-NEXT:    jne LBB8_29
 ; AVX1-NEXT:  LBB8_30: ## %else54
-; AVX1-NEXT:    testl $32768, %eax ## imm = 0x8000
-; AVX1-NEXT:    jne LBB8_31
+; AVX1-NEXT:    testw %ax, %ax
+; AVX1-NEXT:    js LBB8_31
 ; AVX1-NEXT:  LBB8_32: ## %else58
 ; AVX1-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; AVX1-NEXT:    jne LBB8_33
 ; AVX1-NEXT:  LBB8_34: ## %else62
 ; AVX1-NEXT:    testl $131072, %eax ## imm = 0x20000
 ; AVX1-NEXT:    jne LBB8_35
 ; AVX1-NEXT:  LBB8_36: ## %else66
 ; AVX1-NEXT:    testl $262144, %eax ## imm = 0x40000

 ; AVX1-NEXT:    vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3,4],ymm4[5],ymm0[6,7]
 ; AVX1-NEXT:    addq $4, %rdi
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    je LBB8_14
 ; AVX1-NEXT:  LBB8_13: ## %cond.load21
 ; AVX1-NEXT:    vbroadcastss (%rdi), %ymm4
 ; AVX1-NEXT:    vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5],ymm4[6],ymm0[7]
 ; AVX1-NEXT:    addq $4, %rdi
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    je LBB8_16
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    jns LBB8_16
 ; AVX1-NEXT:  LBB8_15: ## %cond.load25
 ; AVX1-NEXT:    vbroadcastss (%rdi), %ymm4
 ; AVX1-NEXT:    vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5,6],ymm4[7]
 ; AVX1-NEXT:    addq $4, %rdi
 ; AVX1-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX1-NEXT:    je LBB8_18
 ; AVX1-NEXT:  LBB8_17: ## %cond.load29
 ; AVX1-NEXT:    vmovss (%rdi), %xmm4 ## xmm4 = mem[0],zero,zero,zero

 ; AVX1-NEXT:    vblendps {{.*#+}} ymm1 = ymm1[0,1,2,3,4],ymm4[5],ymm1[6,7]
 ; AVX1-NEXT:    addq $4, %rdi
 ; AVX1-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; AVX1-NEXT:    je LBB8_30
 ; AVX1-NEXT:  LBB8_29: ## %cond.load53
 ; AVX1-NEXT:    vbroadcastss (%rdi), %ymm4
 ; AVX1-NEXT:    vblendps {{.*#+}} ymm1 = ymm1[0,1,2,3,4,5],ymm4[6],ymm1[7]
 ; AVX1-NEXT:    addq $4, %rdi
-; AVX1-NEXT:    testl $32768, %eax ## imm = 0x8000
-; AVX1-NEXT:    je LBB8_32
+; AVX1-NEXT:    testw %ax, %ax
+; AVX1-NEXT:    jns LBB8_32
 ; AVX1-NEXT:  LBB8_31: ## %cond.load57
 ; AVX1-NEXT:    vbroadcastss (%rdi), %ymm4
 ; AVX1-NEXT:    vblendps {{.*#+}} ymm1 = ymm1[0,1,2,3,4,5,6],ymm4[7]
 ; AVX1-NEXT:    addq $4, %rdi
 ; AVX1-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; AVX1-NEXT:    je LBB8_34
 ; AVX1-NEXT:  LBB8_33: ## %cond.load61
 ; AVX1-NEXT:    vmovss (%rdi), %xmm4 ## xmm4 = mem[0],zero,zero,zero

 ; AVX2-NEXT:    jne LBB8_9
 ; AVX2-NEXT:  LBB8_10: ## %else14
 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    jne LBB8_11
 ; AVX2-NEXT:  LBB8_12: ## %else18
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    jne LBB8_13
 ; AVX2-NEXT:  LBB8_14: ## %else22
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    jne LBB8_15
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    js LBB8_15
 ; AVX2-NEXT:  LBB8_16: ## %else26
 ; AVX2-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX2-NEXT:    jne LBB8_17
 ; AVX2-NEXT:  LBB8_18: ## %else30
 ; AVX2-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX2-NEXT:    jne LBB8_19
 ; AVX2-NEXT:  LBB8_20: ## %else34
 ; AVX2-NEXT:    testl $1024, %eax ## imm = 0x400
 ; AVX2-NEXT:    jne LBB8_21
 ; AVX2-NEXT:  LBB8_22: ## %else38
 ; AVX2-NEXT:    testl $2048, %eax ## imm = 0x800
 ; AVX2-NEXT:    jne LBB8_23
 ; AVX2-NEXT:  LBB8_24: ## %else42
 ; AVX2-NEXT:    testl $4096, %eax ## imm = 0x1000
 ; AVX2-NEXT:    jne LBB8_25
 ; AVX2-NEXT:  LBB8_26: ## %else46
 ; AVX2-NEXT:    testl $8192, %eax ## imm = 0x2000
 ; AVX2-NEXT:    jne LBB8_27
 ; AVX2-NEXT:  LBB8_28: ## %else50
 ; AVX2-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; AVX2-NEXT:    jne LBB8_29
 ; AVX2-NEXT:  LBB8_30: ## %else54
-; AVX2-NEXT:    testl $32768, %eax ## imm = 0x8000
-; AVX2-NEXT:    jne LBB8_31
+; AVX2-NEXT:    testw %ax, %ax
+; AVX2-NEXT:    js LBB8_31
 ; AVX2-NEXT:  LBB8_32: ## %else58
 ; AVX2-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; AVX2-NEXT:    jne LBB8_33
 ; AVX2-NEXT:  LBB8_34: ## %else62
 ; AVX2-NEXT:    testl $131072, %eax ## imm = 0x20000
 ; AVX2-NEXT:    jne LBB8_35
 ; AVX2-NEXT:  LBB8_36: ## %else66
 ; AVX2-NEXT:    testl $262144, %eax ## imm = 0x40000

 ; AVX2-NEXT:    vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3,4],ymm4[5],ymm0[6,7]
 ; AVX2-NEXT:    addq $4, %rdi
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    je LBB8_14
 ; AVX2-NEXT:  LBB8_13: ## %cond.load21
 ; AVX2-NEXT:    vbroadcastss (%rdi), %ymm4
 ; AVX2-NEXT:    vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5],ymm4[6],ymm0[7]
 ; AVX2-NEXT:    addq $4, %rdi
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    je LBB8_16
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    jns LBB8_16
 ; AVX2-NEXT:  LBB8_15: ## %cond.load25
 ; AVX2-NEXT:    vbroadcastss (%rdi), %ymm4
 ; AVX2-NEXT:    vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5,6],ymm4[7]
 ; AVX2-NEXT:    addq $4, %rdi
 ; AVX2-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX2-NEXT:    je LBB8_18
 ; AVX2-NEXT:  LBB8_17: ## %cond.load29
 ; AVX2-NEXT:    vmovd (%rdi), %xmm4 ## xmm4 = mem[0],zero,zero,zero

 ; AVX2-NEXT:    vblendps {{.*#+}} ymm1 = ymm1[0,1,2,3,4],ymm4[5],ymm1[6,7]
 ; AVX2-NEXT:    addq $4, %rdi
 ; AVX2-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; AVX2-NEXT:    je LBB8_30
 ; AVX2-NEXT:  LBB8_29: ## %cond.load53
 ; AVX2-NEXT:    vbroadcastss (%rdi), %ymm4
 ; AVX2-NEXT:    vblendps {{.*#+}} ymm1 = ymm1[0,1,2,3,4,5],ymm4[6],ymm1[7]
 ; AVX2-NEXT:    addq $4, %rdi
-; AVX2-NEXT:    testl $32768, %eax ## imm = 0x8000
-; AVX2-NEXT:    je LBB8_32
+; AVX2-NEXT:    testw %ax, %ax
+; AVX2-NEXT:    jns LBB8_32
 ; AVX2-NEXT:  LBB8_31: ## %cond.load57
 ; AVX2-NEXT:    vbroadcastss (%rdi), %ymm4
 ; AVX2-NEXT:    vblendps {{.*#+}} ymm1 = ymm1[0,1,2,3,4,5,6],ymm4[7]
 ; AVX2-NEXT:    addq $4, %rdi
 ; AVX2-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; AVX2-NEXT:    je LBB8_34
 ; AVX2-NEXT:  LBB8_33: ## %cond.load61
 ; AVX2-NEXT:    vmovd (%rdi), %xmm4 ## xmm4 = mem[0],zero,zero,zero

 ; SSE2-NEXT:    jne LBB12_9
 ; SSE2-NEXT:  LBB12_10: ## %else14
 ; SSE2-NEXT:    testb $32, %al
 ; SSE2-NEXT:    jne LBB12_11
 ; SSE2-NEXT:  LBB12_12: ## %else18
 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    jne LBB12_13
 ; SSE2-NEXT:  LBB12_14: ## %else22
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    jne LBB12_15
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    js LBB12_15
 ; SSE2-NEXT:  LBB12_16: ## %else26
 ; SSE2-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE2-NEXT:    jne LBB12_17
 ; SSE2-NEXT:  LBB12_18: ## %else30
 ; SSE2-NEXT:    testl $512, %eax ## imm = 0x200
 ; SSE2-NEXT:    jne LBB12_19
 ; SSE2-NEXT:  LBB12_20: ## %else34
 ; SSE2-NEXT:    testl $1024, %eax ## imm = 0x400

 ; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [255,255,255,255,255,255,0,255,255,255,255,255,255,255,255,255]
 ; SSE2-NEXT:    pand %xmm1, %xmm0
 ; SSE2-NEXT:    movzbl (%rdi), %ecx
 ; SSE2-NEXT:    movd %ecx, %xmm2
 ; SSE2-NEXT:    psllq $48, %xmm2
 ; SSE2-NEXT:    pandn %xmm2, %xmm1
 ; SSE2-NEXT:    por %xmm1, %xmm0
 ; SSE2-NEXT:    incq %rdi
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    je LBB12_16
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    jns LBB12_16
 ; SSE2-NEXT:  LBB12_15: ## %cond.load25
 ; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,255]
 ; SSE2-NEXT:    pand %xmm1, %xmm0
 ; SSE2-NEXT:    movzbl (%rdi), %ecx
 ; SSE2-NEXT:    movd %ecx, %xmm2
 ; SSE2-NEXT:    psllq $56, %xmm2
 ; SSE2-NEXT:    pandn %xmm2, %xmm1
 ; SSE2-NEXT:    por %xmm1, %xmm0

 ; SSE42-NEXT:    jne LBB12_9
 ; SSE42-NEXT:  LBB12_10: ## %else14
 ; SSE42-NEXT:    testb $32, %al
 ; SSE42-NEXT:    jne LBB12_11
 ; SSE42-NEXT:  LBB12_12: ## %else18
 ; SSE42-NEXT:    testb $64, %al
 ; SSE42-NEXT:    jne LBB12_13
 ; SSE42-NEXT:  LBB12_14: ## %else22
-; SSE42-NEXT:    testb $-128, %al
-; SSE42-NEXT:    jne LBB12_15
+; SSE42-NEXT:    testb %al, %al
+; SSE42-NEXT:    js LBB12_15
 ; SSE42-NEXT:  LBB12_16: ## %else26
 ; SSE42-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE42-NEXT:    jne LBB12_17
 ; SSE42-NEXT:  LBB12_18: ## %else30
 ; SSE42-NEXT:    testl $512, %eax ## imm = 0x200
 ; SSE42-NEXT:    jne LBB12_19
 ; SSE42-NEXT:  LBB12_20: ## %else34
 ; SSE42-NEXT:    testl $1024, %eax ## imm = 0x400

 ; SSE42-NEXT:  LBB12_11: ## %cond.load17
 ; SSE42-NEXT:    pinsrb $5, (%rdi), %xmm0
 ; SSE42-NEXT:    incq %rdi
 ; SSE42-NEXT:    testb $64, %al
 ; SSE42-NEXT:    je LBB12_14
 ; SSE42-NEXT:  LBB12_13: ## %cond.load21
 ; SSE42-NEXT:    pinsrb $6, (%rdi), %xmm0
 ; SSE42-NEXT:    incq %rdi
-; SSE42-NEXT:    testb $-128, %al
-; SSE42-NEXT:    je LBB12_16
+; SSE42-NEXT:    testb %al, %al
+; SSE42-NEXT:    jns LBB12_16
 ; SSE42-NEXT:  LBB12_15: ## %cond.load25
 ; SSE42-NEXT:    pinsrb $7, (%rdi), %xmm0
 ; SSE42-NEXT:    incq %rdi
 ; SSE42-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE42-NEXT:    je LBB12_18
 ; SSE42-NEXT:  LBB12_17: ## %cond.load29
 ; SSE42-NEXT:    pinsrb $8, (%rdi), %xmm0
 ; SSE42-NEXT:    incq %rdi

 ; AVX1OR2-NEXT:    jne LBB12_9
 ; AVX1OR2-NEXT:  LBB12_10: ## %else14
 ; AVX1OR2-NEXT:    testb $32, %al
 ; AVX1OR2-NEXT:    jne LBB12_11
 ; AVX1OR2-NEXT:  LBB12_12: ## %else18
 ; AVX1OR2-NEXT:    testb $64, %al
 ; AVX1OR2-NEXT:    jne LBB12_13
 ; AVX1OR2-NEXT:  LBB12_14: ## %else22
-; AVX1OR2-NEXT:    testb $-128, %al
-; AVX1OR2-NEXT:    jne LBB12_15
+; AVX1OR2-NEXT:    testb %al, %al
+; AVX1OR2-NEXT:    js LBB12_15
 ; AVX1OR2-NEXT:  LBB12_16: ## %else26
 ; AVX1OR2-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX1OR2-NEXT:    jne LBB12_17
 ; AVX1OR2-NEXT:  LBB12_18: ## %else30
 ; AVX1OR2-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX1OR2-NEXT:    jne LBB12_19
 ; AVX1OR2-NEXT:  LBB12_20: ## %else34
 ; AVX1OR2-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX1OR2-NEXT:  LBB12_11: ## %cond.load17
 ; AVX1OR2-NEXT:    vpinsrb $5, (%rdi), %xmm0, %xmm0
 ; AVX1OR2-NEXT:    incq %rdi
 ; AVX1OR2-NEXT:    testb $64, %al
 ; AVX1OR2-NEXT:    je LBB12_14
 ; AVX1OR2-NEXT:  LBB12_13: ## %cond.load21
 ; AVX1OR2-NEXT:    vpinsrb $6, (%rdi), %xmm0, %xmm0
 ; AVX1OR2-NEXT:    incq %rdi
-; AVX1OR2-NEXT:    testb $-128, %al
-; AVX1OR2-NEXT:    je LBB12_16
+; AVX1OR2-NEXT:    testb %al, %al
+; AVX1OR2-NEXT:    jns LBB12_16
 ; AVX1OR2-NEXT:  LBB12_15: ## %cond.load25
 ; AVX1OR2-NEXT:    vpinsrb $7, (%rdi), %xmm0, %xmm0
 ; AVX1OR2-NEXT:    incq %rdi
 ; AVX1OR2-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX1OR2-NEXT:    je LBB12_18
 ; AVX1OR2-NEXT:  LBB12_17: ## %cond.load29
 ; AVX1OR2-NEXT:    vpinsrb $8, (%rdi), %xmm0, %xmm0
 ; AVX1OR2-NEXT:    incq %rdi

 ; AVX512F-NEXT:    jne LBB12_9
 ; AVX512F-NEXT:  LBB12_10: ## %else14
 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    jne LBB12_11
 ; AVX512F-NEXT:  LBB12_12: ## %else18
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    jne LBB12_13
 ; AVX512F-NEXT:  LBB12_14: ## %else22
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    jne LBB12_15
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    js LBB12_15
 ; AVX512F-NEXT:  LBB12_16: ## %else26
 ; AVX512F-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512F-NEXT:    jne LBB12_17
 ; AVX512F-NEXT:  LBB12_18: ## %else30
 ; AVX512F-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX512F-NEXT:    jne LBB12_19
 ; AVX512F-NEXT:  LBB12_20: ## %else34
 ; AVX512F-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX512F-NEXT:  LBB12_11: ## %cond.load17
 ; AVX512F-NEXT:    vpinsrb $5, (%rdi), %xmm0, %xmm0
 ; AVX512F-NEXT:    incq %rdi
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    je LBB12_14
 ; AVX512F-NEXT:  LBB12_13: ## %cond.load21
 ; AVX512F-NEXT:    vpinsrb $6, (%rdi), %xmm0, %xmm0
 ; AVX512F-NEXT:    incq %rdi
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    je LBB12_16
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    jns LBB12_16
 ; AVX512F-NEXT:  LBB12_15: ## %cond.load25
 ; AVX512F-NEXT:    vpinsrb $7, (%rdi), %xmm0, %xmm0
 ; AVX512F-NEXT:    incq %rdi
 ; AVX512F-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512F-NEXT:    je LBB12_18
 ; AVX512F-NEXT:  LBB12_17: ## %cond.load29
 ; AVX512F-NEXT:    vpinsrb $8, (%rdi), %xmm0, %xmm0
 ; AVX512F-NEXT:    incq %rdi

 ; AVX512VLDQ-NEXT:    jne LBB12_9
 ; AVX512VLDQ-NEXT:  LBB12_10: ## %else14
 ; AVX512VLDQ-NEXT:    testb $32, %al
 ; AVX512VLDQ-NEXT:    jne LBB12_11
 ; AVX512VLDQ-NEXT:  LBB12_12: ## %else18
 ; AVX512VLDQ-NEXT:    testb $64, %al
 ; AVX512VLDQ-NEXT:    jne LBB12_13
 ; AVX512VLDQ-NEXT:  LBB12_14: ## %else22
-; AVX512VLDQ-NEXT:    testb $-128, %al
-; AVX512VLDQ-NEXT:    jne LBB12_15
+; AVX512VLDQ-NEXT:    testb %al, %al
+; AVX512VLDQ-NEXT:    js LBB12_15
 ; AVX512VLDQ-NEXT:  LBB12_16: ## %else26
 ; AVX512VLDQ-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512VLDQ-NEXT:    jne LBB12_17
 ; AVX512VLDQ-NEXT:  LBB12_18: ## %else30
 ; AVX512VLDQ-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX512VLDQ-NEXT:    jne LBB12_19
 ; AVX512VLDQ-NEXT:  LBB12_20: ## %else34
 ; AVX512VLDQ-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX512VLDQ-NEXT:  LBB12_11: ## %cond.load17
 ; AVX512VLDQ-NEXT:    vpinsrb $5, (%rdi), %xmm0, %xmm0
 ; AVX512VLDQ-NEXT:    incq %rdi
 ; AVX512VLDQ-NEXT:    testb $64, %al
 ; AVX512VLDQ-NEXT:    je LBB12_14
 ; AVX512VLDQ-NEXT:  LBB12_13: ## %cond.load21
 ; AVX512VLDQ-NEXT:    vpinsrb $6, (%rdi), %xmm0, %xmm0
 ; AVX512VLDQ-NEXT:    incq %rdi
-; AVX512VLDQ-NEXT:    testb $-128, %al
-; AVX512VLDQ-NEXT:    je LBB12_16
+; AVX512VLDQ-NEXT:    testb %al, %al
+; AVX512VLDQ-NEXT:    jns LBB12_16
 ; AVX512VLDQ-NEXT:  LBB12_15: ## %cond.load25
 ; AVX512VLDQ-NEXT:    vpinsrb $7, (%rdi), %xmm0, %xmm0
 ; AVX512VLDQ-NEXT:    incq %rdi
 ; AVX512VLDQ-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512VLDQ-NEXT:    je LBB12_18
 ; AVX512VLDQ-NEXT:  LBB12_17: ## %cond.load29
 ; AVX512VLDQ-NEXT:    vpinsrb $8, (%rdi), %xmm0, %xmm0
 ; AVX512VLDQ-NEXT:    incq %rdi

 ; AVX512VLBW-NEXT:    jne LBB12_9
 ; AVX512VLBW-NEXT:  LBB12_10: ## %else14
 ; AVX512VLBW-NEXT:    testb $32, %al
 ; AVX512VLBW-NEXT:    jne LBB12_11
 ; AVX512VLBW-NEXT:  LBB12_12: ## %else18
 ; AVX512VLBW-NEXT:    testb $64, %al
 ; AVX512VLBW-NEXT:    jne LBB12_13
 ; AVX512VLBW-NEXT:  LBB12_14: ## %else22
-; AVX512VLBW-NEXT:    testb $-128, %al
-; AVX512VLBW-NEXT:    jne LBB12_15
+; AVX512VLBW-NEXT:    testb %al, %al
+; AVX512VLBW-NEXT:    js LBB12_15
 ; AVX512VLBW-NEXT:  LBB12_16: ## %else26
 ; AVX512VLBW-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512VLBW-NEXT:    jne LBB12_17
 ; AVX512VLBW-NEXT:  LBB12_18: ## %else30
 ; AVX512VLBW-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX512VLBW-NEXT:    jne LBB12_19
 ; AVX512VLBW-NEXT:  LBB12_20: ## %else34
 ; AVX512VLBW-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX512VLBW-NEXT:  LBB12_11: ## %cond.load17
 ; AVX512VLBW-NEXT:    vpinsrb $5, (%rdi), %xmm0, %xmm0
 ; AVX512VLBW-NEXT:    incq %rdi
 ; AVX512VLBW-NEXT:    testb $64, %al
 ; AVX512VLBW-NEXT:    je LBB12_14
 ; AVX512VLBW-NEXT:  LBB12_13: ## %cond.load21
 ; AVX512VLBW-NEXT:    vpinsrb $6, (%rdi), %xmm0, %xmm0
 ; AVX512VLBW-NEXT:    incq %rdi
-; AVX512VLBW-NEXT:    testb $-128, %al
-; AVX512VLBW-NEXT:    je LBB12_16
+; AVX512VLBW-NEXT:    testb %al, %al
+; AVX512VLBW-NEXT:    jns LBB12_16
 ; AVX512VLBW-NEXT:  LBB12_15: ## %cond.load25
 ; AVX512VLBW-NEXT:    vpinsrb $7, (%rdi), %xmm0, %xmm0
 ; AVX512VLBW-NEXT:    incq %rdi
 ; AVX512VLBW-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512VLBW-NEXT:    je LBB12_18
 ; AVX512VLBW-NEXT:  LBB12_17: ## %cond.load29
 ; AVX512VLBW-NEXT:    vpinsrb $8, (%rdi), %xmm0, %xmm0
 ; AVX512VLBW-NEXT:    incq %rdi

llvm/test/CodeGen/X86/masked_gather.ll

 ; SSE-NEXT:    paddq %xmm6, %xmm1
 ; SSE-NEXT:    testb $64, %al
 ; SSE-NEXT:    je .LBB3_14
 ; SSE-NEXT:  # %bb.13: # %cond.load16
 ; SSE-NEXT:    movq %xmm1, %rcx
 ; SSE-NEXT:    pinsrb $6, (%rcx), %xmm5
 ; SSE-NEXT:  .LBB3_14: # %else17
 ; SSE-NEXT:    pmovsxdq %xmm2, %xmm0
-; SSE-NEXT:    testb $-128, %al
-; SSE-NEXT:    je .LBB3_16
+; SSE-NEXT:    testb %al, %al
+; SSE-NEXT:    jns .LBB3_16
 ; SSE-NEXT:  # %bb.15: # %cond.load19
 ; SSE-NEXT:    pextrq $1, %xmm1, %rcx
 ; SSE-NEXT:    pinsrb $7, (%rcx), %xmm5
 ; SSE-NEXT:  .LBB3_16: # %else20
 ; SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[2,3,2,3]
 ; SSE-NEXT:    paddq %xmm6, %xmm0
 ; SSE-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE-NEXT:    je .LBB3_18

 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
 ; AVX1-NEXT:    je .LBB3_14
 ; AVX1-NEXT:  # %bb.13: # %cond.load16
 ; AVX1-NEXT:    vmovq %xmm0, %rcx
 ; AVX1-NEXT:    vpinsrb $6, (%rcx), %xmm3, %xmm3
 ; AVX1-NEXT:  .LBB3_14: # %else17
 ; AVX1-NEXT:    vpaddq %xmm5, %xmm4, %xmm5
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    je .LBB3_16
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    jns .LBB3_16
 ; AVX1-NEXT:  # %bb.15: # %cond.load19
 ; AVX1-NEXT:    vpextrq $1, %xmm0, %rcx
 ; AVX1-NEXT:    vpinsrb $7, (%rcx), %xmm3, %xmm3
 ; AVX1-NEXT:  .LBB3_16: # %else20
 ; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm1
 ; AVX1-NEXT:    vinsertf128 $1, %xmm5, %ymm2, %ymm0
 ; AVX1-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX1-NEXT:    je .LBB3_18

 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm0
 ; AVX2-NEXT:    je .LBB3_14
 ; AVX2-NEXT:  # %bb.13: # %cond.load16
 ; AVX2-NEXT:    vmovq %xmm0, %rcx
 ; AVX2-NEXT:    vpinsrb $6, (%rcx), %xmm3, %xmm3
 ; AVX2-NEXT:  .LBB3_14: # %else17
 ; AVX2-NEXT:    vpmovsxdq %xmm1, %ymm2
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    je .LBB3_16
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    jns .LBB3_16
 ; AVX2-NEXT:  # %bb.15: # %cond.load19
 ; AVX2-NEXT:    vpextrq $1, %xmm0, %rcx
 ; AVX2-NEXT:    vpinsrb $7, (%rcx), %xmm3, %xmm3
 ; AVX2-NEXT:  .LBB3_16: # %else20
 ; AVX2-NEXT:    vpaddq %ymm2, %ymm4, %ymm0
 ; AVX2-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX2-NEXT:    je .LBB3_18
 ; AVX2-NEXT:  # %bb.17: # %cond.load22

 ; AVX512-NEXT:    testb $64, %al
 ; AVX512-NEXT:    vextracti32x4 $3, %zmm4, %xmm0
 ; AVX512-NEXT:    je .LBB3_14
 ; AVX512-NEXT:  # %bb.13: # %cond.load16
 ; AVX512-NEXT:    vmovq %xmm0, %rcx
 ; AVX512-NEXT:    vpinsrb $6, (%rcx), %xmm2, %xmm2
 ; AVX512-NEXT:  .LBB3_14: # %else17
 ; AVX512-NEXT:    vpmovsxdq %ymm1, %zmm1
-; AVX512-NEXT:    testb $-128, %al
-; AVX512-NEXT:    je .LBB3_16
+; AVX512-NEXT:    testb %al, %al
+; AVX512-NEXT:    jns .LBB3_16
 ; AVX512-NEXT:  # %bb.15: # %cond.load19
 ; AVX512-NEXT:    vpextrq $1, %xmm0, %rcx
 ; AVX512-NEXT:    vpinsrb $7, (%rcx), %xmm2, %xmm2
 ; AVX512-NEXT:  .LBB3_16: # %else20
 ; AVX512-NEXT:    vpaddq %zmm1, %zmm3, %zmm0
 ; AVX512-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX512-NEXT:    jne .LBB3_17
 ; AVX512-NEXT:  # %bb.18: # %else23

llvm/test/CodeGen/X86/masked_load.ll

 ; SSE-NEXT:    jne LBB22_9
 ; SSE-NEXT:  LBB22_10: ## %else11
 ; SSE-NEXT:    testb $32, %al
 ; SSE-NEXT:    jne LBB22_11
 ; SSE-NEXT:  LBB22_12: ## %else14
 ; SSE-NEXT:    testb $64, %al
 ; SSE-NEXT:    jne LBB22_13
 ; SSE-NEXT:  LBB22_14: ## %else17
-; SSE-NEXT:    testb $-128, %al
-; SSE-NEXT:    jne LBB22_15
+; SSE-NEXT:    testb %al, %al
+; SSE-NEXT:    js LBB22_15
 ; SSE-NEXT:  LBB22_16: ## %else20
 ; SSE-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE-NEXT:    jne LBB22_17
 ; SSE-NEXT:  LBB22_18: ## %else23
 ; SSE-NEXT:    testl $512, %eax ## imm = 0x200
 ; SSE-NEXT:    jne LBB22_19
 ; SSE-NEXT:  LBB22_20: ## %else26
 ; SSE-NEXT:    testl $1024, %eax ## imm = 0x400

 ; SSE-NEXT:    testb $32, %al
 ; SSE-NEXT:    je LBB22_12
 ; SSE-NEXT:  LBB22_11: ## %cond.load13
 ; SSE-NEXT:    pinsrw $5, 10(%rdi), %xmm2
 ; SSE-NEXT:    testb $64, %al
 ; SSE-NEXT:    je LBB22_14
 ; SSE-NEXT:  LBB22_13: ## %cond.load16
 ; SSE-NEXT:    pinsrw $6, 12(%rdi), %xmm2
-; SSE-NEXT:    testb $-128, %al
-; SSE-NEXT:    je LBB22_16
+; SSE-NEXT:    testb %al, %al
+; SSE-NEXT:    jns LBB22_16
 ; SSE-NEXT:  LBB22_15: ## %cond.load19
 ; SSE-NEXT:    pinsrw $7, 14(%rdi), %xmm2
 ; SSE-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE-NEXT:    je LBB22_18
 ; SSE-NEXT:  LBB22_17: ## %cond.load22
 ; SSE-NEXT:    pinsrw $0, 16(%rdi), %xmm3
 ; SSE-NEXT:    testl $512, %eax ## imm = 0x200
 ; SSE-NEXT:    je LBB22_20

 ; AVX1-NEXT:    jne LBB22_9
 ; AVX1-NEXT:  LBB22_10: ## %else11
 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    jne LBB22_11
 ; AVX1-NEXT:  LBB22_12: ## %else14
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    jne LBB22_13
 ; AVX1-NEXT:  LBB22_14: ## %else17
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    jne LBB22_15
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    js LBB22_15
 ; AVX1-NEXT:  LBB22_16: ## %else20
 ; AVX1-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX1-NEXT:    jne LBB22_17
 ; AVX1-NEXT:  LBB22_18: ## %else23
 ; AVX1-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX1-NEXT:    jne LBB22_19
 ; AVX1-NEXT:  LBB22_20: ## %else26
 ; AVX1-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX1-NEXT:  LBB22_11: ## %cond.load13
 ; AVX1-NEXT:    vpinsrw $5, 10(%rdi), %xmm1, %xmm0
 ; AVX1-NEXT:    vblendps {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    je LBB22_14
 ; AVX1-NEXT:  LBB22_13: ## %cond.load16
 ; AVX1-NEXT:    vpinsrw $6, 12(%rdi), %xmm1, %xmm0
 ; AVX1-NEXT:    vblendps {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    je LBB22_16
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    jns LBB22_16
 ; AVX1-NEXT:  LBB22_15: ## %cond.load19
 ; AVX1-NEXT:    vpinsrw $7, 14(%rdi), %xmm1, %xmm0
 ; AVX1-NEXT:    vblendps {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
 ; AVX1-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX1-NEXT:    je LBB22_18
 ; AVX1-NEXT:  LBB22_17: ## %cond.load22
 ; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm0
 ; AVX1-NEXT:    vpinsrw $0, 16(%rdi), %xmm0, %xmm0

 ; AVX2-NEXT:    jne LBB22_9
 ; AVX2-NEXT:  LBB22_10: ## %else11
 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    jne LBB22_11
 ; AVX2-NEXT:  LBB22_12: ## %else14
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    jne LBB22_13
 ; AVX2-NEXT:  LBB22_14: ## %else17
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    jne LBB22_15
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    js LBB22_15
 ; AVX2-NEXT:  LBB22_16: ## %else20
 ; AVX2-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX2-NEXT:    jne LBB22_17
 ; AVX2-NEXT:  LBB22_18: ## %else23
 ; AVX2-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX2-NEXT:    jne LBB22_19
 ; AVX2-NEXT:  LBB22_20: ## %else26
 ; AVX2-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX2-NEXT:  LBB22_11: ## %cond.load13
 ; AVX2-NEXT:    vpinsrw $5, 10(%rdi), %xmm1, %xmm0
 ; AVX2-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    je LBB22_14
 ; AVX2-NEXT:  LBB22_13: ## %cond.load16
 ; AVX2-NEXT:    vpinsrw $6, 12(%rdi), %xmm1, %xmm0
 ; AVX2-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    je LBB22_16
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    jns LBB22_16
 ; AVX2-NEXT:  LBB22_15: ## %cond.load19
 ; AVX2-NEXT:    vpinsrw $7, 14(%rdi), %xmm1, %xmm0
 ; AVX2-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
 ; AVX2-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX2-NEXT:    je LBB22_18
 ; AVX2-NEXT:  LBB22_17: ## %cond.load22
 ; AVX2-NEXT:    vpbroadcastw 16(%rdi), %ymm0
 ; AVX2-NEXT:    vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3,4,5,6,7],ymm0[8],ymm1[9,10,11,12,13,14,15]

 ; AVX512F-NEXT:    jne LBB22_9
 ; AVX512F-NEXT:  LBB22_10: ## %else11
 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    jne LBB22_11
 ; AVX512F-NEXT:  LBB22_12: ## %else14
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    jne LBB22_13
 ; AVX512F-NEXT:  LBB22_14: ## %else17
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    jne LBB22_15
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    js LBB22_15
 ; AVX512F-NEXT:  LBB22_16: ## %else20
 ; AVX512F-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512F-NEXT:    jne LBB22_17
 ; AVX512F-NEXT:  LBB22_18: ## %else23
 ; AVX512F-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX512F-NEXT:    jne LBB22_19
 ; AVX512F-NEXT:  LBB22_20: ## %else26
 ; AVX512F-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX512F-NEXT:  LBB22_11: ## %cond.load13
 ; AVX512F-NEXT:    vpinsrw $5, 10(%rdi), %xmm1, %xmm0
 ; AVX512F-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    je LBB22_14
 ; AVX512F-NEXT:  LBB22_13: ## %cond.load16
 ; AVX512F-NEXT:    vpinsrw $6, 12(%rdi), %xmm1, %xmm0
 ; AVX512F-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    je LBB22_16
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    jns LBB22_16
 ; AVX512F-NEXT:  LBB22_15: ## %cond.load19
 ; AVX512F-NEXT:    vpinsrw $7, 14(%rdi), %xmm1, %xmm0
 ; AVX512F-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
 ; AVX512F-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512F-NEXT:    je LBB22_18
 ; AVX512F-NEXT:  LBB22_17: ## %cond.load22
 ; AVX512F-NEXT:    vpbroadcastw 16(%rdi), %ymm0
 ; AVX512F-NEXT:    vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3,4,5,6,7],ymm0[8],ymm1[9,10,11,12,13,14,15]

 ; AVX512VLDQ-NEXT:    jne LBB22_9
 ; AVX512VLDQ-NEXT:  LBB22_10: ## %else11
 ; AVX512VLDQ-NEXT:    testb $32, %al
 ; AVX512VLDQ-NEXT:    jne LBB22_11
 ; AVX512VLDQ-NEXT:  LBB22_12: ## %else14
 ; AVX512VLDQ-NEXT:    testb $64, %al
 ; AVX512VLDQ-NEXT:    jne LBB22_13
 ; AVX512VLDQ-NEXT:  LBB22_14: ## %else17
-; AVX512VLDQ-NEXT:    testb $-128, %al
-; AVX512VLDQ-NEXT:    jne LBB22_15
+; AVX512VLDQ-NEXT:    testb %al, %al
+; AVX512VLDQ-NEXT:    js LBB22_15
 ; AVX512VLDQ-NEXT:  LBB22_16: ## %else20
 ; AVX512VLDQ-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512VLDQ-NEXT:    jne LBB22_17
 ; AVX512VLDQ-NEXT:  LBB22_18: ## %else23
 ; AVX512VLDQ-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX512VLDQ-NEXT:    jne LBB22_19
 ; AVX512VLDQ-NEXT:  LBB22_20: ## %else26
 ; AVX512VLDQ-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX512VLDQ-NEXT:  LBB22_11: ## %cond.load13
 ; AVX512VLDQ-NEXT:    vpinsrw $5, 10(%rdi), %xmm1, %xmm0
 ; AVX512VLDQ-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
 ; AVX512VLDQ-NEXT:    testb $64, %al
 ; AVX512VLDQ-NEXT:    je LBB22_14
 ; AVX512VLDQ-NEXT:  LBB22_13: ## %cond.load16
 ; AVX512VLDQ-NEXT:    vpinsrw $6, 12(%rdi), %xmm1, %xmm0
 ; AVX512VLDQ-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
-; AVX512VLDQ-NEXT:    testb $-128, %al
-; AVX512VLDQ-NEXT:    je LBB22_16
+; AVX512VLDQ-NEXT:    testb %al, %al
+; AVX512VLDQ-NEXT:    jns LBB22_16
 ; AVX512VLDQ-NEXT:  LBB22_15: ## %cond.load19
 ; AVX512VLDQ-NEXT:    vpinsrw $7, 14(%rdi), %xmm1, %xmm0
 ; AVX512VLDQ-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
 ; AVX512VLDQ-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512VLDQ-NEXT:    je LBB22_18
 ; AVX512VLDQ-NEXT:  LBB22_17: ## %cond.load22
 ; AVX512VLDQ-NEXT:    vpbroadcastw 16(%rdi), %ymm0
 ; AVX512VLDQ-NEXT:    vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3,4,5,6,7],ymm0[8],ymm1[9,10,11,12,13,14,15]

 ; SSE2-NEXT:    jne LBB23_9
 ; SSE2-NEXT:  LBB23_10: ## %else11
 ; SSE2-NEXT:    testb $32, %al
 ; SSE2-NEXT:    jne LBB23_11
 ; SSE2-NEXT:  LBB23_12: ## %else14
 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    jne LBB23_13
 ; SSE2-NEXT:  LBB23_14: ## %else17
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    jne LBB23_15
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    js LBB23_15
 ; SSE2-NEXT:  LBB23_16: ## %else20
 ; SSE2-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE2-NEXT:    jne LBB23_17
 ; SSE2-NEXT:  LBB23_18: ## %else23
 ; SSE2-NEXT:    testl $512, %eax ## imm = 0x200
 ; SSE2-NEXT:    jne LBB23_19
 ; SSE2-NEXT:  LBB23_20: ## %else26
 ; SSE2-NEXT:    testl $1024, %eax ## imm = 0x400

 ; SSE2-NEXT:  LBB23_13: ## %cond.load16
 ; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [255,255,255,255,255,255,0,255,255,255,255,255,255,255,255,255]
 ; SSE2-NEXT:    pand %xmm0, %xmm1
 ; SSE2-NEXT:    movzbl 6(%rdi), %ecx
 ; SSE2-NEXT:    movd %ecx, %xmm2
 ; SSE2-NEXT:    psllq $48, %xmm2
 ; SSE2-NEXT:    pandn %xmm2, %xmm0
 ; SSE2-NEXT:    por %xmm0, %xmm1
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    je LBB23_16
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    jns LBB23_16
 ; SSE2-NEXT:  LBB23_15: ## %cond.load19
 ; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,255]
 ; SSE2-NEXT:    pand %xmm0, %xmm1
 ; SSE2-NEXT:    movzbl 7(%rdi), %ecx
 ; SSE2-NEXT:    movd %ecx, %xmm2
 ; SSE2-NEXT:    psllq $56, %xmm2
 ; SSE2-NEXT:    pandn %xmm2, %xmm0
 ; SSE2-NEXT:    por %xmm0, %xmm1

 ; SSE42-NEXT:    jne LBB23_9
 ; SSE42-NEXT:  LBB23_10: ## %else11
 ; SSE42-NEXT:    testb $32, %al
 ; SSE42-NEXT:    jne LBB23_11
 ; SSE42-NEXT:  LBB23_12: ## %else14
 ; SSE42-NEXT:    testb $64, %al
 ; SSE42-NEXT:    jne LBB23_13
 ; SSE42-NEXT:  LBB23_14: ## %else17
-; SSE42-NEXT:    testb $-128, %al
-; SSE42-NEXT:    jne LBB23_15
+; SSE42-NEXT:    testb %al, %al
+; SSE42-NEXT:    js LBB23_15
 ; SSE42-NEXT:  LBB23_16: ## %else20
 ; SSE42-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE42-NEXT:    jne LBB23_17
 ; SSE42-NEXT:  LBB23_18: ## %else23
 ; SSE42-NEXT:    testl $512, %eax ## imm = 0x200
 ; SSE42-NEXT:    jne LBB23_19
 ; SSE42-NEXT:  LBB23_20: ## %else26
 ; SSE42-NEXT:    testl $1024, %eax ## imm = 0x400

 ; SSE42-NEXT:    testb $32, %al
 ; SSE42-NEXT:    je LBB23_12
 ; SSE42-NEXT:  LBB23_11: ## %cond.load13
 ; SSE42-NEXT:    pinsrb $5, 5(%rdi), %xmm1
 ; SSE42-NEXT:    testb $64, %al
 ; SSE42-NEXT:    je LBB23_14
 ; SSE42-NEXT:  LBB23_13: ## %cond.load16
 ; SSE42-NEXT:    pinsrb $6, 6(%rdi), %xmm1
-; SSE42-NEXT:    testb $-128, %al
-; SSE42-NEXT:    je LBB23_16
+; SSE42-NEXT:    testb %al, %al
+; SSE42-NEXT:    jns LBB23_16
 ; SSE42-NEXT:  LBB23_15: ## %cond.load19
 ; SSE42-NEXT:    pinsrb $7, 7(%rdi), %xmm1
 ; SSE42-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE42-NEXT:    je LBB23_18
 ; SSE42-NEXT:  LBB23_17: ## %cond.load22
 ; SSE42-NEXT:    pinsrb $8, 8(%rdi), %xmm1
 ; SSE42-NEXT:    testl $512, %eax ## imm = 0x200
 ; SSE42-NEXT:    je LBB23_20

 ; AVX1OR2-NEXT:    jne LBB23_9
 ; AVX1OR2-NEXT:  LBB23_10: ## %else11
 ; AVX1OR2-NEXT:    testb $32, %al
 ; AVX1OR2-NEXT:    jne LBB23_11
 ; AVX1OR2-NEXT:  LBB23_12: ## %else14
 ; AVX1OR2-NEXT:    testb $64, %al
 ; AVX1OR2-NEXT:    jne LBB23_13
 ; AVX1OR2-NEXT:  LBB23_14: ## %else17
-; AVX1OR2-NEXT:    testb $-128, %al
-; AVX1OR2-NEXT:    jne LBB23_15
+; AVX1OR2-NEXT:    testb %al, %al
+; AVX1OR2-NEXT:    js LBB23_15
 ; AVX1OR2-NEXT:  LBB23_16: ## %else20
 ; AVX1OR2-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX1OR2-NEXT:    jne LBB23_17
 ; AVX1OR2-NEXT:  LBB23_18: ## %else23
 ; AVX1OR2-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX1OR2-NEXT:    jne LBB23_19
 ; AVX1OR2-NEXT:  LBB23_20: ## %else26
 ; AVX1OR2-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX1OR2-NEXT:    testb $32, %al
 ; AVX1OR2-NEXT:    je LBB23_12
 ; AVX1OR2-NEXT:  LBB23_11: ## %cond.load13
 ; AVX1OR2-NEXT:    vpinsrb $5, 5(%rdi), %xmm1, %xmm1
 ; AVX1OR2-NEXT:    testb $64, %al
 ; AVX1OR2-NEXT:    je LBB23_14
 ; AVX1OR2-NEXT:  LBB23_13: ## %cond.load16
 ; AVX1OR2-NEXT:    vpinsrb $6, 6(%rdi), %xmm1, %xmm1
-; AVX1OR2-NEXT:    testb $-128, %al
-; AVX1OR2-NEXT:    je LBB23_16
+; AVX1OR2-NEXT:    testb %al, %al
+; AVX1OR2-NEXT:    jns LBB23_16
 ; AVX1OR2-NEXT:  LBB23_15: ## %cond.load19
 ; AVX1OR2-NEXT:    vpinsrb $7, 7(%rdi), %xmm1, %xmm1
 ; AVX1OR2-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX1OR2-NEXT:    je LBB23_18
 ; AVX1OR2-NEXT:  LBB23_17: ## %cond.load22
 ; AVX1OR2-NEXT:    vpinsrb $8, 8(%rdi), %xmm1, %xmm1
 ; AVX1OR2-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX1OR2-NEXT:    je LBB23_20

 ; AVX512F-NEXT:    jne LBB23_9
 ; AVX512F-NEXT:  LBB23_10: ## %else11
 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    jne LBB23_11
 ; AVX512F-NEXT:  LBB23_12: ## %else14
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    jne LBB23_13
 ; AVX512F-NEXT:  LBB23_14: ## %else17
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    jne LBB23_15
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    js LBB23_15
 ; AVX512F-NEXT:  LBB23_16: ## %else20
 ; AVX512F-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512F-NEXT:    jne LBB23_17
 ; AVX512F-NEXT:  LBB23_18: ## %else23
 ; AVX512F-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX512F-NEXT:    jne LBB23_19
 ; AVX512F-NEXT:  LBB23_20: ## %else26
 ; AVX512F-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    je LBB23_12
 ; AVX512F-NEXT:  LBB23_11: ## %cond.load13
 ; AVX512F-NEXT:    vpinsrb $5, 5(%rdi), %xmm1, %xmm1
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    je LBB23_14
 ; AVX512F-NEXT:  LBB23_13: ## %cond.load16
 ; AVX512F-NEXT:    vpinsrb $6, 6(%rdi), %xmm1, %xmm1
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    je LBB23_16
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    jns LBB23_16
 ; AVX512F-NEXT:  LBB23_15: ## %cond.load19
 ; AVX512F-NEXT:    vpinsrb $7, 7(%rdi), %xmm1, %xmm1
 ; AVX512F-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512F-NEXT:    je LBB23_18
 ; AVX512F-NEXT:  LBB23_17: ## %cond.load22
 ; AVX512F-NEXT:    vpinsrb $8, 8(%rdi), %xmm1, %xmm1
 ; AVX512F-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX512F-NEXT:    je LBB23_20

 ; AVX512VLDQ-NEXT:    jne LBB23_9
 ; AVX512VLDQ-NEXT:  LBB23_10: ## %else11
 ; AVX512VLDQ-NEXT:    testb $32, %al
 ; AVX512VLDQ-NEXT:    jne LBB23_11
 ; AVX512VLDQ-NEXT:  LBB23_12: ## %else14
 ; AVX512VLDQ-NEXT:    testb $64, %al
 ; AVX512VLDQ-NEXT:    jne LBB23_13
 ; AVX512VLDQ-NEXT:  LBB23_14: ## %else17
-; AVX512VLDQ-NEXT:    testb $-128, %al
-; AVX512VLDQ-NEXT:    jne LBB23_15
+; AVX512VLDQ-NEXT:    testb %al, %al
+; AVX512VLDQ-NEXT:    js LBB23_15
 ; AVX512VLDQ-NEXT:  LBB23_16: ## %else20
 ; AVX512VLDQ-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512VLDQ-NEXT:    jne LBB23_17
 ; AVX512VLDQ-NEXT:  LBB23_18: ## %else23
 ; AVX512VLDQ-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX512VLDQ-NEXT:    jne LBB23_19
 ; AVX512VLDQ-NEXT:  LBB23_20: ## %else26
 ; AVX512VLDQ-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX512VLDQ-NEXT:    testb $32, %al
 ; AVX512VLDQ-NEXT:    je LBB23_12
 ; AVX512VLDQ-NEXT:  LBB23_11: ## %cond.load13
 ; AVX512VLDQ-NEXT:    vpinsrb $5, 5(%rdi), %xmm1, %xmm1
 ; AVX512VLDQ-NEXT:    testb $64, %al
 ; AVX512VLDQ-NEXT:    je LBB23_14
 ; AVX512VLDQ-NEXT:  LBB23_13: ## %cond.load16
 ; AVX512VLDQ-NEXT:    vpinsrb $6, 6(%rdi), %xmm1, %xmm1
-; AVX512VLDQ-NEXT:    testb $-128, %al
-; AVX512VLDQ-NEXT:    je LBB23_16
+; AVX512VLDQ-NEXT:    testb %al, %al
+; AVX512VLDQ-NEXT:    jns LBB23_16
 ; AVX512VLDQ-NEXT:  LBB23_15: ## %cond.load19
 ; AVX512VLDQ-NEXT:    vpinsrb $7, 7(%rdi), %xmm1, %xmm1
 ; AVX512VLDQ-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512VLDQ-NEXT:    je LBB23_18
 ; AVX512VLDQ-NEXT:  LBB23_17: ## %cond.load22
 ; AVX512VLDQ-NEXT:    vpinsrb $8, 8(%rdi), %xmm1, %xmm1
 ; AVX512VLDQ-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX512VLDQ-NEXT:    je LBB23_20

 ; SSE2-NEXT:    jne LBB24_9
 ; SSE2-NEXT:  LBB24_10: ## %else11
 ; SSE2-NEXT:    testb $32, %al
 ; SSE2-NEXT:    jne LBB24_11
 ; SSE2-NEXT:  LBB24_12: ## %else14
 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    jne LBB24_13
 ; SSE2-NEXT:  LBB24_14: ## %else17
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    jne LBB24_15
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    js LBB24_15
 ; SSE2-NEXT:  LBB24_16: ## %else20
 ; SSE2-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE2-NEXT:    jne LBB24_17
 ; SSE2-NEXT:  LBB24_18: ## %else23
 ; SSE2-NEXT:    testl $512, %eax ## imm = 0x200
 ; SSE2-NEXT:    jne LBB24_19
 ; SSE2-NEXT:  LBB24_20: ## %else26
 ; SSE2-NEXT:    testl $1024, %eax ## imm = 0x400
 ; SSE2-NEXT:    jne LBB24_21
 ; SSE2-NEXT:  LBB24_22: ## %else29
 ; SSE2-NEXT:    testl $2048, %eax ## imm = 0x800
 ; SSE2-NEXT:    jne LBB24_23
 ; SSE2-NEXT:  LBB24_24: ## %else32
 ; SSE2-NEXT:    testl $4096, %eax ## imm = 0x1000
 ; SSE2-NEXT:    jne LBB24_25
 ; SSE2-NEXT:  LBB24_26: ## %else35
 ; SSE2-NEXT:    testl $8192, %eax ## imm = 0x2000
 ; SSE2-NEXT:    jne LBB24_27
 ; SSE2-NEXT:  LBB24_28: ## %else38
 ; SSE2-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; SSE2-NEXT:    jne LBB24_29
 ; SSE2-NEXT:  LBB24_30: ## %else41
-; SSE2-NEXT:    testl $32768, %eax ## imm = 0x8000
-; SSE2-NEXT:    jne LBB24_31
+; SSE2-NEXT:    testw %ax, %ax
+; SSE2-NEXT:    js LBB24_31
 ; SSE2-NEXT:  LBB24_32: ## %else44
 ; SSE2-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; SSE2-NEXT:    jne LBB24_33
 ; SSE2-NEXT:  LBB24_34: ## %else47
 ; SSE2-NEXT:    testl $131072, %eax ## imm = 0x20000
 ; SSE2-NEXT:    jne LBB24_35
 ; SSE2-NEXT:  LBB24_36: ## %else50
 ; SSE2-NEXT:    testl $262144, %eax ## imm = 0x40000

 ; SSE2-NEXT:  LBB24_13: ## %cond.load16
 ; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [255,255,255,255,255,255,0,255,255,255,255,255,255,255,255,255]
 ; SSE2-NEXT:    pand %xmm0, %xmm2
 ; SSE2-NEXT:    movzbl 6(%rdi), %ecx
 ; SSE2-NEXT:    movd %ecx, %xmm1
 ; SSE2-NEXT:    psllq $48, %xmm1
 ; SSE2-NEXT:    pandn %xmm1, %xmm0
 ; SSE2-NEXT:    por %xmm0, %xmm2
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    je LBB24_16
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    jns LBB24_16
 ; SSE2-NEXT:  LBB24_15: ## %cond.load19
 ; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,255]
 ; SSE2-NEXT:    pand %xmm0, %xmm2
 ; SSE2-NEXT:    movzbl 7(%rdi), %ecx
 ; SSE2-NEXT:    movd %ecx, %xmm1
 ; SSE2-NEXT:    psllq $56, %xmm1
 ; SSE2-NEXT:    pandn %xmm1, %xmm0
 ; SSE2-NEXT:    por %xmm0, %xmm2

 ; SSE2-NEXT:  LBB24_29: ## %cond.load40
 ; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [255,255,255,255,255,255,255,255,255,255,255,255,255,255,0,255]
 ; SSE2-NEXT:    pand %xmm0, %xmm2
 ; SSE2-NEXT:    movzbl 14(%rdi), %ecx
 ; SSE2-NEXT:    movd %ecx, %xmm1
 ; SSE2-NEXT:    pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1]
 ; SSE2-NEXT:    pandn %xmm1, %xmm0
 ; SSE2-NEXT:    por %xmm0, %xmm2
-; SSE2-NEXT:    testl $32768, %eax ## imm = 0x8000
-; SSE2-NEXT:    je LBB24_32
+; SSE2-NEXT:    testw %ax, %ax
+; SSE2-NEXT:    jns LBB24_32
 ; SSE2-NEXT:  LBB24_31: ## %cond.load43
 ; SSE2-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
 ; SSE2-NEXT:    movzbl 15(%rdi), %ecx
 ; SSE2-NEXT:    movd %ecx, %xmm0
 ; SSE2-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0]
 ; SSE2-NEXT:    por %xmm0, %xmm2
 ; SSE2-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; SSE2-NEXT:    je LBB24_34

 ; SSE42-NEXT:    jne LBB24_9
 ; SSE42-NEXT:  LBB24_10: ## %else11
 ; SSE42-NEXT:    testb $32, %al
 ; SSE42-NEXT:    jne LBB24_11
 ; SSE42-NEXT:  LBB24_12: ## %else14
 ; SSE42-NEXT:    testb $64, %al
 ; SSE42-NEXT:    jne LBB24_13
 ; SSE42-NEXT:  LBB24_14: ## %else17
-; SSE42-NEXT:    testb $-128, %al
-; SSE42-NEXT:    jne LBB24_15
+; SSE42-NEXT:    testb %al, %al
+; SSE42-NEXT:    js LBB24_15
 ; SSE42-NEXT:  LBB24_16: ## %else20
 ; SSE42-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE42-NEXT:    jne LBB24_17
 ; SSE42-NEXT:  LBB24_18: ## %else23
 ; SSE42-NEXT:    testl $512, %eax ## imm = 0x200
 ; SSE42-NEXT:    jne LBB24_19
 ; SSE42-NEXT:  LBB24_20: ## %else26
 ; SSE42-NEXT:    testl $1024, %eax ## imm = 0x400
 ; SSE42-NEXT:    jne LBB24_21
 ; SSE42-NEXT:  LBB24_22: ## %else29
 ; SSE42-NEXT:    testl $2048, %eax ## imm = 0x800
 ; SSE42-NEXT:    jne LBB24_23
 ; SSE42-NEXT:  LBB24_24: ## %else32
 ; SSE42-NEXT:    testl $4096, %eax ## imm = 0x1000
 ; SSE42-NEXT:    jne LBB24_25
 ; SSE42-NEXT:  LBB24_26: ## %else35
 ; SSE42-NEXT:    testl $8192, %eax ## imm = 0x2000
 ; SSE42-NEXT:    jne LBB24_27
 ; SSE42-NEXT:  LBB24_28: ## %else38
 ; SSE42-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; SSE42-NEXT:    jne LBB24_29
 ; SSE42-NEXT:  LBB24_30: ## %else41
-; SSE42-NEXT:    testl $32768, %eax ## imm = 0x8000
-; SSE42-NEXT:    jne LBB24_31
+; SSE42-NEXT:    testw %ax, %ax
+; SSE42-NEXT:    js LBB24_31
 ; SSE42-NEXT:  LBB24_32: ## %else44
 ; SSE42-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; SSE42-NEXT:    jne LBB24_33
 ; SSE42-NEXT:  LBB24_34: ## %else47
 ; SSE42-NEXT:    testl $131072, %eax ## imm = 0x20000
 ; SSE42-NEXT:    jne LBB24_35
 ; SSE42-NEXT:  LBB24_36: ## %else50
 ; SSE42-NEXT:    testl $262144, %eax ## imm = 0x40000

 ; SSE42-NEXT:    testb $32, %al
 ; SSE42-NEXT:    je LBB24_12
 ; SSE42-NEXT:  LBB24_11: ## %cond.load13
 ; SSE42-NEXT:    pinsrb $5, 5(%rdi), %xmm2
 ; SSE42-NEXT:    testb $64, %al
 ; SSE42-NEXT:    je LBB24_14
 ; SSE42-NEXT:  LBB24_13: ## %cond.load16
 ; SSE42-NEXT:    pinsrb $6, 6(%rdi), %xmm2
-; SSE42-NEXT:    testb $-128, %al
-; SSE42-NEXT:    je LBB24_16
+; SSE42-NEXT:    testb %al, %al
+; SSE42-NEXT:    jns LBB24_16
 ; SSE42-NEXT:  LBB24_15: ## %cond.load19
 ; SSE42-NEXT:    pinsrb $7, 7(%rdi), %xmm2
 ; SSE42-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE42-NEXT:    je LBB24_18
 ; SSE42-NEXT:  LBB24_17: ## %cond.load22
 ; SSE42-NEXT:    pinsrb $8, 8(%rdi), %xmm2
 ; SSE42-NEXT:    testl $512, %eax ## imm = 0x200
 ; SSE42-NEXT:    je LBB24_20

 ; SSE42-NEXT:    testl $8192, %eax ## imm = 0x2000
 ; SSE42-NEXT:    je LBB24_28
 ; SSE42-NEXT:  LBB24_27: ## %cond.load37
 ; SSE42-NEXT:    pinsrb $13, 13(%rdi), %xmm2
 ; SSE42-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; SSE42-NEXT:    je LBB24_30
 ; SSE42-NEXT:  LBB24_29: ## %cond.load40
 ; SSE42-NEXT:    pinsrb $14, 14(%rdi), %xmm2
-; SSE42-NEXT:    testl $32768, %eax ## imm = 0x8000
-; SSE42-NEXT:    je LBB24_32
+; SSE42-NEXT:    testw %ax, %ax
+; SSE42-NEXT:    jns LBB24_32
 ; SSE42-NEXT:  LBB24_31: ## %cond.load43
 ; SSE42-NEXT:    pinsrb $15, 15(%rdi), %xmm2
 ; SSE42-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; SSE42-NEXT:    je LBB24_34
 ; SSE42-NEXT:  LBB24_33: ## %cond.load46
 ; SSE42-NEXT:    pinsrb $0, 16(%rdi), %xmm3
 ; SSE42-NEXT:    testl $131072, %eax ## imm = 0x20000
 ; SSE42-NEXT:    je LBB24_36

 ; AVX1-NEXT:    jne LBB24_9
 ; AVX1-NEXT:  LBB24_10: ## %else11
 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    jne LBB24_11
 ; AVX1-NEXT:  LBB24_12: ## %else14
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    jne LBB24_13
 ; AVX1-NEXT:  LBB24_14: ## %else17
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    jne LBB24_15
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    js LBB24_15
 ; AVX1-NEXT:  LBB24_16: ## %else20
 ; AVX1-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX1-NEXT:    jne LBB24_17
 ; AVX1-NEXT:  LBB24_18: ## %else23
 ; AVX1-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX1-NEXT:    jne LBB24_19
 ; AVX1-NEXT:  LBB24_20: ## %else26
 ; AVX1-NEXT:    testl $1024, %eax ## imm = 0x400
 ; AVX1-NEXT:    jne LBB24_21
 ; AVX1-NEXT:  LBB24_22: ## %else29
 ; AVX1-NEXT:    testl $2048, %eax ## imm = 0x800
 ; AVX1-NEXT:    jne LBB24_23
 ; AVX1-NEXT:  LBB24_24: ## %else32
 ; AVX1-NEXT:    testl $4096, %eax ## imm = 0x1000
 ; AVX1-NEXT:    jne LBB24_25
 ; AVX1-NEXT:  LBB24_26: ## %else35
 ; AVX1-NEXT:    testl $8192, %eax ## imm = 0x2000
 ; AVX1-NEXT:    jne LBB24_27
 ; AVX1-NEXT:  LBB24_28: ## %else38
 ; AVX1-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; AVX1-NEXT:    jne LBB24_29
 ; AVX1-NEXT:  LBB24_30: ## %else41
-; AVX1-NEXT:    testl $32768, %eax ## imm = 0x8000
-; AVX1-NEXT:    jne LBB24_31
+; AVX1-NEXT:    testw %ax, %ax
+; AVX1-NEXT:    js LBB24_31
 ; AVX1-NEXT:  LBB24_32: ## %else44
 ; AVX1-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; AVX1-NEXT:    jne LBB24_33
 ; AVX1-NEXT:  LBB24_34: ## %else47
 ; AVX1-NEXT:    testl $131072, %eax ## imm = 0x20000
 ; AVX1-NEXT:    jne LBB24_35
 ; AVX1-NEXT:  LBB24_36: ## %else50
 ; AVX1-NEXT:    testl $262144, %eax ## imm = 0x40000

 ; AVX1-NEXT:  LBB24_11: ## %cond.load13
 ; AVX1-NEXT:    vpinsrb $5, 5(%rdi), %xmm1, %xmm0
 ; AVX1-NEXT:    vblendps {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    je LBB24_14
 ; AVX1-NEXT:  LBB24_13: ## %cond.load16
 ; AVX1-NEXT:    vpinsrb $6, 6(%rdi), %xmm1, %xmm0
 ; AVX1-NEXT:    vblendps {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    je LBB24_16
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    jns LBB24_16
 ; AVX1-NEXT:  LBB24_15: ## %cond.load19
 ; AVX1-NEXT:    vpinsrb $7, 7(%rdi), %xmm1, %xmm0
 ; AVX1-NEXT:    vblendps {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
 ; AVX1-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX1-NEXT:    je LBB24_18
 ; AVX1-NEXT:  LBB24_17: ## %cond.load22
 ; AVX1-NEXT:    vpinsrb $8, 8(%rdi), %xmm1, %xmm0
 ; AVX1-NEXT:    vblendps {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]

 ; AVX1-NEXT:  LBB24_27: ## %cond.load37
 ; AVX1-NEXT:    vpinsrb $13, 13(%rdi), %xmm1, %xmm0
 ; AVX1-NEXT:    vblendps {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
 ; AVX1-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; AVX1-NEXT:    je LBB24_30
 ; AVX1-NEXT:  LBB24_29: ## %cond.load40
 ; AVX1-NEXT:    vpinsrb $14, 14(%rdi), %xmm1, %xmm0
 ; AVX1-NEXT:    vblendps {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
-; AVX1-NEXT:    testl $32768, %eax ## imm = 0x8000
-; AVX1-NEXT:    je LBB24_32
+; AVX1-NEXT:    testw %ax, %ax
+; AVX1-NEXT:    jns LBB24_32
 ; AVX1-NEXT:  LBB24_31: ## %cond.load43
 ; AVX1-NEXT:    vpinsrb $15, 15(%rdi), %xmm1, %xmm0
 ; AVX1-NEXT:    vblendps {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
 ; AVX1-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; AVX1-NEXT:    je LBB24_34
 ; AVX1-NEXT:  LBB24_33: ## %cond.load46
 ; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm0
 ; AVX1-NEXT:    vpinsrb $0, 16(%rdi), %xmm0, %xmm0

 ; AVX2-NEXT:    jne LBB24_9
 ; AVX2-NEXT:  LBB24_10: ## %else11
 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    jne LBB24_11
 ; AVX2-NEXT:  LBB24_12: ## %else14
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    jne LBB24_13
 ; AVX2-NEXT:  LBB24_14: ## %else17
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    jne LBB24_15
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    js LBB24_15
 ; AVX2-NEXT:  LBB24_16: ## %else20
 ; AVX2-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX2-NEXT:    jne LBB24_17
 ; AVX2-NEXT:  LBB24_18: ## %else23
 ; AVX2-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX2-NEXT:    jne LBB24_19
 ; AVX2-NEXT:  LBB24_20: ## %else26
 ; AVX2-NEXT:    testl $1024, %eax ## imm = 0x400
 ; AVX2-NEXT:    jne LBB24_21
 ; AVX2-NEXT:  LBB24_22: ## %else29
 ; AVX2-NEXT:    testl $2048, %eax ## imm = 0x800
 ; AVX2-NEXT:    jne LBB24_23
 ; AVX2-NEXT:  LBB24_24: ## %else32
 ; AVX2-NEXT:    testl $4096, %eax ## imm = 0x1000
 ; AVX2-NEXT:    jne LBB24_25
 ; AVX2-NEXT:  LBB24_26: ## %else35
 ; AVX2-NEXT:    testl $8192, %eax ## imm = 0x2000
 ; AVX2-NEXT:    jne LBB24_27
 ; AVX2-NEXT:  LBB24_28: ## %else38
 ; AVX2-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; AVX2-NEXT:    jne LBB24_29
 ; AVX2-NEXT:  LBB24_30: ## %else41
-; AVX2-NEXT:    testl $32768, %eax ## imm = 0x8000
-; AVX2-NEXT:    jne LBB24_31
+; AVX2-NEXT:    testw %ax, %ax
+; AVX2-NEXT:    js LBB24_31
 ; AVX2-NEXT:  LBB24_32: ## %else44
 ; AVX2-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; AVX2-NEXT:    jne LBB24_33
 ; AVX2-NEXT:  LBB24_34: ## %else47
 ; AVX2-NEXT:    testl $131072, %eax ## imm = 0x20000
 ; AVX2-NEXT:    jne LBB24_35
 ; AVX2-NEXT:  LBB24_36: ## %else50
 ; AVX2-NEXT:    testl $262144, %eax ## imm = 0x40000

 ; AVX2-NEXT:  LBB24_11: ## %cond.load13
 ; AVX2-NEXT:    vpinsrb $5, 5(%rdi), %xmm1, %xmm0
 ; AVX2-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    je LBB24_14
 ; AVX2-NEXT:  LBB24_13: ## %cond.load16
 ; AVX2-NEXT:    vpinsrb $6, 6(%rdi), %xmm1, %xmm0
 ; AVX2-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    je LBB24_16
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    jns LBB24_16
 ; AVX2-NEXT:  LBB24_15: ## %cond.load19
 ; AVX2-NEXT:    vpinsrb $7, 7(%rdi), %xmm1, %xmm0
 ; AVX2-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
 ; AVX2-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX2-NEXT:    je LBB24_18
 ; AVX2-NEXT:  LBB24_17: ## %cond.load22
 ; AVX2-NEXT:    vpinsrb $8, 8(%rdi), %xmm1, %xmm0
 ; AVX2-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]

 ; AVX2-NEXT:  LBB24_27: ## %cond.load37
 ; AVX2-NEXT:    vpinsrb $13, 13(%rdi), %xmm1, %xmm0
 ; AVX2-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
 ; AVX2-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; AVX2-NEXT:    je LBB24_30
 ; AVX2-NEXT:  LBB24_29: ## %cond.load40
 ; AVX2-NEXT:    vpinsrb $14, 14(%rdi), %xmm1, %xmm0
 ; AVX2-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
-; AVX2-NEXT:    testl $32768, %eax ## imm = 0x8000
-; AVX2-NEXT:    je LBB24_32
+; AVX2-NEXT:    testw %ax, %ax
+; AVX2-NEXT:    jns LBB24_32
 ; AVX2-NEXT:  LBB24_31: ## %cond.load43
 ; AVX2-NEXT:    vpinsrb $15, 15(%rdi), %xmm1, %xmm0
 ; AVX2-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
 ; AVX2-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; AVX2-NEXT:    je LBB24_34
 ; AVX2-NEXT:  LBB24_33: ## %cond.load46
 ; AVX2-NEXT:    vextracti128 $1, %ymm1, %xmm0
 ; AVX2-NEXT:    vpinsrb $0, 16(%rdi), %xmm0, %xmm0

 ; AVX512F-NEXT:    jne LBB24_9
 ; AVX512F-NEXT:  LBB24_10: ## %else11
 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    jne LBB24_11
 ; AVX512F-NEXT:  LBB24_12: ## %else14
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    jne LBB24_13
 ; AVX512F-NEXT:  LBB24_14: ## %else17
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    jne LBB24_15
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    js LBB24_15
 ; AVX512F-NEXT:  LBB24_16: ## %else20
 ; AVX512F-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512F-NEXT:    jne LBB24_17
 ; AVX512F-NEXT:  LBB24_18: ## %else23
 ; AVX512F-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX512F-NEXT:    jne LBB24_19
 ; AVX512F-NEXT:  LBB24_20: ## %else26
 ; AVX512F-NEXT:    testl $1024, %eax ## imm = 0x400
 ; AVX512F-NEXT:    jne LBB24_21
 ; AVX512F-NEXT:  LBB24_22: ## %else29
 ; AVX512F-NEXT:    testl $2048, %eax ## imm = 0x800
 ; AVX512F-NEXT:    jne LBB24_23
 ; AVX512F-NEXT:  LBB24_24: ## %else32
 ; AVX512F-NEXT:    testl $4096, %eax ## imm = 0x1000
 ; AVX512F-NEXT:    jne LBB24_25
 ; AVX512F-NEXT:  LBB24_26: ## %else35
 ; AVX512F-NEXT:    testl $8192, %eax ## imm = 0x2000
 ; AVX512F-NEXT:    jne LBB24_27
 ; AVX512F-NEXT:  LBB24_28: ## %else38
 ; AVX512F-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; AVX512F-NEXT:    jne LBB24_29
 ; AVX512F-NEXT:  LBB24_30: ## %else41
-; AVX512F-NEXT:    testl $32768, %eax ## imm = 0x8000
-; AVX512F-NEXT:    jne LBB24_31
+; AVX512F-NEXT:    testw %ax, %ax
+; AVX512F-NEXT:    js LBB24_31
 ; AVX512F-NEXT:  LBB24_32: ## %else44
 ; AVX512F-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; AVX512F-NEXT:    jne LBB24_33
 ; AVX512F-NEXT:  LBB24_34: ## %else47
 ; AVX512F-NEXT:    testl $131072, %eax ## imm = 0x20000
 ; AVX512F-NEXT:    jne LBB24_35
 ; AVX512F-NEXT:  LBB24_36: ## %else50
 ; AVX512F-NEXT:    testl $262144, %eax ## imm = 0x40000

 ; AVX512F-NEXT:  LBB24_11: ## %cond.load13
 ; AVX512F-NEXT:    vpinsrb $5, 5(%rdi), %xmm1, %xmm0
 ; AVX512F-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    je LBB24_14
 ; AVX512F-NEXT:  LBB24_13: ## %cond.load16
 ; AVX512F-NEXT:    vpinsrb $6, 6(%rdi), %xmm1, %xmm0
 ; AVX512F-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    je LBB24_16
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    jns LBB24_16
 ; AVX512F-NEXT:  LBB24_15: ## %cond.load19
 ; AVX512F-NEXT:    vpinsrb $7, 7(%rdi), %xmm1, %xmm0
 ; AVX512F-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
 ; AVX512F-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512F-NEXT:    je LBB24_18
 ; AVX512F-NEXT:  LBB24_17: ## %cond.load22
 ; AVX512F-NEXT:    vpinsrb $8, 8(%rdi), %xmm1, %xmm0
 ; AVX512F-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]

 ; AVX512F-NEXT:  LBB24_27: ## %cond.load37
 ; AVX512F-NEXT:    vpinsrb $13, 13(%rdi), %xmm1, %xmm0
 ; AVX512F-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
 ; AVX512F-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; AVX512F-NEXT:    je LBB24_30
 ; AVX512F-NEXT:  LBB24_29: ## %cond.load40
 ; AVX512F-NEXT:    vpinsrb $14, 14(%rdi), %xmm1, %xmm0
 ; AVX512F-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
-; AVX512F-NEXT:    testl $32768, %eax ## imm = 0x8000
-; AVX512F-NEXT:    je LBB24_32
+; AVX512F-NEXT:    testw %ax, %ax
+; AVX512F-NEXT:    jns LBB24_32
 ; AVX512F-NEXT:  LBB24_31: ## %cond.load43
 ; AVX512F-NEXT:    vpinsrb $15, 15(%rdi), %xmm1, %xmm0
 ; AVX512F-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
 ; AVX512F-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; AVX512F-NEXT:    je LBB24_34
 ; AVX512F-NEXT:  LBB24_33: ## %cond.load46
 ; AVX512F-NEXT:    vextracti128 $1, %ymm1, %xmm0
 ; AVX512F-NEXT:    vpinsrb $0, 16(%rdi), %xmm0, %xmm0

 ; AVX512VLDQ-NEXT:    jne LBB24_9
 ; AVX512VLDQ-NEXT:  LBB24_10: ## %else11
 ; AVX512VLDQ-NEXT:    testb $32, %al
 ; AVX512VLDQ-NEXT:    jne LBB24_11
 ; AVX512VLDQ-NEXT:  LBB24_12: ## %else14
 ; AVX512VLDQ-NEXT:    testb $64, %al
 ; AVX512VLDQ-NEXT:    jne LBB24_13
 ; AVX512VLDQ-NEXT:  LBB24_14: ## %else17
-; AVX512VLDQ-NEXT:    testb $-128, %al
-; AVX512VLDQ-NEXT:    jne LBB24_15
+; AVX512VLDQ-NEXT:    testb %al, %al
+; AVX512VLDQ-NEXT:    js LBB24_15
 ; AVX512VLDQ-NEXT:  LBB24_16: ## %else20
 ; AVX512VLDQ-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512VLDQ-NEXT:    jne LBB24_17
 ; AVX512VLDQ-NEXT:  LBB24_18: ## %else23
 ; AVX512VLDQ-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX512VLDQ-NEXT:    jne LBB24_19
 ; AVX512VLDQ-NEXT:  LBB24_20: ## %else26
 ; AVX512VLDQ-NEXT:    testl $1024, %eax ## imm = 0x400
 ; AVX512VLDQ-NEXT:    jne LBB24_21
 ; AVX512VLDQ-NEXT:  LBB24_22: ## %else29
 ; AVX512VLDQ-NEXT:    testl $2048, %eax ## imm = 0x800
 ; AVX512VLDQ-NEXT:    jne LBB24_23
 ; AVX512VLDQ-NEXT:  LBB24_24: ## %else32
 ; AVX512VLDQ-NEXT:    testl $4096, %eax ## imm = 0x1000
 ; AVX512VLDQ-NEXT:    jne LBB24_25
 ; AVX512VLDQ-NEXT:  LBB24_26: ## %else35
 ; AVX512VLDQ-NEXT:    testl $8192, %eax ## imm = 0x2000
 ; AVX512VLDQ-NEXT:    jne LBB24_27
 ; AVX512VLDQ-NEXT:  LBB24_28: ## %else38
 ; AVX512VLDQ-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; AVX512VLDQ-NEXT:    jne LBB24_29
 ; AVX512VLDQ-NEXT:  LBB24_30: ## %else41
-; AVX512VLDQ-NEXT:    testl $32768, %eax ## imm = 0x8000
-; AVX512VLDQ-NEXT:    jne LBB24_31
+; AVX512VLDQ-NEXT:    testw %ax, %ax
+; AVX512VLDQ-NEXT:    js LBB24_31
 ; AVX512VLDQ-NEXT:  LBB24_32: ## %else44
 ; AVX512VLDQ-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; AVX512VLDQ-NEXT:    jne LBB24_33
 ; AVX512VLDQ-NEXT:  LBB24_34: ## %else47
 ; AVX512VLDQ-NEXT:    testl $131072, %eax ## imm = 0x20000
 ; AVX512VLDQ-NEXT:    jne LBB24_35
 ; AVX512VLDQ-NEXT:  LBB24_36: ## %else50
 ; AVX512VLDQ-NEXT:    testl $262144, %eax ## imm = 0x40000

 ; AVX512VLDQ-NEXT:  LBB24_11: ## %cond.load13
 ; AVX512VLDQ-NEXT:    vpinsrb $5, 5(%rdi), %xmm1, %xmm0
 ; AVX512VLDQ-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
 ; AVX512VLDQ-NEXT:    testb $64, %al
 ; AVX512VLDQ-NEXT:    je LBB24_14
 ; AVX512VLDQ-NEXT:  LBB24_13: ## %cond.load16
 ; AVX512VLDQ-NEXT:    vpinsrb $6, 6(%rdi), %xmm1, %xmm0
 ; AVX512VLDQ-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
-; AVX512VLDQ-NEXT:    testb $-128, %al
-; AVX512VLDQ-NEXT:    je LBB24_16
+; AVX512VLDQ-NEXT:    testb %al, %al
+; AVX512VLDQ-NEXT:    jns LBB24_16
 ; AVX512VLDQ-NEXT:  LBB24_15: ## %cond.load19
 ; AVX512VLDQ-NEXT:    vpinsrb $7, 7(%rdi), %xmm1, %xmm0
 ; AVX512VLDQ-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
 ; AVX512VLDQ-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512VLDQ-NEXT:    je LBB24_18
 ; AVX512VLDQ-NEXT:  LBB24_17: ## %cond.load22
 ; AVX512VLDQ-NEXT:    vpinsrb $8, 8(%rdi), %xmm1, %xmm0
 ; AVX512VLDQ-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]

 ; AVX512VLDQ-NEXT:  LBB24_27: ## %cond.load37
 ; AVX512VLDQ-NEXT:    vpinsrb $13, 13(%rdi), %xmm1, %xmm0
 ; AVX512VLDQ-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
 ; AVX512VLDQ-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; AVX512VLDQ-NEXT:    je LBB24_30
 ; AVX512VLDQ-NEXT:  LBB24_29: ## %cond.load40
 ; AVX512VLDQ-NEXT:    vpinsrb $14, 14(%rdi), %xmm1, %xmm0
 ; AVX512VLDQ-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
-; AVX512VLDQ-NEXT:    testl $32768, %eax ## imm = 0x8000
-; AVX512VLDQ-NEXT:    je LBB24_32
+; AVX512VLDQ-NEXT:    testw %ax, %ax
+; AVX512VLDQ-NEXT:    jns LBB24_32
 ; AVX512VLDQ-NEXT:  LBB24_31: ## %cond.load43
 ; AVX512VLDQ-NEXT:    vpinsrb $15, 15(%rdi), %xmm1, %xmm0
 ; AVX512VLDQ-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5,6,7]
 ; AVX512VLDQ-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; AVX512VLDQ-NEXT:    je LBB24_34
 ; AVX512VLDQ-NEXT:  LBB24_33: ## %cond.load46
 ; AVX512VLDQ-NEXT:    vextracti128 $1, %ymm1, %xmm0
 ; AVX512VLDQ-NEXT:    vpinsrb $0, 16(%rdi), %xmm0, %xmm0

llvm/test/CodeGen/X86/masked_store.ll

 ; SSE2-NEXT:    jne LBB6_9
 ; SSE2-NEXT:  LBB6_10: ## %else8
 ; SSE2-NEXT:    testb $32, %al
 ; SSE2-NEXT:    jne LBB6_11
 ; SSE2-NEXT:  LBB6_12: ## %else10
 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    jne LBB6_13
 ; SSE2-NEXT:  LBB6_14: ## %else12
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    jne LBB6_15
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    js LBB6_15
 ; SSE2-NEXT:  LBB6_16: ## %else14
 ; SSE2-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE2-NEXT:    jne LBB6_17
 ; SSE2-NEXT:  LBB6_18: ## %else16
 ; SSE2-NEXT:    testl $512, %eax ## imm = 0x200
 ; SSE2-NEXT:    jne LBB6_19
 ; SSE2-NEXT:  LBB6_20: ## %else18
 ; SSE2-NEXT:    testl $1024, %eax ## imm = 0x400

 ; SSE2-NEXT:    shufps {{.*#+}} xmm0 = xmm0[1,1],xmm1[1,1]
 ; SSE2-NEXT:    movss %xmm0, 20(%rdi)
 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    je LBB6_14
 ; SSE2-NEXT:  LBB6_13: ## %cond.store11
 ; SSE2-NEXT:    movaps %xmm1, %xmm0
 ; SSE2-NEXT:    unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]
 ; SSE2-NEXT:    movss %xmm0, 24(%rdi)
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    je LBB6_16
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    jns LBB6_16
 ; SSE2-NEXT:  LBB6_15: ## %cond.store13
 ; SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]
 ; SSE2-NEXT:    movss %xmm1, 28(%rdi)
 ; SSE2-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE2-NEXT:    je LBB6_18
 ; SSE2-NEXT:  LBB6_17: ## %cond.store15
 ; SSE2-NEXT:    movss %xmm2, 32(%rdi)
 ; SSE2-NEXT:    testl $512, %eax ## imm = 0x200

 ; SSE4-NEXT:    jne LBB6_9
 ; SSE4-NEXT:  LBB6_10: ## %else8
 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    jne LBB6_11
 ; SSE4-NEXT:  LBB6_12: ## %else10
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    jne LBB6_13
 ; SSE4-NEXT:  LBB6_14: ## %else12
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    jne LBB6_15
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    js LBB6_15
 ; SSE4-NEXT:  LBB6_16: ## %else14
 ; SSE4-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE4-NEXT:    jne LBB6_17
 ; SSE4-NEXT:  LBB6_18: ## %else16
 ; SSE4-NEXT:    testl $512, %eax ## imm = 0x200
 ; SSE4-NEXT:    jne LBB6_19
 ; SSE4-NEXT:  LBB6_20: ## %else18
 ; SSE4-NEXT:    testl $1024, %eax ## imm = 0x400

 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    je LBB6_12
 ; SSE4-NEXT:  LBB6_11: ## %cond.store9
 ; SSE4-NEXT:    extractps $1, %xmm1, 20(%rdi)
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    je LBB6_14
 ; SSE4-NEXT:  LBB6_13: ## %cond.store11
 ; SSE4-NEXT:    extractps $2, %xmm1, 24(%rdi)
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    je LBB6_16
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    jns LBB6_16
 ; SSE4-NEXT:  LBB6_15: ## %cond.store13
 ; SSE4-NEXT:    extractps $3, %xmm1, 28(%rdi)
 ; SSE4-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE4-NEXT:    je LBB6_18
 ; SSE4-NEXT:  LBB6_17: ## %cond.store15
 ; SSE4-NEXT:    movss %xmm2, 32(%rdi)
 ; SSE4-NEXT:    testl $512, %eax ## imm = 0x200
 ; SSE4-NEXT:    je LBB6_20

 ; SSE2-NEXT:    jne LBB14_9
 ; SSE2-NEXT:  LBB14_10: ## %else8
 ; SSE2-NEXT:    testb $32, %al
 ; SSE2-NEXT:    jne LBB14_11
 ; SSE2-NEXT:  LBB14_12: ## %else10
 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    jne LBB14_13
 ; SSE2-NEXT:  LBB14_14: ## %else12
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    jne LBB14_15
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    js LBB14_15
 ; SSE2-NEXT:  LBB14_16: ## %else14
 ; SSE2-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE2-NEXT:    jne LBB14_17
 ; SSE2-NEXT:  LBB14_18: ## %else16
 ; SSE2-NEXT:    testl $512, %eax ## imm = 0x200
 ; SSE2-NEXT:    jne LBB14_19
 ; SSE2-NEXT:  LBB14_20: ## %else18
 ; SSE2-NEXT:    testl $1024, %eax ## imm = 0x400

 ; SSE2-NEXT:  LBB14_11: ## %cond.store9
 ; SSE2-NEXT:    pextrw $5, %xmm2, %ecx
 ; SSE2-NEXT:    movw %cx, 10(%rdi)
 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    je LBB14_14
 ; SSE2-NEXT:  LBB14_13: ## %cond.store11
 ; SSE2-NEXT:    pextrw $6, %xmm2, %ecx
 ; SSE2-NEXT:    movw %cx, 12(%rdi)
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    je LBB14_16
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    jns LBB14_16
 ; SSE2-NEXT:  LBB14_15: ## %cond.store13
 ; SSE2-NEXT:    pextrw $7, %xmm2, %ecx
 ; SSE2-NEXT:    movw %cx, 14(%rdi)
 ; SSE2-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE2-NEXT:    je LBB14_18
 ; SSE2-NEXT:  LBB14_17: ## %cond.store15
 ; SSE2-NEXT:    movd %xmm3, %ecx
 ; SSE2-NEXT:    movw %cx, 16(%rdi)

 ; SSE4-NEXT:    jne LBB14_9
 ; SSE4-NEXT:  LBB14_10: ## %else8
 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    jne LBB14_11
 ; SSE4-NEXT:  LBB14_12: ## %else10
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    jne LBB14_13
 ; SSE4-NEXT:  LBB14_14: ## %else12
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    jne LBB14_15
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    js LBB14_15
 ; SSE4-NEXT:  LBB14_16: ## %else14
 ; SSE4-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE4-NEXT:    jne LBB14_17
 ; SSE4-NEXT:  LBB14_18: ## %else16
 ; SSE4-NEXT:    testl $512, %eax ## imm = 0x200
 ; SSE4-NEXT:    jne LBB14_19
 ; SSE4-NEXT:  LBB14_20: ## %else18
 ; SSE4-NEXT:    testl $1024, %eax ## imm = 0x400

 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    je LBB14_12
 ; SSE4-NEXT:  LBB14_11: ## %cond.store9
 ; SSE4-NEXT:    pextrw $5, %xmm2, 10(%rdi)
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    je LBB14_14
 ; SSE4-NEXT:  LBB14_13: ## %cond.store11
 ; SSE4-NEXT:    pextrw $6, %xmm2, 12(%rdi)
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    je LBB14_16
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    jns LBB14_16
 ; SSE4-NEXT:  LBB14_15: ## %cond.store13
 ; SSE4-NEXT:    pextrw $7, %xmm2, 14(%rdi)
 ; SSE4-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE4-NEXT:    je LBB14_18
 ; SSE4-NEXT:  LBB14_17: ## %cond.store15
 ; SSE4-NEXT:    pextrw $0, %xmm3, 16(%rdi)
 ; SSE4-NEXT:    testl $512, %eax ## imm = 0x200
 ; SSE4-NEXT:    je LBB14_20

 ; AVX1-NEXT:    jne LBB14_9
 ; AVX1-NEXT:  LBB14_10: ## %else8
 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    jne LBB14_11
 ; AVX1-NEXT:  LBB14_12: ## %else10
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    jne LBB14_13
 ; AVX1-NEXT:  LBB14_14: ## %else12
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    je LBB14_16
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    jns LBB14_16
 ; AVX1-NEXT:  LBB14_15: ## %cond.store13
 ; AVX1-NEXT:    vpextrw $7, %xmm1, 14(%rdi)
 ; AVX1-NEXT:  LBB14_16: ## %else14
 ; AVX1-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm0
 ; AVX1-NEXT:    jne LBB14_17
 ; AVX1-NEXT:  ## %bb.18: ## %else16
 ; AVX1-NEXT:    testl $512, %eax ## imm = 0x200

 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    je LBB14_12
 ; AVX1-NEXT:  LBB14_11: ## %cond.store9
 ; AVX1-NEXT:    vpextrw $5, %xmm1, 10(%rdi)
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    je LBB14_14
 ; AVX1-NEXT:  LBB14_13: ## %cond.store11
 ; AVX1-NEXT:    vpextrw $6, %xmm1, 12(%rdi)
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    jne LBB14_15
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    js LBB14_15
 ; AVX1-NEXT:    jmp LBB14_16
 ; AVX1-NEXT:  LBB14_17: ## %cond.store15
 ; AVX1-NEXT:    vpextrw $0, %xmm0, 16(%rdi)
 ; AVX1-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX1-NEXT:    je LBB14_20
 ; AVX1-NEXT:  LBB14_19: ## %cond.store17
 ; AVX1-NEXT:    vpextrw $1, %xmm0, 18(%rdi)
 ; AVX1-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX2-NEXT:    jne LBB14_9
 ; AVX2-NEXT:  LBB14_10: ## %else8
 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    jne LBB14_11
 ; AVX2-NEXT:  LBB14_12: ## %else10
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    jne LBB14_13
 ; AVX2-NEXT:  LBB14_14: ## %else12
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    je LBB14_16
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    jns LBB14_16
 ; AVX2-NEXT:  LBB14_15: ## %cond.store13
 ; AVX2-NEXT:    vpextrw $7, %xmm1, 14(%rdi)
 ; AVX2-NEXT:  LBB14_16: ## %else14
 ; AVX2-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX2-NEXT:    vextracti128 $1, %ymm1, %xmm0
 ; AVX2-NEXT:    jne LBB14_17
 ; AVX2-NEXT:  ## %bb.18: ## %else16
 ; AVX2-NEXT:    testl $512, %eax ## imm = 0x200

 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    je LBB14_12
 ; AVX2-NEXT:  LBB14_11: ## %cond.store9
 ; AVX2-NEXT:    vpextrw $5, %xmm1, 10(%rdi)
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    je LBB14_14
 ; AVX2-NEXT:  LBB14_13: ## %cond.store11
 ; AVX2-NEXT:    vpextrw $6, %xmm1, 12(%rdi)
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    jne LBB14_15
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    js LBB14_15
 ; AVX2-NEXT:    jmp LBB14_16
 ; AVX2-NEXT:  LBB14_17: ## %cond.store15
 ; AVX2-NEXT:    vpextrw $0, %xmm0, 16(%rdi)
 ; AVX2-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX2-NEXT:    je LBB14_20
 ; AVX2-NEXT:  LBB14_19: ## %cond.store17
 ; AVX2-NEXT:    vpextrw $1, %xmm0, 18(%rdi)
 ; AVX2-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX512F-NEXT:    jne LBB14_9
 ; AVX512F-NEXT:  LBB14_10: ## %else8
 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    jne LBB14_11
 ; AVX512F-NEXT:  LBB14_12: ## %else10
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    jne LBB14_13
 ; AVX512F-NEXT:  LBB14_14: ## %else12
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    je LBB14_16
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    jns LBB14_16
 ; AVX512F-NEXT:  LBB14_15: ## %cond.store13
 ; AVX512F-NEXT:    vpextrw $7, %xmm1, 14(%rdi)
 ; AVX512F-NEXT:  LBB14_16: ## %else14
 ; AVX512F-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512F-NEXT:    vextracti128 $1, %ymm1, %xmm0
 ; AVX512F-NEXT:    jne LBB14_17
 ; AVX512F-NEXT:  ## %bb.18: ## %else16
 ; AVX512F-NEXT:    testl $512, %eax ## imm = 0x200

 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    je LBB14_12
 ; AVX512F-NEXT:  LBB14_11: ## %cond.store9
 ; AVX512F-NEXT:    vpextrw $5, %xmm1, 10(%rdi)
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    je LBB14_14
 ; AVX512F-NEXT:  LBB14_13: ## %cond.store11
 ; AVX512F-NEXT:    vpextrw $6, %xmm1, 12(%rdi)
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    jne LBB14_15
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    js LBB14_15
 ; AVX512F-NEXT:    jmp LBB14_16
 ; AVX512F-NEXT:  LBB14_17: ## %cond.store15
 ; AVX512F-NEXT:    vpextrw $0, %xmm0, 16(%rdi)
 ; AVX512F-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX512F-NEXT:    je LBB14_20
 ; AVX512F-NEXT:  LBB14_19: ## %cond.store17
 ; AVX512F-NEXT:    vpextrw $1, %xmm0, 18(%rdi)
 ; AVX512F-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX512VLDQ-NEXT:    jne LBB14_9
 ; AVX512VLDQ-NEXT:  LBB14_10: ## %else8
 ; AVX512VLDQ-NEXT:    testb $32, %al
 ; AVX512VLDQ-NEXT:    jne LBB14_11
 ; AVX512VLDQ-NEXT:  LBB14_12: ## %else10
 ; AVX512VLDQ-NEXT:    testb $64, %al
 ; AVX512VLDQ-NEXT:    jne LBB14_13
 ; AVX512VLDQ-NEXT:  LBB14_14: ## %else12
-; AVX512VLDQ-NEXT:    testb $-128, %al
-; AVX512VLDQ-NEXT:    je LBB14_16
+; AVX512VLDQ-NEXT:    testb %al, %al
+; AVX512VLDQ-NEXT:    jns LBB14_16
 ; AVX512VLDQ-NEXT:  LBB14_15: ## %cond.store13
 ; AVX512VLDQ-NEXT:    vpextrw $7, %xmm1, 14(%rdi)
 ; AVX512VLDQ-NEXT:  LBB14_16: ## %else14
 ; AVX512VLDQ-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512VLDQ-NEXT:    vextracti128 $1, %ymm1, %xmm0
 ; AVX512VLDQ-NEXT:    jne LBB14_17
 ; AVX512VLDQ-NEXT:  ## %bb.18: ## %else16
 ; AVX512VLDQ-NEXT:    testl $512, %eax ## imm = 0x200

 ; AVX512VLDQ-NEXT:    testb $32, %al
 ; AVX512VLDQ-NEXT:    je LBB14_12
 ; AVX512VLDQ-NEXT:  LBB14_11: ## %cond.store9
 ; AVX512VLDQ-NEXT:    vpextrw $5, %xmm1, 10(%rdi)
 ; AVX512VLDQ-NEXT:    testb $64, %al
 ; AVX512VLDQ-NEXT:    je LBB14_14
 ; AVX512VLDQ-NEXT:  LBB14_13: ## %cond.store11
 ; AVX512VLDQ-NEXT:    vpextrw $6, %xmm1, 12(%rdi)
-; AVX512VLDQ-NEXT:    testb $-128, %al
-; AVX512VLDQ-NEXT:    jne LBB14_15
+; AVX512VLDQ-NEXT:    testb %al, %al
+; AVX512VLDQ-NEXT:    js LBB14_15
 ; AVX512VLDQ-NEXT:    jmp LBB14_16
 ; AVX512VLDQ-NEXT:  LBB14_17: ## %cond.store15
 ; AVX512VLDQ-NEXT:    vpextrw $0, %xmm0, 16(%rdi)
 ; AVX512VLDQ-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX512VLDQ-NEXT:    je LBB14_20
 ; AVX512VLDQ-NEXT:  LBB14_19: ## %cond.store17
 ; AVX512VLDQ-NEXT:    vpextrw $1, %xmm0, 18(%rdi)
 ; AVX512VLDQ-NEXT:    testl $1024, %eax ## imm = 0x400

 ; SSE2-NEXT:    movb %ch, 5(%rdi)
 ; SSE2-NEXT:  LBB15_12: ## %else10
 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    pextrw $3, %xmm1, %ecx
 ; SSE2-NEXT:    je LBB15_14
 ; SSE2-NEXT:  ## %bb.13: ## %cond.store11
 ; SSE2-NEXT:    movb %cl, 6(%rdi)
 ; SSE2-NEXT:  LBB15_14: ## %else12
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    je LBB15_16
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    jns LBB15_16
 ; SSE2-NEXT:  ## %bb.15: ## %cond.store13
 ; SSE2-NEXT:    movb %ch, 7(%rdi)
 ; SSE2-NEXT:  LBB15_16: ## %else14
 ; SSE2-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE2-NEXT:    pextrw $4, %xmm1, %ecx
 ; SSE2-NEXT:    je LBB15_18
 ; SSE2-NEXT:  ## %bb.17: ## %cond.store15
 ; SSE2-NEXT:    movb %cl, 8(%rdi)

 ; SSE4-NEXT:    jne LBB15_9
 ; SSE4-NEXT:  LBB15_10: ## %else8
 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    jne LBB15_11
 ; SSE4-NEXT:  LBB15_12: ## %else10
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    jne LBB15_13
 ; SSE4-NEXT:  LBB15_14: ## %else12
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    jne LBB15_15
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    js LBB15_15
 ; SSE4-NEXT:  LBB15_16: ## %else14
 ; SSE4-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE4-NEXT:    jne LBB15_17
 ; SSE4-NEXT:  LBB15_18: ## %else16
 ; SSE4-NEXT:    testl $512, %eax ## imm = 0x200
 ; SSE4-NEXT:    jne LBB15_19
 ; SSE4-NEXT:  LBB15_20: ## %else18
 ; SSE4-NEXT:    testl $1024, %eax ## imm = 0x400

 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    je LBB15_12
 ; SSE4-NEXT:  LBB15_11: ## %cond.store9
 ; SSE4-NEXT:    pextrb $5, %xmm1, 5(%rdi)
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    je LBB15_14
 ; SSE4-NEXT:  LBB15_13: ## %cond.store11
 ; SSE4-NEXT:    pextrb $6, %xmm1, 6(%rdi)
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    je LBB15_16
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    jns LBB15_16
 ; SSE4-NEXT:  LBB15_15: ## %cond.store13
 ; SSE4-NEXT:    pextrb $7, %xmm1, 7(%rdi)
 ; SSE4-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE4-NEXT:    je LBB15_18
 ; SSE4-NEXT:  LBB15_17: ## %cond.store15
 ; SSE4-NEXT:    pextrb $8, %xmm1, 8(%rdi)
 ; SSE4-NEXT:    testl $512, %eax ## imm = 0x200
 ; SSE4-NEXT:    je LBB15_20

 ; AVX1OR2-NEXT:    jne LBB15_9
 ; AVX1OR2-NEXT:  LBB15_10: ## %else8
 ; AVX1OR2-NEXT:    testb $32, %al
 ; AVX1OR2-NEXT:    jne LBB15_11
 ; AVX1OR2-NEXT:  LBB15_12: ## %else10
 ; AVX1OR2-NEXT:    testb $64, %al
 ; AVX1OR2-NEXT:    jne LBB15_13
 ; AVX1OR2-NEXT:  LBB15_14: ## %else12
-; AVX1OR2-NEXT:    testb $-128, %al
-; AVX1OR2-NEXT:    jne LBB15_15
+; AVX1OR2-NEXT:    testb %al, %al
+; AVX1OR2-NEXT:    js LBB15_15
 ; AVX1OR2-NEXT:  LBB15_16: ## %else14
 ; AVX1OR2-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX1OR2-NEXT:    jne LBB15_17
 ; AVX1OR2-NEXT:  LBB15_18: ## %else16
 ; AVX1OR2-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX1OR2-NEXT:    jne LBB15_19
 ; AVX1OR2-NEXT:  LBB15_20: ## %else18
 ; AVX1OR2-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX1OR2-NEXT:    testb $32, %al
 ; AVX1OR2-NEXT:    je LBB15_12
 ; AVX1OR2-NEXT:  LBB15_11: ## %cond.store9
 ; AVX1OR2-NEXT:    vpextrb $5, %xmm1, 5(%rdi)
 ; AVX1OR2-NEXT:    testb $64, %al
 ; AVX1OR2-NEXT:    je LBB15_14
 ; AVX1OR2-NEXT:  LBB15_13: ## %cond.store11
 ; AVX1OR2-NEXT:    vpextrb $6, %xmm1, 6(%rdi)
-; AVX1OR2-NEXT:    testb $-128, %al
-; AVX1OR2-NEXT:    je LBB15_16
+; AVX1OR2-NEXT:    testb %al, %al
+; AVX1OR2-NEXT:    jns LBB15_16
 ; AVX1OR2-NEXT:  LBB15_15: ## %cond.store13
 ; AVX1OR2-NEXT:    vpextrb $7, %xmm1, 7(%rdi)
 ; AVX1OR2-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX1OR2-NEXT:    je LBB15_18
 ; AVX1OR2-NEXT:  LBB15_17: ## %cond.store15
 ; AVX1OR2-NEXT:    vpextrb $8, %xmm1, 8(%rdi)
 ; AVX1OR2-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX1OR2-NEXT:    je LBB15_20

 ; AVX512F-NEXT:    jne LBB15_9
 ; AVX512F-NEXT:  LBB15_10: ## %else8
 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    jne LBB15_11
 ; AVX512F-NEXT:  LBB15_12: ## %else10
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    jne LBB15_13
 ; AVX512F-NEXT:  LBB15_14: ## %else12
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    jne LBB15_15
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    js LBB15_15
 ; AVX512F-NEXT:  LBB15_16: ## %else14
 ; AVX512F-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512F-NEXT:    jne LBB15_17
 ; AVX512F-NEXT:  LBB15_18: ## %else16
 ; AVX512F-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX512F-NEXT:    jne LBB15_19
 ; AVX512F-NEXT:  LBB15_20: ## %else18
 ; AVX512F-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    je LBB15_12
 ; AVX512F-NEXT:  LBB15_11: ## %cond.store9
 ; AVX512F-NEXT:    vpextrb $5, %xmm1, 5(%rdi)
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    je LBB15_14
 ; AVX512F-NEXT:  LBB15_13: ## %cond.store11
 ; AVX512F-NEXT:    vpextrb $6, %xmm1, 6(%rdi)
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    je LBB15_16
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    jns LBB15_16
 ; AVX512F-NEXT:  LBB15_15: ## %cond.store13
 ; AVX512F-NEXT:    vpextrb $7, %xmm1, 7(%rdi)
 ; AVX512F-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512F-NEXT:    je LBB15_18
 ; AVX512F-NEXT:  LBB15_17: ## %cond.store15
 ; AVX512F-NEXT:    vpextrb $8, %xmm1, 8(%rdi)
 ; AVX512F-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX512F-NEXT:    je LBB15_20

 ; AVX512VLDQ-NEXT:    jne LBB15_9
 ; AVX512VLDQ-NEXT:  LBB15_10: ## %else8
 ; AVX512VLDQ-NEXT:    testb $32, %al
 ; AVX512VLDQ-NEXT:    jne LBB15_11
 ; AVX512VLDQ-NEXT:  LBB15_12: ## %else10
 ; AVX512VLDQ-NEXT:    testb $64, %al
 ; AVX512VLDQ-NEXT:    jne LBB15_13
 ; AVX512VLDQ-NEXT:  LBB15_14: ## %else12
-; AVX512VLDQ-NEXT:    testb $-128, %al
-; AVX512VLDQ-NEXT:    jne LBB15_15
+; AVX512VLDQ-NEXT:    testb %al, %al
+; AVX512VLDQ-NEXT:    js LBB15_15
 ; AVX512VLDQ-NEXT:  LBB15_16: ## %else14
 ; AVX512VLDQ-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512VLDQ-NEXT:    jne LBB15_17
 ; AVX512VLDQ-NEXT:  LBB15_18: ## %else16
 ; AVX512VLDQ-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX512VLDQ-NEXT:    jne LBB15_19
 ; AVX512VLDQ-NEXT:  LBB15_20: ## %else18
 ; AVX512VLDQ-NEXT:    testl $1024, %eax ## imm = 0x400

 ; AVX512VLDQ-NEXT:    testb $32, %al
 ; AVX512VLDQ-NEXT:    je LBB15_12
 ; AVX512VLDQ-NEXT:  LBB15_11: ## %cond.store9
 ; AVX512VLDQ-NEXT:    vpextrb $5, %xmm1, 5(%rdi)
 ; AVX512VLDQ-NEXT:    testb $64, %al
 ; AVX512VLDQ-NEXT:    je LBB15_14
 ; AVX512VLDQ-NEXT:  LBB15_13: ## %cond.store11
 ; AVX512VLDQ-NEXT:    vpextrb $6, %xmm1, 6(%rdi)
-; AVX512VLDQ-NEXT:    testb $-128, %al
-; AVX512VLDQ-NEXT:    je LBB15_16
+; AVX512VLDQ-NEXT:    testb %al, %al
+; AVX512VLDQ-NEXT:    jns LBB15_16
 ; AVX512VLDQ-NEXT:  LBB15_15: ## %cond.store13
 ; AVX512VLDQ-NEXT:    vpextrb $7, %xmm1, 7(%rdi)
 ; AVX512VLDQ-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512VLDQ-NEXT:    je LBB15_18
 ; AVX512VLDQ-NEXT:  LBB15_17: ## %cond.store15
 ; AVX512VLDQ-NEXT:    vpextrb $8, %xmm1, 8(%rdi)
 ; AVX512VLDQ-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX512VLDQ-NEXT:    je LBB15_20

 ; SSE2-NEXT:    movb %ch, 5(%rdi)
 ; SSE2-NEXT:  LBB16_12: ## %else10
 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    pextrw $3, %xmm2, %ecx
 ; SSE2-NEXT:    je LBB16_14
 ; SSE2-NEXT:  ## %bb.13: ## %cond.store11
 ; SSE2-NEXT:    movb %cl, 6(%rdi)
 ; SSE2-NEXT:  LBB16_14: ## %else12
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    je LBB16_16
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    jns LBB16_16
 ; SSE2-NEXT:  ## %bb.15: ## %cond.store13
 ; SSE2-NEXT:    movb %ch, 7(%rdi)
 ; SSE2-NEXT:  LBB16_16: ## %else14
 ; SSE2-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE2-NEXT:    pextrw $4, %xmm2, %ecx
 ; SSE2-NEXT:    je LBB16_18
 ; SSE2-NEXT:  ## %bb.17: ## %cond.store15
 ; SSE2-NEXT:    movb %cl, 8(%rdi)

 ; SSE2-NEXT:    movb %ch, 13(%rdi)
 ; SSE2-NEXT:  LBB16_28: ## %else26
 ; SSE2-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; SSE2-NEXT:    pextrw $7, %xmm2, %ecx
 ; SSE2-NEXT:    je LBB16_30
 ; SSE2-NEXT:  ## %bb.29: ## %cond.store27
 ; SSE2-NEXT:    movb %cl, 14(%rdi)
 ; SSE2-NEXT:  LBB16_30: ## %else28
-; SSE2-NEXT:    testl $32768, %eax ## imm = 0x8000
-; SSE2-NEXT:    je LBB16_32
+; SSE2-NEXT:    testw %ax, %ax
+; SSE2-NEXT:    jns LBB16_32
 ; SSE2-NEXT:  ## %bb.31: ## %cond.store29
 ; SSE2-NEXT:    movb %ch, 15(%rdi)
 ; SSE2-NEXT:  LBB16_32: ## %else30
 ; SSE2-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; SSE2-NEXT:    movd %xmm3, %ecx
 ; SSE2-NEXT:    jne LBB16_33
 ; SSE2-NEXT:  ## %bb.34: ## %else32
 ; SSE2-NEXT:    testl $131072, %eax ## imm = 0x20000

 ; SSE4-NEXT:    jne LBB16_9
 ; SSE4-NEXT:  LBB16_10: ## %else8
 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    jne LBB16_11
 ; SSE4-NEXT:  LBB16_12: ## %else10
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    jne LBB16_13
 ; SSE4-NEXT:  LBB16_14: ## %else12
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    jne LBB16_15
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    js LBB16_15
 ; SSE4-NEXT:  LBB16_16: ## %else14
 ; SSE4-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE4-NEXT:    jne LBB16_17
 ; SSE4-NEXT:  LBB16_18: ## %else16
 ; SSE4-NEXT:    testl $512, %eax ## imm = 0x200
 ; SSE4-NEXT:    jne LBB16_19
 ; SSE4-NEXT:  LBB16_20: ## %else18
 ; SSE4-NEXT:    testl $1024, %eax ## imm = 0x400
 ; SSE4-NEXT:    jne LBB16_21
 ; SSE4-NEXT:  LBB16_22: ## %else20
 ; SSE4-NEXT:    testl $2048, %eax ## imm = 0x800
 ; SSE4-NEXT:    jne LBB16_23
 ; SSE4-NEXT:  LBB16_24: ## %else22
 ; SSE4-NEXT:    testl $4096, %eax ## imm = 0x1000
 ; SSE4-NEXT:    jne LBB16_25
 ; SSE4-NEXT:  LBB16_26: ## %else24
 ; SSE4-NEXT:    testl $8192, %eax ## imm = 0x2000
 ; SSE4-NEXT:    jne LBB16_27
 ; SSE4-NEXT:  LBB16_28: ## %else26
 ; SSE4-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; SSE4-NEXT:    jne LBB16_29
 ; SSE4-NEXT:  LBB16_30: ## %else28
-; SSE4-NEXT:    testl $32768, %eax ## imm = 0x8000
-; SSE4-NEXT:    jne LBB16_31
+; SSE4-NEXT:    testw %ax, %ax
+; SSE4-NEXT:    js LBB16_31
 ; SSE4-NEXT:  LBB16_32: ## %else30
 ; SSE4-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; SSE4-NEXT:    jne LBB16_33
 ; SSE4-NEXT:  LBB16_34: ## %else32
 ; SSE4-NEXT:    testl $131072, %eax ## imm = 0x20000
 ; SSE4-NEXT:    jne LBB16_35
 ; SSE4-NEXT:  LBB16_36: ## %else34
 ; SSE4-NEXT:    testl $262144, %eax ## imm = 0x40000

 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    je LBB16_12
 ; SSE4-NEXT:  LBB16_11: ## %cond.store9
 ; SSE4-NEXT:    pextrb $5, %xmm2, 5(%rdi)
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    je LBB16_14
 ; SSE4-NEXT:  LBB16_13: ## %cond.store11
 ; SSE4-NEXT:    pextrb $6, %xmm2, 6(%rdi)
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    je LBB16_16
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    jns LBB16_16
 ; SSE4-NEXT:  LBB16_15: ## %cond.store13
 ; SSE4-NEXT:    pextrb $7, %xmm2, 7(%rdi)
 ; SSE4-NEXT:    testl $256, %eax ## imm = 0x100
 ; SSE4-NEXT:    je LBB16_18
 ; SSE4-NEXT:  LBB16_17: ## %cond.store15
 ; SSE4-NEXT:    pextrb $8, %xmm2, 8(%rdi)
 ; SSE4-NEXT:    testl $512, %eax ## imm = 0x200
 ; SSE4-NEXT:    je LBB16_20

 ; SSE4-NEXT:    testl $8192, %eax ## imm = 0x2000
 ; SSE4-NEXT:    je LBB16_28
 ; SSE4-NEXT:  LBB16_27: ## %cond.store25
 ; SSE4-NEXT:    pextrb $13, %xmm2, 13(%rdi)
 ; SSE4-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; SSE4-NEXT:    je LBB16_30
 ; SSE4-NEXT:  LBB16_29: ## %cond.store27
 ; SSE4-NEXT:    pextrb $14, %xmm2, 14(%rdi)
-; SSE4-NEXT:    testl $32768, %eax ## imm = 0x8000
-; SSE4-NEXT:    je LBB16_32
+; SSE4-NEXT:    testw %ax, %ax
+; SSE4-NEXT:    jns LBB16_32
 ; SSE4-NEXT:  LBB16_31: ## %cond.store29
 ; SSE4-NEXT:    pextrb $15, %xmm2, 15(%rdi)
 ; SSE4-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; SSE4-NEXT:    je LBB16_34
 ; SSE4-NEXT:  LBB16_33: ## %cond.store31
 ; SSE4-NEXT:    pextrb $0, %xmm3, 16(%rdi)
 ; SSE4-NEXT:    testl $131072, %eax ## imm = 0x20000
 ; SSE4-NEXT:    je LBB16_36

 ; AVX1-NEXT:    jne LBB16_9
 ; AVX1-NEXT:  LBB16_10: ## %else8
 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    jne LBB16_11
 ; AVX1-NEXT:  LBB16_12: ## %else10
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    jne LBB16_13
 ; AVX1-NEXT:  LBB16_14: ## %else12
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    jne LBB16_15
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    js LBB16_15
 ; AVX1-NEXT:  LBB16_16: ## %else14
 ; AVX1-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX1-NEXT:    jne LBB16_17
 ; AVX1-NEXT:  LBB16_18: ## %else16
 ; AVX1-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX1-NEXT:    jne LBB16_19
 ; AVX1-NEXT:  LBB16_20: ## %else18
 ; AVX1-NEXT:    testl $1024, %eax ## imm = 0x400
 ; AVX1-NEXT:    jne LBB16_21
 ; AVX1-NEXT:  LBB16_22: ## %else20
 ; AVX1-NEXT:    testl $2048, %eax ## imm = 0x800
 ; AVX1-NEXT:    jne LBB16_23
 ; AVX1-NEXT:  LBB16_24: ## %else22
 ; AVX1-NEXT:    testl $4096, %eax ## imm = 0x1000
 ; AVX1-NEXT:    jne LBB16_25
 ; AVX1-NEXT:  LBB16_26: ## %else24
 ; AVX1-NEXT:    testl $8192, %eax ## imm = 0x2000
 ; AVX1-NEXT:    jne LBB16_27
 ; AVX1-NEXT:  LBB16_28: ## %else26
 ; AVX1-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; AVX1-NEXT:    jne LBB16_29
 ; AVX1-NEXT:  LBB16_30: ## %else28
-; AVX1-NEXT:    testl $32768, %eax ## imm = 0x8000
-; AVX1-NEXT:    je LBB16_32
+; AVX1-NEXT:    testw %ax, %ax
+; AVX1-NEXT:    jns LBB16_32
 ; AVX1-NEXT:  LBB16_31: ## %cond.store29
 ; AVX1-NEXT:    vpextrb $15, %xmm1, 15(%rdi)
 ; AVX1-NEXT:  LBB16_32: ## %else30
 ; AVX1-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm0
 ; AVX1-NEXT:    jne LBB16_33
 ; AVX1-NEXT:  ## %bb.34: ## %else32
 ; AVX1-NEXT:    testl $131072, %eax ## imm = 0x20000

 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    je LBB16_12
 ; AVX1-NEXT:  LBB16_11: ## %cond.store9
 ; AVX1-NEXT:    vpextrb $5, %xmm1, 5(%rdi)
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    je LBB16_14
 ; AVX1-NEXT:  LBB16_13: ## %cond.store11
 ; AVX1-NEXT:    vpextrb $6, %xmm1, 6(%rdi)
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    je LBB16_16
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    jns LBB16_16
 ; AVX1-NEXT:  LBB16_15: ## %cond.store13
 ; AVX1-NEXT:    vpextrb $7, %xmm1, 7(%rdi)
 ; AVX1-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX1-NEXT:    je LBB16_18
 ; AVX1-NEXT:  LBB16_17: ## %cond.store15
 ; AVX1-NEXT:    vpextrb $8, %xmm1, 8(%rdi)
 ; AVX1-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX1-NEXT:    je LBB16_20

 ; AVX1-NEXT:    testl $8192, %eax ## imm = 0x2000
 ; AVX1-NEXT:    je LBB16_28
 ; AVX1-NEXT:  LBB16_27: ## %cond.store25
 ; AVX1-NEXT:    vpextrb $13, %xmm1, 13(%rdi)
 ; AVX1-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; AVX1-NEXT:    je LBB16_30
 ; AVX1-NEXT:  LBB16_29: ## %cond.store27
 ; AVX1-NEXT:    vpextrb $14, %xmm1, 14(%rdi)
-; AVX1-NEXT:    testl $32768, %eax ## imm = 0x8000
-; AVX1-NEXT:    jne LBB16_31
+; AVX1-NEXT:    testw %ax, %ax
+; AVX1-NEXT:    js LBB16_31
 ; AVX1-NEXT:    jmp LBB16_32
 ; AVX1-NEXT:  LBB16_33: ## %cond.store31
 ; AVX1-NEXT:    vpextrb $0, %xmm0, 16(%rdi)
 ; AVX1-NEXT:    testl $131072, %eax ## imm = 0x20000
 ; AVX1-NEXT:    je LBB16_36
 ; AVX1-NEXT:  LBB16_35: ## %cond.store33
 ; AVX1-NEXT:    vpextrb $1, %xmm0, 17(%rdi)
 ; AVX1-NEXT:    testl $262144, %eax ## imm = 0x40000

 ; AVX2-NEXT:    jne LBB16_9
 ; AVX2-NEXT:  LBB16_10: ## %else8
 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    jne LBB16_11
 ; AVX2-NEXT:  LBB16_12: ## %else10
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    jne LBB16_13
 ; AVX2-NEXT:  LBB16_14: ## %else12
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    jne LBB16_15
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    js LBB16_15
 ; AVX2-NEXT:  LBB16_16: ## %else14
 ; AVX2-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX2-NEXT:    jne LBB16_17
 ; AVX2-NEXT:  LBB16_18: ## %else16
 ; AVX2-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX2-NEXT:    jne LBB16_19
 ; AVX2-NEXT:  LBB16_20: ## %else18
 ; AVX2-NEXT:    testl $1024, %eax ## imm = 0x400
 ; AVX2-NEXT:    jne LBB16_21
 ; AVX2-NEXT:  LBB16_22: ## %else20
 ; AVX2-NEXT:    testl $2048, %eax ## imm = 0x800
 ; AVX2-NEXT:    jne LBB16_23
 ; AVX2-NEXT:  LBB16_24: ## %else22
 ; AVX2-NEXT:    testl $4096, %eax ## imm = 0x1000
 ; AVX2-NEXT:    jne LBB16_25
 ; AVX2-NEXT:  LBB16_26: ## %else24
 ; AVX2-NEXT:    testl $8192, %eax ## imm = 0x2000
 ; AVX2-NEXT:    jne LBB16_27
 ; AVX2-NEXT:  LBB16_28: ## %else26
 ; AVX2-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; AVX2-NEXT:    jne LBB16_29
 ; AVX2-NEXT:  LBB16_30: ## %else28
-; AVX2-NEXT:    testl $32768, %eax ## imm = 0x8000
-; AVX2-NEXT:    je LBB16_32
+; AVX2-NEXT:    testw %ax, %ax
+; AVX2-NEXT:    jns LBB16_32
 ; AVX2-NEXT:  LBB16_31: ## %cond.store29
 ; AVX2-NEXT:    vpextrb $15, %xmm1, 15(%rdi)
 ; AVX2-NEXT:  LBB16_32: ## %else30
 ; AVX2-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; AVX2-NEXT:    vextracti128 $1, %ymm1, %xmm0
 ; AVX2-NEXT:    jne LBB16_33
 ; AVX2-NEXT:  ## %bb.34: ## %else32
 ; AVX2-NEXT:    testl $131072, %eax ## imm = 0x20000

 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    je LBB16_12
 ; AVX2-NEXT:  LBB16_11: ## %cond.store9
 ; AVX2-NEXT:    vpextrb $5, %xmm1, 5(%rdi)
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    je LBB16_14
 ; AVX2-NEXT:  LBB16_13: ## %cond.store11
 ; AVX2-NEXT:    vpextrb $6, %xmm1, 6(%rdi)
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    je LBB16_16
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    jns LBB16_16
 ; AVX2-NEXT:  LBB16_15: ## %cond.store13
 ; AVX2-NEXT:    vpextrb $7, %xmm1, 7(%rdi)
 ; AVX2-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX2-NEXT:    je LBB16_18
 ; AVX2-NEXT:  LBB16_17: ## %cond.store15
 ; AVX2-NEXT:    vpextrb $8, %xmm1, 8(%rdi)
 ; AVX2-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX2-NEXT:    je LBB16_20

 ; AVX2-NEXT:    testl $8192, %eax ## imm = 0x2000
 ; AVX2-NEXT:    je LBB16_28
 ; AVX2-NEXT:  LBB16_27: ## %cond.store25
 ; AVX2-NEXT:    vpextrb $13, %xmm1, 13(%rdi)
 ; AVX2-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; AVX2-NEXT:    je LBB16_30
 ; AVX2-NEXT:  LBB16_29: ## %cond.store27
 ; AVX2-NEXT:    vpextrb $14, %xmm1, 14(%rdi)
-; AVX2-NEXT:    testl $32768, %eax ## imm = 0x8000
-; AVX2-NEXT:    jne LBB16_31
+; AVX2-NEXT:    testw %ax, %ax
+; AVX2-NEXT:    js LBB16_31
 ; AVX2-NEXT:    jmp LBB16_32
 ; AVX2-NEXT:  LBB16_33: ## %cond.store31
 ; AVX2-NEXT:    vpextrb $0, %xmm0, 16(%rdi)
 ; AVX2-NEXT:    testl $131072, %eax ## imm = 0x20000
 ; AVX2-NEXT:    je LBB16_36
 ; AVX2-NEXT:  LBB16_35: ## %cond.store33
 ; AVX2-NEXT:    vpextrb $1, %xmm0, 17(%rdi)
 ; AVX2-NEXT:    testl $262144, %eax ## imm = 0x40000

 ; AVX512F-NEXT:    jne LBB16_9
 ; AVX512F-NEXT:  LBB16_10: ## %else8
 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    jne LBB16_11
 ; AVX512F-NEXT:  LBB16_12: ## %else10
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    jne LBB16_13
 ; AVX512F-NEXT:  LBB16_14: ## %else12
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    jne LBB16_15
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    js LBB16_15
 ; AVX512F-NEXT:  LBB16_16: ## %else14
 ; AVX512F-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512F-NEXT:    jne LBB16_17
 ; AVX512F-NEXT:  LBB16_18: ## %else16
 ; AVX512F-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX512F-NEXT:    jne LBB16_19
 ; AVX512F-NEXT:  LBB16_20: ## %else18
 ; AVX512F-NEXT:    testl $1024, %eax ## imm = 0x400
 ; AVX512F-NEXT:    jne LBB16_21
 ; AVX512F-NEXT:  LBB16_22: ## %else20
 ; AVX512F-NEXT:    testl $2048, %eax ## imm = 0x800
 ; AVX512F-NEXT:    jne LBB16_23
 ; AVX512F-NEXT:  LBB16_24: ## %else22
 ; AVX512F-NEXT:    testl $4096, %eax ## imm = 0x1000
 ; AVX512F-NEXT:    jne LBB16_25
 ; AVX512F-NEXT:  LBB16_26: ## %else24
 ; AVX512F-NEXT:    testl $8192, %eax ## imm = 0x2000
 ; AVX512F-NEXT:    jne LBB16_27
 ; AVX512F-NEXT:  LBB16_28: ## %else26
 ; AVX512F-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; AVX512F-NEXT:    jne LBB16_29
 ; AVX512F-NEXT:  LBB16_30: ## %else28
-; AVX512F-NEXT:    testl $32768, %eax ## imm = 0x8000
-; AVX512F-NEXT:    je LBB16_32
+; AVX512F-NEXT:    testw %ax, %ax
+; AVX512F-NEXT:    jns LBB16_32
 ; AVX512F-NEXT:  LBB16_31: ## %cond.store29
 ; AVX512F-NEXT:    vpextrb $15, %xmm1, 15(%rdi)
 ; AVX512F-NEXT:  LBB16_32: ## %else30
 ; AVX512F-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; AVX512F-NEXT:    vextracti128 $1, %ymm1, %xmm0
 ; AVX512F-NEXT:    jne LBB16_33
 ; AVX512F-NEXT:  ## %bb.34: ## %else32
 ; AVX512F-NEXT:    testl $131072, %eax ## imm = 0x20000

 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    je LBB16_12
 ; AVX512F-NEXT:  LBB16_11: ## %cond.store9
 ; AVX512F-NEXT:    vpextrb $5, %xmm1, 5(%rdi)
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    je LBB16_14
 ; AVX512F-NEXT:  LBB16_13: ## %cond.store11
 ; AVX512F-NEXT:    vpextrb $6, %xmm1, 6(%rdi)
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    je LBB16_16
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    jns LBB16_16
 ; AVX512F-NEXT:  LBB16_15: ## %cond.store13
 ; AVX512F-NEXT:    vpextrb $7, %xmm1, 7(%rdi)
 ; AVX512F-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512F-NEXT:    je LBB16_18
 ; AVX512F-NEXT:  LBB16_17: ## %cond.store15
 ; AVX512F-NEXT:    vpextrb $8, %xmm1, 8(%rdi)
 ; AVX512F-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX512F-NEXT:    je LBB16_20

 ; AVX512F-NEXT:    testl $8192, %eax ## imm = 0x2000
 ; AVX512F-NEXT:    je LBB16_28
 ; AVX512F-NEXT:  LBB16_27: ## %cond.store25
 ; AVX512F-NEXT:    vpextrb $13, %xmm1, 13(%rdi)
 ; AVX512F-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; AVX512F-NEXT:    je LBB16_30
 ; AVX512F-NEXT:  LBB16_29: ## %cond.store27
 ; AVX512F-NEXT:    vpextrb $14, %xmm1, 14(%rdi)
-; AVX512F-NEXT:    testl $32768, %eax ## imm = 0x8000
-; AVX512F-NEXT:    jne LBB16_31
+; AVX512F-NEXT:    testw %ax, %ax
+; AVX512F-NEXT:    js LBB16_31
 ; AVX512F-NEXT:    jmp LBB16_32
 ; AVX512F-NEXT:  LBB16_33: ## %cond.store31
 ; AVX512F-NEXT:    vpextrb $0, %xmm0, 16(%rdi)
 ; AVX512F-NEXT:    testl $131072, %eax ## imm = 0x20000
 ; AVX512F-NEXT:    je LBB16_36
 ; AVX512F-NEXT:  LBB16_35: ## %cond.store33
 ; AVX512F-NEXT:    vpextrb $1, %xmm0, 17(%rdi)
 ; AVX512F-NEXT:    testl $262144, %eax ## imm = 0x40000

 ; AVX512VLDQ-NEXT:    jne LBB16_9
 ; AVX512VLDQ-NEXT:  LBB16_10: ## %else8
 ; AVX512VLDQ-NEXT:    testb $32, %al
 ; AVX512VLDQ-NEXT:    jne LBB16_11
 ; AVX512VLDQ-NEXT:  LBB16_12: ## %else10
 ; AVX512VLDQ-NEXT:    testb $64, %al
 ; AVX512VLDQ-NEXT:    jne LBB16_13
 ; AVX512VLDQ-NEXT:  LBB16_14: ## %else12
-; AVX512VLDQ-NEXT:    testb $-128, %al
-; AVX512VLDQ-NEXT:    jne LBB16_15
+; AVX512VLDQ-NEXT:    testb %al, %al
+; AVX512VLDQ-NEXT:    js LBB16_15
 ; AVX512VLDQ-NEXT:  LBB16_16: ## %else14
 ; AVX512VLDQ-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512VLDQ-NEXT:    jne LBB16_17
 ; AVX512VLDQ-NEXT:  LBB16_18: ## %else16
 ; AVX512VLDQ-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX512VLDQ-NEXT:    jne LBB16_19
 ; AVX512VLDQ-NEXT:  LBB16_20: ## %else18
 ; AVX512VLDQ-NEXT:    testl $1024, %eax ## imm = 0x400
 ; AVX512VLDQ-NEXT:    jne LBB16_21
 ; AVX512VLDQ-NEXT:  LBB16_22: ## %else20
 ; AVX512VLDQ-NEXT:    testl $2048, %eax ## imm = 0x800
 ; AVX512VLDQ-NEXT:    jne LBB16_23
 ; AVX512VLDQ-NEXT:  LBB16_24: ## %else22
 ; AVX512VLDQ-NEXT:    testl $4096, %eax ## imm = 0x1000
 ; AVX512VLDQ-NEXT:    jne LBB16_25
 ; AVX512VLDQ-NEXT:  LBB16_26: ## %else24
 ; AVX512VLDQ-NEXT:    testl $8192, %eax ## imm = 0x2000
 ; AVX512VLDQ-NEXT:    jne LBB16_27
 ; AVX512VLDQ-NEXT:  LBB16_28: ## %else26
 ; AVX512VLDQ-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; AVX512VLDQ-NEXT:    jne LBB16_29
 ; AVX512VLDQ-NEXT:  LBB16_30: ## %else28
-; AVX512VLDQ-NEXT:    testl $32768, %eax ## imm = 0x8000
-; AVX512VLDQ-NEXT:    je LBB16_32
+; AVX512VLDQ-NEXT:    testw %ax, %ax
+; AVX512VLDQ-NEXT:    jns LBB16_32
 ; AVX512VLDQ-NEXT:  LBB16_31: ## %cond.store29
 ; AVX512VLDQ-NEXT:    vpextrb $15, %xmm1, 15(%rdi)
 ; AVX512VLDQ-NEXT:  LBB16_32: ## %else30
 ; AVX512VLDQ-NEXT:    testl $65536, %eax ## imm = 0x10000
 ; AVX512VLDQ-NEXT:    vextracti128 $1, %ymm1, %xmm0
 ; AVX512VLDQ-NEXT:    jne LBB16_33
 ; AVX512VLDQ-NEXT:  ## %bb.34: ## %else32
 ; AVX512VLDQ-NEXT:    testl $131072, %eax ## imm = 0x20000

 ; AVX512VLDQ-NEXT:    testb $32, %al
 ; AVX512VLDQ-NEXT:    je LBB16_12
 ; AVX512VLDQ-NEXT:  LBB16_11: ## %cond.store9
 ; AVX512VLDQ-NEXT:    vpextrb $5, %xmm1, 5(%rdi)
 ; AVX512VLDQ-NEXT:    testb $64, %al
 ; AVX512VLDQ-NEXT:    je LBB16_14
 ; AVX512VLDQ-NEXT:  LBB16_13: ## %cond.store11
 ; AVX512VLDQ-NEXT:    vpextrb $6, %xmm1, 6(%rdi)
-; AVX512VLDQ-NEXT:    testb $-128, %al
-; AVX512VLDQ-NEXT:    je LBB16_16
+; AVX512VLDQ-NEXT:    testb %al, %al
+; AVX512VLDQ-NEXT:    jns LBB16_16
 ; AVX512VLDQ-NEXT:  LBB16_15: ## %cond.store13
 ; AVX512VLDQ-NEXT:    vpextrb $7, %xmm1, 7(%rdi)
 ; AVX512VLDQ-NEXT:    testl $256, %eax ## imm = 0x100
 ; AVX512VLDQ-NEXT:    je LBB16_18
 ; AVX512VLDQ-NEXT:  LBB16_17: ## %cond.store15
 ; AVX512VLDQ-NEXT:    vpextrb $8, %xmm1, 8(%rdi)
 ; AVX512VLDQ-NEXT:    testl $512, %eax ## imm = 0x200
 ; AVX512VLDQ-NEXT:    je LBB16_20

 ; AVX512VLDQ-NEXT:    testl $8192, %eax ## imm = 0x2000
 ; AVX512VLDQ-NEXT:    je LBB16_28
 ; AVX512VLDQ-NEXT:  LBB16_27: ## %cond.store25
 ; AVX512VLDQ-NEXT:    vpextrb $13, %xmm1, 13(%rdi)
 ; AVX512VLDQ-NEXT:    testl $16384, %eax ## imm = 0x4000
 ; AVX512VLDQ-NEXT:    je LBB16_30
 ; AVX512VLDQ-NEXT:  LBB16_29: ## %cond.store27
 ; AVX512VLDQ-NEXT:    vpextrb $14, %xmm1, 14(%rdi)
-; AVX512VLDQ-NEXT:    testl $32768, %eax ## imm = 0x8000
-; AVX512VLDQ-NEXT:    jne LBB16_31
+; AVX512VLDQ-NEXT:    testw %ax, %ax
+; AVX512VLDQ-NEXT:    js LBB16_31
 ; AVX512VLDQ-NEXT:    jmp LBB16_32
 ; AVX512VLDQ-NEXT:  LBB16_33: ## %cond.store31
 ; AVX512VLDQ-NEXT:    vpextrb $0, %xmm0, 16(%rdi)
 ; AVX512VLDQ-NEXT:    testl $131072, %eax ## imm = 0x20000
 ; AVX512VLDQ-NEXT:    je LBB16_36
 ; AVX512VLDQ-NEXT:  LBB16_35: ## %cond.store33
 ; AVX512VLDQ-NEXT:    vpextrb $1, %xmm0, 17(%rdi)
 ; AVX512VLDQ-NEXT:    testl $262144, %eax ## imm = 0x40000

 ; SSE2-NEXT:    jne LBB31_9
 ; SSE2-NEXT:  LBB31_10: ## %else8
 ; SSE2-NEXT:    testb $32, %dil
 ; SSE2-NEXT:    jne LBB31_11
 ; SSE2-NEXT:  LBB31_12: ## %else10
 ; SSE2-NEXT:    testb $64, %dil
 ; SSE2-NEXT:    jne LBB31_13
 ; SSE2-NEXT:  LBB31_14: ## %else12
-; SSE2-NEXT:    testb $-128, %dil
-; SSE2-NEXT:    jne LBB31_15
+; SSE2-NEXT:    testb %dil, %dil
+; SSE2-NEXT:    js LBB31_15
 ; SSE2-NEXT:  LBB31_16: ## %else14
 ; SSE2-NEXT:    testl $256, %edi ## imm = 0x100
 ; SSE2-NEXT:    jne LBB31_17
 ; SSE2-NEXT:  LBB31_18: ## %else16
 ; SSE2-NEXT:    testl $512, %edi ## imm = 0x200
 ; SSE2-NEXT:    jne LBB31_19
 ; SSE2-NEXT:  LBB31_20: ## %else18
 ; SSE2-NEXT:    testl $1024, %edi ## imm = 0x400
 ; SSE2-NEXT:    jne LBB31_21
 ; SSE2-NEXT:  LBB31_22: ## %else20
 ; SSE2-NEXT:    testl $2048, %edi ## imm = 0x800
 ; SSE2-NEXT:    jne LBB31_23
 ; SSE2-NEXT:  LBB31_24: ## %else22
 ; SSE2-NEXT:    testl $4096, %edi ## imm = 0x1000
 ; SSE2-NEXT:    jne LBB31_25
 ; SSE2-NEXT:  LBB31_26: ## %else24
 ; SSE2-NEXT:    testl $8192, %edi ## imm = 0x2000
 ; SSE2-NEXT:    jne LBB31_27
 ; SSE2-NEXT:  LBB31_28: ## %else26
 ; SSE2-NEXT:    testl $16384, %edi ## imm = 0x4000
 ; SSE2-NEXT:    jne LBB31_29
 ; SSE2-NEXT:  LBB31_30: ## %else28
-; SSE2-NEXT:    testl $32768, %edi ## imm = 0x8000
-; SSE2-NEXT:    jne LBB31_31
+; SSE2-NEXT:    testw %di, %di
+; SSE2-NEXT:    js LBB31_31
 ; SSE2-NEXT:  LBB31_32: ## %else30
 ; SSE2-NEXT:    testl $65536, %edi ## imm = 0x10000
 ; SSE2-NEXT:    jne LBB31_33
 ; SSE2-NEXT:  LBB31_34: ## %else32
 ; SSE2-NEXT:    testl $131072, %edi ## imm = 0x20000
 ; SSE2-NEXT:    jne LBB31_35
 ; SSE2-NEXT:  LBB31_36: ## %else34
 ; SSE2-NEXT:    testl $262144, %edi ## imm = 0x40000

 ; SSE2-NEXT:    movd %xmm5, %esi
 ; SSE2-NEXT:    movl %esi, 20(%rdx)
 ; SSE2-NEXT:    testb $64, %dil
 ; SSE2-NEXT:    je LBB31_14
 ; SSE2-NEXT:  LBB31_13: ## %cond.store11
 ; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[2,3,2,3]
 ; SSE2-NEXT:    movd %xmm5, %esi
 ; SSE2-NEXT:    movl %esi, 24(%rdx)
-; SSE2-NEXT:    testb $-128, %dil
-; SSE2-NEXT:    je LBB31_16
+; SSE2-NEXT:    testb %dil, %dil
+; SSE2-NEXT:    jns LBB31_16
 ; SSE2-NEXT:  LBB31_15: ## %cond.store13
 ; SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm4[3,3,3,3]
 ; SSE2-NEXT:    movd %xmm4, %esi
 ; SSE2-NEXT:    movl %esi, 28(%rdx)
 ; SSE2-NEXT:    testl $256, %edi ## imm = 0x100
 ; SSE2-NEXT:    je LBB31_18
 ; SSE2-NEXT:  LBB31_17: ## %cond.store15
 ; SSE2-NEXT:    movl %r9d, 32(%rdx)

 ; SSE2-NEXT:    movd %xmm3, %esi
 ; SSE2-NEXT:    movl %esi, 52(%rdx)
 ; SSE2-NEXT:    testl $16384, %edi ## imm = 0x4000
 ; SSE2-NEXT:    je LBB31_30
 ; SSE2-NEXT:  LBB31_29: ## %cond.store27
 ; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm2[2,3,2,3]
 ; SSE2-NEXT:    movd %xmm3, %esi
 ; SSE2-NEXT:    movl %esi, 56(%rdx)
-; SSE2-NEXT:    testl $32768, %edi ## imm = 0x8000
-; SSE2-NEXT:    je LBB31_32
+; SSE2-NEXT:    testw %di, %di
+; SSE2-NEXT:    jns LBB31_32
 ; SSE2-NEXT:  LBB31_31: ## %cond.store29
 ; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[3,3,3,3]
 ; SSE2-NEXT:    movd %xmm2, %esi
 ; SSE2-NEXT:    movl %esi, 60(%rdx)
 ; SSE2-NEXT:    testl $65536, %edi ## imm = 0x10000
 ; SSE2-NEXT:    je LBB31_34
 ; SSE2-NEXT:  LBB31_33: ## %cond.store31
 ; SSE2-NEXT:    movl %ecx, 64(%rdx)

 ; SSE4-NEXT:    jne LBB31_9
 ; SSE4-NEXT:  LBB31_10: ## %else8
 ; SSE4-NEXT:    testb $32, %dil
 ; SSE4-NEXT:    jne LBB31_11
 ; SSE4-NEXT:  LBB31_12: ## %else10
 ; SSE4-NEXT:    testb $64, %dil
 ; SSE4-NEXT:    jne LBB31_13
 ; SSE4-NEXT:  LBB31_14: ## %else12
-; SSE4-NEXT:    testb $-128, %dil
-; SSE4-NEXT:    jne LBB31_15
+; SSE4-NEXT:    testb %dil, %dil
+; SSE4-NEXT:    js LBB31_15
 ; SSE4-NEXT:  LBB31_16: ## %else14
 ; SSE4-NEXT:    testl $256, %edi ## imm = 0x100
 ; SSE4-NEXT:    jne LBB31_17
 ; SSE4-NEXT:  LBB31_18: ## %else16
 ; SSE4-NEXT:    testl $512, %edi ## imm = 0x200
 ; SSE4-NEXT:    jne LBB31_19
 ; SSE4-NEXT:  LBB31_20: ## %else18
 ; SSE4-NEXT:    testl $1024, %edi ## imm = 0x400
 ; SSE4-NEXT:    jne LBB31_21
 ; SSE4-NEXT:  LBB31_22: ## %else20
 ; SSE4-NEXT:    testl $2048, %edi ## imm = 0x800
 ; SSE4-NEXT:    jne LBB31_23
 ; SSE4-NEXT:  LBB31_24: ## %else22
 ; SSE4-NEXT:    testl $4096, %edi ## imm = 0x1000
 ; SSE4-NEXT:    jne LBB31_25
 ; SSE4-NEXT:  LBB31_26: ## %else24
 ; SSE4-NEXT:    testl $8192, %edi ## imm = 0x2000
 ; SSE4-NEXT:    jne LBB31_27
 ; SSE4-NEXT:  LBB31_28: ## %else26
 ; SSE4-NEXT:    testl $16384, %edi ## imm = 0x4000
 ; SSE4-NEXT:    jne LBB31_29
 ; SSE4-NEXT:  LBB31_30: ## %else28
-; SSE4-NEXT:    testl $32768, %edi ## imm = 0x8000
-; SSE4-NEXT:    jne LBB31_31
+; SSE4-NEXT:    testw %di, %di
+; SSE4-NEXT:    js LBB31_31
 ; SSE4-NEXT:  LBB31_32: ## %else30
 ; SSE4-NEXT:    testl $65536, %edi ## imm = 0x10000
 ; SSE4-NEXT:    jne LBB31_33
 ; SSE4-NEXT:  LBB31_34: ## %else32
 ; SSE4-NEXT:    testl $131072, %edi ## imm = 0x20000
 ; SSE4-NEXT:    jne LBB31_35
 ; SSE4-NEXT:  LBB31_36: ## %else34
 ; SSE4-NEXT:    testl $262144, %edi ## imm = 0x40000

 ; SSE4-NEXT:    testb $32, %dil
 ; SSE4-NEXT:    je LBB31_12
 ; SSE4-NEXT:  LBB31_11: ## %cond.store9
 ; SSE4-NEXT:    movl %ebx, 20(%rdx)
 ; SSE4-NEXT:    testb $64, %dil
 ; SSE4-NEXT:    je LBB31_14
 ; SSE4-NEXT:  LBB31_13: ## %cond.store11
 ; SSE4-NEXT:    movl %r11d, 24(%rdx)
-; SSE4-NEXT:    testb $-128, %dil
-; SSE4-NEXT:    je LBB31_16
+; SSE4-NEXT:    testb %dil, %dil
+; SSE4-NEXT:    jns LBB31_16
 ; SSE4-NEXT:  LBB31_15: ## %cond.store13
 ; SSE4-NEXT:    movl %r10d, 28(%rdx)
 ; SSE4-NEXT:    testl $256, %edi ## imm = 0x100
 ; SSE4-NEXT:    je LBB31_18
 ; SSE4-NEXT:  LBB31_17: ## %cond.store15
 ; SSE4-NEXT:    movl %r9d, 32(%rdx)
 ; SSE4-NEXT:    testl $512, %edi ## imm = 0x200
 ; SSE4-NEXT:    je LBB31_20

 ; SSE4-NEXT:  LBB31_27: ## %cond.store25
 ; SSE4-NEXT:    movl {{[-0-9]+}}(%r{{[sb]}}p), %eax ## 4-byte Reload
 ; SSE4-NEXT:    movl %eax, 52(%rdx)
 ; SSE4-NEXT:    testl $16384, %edi ## imm = 0x4000
 ; SSE4-NEXT:    je LBB31_30
 ; SSE4-NEXT:  LBB31_29: ## %cond.store27
 ; SSE4-NEXT:    movl {{[-0-9]+}}(%r{{[sb]}}p), %eax ## 4-byte Reload
 ; SSE4-NEXT:    movl %eax, 56(%rdx)
-; SSE4-NEXT:    testl $32768, %edi ## imm = 0x8000
-; SSE4-NEXT:    je LBB31_32
+; SSE4-NEXT:    testw %di, %di
+; SSE4-NEXT:    jns LBB31_32
 ; SSE4-NEXT:  LBB31_31: ## %cond.store29
 ; SSE4-NEXT:    movl {{[-0-9]+}}(%r{{[sb]}}p), %eax ## 4-byte Reload
 ; SSE4-NEXT:    movl %eax, 60(%rdx)
 ; SSE4-NEXT:    testl $65536, %edi ## imm = 0x10000
 ; SSE4-NEXT:    je LBB31_34
 ; SSE4-NEXT:  LBB31_33: ## %cond.store31
 ; SSE4-NEXT:    movl {{[-0-9]+}}(%r{{[sb]}}p), %eax ## 4-byte Reload
 ; SSE4-NEXT:    movl %eax, 64(%rdx)

llvm/test/CodeGen/X86/masked_store_trunc.ll

 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    je .LBB9_14
 ; SSE2-NEXT:  # %bb.13: # %cond.store11
 ; SSE2-NEXT:    pextrw $6, %xmm0, %ecx
 ; SSE2-NEXT:    movw %cx, 12(%rdi)
 ; SSE2-NEXT:  .LBB9_14: # %else12
 ; SSE2-NEXT:    psrad $16, %xmm3
 ; SSE2-NEXT:    psrad $16, %xmm2
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    je .LBB9_16
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    jns .LBB9_16
 ; SSE2-NEXT:  # %bb.15: # %cond.store13
 ; SSE2-NEXT:    pextrw $7, %xmm0, %ecx
 ; SSE2-NEXT:    movw %cx, 14(%rdi)
 ; SSE2-NEXT:  .LBB9_16: # %else14
 ; SSE2-NEXT:    packssdw %xmm3, %xmm2
 ; SSE2-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE2-NEXT:    jne .LBB9_17
 ; SSE2-NEXT:  # %bb.18: # %else16

 ; SSE4-NEXT:  .LBB9_12: # %else10
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    je .LBB9_14
 ; SSE4-NEXT:  .LBB9_13: # %cond.store11
 ; SSE4-NEXT:    pextrw $6, %xmm0, 12(%rdi)
 ; SSE4-NEXT:  .LBB9_14: # %else12
 ; SSE4-NEXT:    pblendw {{.*#+}} xmm3 = xmm3[0],xmm8[1],xmm3[2],xmm8[3],xmm3[4],xmm8[5],xmm3[6],xmm8[7]
 ; SSE4-NEXT:    pblendw {{.*#+}} xmm2 = xmm2[0],xmm8[1],xmm2[2],xmm8[3],xmm2[4],xmm8[5],xmm2[6],xmm8[7]
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    je .LBB9_16
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    jns .LBB9_16
 ; SSE4-NEXT:  # %bb.15: # %cond.store13
 ; SSE4-NEXT:    pextrw $7, %xmm0, 14(%rdi)
 ; SSE4-NEXT:  .LBB9_16: # %else14
 ; SSE4-NEXT:    packusdw %xmm3, %xmm2
 ; SSE4-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE4-NEXT:    jne .LBB9_17
 ; SSE4-NEXT:  # %bb.18: # %else16
 ; SSE4-NEXT:    testl $512, %eax # imm = 0x200

 ; AVX1-NEXT:    jne .LBB9_9
 ; AVX1-NEXT:  .LBB9_10: # %else8
 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    jne .LBB9_11
 ; AVX1-NEXT:  .LBB9_12: # %else10
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    jne .LBB9_13
 ; AVX1-NEXT:  .LBB9_14: # %else12
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    je .LBB9_16
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    jns .LBB9_16
 ; AVX1-NEXT:  .LBB9_15: # %cond.store13
 ; AVX1-NEXT:    vpextrw $7, %xmm0, 14(%rdi)
 ; AVX1-NEXT:  .LBB9_16: # %else14
 ; AVX1-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
 ; AVX1-NEXT:    jne .LBB9_17
 ; AVX1-NEXT:  # %bb.18: # %else16
 ; AVX1-NEXT:    testl $512, %eax # imm = 0x200

 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    je .LBB9_12
 ; AVX1-NEXT:  .LBB9_11: # %cond.store9
 ; AVX1-NEXT:    vpextrw $5, %xmm0, 10(%rdi)
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    je .LBB9_14
 ; AVX1-NEXT:  .LBB9_13: # %cond.store11
 ; AVX1-NEXT:    vpextrw $6, %xmm0, 12(%rdi)
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    jne .LBB9_15
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    js .LBB9_15
 ; AVX1-NEXT:    jmp .LBB9_16
 ; AVX1-NEXT:  .LBB9_17: # %cond.store15
 ; AVX1-NEXT:    vpextrw $0, %xmm0, 16(%rdi)
 ; AVX1-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX1-NEXT:    je .LBB9_20
 ; AVX1-NEXT:  .LBB9_19: # %cond.store17
 ; AVX1-NEXT:    vpextrw $1, %xmm0, 18(%rdi)
 ; AVX1-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX2-NEXT:    jne .LBB9_9
 ; AVX2-NEXT:  .LBB9_10: # %else8
 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    jne .LBB9_11
 ; AVX2-NEXT:  .LBB9_12: # %else10
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    jne .LBB9_13
 ; AVX2-NEXT:  .LBB9_14: # %else12
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    je .LBB9_16
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    jns .LBB9_16
 ; AVX2-NEXT:  .LBB9_15: # %cond.store13
 ; AVX2-NEXT:    vpextrw $7, %xmm0, 14(%rdi)
 ; AVX2-NEXT:  .LBB9_16: # %else14
 ; AVX2-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm0
 ; AVX2-NEXT:    jne .LBB9_17
 ; AVX2-NEXT:  # %bb.18: # %else16
 ; AVX2-NEXT:    testl $512, %eax # imm = 0x200

 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    je .LBB9_12
 ; AVX2-NEXT:  .LBB9_11: # %cond.store9
 ; AVX2-NEXT:    vpextrw $5, %xmm0, 10(%rdi)
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    je .LBB9_14
 ; AVX2-NEXT:  .LBB9_13: # %cond.store11
 ; AVX2-NEXT:    vpextrw $6, %xmm0, 12(%rdi)
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    jne .LBB9_15
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    js .LBB9_15
 ; AVX2-NEXT:    jmp .LBB9_16
 ; AVX2-NEXT:  .LBB9_17: # %cond.store15
 ; AVX2-NEXT:    vpextrw $0, %xmm0, 16(%rdi)
 ; AVX2-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX2-NEXT:    je .LBB9_20
 ; AVX2-NEXT:  .LBB9_19: # %cond.store17
 ; AVX2-NEXT:    vpextrw $1, %xmm0, 18(%rdi)
 ; AVX2-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX512F-NEXT:    jne .LBB9_9
 ; AVX512F-NEXT:  .LBB9_10: # %else8
 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    jne .LBB9_11
 ; AVX512F-NEXT:  .LBB9_12: # %else10
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    jne .LBB9_13
 ; AVX512F-NEXT:  .LBB9_14: # %else12
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    je .LBB9_16
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    jns .LBB9_16
 ; AVX512F-NEXT:  .LBB9_15: # %cond.store13
 ; AVX512F-NEXT:    vpextrw $7, %xmm0, 14(%rdi)
 ; AVX512F-NEXT:  .LBB9_16: # %else14
 ; AVX512F-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX512F-NEXT:    vextracti128 $1, %ymm0, %xmm0
 ; AVX512F-NEXT:    jne .LBB9_17
 ; AVX512F-NEXT:  # %bb.18: # %else16
 ; AVX512F-NEXT:    testl $512, %eax # imm = 0x200

 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    je .LBB9_12
 ; AVX512F-NEXT:  .LBB9_11: # %cond.store9
 ; AVX512F-NEXT:    vpextrw $5, %xmm0, 10(%rdi)
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    je .LBB9_14
 ; AVX512F-NEXT:  .LBB9_13: # %cond.store11
 ; AVX512F-NEXT:    vpextrw $6, %xmm0, 12(%rdi)
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    jne .LBB9_15
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    js .LBB9_15
 ; AVX512F-NEXT:    jmp .LBB9_16
 ; AVX512F-NEXT:  .LBB9_17: # %cond.store15
 ; AVX512F-NEXT:    vpextrw $0, %xmm0, 16(%rdi)
 ; AVX512F-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX512F-NEXT:    je .LBB9_20
 ; AVX512F-NEXT:  .LBB9_19: # %cond.store17
 ; AVX512F-NEXT:    vpextrw $1, %xmm0, 18(%rdi)
 ; AVX512F-NEXT:    testl $1024, %eax # imm = 0x400

 ; SSE2-NEXT:    movb %ch, 5(%rdi)
 ; SSE2-NEXT:  .LBB10_12: # %else10
 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    pextrw $3, %xmm0, %ecx
 ; SSE2-NEXT:    je .LBB10_14
 ; SSE2-NEXT:  # %bb.13: # %cond.store11
 ; SSE2-NEXT:    movb %cl, 6(%rdi)
 ; SSE2-NEXT:  .LBB10_14: # %else12
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    je .LBB10_16
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    jns .LBB10_16
 ; SSE2-NEXT:  # %bb.15: # %cond.store13
 ; SSE2-NEXT:    movb %ch, 7(%rdi)
 ; SSE2-NEXT:  .LBB10_16: # %else14
 ; SSE2-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE2-NEXT:    pextrw $4, %xmm0, %ecx
 ; SSE2-NEXT:    je .LBB10_18
 ; SSE2-NEXT:  # %bb.17: # %cond.store15
 ; SSE2-NEXT:    movb %cl, 8(%rdi)

 ; SSE4-NEXT:    jne .LBB10_9
 ; SSE4-NEXT:  .LBB10_10: # %else8
 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    jne .LBB10_11
 ; SSE4-NEXT:  .LBB10_12: # %else10
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    jne .LBB10_13
 ; SSE4-NEXT:  .LBB10_14: # %else12
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    jne .LBB10_15
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    js .LBB10_15
 ; SSE4-NEXT:  .LBB10_16: # %else14
 ; SSE4-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE4-NEXT:    jne .LBB10_17
 ; SSE4-NEXT:  .LBB10_18: # %else16
 ; SSE4-NEXT:    testl $512, %eax # imm = 0x200
 ; SSE4-NEXT:    jne .LBB10_19
 ; SSE4-NEXT:  .LBB10_20: # %else18
 ; SSE4-NEXT:    testl $1024, %eax # imm = 0x400

 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    je .LBB10_12
 ; SSE4-NEXT:  .LBB10_11: # %cond.store9
 ; SSE4-NEXT:    pextrb $5, %xmm0, 5(%rdi)
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    je .LBB10_14
 ; SSE4-NEXT:  .LBB10_13: # %cond.store11
 ; SSE4-NEXT:    pextrb $6, %xmm0, 6(%rdi)
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    je .LBB10_16
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    jns .LBB10_16
 ; SSE4-NEXT:  .LBB10_15: # %cond.store13
 ; SSE4-NEXT:    pextrb $7, %xmm0, 7(%rdi)
 ; SSE4-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE4-NEXT:    je .LBB10_18
 ; SSE4-NEXT:  .LBB10_17: # %cond.store15
 ; SSE4-NEXT:    pextrb $8, %xmm0, 8(%rdi)
 ; SSE4-NEXT:    testl $512, %eax # imm = 0x200
 ; SSE4-NEXT:    je .LBB10_20

 ; AVX1-NEXT:    jne .LBB10_9
 ; AVX1-NEXT:  .LBB10_10: # %else8
 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    jne .LBB10_11
 ; AVX1-NEXT:  .LBB10_12: # %else10
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    jne .LBB10_13
 ; AVX1-NEXT:  .LBB10_14: # %else12
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    jne .LBB10_15
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    js .LBB10_15
 ; AVX1-NEXT:  .LBB10_16: # %else14
 ; AVX1-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX1-NEXT:    jne .LBB10_17
 ; AVX1-NEXT:  .LBB10_18: # %else16
 ; AVX1-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX1-NEXT:    jne .LBB10_19
 ; AVX1-NEXT:  .LBB10_20: # %else18
 ; AVX1-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    je .LBB10_12
 ; AVX1-NEXT:  .LBB10_11: # %cond.store9
 ; AVX1-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    je .LBB10_14
 ; AVX1-NEXT:  .LBB10_13: # %cond.store11
 ; AVX1-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    je .LBB10_16
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    jns .LBB10_16
 ; AVX1-NEXT:  .LBB10_15: # %cond.store13
 ; AVX1-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX1-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX1-NEXT:    je .LBB10_18
 ; AVX1-NEXT:  .LBB10_17: # %cond.store15
 ; AVX1-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX1-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX1-NEXT:    je .LBB10_20

 ; AVX2-NEXT:    jne .LBB10_9
 ; AVX2-NEXT:  .LBB10_10: # %else8
 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    jne .LBB10_11
 ; AVX2-NEXT:  .LBB10_12: # %else10
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    jne .LBB10_13
 ; AVX2-NEXT:  .LBB10_14: # %else12
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    jne .LBB10_15
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    js .LBB10_15
 ; AVX2-NEXT:  .LBB10_16: # %else14
 ; AVX2-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX2-NEXT:    jne .LBB10_17
 ; AVX2-NEXT:  .LBB10_18: # %else16
 ; AVX2-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX2-NEXT:    jne .LBB10_19
 ; AVX2-NEXT:  .LBB10_20: # %else18
 ; AVX2-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    je .LBB10_12
 ; AVX2-NEXT:  .LBB10_11: # %cond.store9
 ; AVX2-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    je .LBB10_14
 ; AVX2-NEXT:  .LBB10_13: # %cond.store11
 ; AVX2-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    je .LBB10_16
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    jns .LBB10_16
 ; AVX2-NEXT:  .LBB10_15: # %cond.store13
 ; AVX2-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX2-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX2-NEXT:    je .LBB10_18
 ; AVX2-NEXT:  .LBB10_17: # %cond.store15
 ; AVX2-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX2-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX2-NEXT:    je .LBB10_20

 ; AVX512F-NEXT:    jne .LBB10_9
 ; AVX512F-NEXT:  .LBB10_10: # %else8
 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    jne .LBB10_11
 ; AVX512F-NEXT:  .LBB10_12: # %else10
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    jne .LBB10_13
 ; AVX512F-NEXT:  .LBB10_14: # %else12
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    jne .LBB10_15
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    js .LBB10_15
 ; AVX512F-NEXT:  .LBB10_16: # %else14
 ; AVX512F-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX512F-NEXT:    jne .LBB10_17
 ; AVX512F-NEXT:  .LBB10_18: # %else16
 ; AVX512F-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX512F-NEXT:    jne .LBB10_19
 ; AVX512F-NEXT:  .LBB10_20: # %else18
 ; AVX512F-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    je .LBB10_12
 ; AVX512F-NEXT:  .LBB10_11: # %cond.store9
 ; AVX512F-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    je .LBB10_14
 ; AVX512F-NEXT:  .LBB10_13: # %cond.store11
 ; AVX512F-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    je .LBB10_16
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    jns .LBB10_16
 ; AVX512F-NEXT:  .LBB10_15: # %cond.store13
 ; AVX512F-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX512F-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX512F-NEXT:    je .LBB10_18
 ; AVX512F-NEXT:  .LBB10_17: # %cond.store15
 ; AVX512F-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX512F-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX512F-NEXT:    je .LBB10_20

 ; SSE2-NEXT:    movb %ch, 5(%rdi)
 ; SSE2-NEXT:  .LBB15_12: # %else10
 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    pextrw $3, %xmm0, %ecx
 ; SSE2-NEXT:    je .LBB15_14
 ; SSE2-NEXT:  # %bb.13: # %cond.store11
 ; SSE2-NEXT:    movb %cl, 6(%rdi)
 ; SSE2-NEXT:  .LBB15_14: # %else12
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    je .LBB15_16
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    jns .LBB15_16
 ; SSE2-NEXT:  # %bb.15: # %cond.store13
 ; SSE2-NEXT:    movb %ch, 7(%rdi)
 ; SSE2-NEXT:  .LBB15_16: # %else14
 ; SSE2-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE2-NEXT:    pextrw $4, %xmm0, %ecx
 ; SSE2-NEXT:    je .LBB15_18
 ; SSE2-NEXT:  # %bb.17: # %cond.store15
 ; SSE2-NEXT:    movb %cl, 8(%rdi)

 ; SSE2-NEXT:    pand %xmm6, %xmm2
 ; SSE2-NEXT:    testl $16384, %eax # imm = 0x4000
 ; SSE2-NEXT:    pextrw $7, %xmm0, %ecx
 ; SSE2-NEXT:    je .LBB15_30
 ; SSE2-NEXT:  # %bb.29: # %cond.store27
 ; SSE2-NEXT:    movb %cl, 14(%rdi)
 ; SSE2-NEXT:  .LBB15_30: # %else28
 ; SSE2-NEXT:    packuswb %xmm3, %xmm2
-; SSE2-NEXT:    testl $32768, %eax # imm = 0x8000
-; SSE2-NEXT:    je .LBB15_32
+; SSE2-NEXT:    testw %ax, %ax
+; SSE2-NEXT:    jns .LBB15_32
 ; SSE2-NEXT:  # %bb.31: # %cond.store29
 ; SSE2-NEXT:    movb %ch, 15(%rdi)
 ; SSE2-NEXT:  .LBB15_32: # %else30
 ; SSE2-NEXT:    testl $65536, %eax # imm = 0x10000
 ; SSE2-NEXT:    movd %xmm2, %ecx
 ; SSE2-NEXT:    jne .LBB15_33
 ; SSE2-NEXT:  # %bb.34: # %else32
 ; SSE2-NEXT:    testl $131072, %eax # imm = 0x20000

 ; SSE4-NEXT:    jne .LBB15_9
 ; SSE4-NEXT:  .LBB15_10: # %else8
 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    jne .LBB15_11
 ; SSE4-NEXT:  .LBB15_12: # %else10
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    jne .LBB15_13
 ; SSE4-NEXT:  .LBB15_14: # %else12
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    jne .LBB15_15
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    js .LBB15_15
 ; SSE4-NEXT:  .LBB15_16: # %else14
 ; SSE4-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE4-NEXT:    jne .LBB15_17
 ; SSE4-NEXT:  .LBB15_18: # %else16
 ; SSE4-NEXT:    testl $512, %eax # imm = 0x200
 ; SSE4-NEXT:    jne .LBB15_19
 ; SSE4-NEXT:  .LBB15_20: # %else18
 ; SSE4-NEXT:    testl $1024, %eax # imm = 0x400

 ; SSE4-NEXT:  .LBB15_28: # %else26
 ; SSE4-NEXT:    testl $16384, %eax # imm = 0x4000
 ; SSE4-NEXT:    je .LBB15_30
 ; SSE4-NEXT:  .LBB15_29: # %cond.store27
 ; SSE4-NEXT:    pextrb $14, %xmm0, 14(%rdi)
 ; SSE4-NEXT:  .LBB15_30: # %else28
 ; SSE4-NEXT:    pand %xmm6, %xmm3
 ; SSE4-NEXT:    pand %xmm6, %xmm2
-; SSE4-NEXT:    testl $32768, %eax # imm = 0x8000
-; SSE4-NEXT:    je .LBB15_32
+; SSE4-NEXT:    testw %ax, %ax
+; SSE4-NEXT:    jns .LBB15_32
 ; SSE4-NEXT:  # %bb.31: # %cond.store29
 ; SSE4-NEXT:    pextrb $15, %xmm0, 15(%rdi)
 ; SSE4-NEXT:  .LBB15_32: # %else30
 ; SSE4-NEXT:    packuswb %xmm3, %xmm2
 ; SSE4-NEXT:    testl $65536, %eax # imm = 0x10000
 ; SSE4-NEXT:    jne .LBB15_33
 ; SSE4-NEXT:  # %bb.34: # %else32
 ; SSE4-NEXT:    testl $131072, %eax # imm = 0x20000

 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    je .LBB15_12
 ; SSE4-NEXT:  .LBB15_11: # %cond.store9
 ; SSE4-NEXT:    pextrb $5, %xmm0, 5(%rdi)
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    je .LBB15_14
 ; SSE4-NEXT:  .LBB15_13: # %cond.store11
 ; SSE4-NEXT:    pextrb $6, %xmm0, 6(%rdi)
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    je .LBB15_16
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    jns .LBB15_16
 ; SSE4-NEXT:  .LBB15_15: # %cond.store13
 ; SSE4-NEXT:    pextrb $7, %xmm0, 7(%rdi)
 ; SSE4-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE4-NEXT:    je .LBB15_18
 ; SSE4-NEXT:  .LBB15_17: # %cond.store15
 ; SSE4-NEXT:    pextrb $8, %xmm0, 8(%rdi)
 ; SSE4-NEXT:    testl $512, %eax # imm = 0x200
 ; SSE4-NEXT:    je .LBB15_20

 ; AVX1-NEXT:    jne .LBB15_9
 ; AVX1-NEXT:  .LBB15_10: # %else8
 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    jne .LBB15_11
 ; AVX1-NEXT:  .LBB15_12: # %else10
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    jne .LBB15_13
 ; AVX1-NEXT:  .LBB15_14: # %else12
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    jne .LBB15_15
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    js .LBB15_15
 ; AVX1-NEXT:  .LBB15_16: # %else14
 ; AVX1-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX1-NEXT:    jne .LBB15_17
 ; AVX1-NEXT:  .LBB15_18: # %else16
 ; AVX1-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX1-NEXT:    jne .LBB15_19
 ; AVX1-NEXT:  .LBB15_20: # %else18
 ; AVX1-NEXT:    testl $1024, %eax # imm = 0x400
 ; AVX1-NEXT:    jne .LBB15_21
 ; AVX1-NEXT:  .LBB15_22: # %else20
 ; AVX1-NEXT:    testl $2048, %eax # imm = 0x800
 ; AVX1-NEXT:    jne .LBB15_23
 ; AVX1-NEXT:  .LBB15_24: # %else22
 ; AVX1-NEXT:    testl $4096, %eax # imm = 0x1000
 ; AVX1-NEXT:    jne .LBB15_25
 ; AVX1-NEXT:  .LBB15_26: # %else24
 ; AVX1-NEXT:    testl $8192, %eax # imm = 0x2000
 ; AVX1-NEXT:    jne .LBB15_27
 ; AVX1-NEXT:  .LBB15_28: # %else26
 ; AVX1-NEXT:    testl $16384, %eax # imm = 0x4000
 ; AVX1-NEXT:    jne .LBB15_29
 ; AVX1-NEXT:  .LBB15_30: # %else28
-; AVX1-NEXT:    testl $32768, %eax # imm = 0x8000
-; AVX1-NEXT:    je .LBB15_32
+; AVX1-NEXT:    testw %ax, %ax
+; AVX1-NEXT:    jns .LBB15_32
 ; AVX1-NEXT:  .LBB15_31: # %cond.store29
 ; AVX1-NEXT:    vpextrb $15, %xmm0, 15(%rdi)
 ; AVX1-NEXT:  .LBB15_32: # %else30
 ; AVX1-NEXT:    testl $65536, %eax # imm = 0x10000
 ; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
 ; AVX1-NEXT:    jne .LBB15_33
 ; AVX1-NEXT:  # %bb.34: # %else32
 ; AVX1-NEXT:    testl $131072, %eax # imm = 0x20000

 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    je .LBB15_12
 ; AVX1-NEXT:  .LBB15_11: # %cond.store9
 ; AVX1-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    je .LBB15_14
 ; AVX1-NEXT:  .LBB15_13: # %cond.store11
 ; AVX1-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    je .LBB15_16
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    jns .LBB15_16
 ; AVX1-NEXT:  .LBB15_15: # %cond.store13
 ; AVX1-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX1-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX1-NEXT:    je .LBB15_18
 ; AVX1-NEXT:  .LBB15_17: # %cond.store15
 ; AVX1-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX1-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX1-NEXT:    je .LBB15_20

 ; AVX1-NEXT:    testl $8192, %eax # imm = 0x2000
 ; AVX1-NEXT:    je .LBB15_28
 ; AVX1-NEXT:  .LBB15_27: # %cond.store25
 ; AVX1-NEXT:    vpextrb $13, %xmm0, 13(%rdi)
 ; AVX1-NEXT:    testl $16384, %eax # imm = 0x4000
 ; AVX1-NEXT:    je .LBB15_30
 ; AVX1-NEXT:  .LBB15_29: # %cond.store27
 ; AVX1-NEXT:    vpextrb $14, %xmm0, 14(%rdi)
-; AVX1-NEXT:    testl $32768, %eax # imm = 0x8000
-; AVX1-NEXT:    jne .LBB15_31
+; AVX1-NEXT:    testw %ax, %ax
+; AVX1-NEXT:    js .LBB15_31
 ; AVX1-NEXT:    jmp .LBB15_32
 ; AVX1-NEXT:  .LBB15_33: # %cond.store31
 ; AVX1-NEXT:    vpextrb $0, %xmm0, 16(%rdi)
 ; AVX1-NEXT:    testl $131072, %eax # imm = 0x20000
 ; AVX1-NEXT:    je .LBB15_36
 ; AVX1-NEXT:  .LBB15_35: # %cond.store33
 ; AVX1-NEXT:    vpextrb $1, %xmm0, 17(%rdi)
 ; AVX1-NEXT:    testl $262144, %eax # imm = 0x40000

 ; AVX2-NEXT:    jne .LBB15_9
 ; AVX2-NEXT:  .LBB15_10: # %else8
 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    jne .LBB15_11
 ; AVX2-NEXT:  .LBB15_12: # %else10
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    jne .LBB15_13
 ; AVX2-NEXT:  .LBB15_14: # %else12
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    jne .LBB15_15
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    js .LBB15_15
 ; AVX2-NEXT:  .LBB15_16: # %else14
 ; AVX2-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX2-NEXT:    jne .LBB15_17
 ; AVX2-NEXT:  .LBB15_18: # %else16
 ; AVX2-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX2-NEXT:    jne .LBB15_19
 ; AVX2-NEXT:  .LBB15_20: # %else18
 ; AVX2-NEXT:    testl $1024, %eax # imm = 0x400
 ; AVX2-NEXT:    jne .LBB15_21
 ; AVX2-NEXT:  .LBB15_22: # %else20
 ; AVX2-NEXT:    testl $2048, %eax # imm = 0x800
 ; AVX2-NEXT:    jne .LBB15_23
 ; AVX2-NEXT:  .LBB15_24: # %else22
 ; AVX2-NEXT:    testl $4096, %eax # imm = 0x1000
 ; AVX2-NEXT:    jne .LBB15_25
 ; AVX2-NEXT:  .LBB15_26: # %else24
 ; AVX2-NEXT:    testl $8192, %eax # imm = 0x2000
 ; AVX2-NEXT:    jne .LBB15_27
 ; AVX2-NEXT:  .LBB15_28: # %else26
 ; AVX2-NEXT:    testl $16384, %eax # imm = 0x4000
 ; AVX2-NEXT:    jne .LBB15_29
 ; AVX2-NEXT:  .LBB15_30: # %else28
-; AVX2-NEXT:    testl $32768, %eax # imm = 0x8000
-; AVX2-NEXT:    je .LBB15_32
+; AVX2-NEXT:    testw %ax, %ax
+; AVX2-NEXT:    jns .LBB15_32
 ; AVX2-NEXT:  .LBB15_31: # %cond.store29
 ; AVX2-NEXT:    vpextrb $15, %xmm0, 15(%rdi)
 ; AVX2-NEXT:  .LBB15_32: # %else30
 ; AVX2-NEXT:    testl $65536, %eax # imm = 0x10000
 ; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm0
 ; AVX2-NEXT:    jne .LBB15_33
 ; AVX2-NEXT:  # %bb.34: # %else32
 ; AVX2-NEXT:    testl $131072, %eax # imm = 0x20000

 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    je .LBB15_12
 ; AVX2-NEXT:  .LBB15_11: # %cond.store9
 ; AVX2-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    je .LBB15_14
 ; AVX2-NEXT:  .LBB15_13: # %cond.store11
 ; AVX2-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    je .LBB15_16
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    jns .LBB15_16
 ; AVX2-NEXT:  .LBB15_15: # %cond.store13
 ; AVX2-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX2-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX2-NEXT:    je .LBB15_18
 ; AVX2-NEXT:  .LBB15_17: # %cond.store15
 ; AVX2-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX2-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX2-NEXT:    je .LBB15_20

 ; AVX2-NEXT:    testl $8192, %eax # imm = 0x2000
 ; AVX2-NEXT:    je .LBB15_28
 ; AVX2-NEXT:  .LBB15_27: # %cond.store25
 ; AVX2-NEXT:    vpextrb $13, %xmm0, 13(%rdi)
 ; AVX2-NEXT:    testl $16384, %eax # imm = 0x4000
 ; AVX2-NEXT:    je .LBB15_30
 ; AVX2-NEXT:  .LBB15_29: # %cond.store27
 ; AVX2-NEXT:    vpextrb $14, %xmm0, 14(%rdi)
-; AVX2-NEXT:    testl $32768, %eax # imm = 0x8000
-; AVX2-NEXT:    jne .LBB15_31
+; AVX2-NEXT:    testw %ax, %ax
+; AVX2-NEXT:    js .LBB15_31
 ; AVX2-NEXT:    jmp .LBB15_32
 ; AVX2-NEXT:  .LBB15_33: # %cond.store31
 ; AVX2-NEXT:    vpextrb $0, %xmm0, 16(%rdi)
 ; AVX2-NEXT:    testl $131072, %eax # imm = 0x20000
 ; AVX2-NEXT:    je .LBB15_36
 ; AVX2-NEXT:  .LBB15_35: # %cond.store33
 ; AVX2-NEXT:    vpextrb $1, %xmm0, 17(%rdi)
 ; AVX2-NEXT:    testl $262144, %eax # imm = 0x40000

 ; AVX512F-NEXT:    jne .LBB15_9
 ; AVX512F-NEXT:  .LBB15_10: # %else8
 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    jne .LBB15_11
 ; AVX512F-NEXT:  .LBB15_12: # %else10
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    jne .LBB15_13
 ; AVX512F-NEXT:  .LBB15_14: # %else12
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    jne .LBB15_15
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    js .LBB15_15
 ; AVX512F-NEXT:  .LBB15_16: # %else14
 ; AVX512F-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX512F-NEXT:    jne .LBB15_17
 ; AVX512F-NEXT:  .LBB15_18: # %else16
 ; AVX512F-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX512F-NEXT:    jne .LBB15_19
 ; AVX512F-NEXT:  .LBB15_20: # %else18
 ; AVX512F-NEXT:    testl $1024, %eax # imm = 0x400
 ; AVX512F-NEXT:    jne .LBB15_21
 ; AVX512F-NEXT:  .LBB15_22: # %else20
 ; AVX512F-NEXT:    testl $2048, %eax # imm = 0x800
 ; AVX512F-NEXT:    jne .LBB15_23
 ; AVX512F-NEXT:  .LBB15_24: # %else22
 ; AVX512F-NEXT:    testl $4096, %eax # imm = 0x1000
 ; AVX512F-NEXT:    jne .LBB15_25
 ; AVX512F-NEXT:  .LBB15_26: # %else24
 ; AVX512F-NEXT:    testl $8192, %eax # imm = 0x2000
 ; AVX512F-NEXT:    jne .LBB15_27
 ; AVX512F-NEXT:  .LBB15_28: # %else26
 ; AVX512F-NEXT:    testl $16384, %eax # imm = 0x4000
 ; AVX512F-NEXT:    jne .LBB15_29
 ; AVX512F-NEXT:  .LBB15_30: # %else28
-; AVX512F-NEXT:    testl $32768, %eax # imm = 0x8000
-; AVX512F-NEXT:    je .LBB15_32
+; AVX512F-NEXT:    testw %ax, %ax
+; AVX512F-NEXT:    jns .LBB15_32
 ; AVX512F-NEXT:  .LBB15_31: # %cond.store29
 ; AVX512F-NEXT:    vpextrb $15, %xmm0, 15(%rdi)
 ; AVX512F-NEXT:  .LBB15_32: # %else30
 ; AVX512F-NEXT:    testl $65536, %eax # imm = 0x10000
 ; AVX512F-NEXT:    vextracti128 $1, %ymm0, %xmm0
 ; AVX512F-NEXT:    jne .LBB15_33
 ; AVX512F-NEXT:  # %bb.34: # %else32
 ; AVX512F-NEXT:    testl $131072, %eax # imm = 0x20000

 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    je .LBB15_12
 ; AVX512F-NEXT:  .LBB15_11: # %cond.store9
 ; AVX512F-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    je .LBB15_14
 ; AVX512F-NEXT:  .LBB15_13: # %cond.store11
 ; AVX512F-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    je .LBB15_16
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    jns .LBB15_16
 ; AVX512F-NEXT:  .LBB15_15: # %cond.store13
 ; AVX512F-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX512F-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX512F-NEXT:    je .LBB15_18
 ; AVX512F-NEXT:  .LBB15_17: # %cond.store15
 ; AVX512F-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX512F-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX512F-NEXT:    je .LBB15_20

 ; AVX512F-NEXT:    testl $8192, %eax # imm = 0x2000
 ; AVX512F-NEXT:    je .LBB15_28
 ; AVX512F-NEXT:  .LBB15_27: # %cond.store25
 ; AVX512F-NEXT:    vpextrb $13, %xmm0, 13(%rdi)
 ; AVX512F-NEXT:    testl $16384, %eax # imm = 0x4000
 ; AVX512F-NEXT:    je .LBB15_30
 ; AVX512F-NEXT:  .LBB15_29: # %cond.store27
 ; AVX512F-NEXT:    vpextrb $14, %xmm0, 14(%rdi)
-; AVX512F-NEXT:    testl $32768, %eax # imm = 0x8000
-; AVX512F-NEXT:    jne .LBB15_31
+; AVX512F-NEXT:    testw %ax, %ax
+; AVX512F-NEXT:    js .LBB15_31
 ; AVX512F-NEXT:    jmp .LBB15_32
 ; AVX512F-NEXT:  .LBB15_33: # %cond.store31
 ; AVX512F-NEXT:    vpextrb $0, %xmm0, 16(%rdi)
 ; AVX512F-NEXT:    testl $131072, %eax # imm = 0x20000
 ; AVX512F-NEXT:    je .LBB15_36
 ; AVX512F-NEXT:  .LBB15_35: # %cond.store33
 ; AVX512F-NEXT:    vpextrb $1, %xmm0, 17(%rdi)
 ; AVX512F-NEXT:    testl $262144, %eax # imm = 0x40000

 ; SSE2-NEXT:    movb %ch, 5(%rdi)
 ; SSE2-NEXT:  .LBB16_12: # %else10
 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    pextrw $3, %xmm0, %ecx
 ; SSE2-NEXT:    je .LBB16_14
 ; SSE2-NEXT:  # %bb.13: # %cond.store11
 ; SSE2-NEXT:    movb %cl, 6(%rdi)
 ; SSE2-NEXT:  .LBB16_14: # %else12
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    je .LBB16_16
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    jns .LBB16_16
 ; SSE2-NEXT:  # %bb.15: # %cond.store13
 ; SSE2-NEXT:    movb %ch, 7(%rdi)
 ; SSE2-NEXT:  .LBB16_16: # %else14
 ; SSE2-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE2-NEXT:    pextrw $4, %xmm0, %ecx
 ; SSE2-NEXT:    je .LBB16_18
 ; SSE2-NEXT:  # %bb.17: # %cond.store15
 ; SSE2-NEXT:    movb %cl, 8(%rdi)

 ; SSE4-NEXT:    jne .LBB16_9
 ; SSE4-NEXT:  .LBB16_10: # %else8
 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    jne .LBB16_11
 ; SSE4-NEXT:  .LBB16_12: # %else10
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    jne .LBB16_13
 ; SSE4-NEXT:  .LBB16_14: # %else12
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    jne .LBB16_15
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    js .LBB16_15
 ; SSE4-NEXT:  .LBB16_16: # %else14
 ; SSE4-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE4-NEXT:    jne .LBB16_17
 ; SSE4-NEXT:  .LBB16_18: # %else16
 ; SSE4-NEXT:    testl $512, %eax # imm = 0x200
 ; SSE4-NEXT:    jne .LBB16_19
 ; SSE4-NEXT:  .LBB16_20: # %else18
 ; SSE4-NEXT:    testl $1024, %eax # imm = 0x400

 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    je .LBB16_12
 ; SSE4-NEXT:  .LBB16_11: # %cond.store9
 ; SSE4-NEXT:    pextrb $5, %xmm0, 5(%rdi)
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    je .LBB16_14
 ; SSE4-NEXT:  .LBB16_13: # %cond.store11
 ; SSE4-NEXT:    pextrb $6, %xmm0, 6(%rdi)
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    je .LBB16_16
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    jns .LBB16_16
 ; SSE4-NEXT:  .LBB16_15: # %cond.store13
 ; SSE4-NEXT:    pextrb $7, %xmm0, 7(%rdi)
 ; SSE4-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE4-NEXT:    je .LBB16_18
 ; SSE4-NEXT:  .LBB16_17: # %cond.store15
 ; SSE4-NEXT:    pextrb $8, %xmm0, 8(%rdi)
 ; SSE4-NEXT:    testl $512, %eax # imm = 0x200
 ; SSE4-NEXT:    je .LBB16_20

 ; AVX1-NEXT:    jne .LBB16_9
 ; AVX1-NEXT:  .LBB16_10: # %else8
 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    jne .LBB16_11
 ; AVX1-NEXT:  .LBB16_12: # %else10
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    jne .LBB16_13
 ; AVX1-NEXT:  .LBB16_14: # %else12
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    jne .LBB16_15
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    js .LBB16_15
 ; AVX1-NEXT:  .LBB16_16: # %else14
 ; AVX1-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX1-NEXT:    jne .LBB16_17
 ; AVX1-NEXT:  .LBB16_18: # %else16
 ; AVX1-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX1-NEXT:    jne .LBB16_19
 ; AVX1-NEXT:  .LBB16_20: # %else18
 ; AVX1-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    je .LBB16_12
 ; AVX1-NEXT:  .LBB16_11: # %cond.store9
 ; AVX1-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    je .LBB16_14
 ; AVX1-NEXT:  .LBB16_13: # %cond.store11
 ; AVX1-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    je .LBB16_16
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    jns .LBB16_16
 ; AVX1-NEXT:  .LBB16_15: # %cond.store13
 ; AVX1-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX1-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX1-NEXT:    je .LBB16_18
 ; AVX1-NEXT:  .LBB16_17: # %cond.store15
 ; AVX1-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX1-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX1-NEXT:    je .LBB16_20

 ; AVX2-NEXT:    jne .LBB16_9
 ; AVX2-NEXT:  .LBB16_10: # %else8
 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    jne .LBB16_11
 ; AVX2-NEXT:  .LBB16_12: # %else10
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    jne .LBB16_13
 ; AVX2-NEXT:  .LBB16_14: # %else12
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    jne .LBB16_15
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    js .LBB16_15
 ; AVX2-NEXT:  .LBB16_16: # %else14
 ; AVX2-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX2-NEXT:    jne .LBB16_17
 ; AVX2-NEXT:  .LBB16_18: # %else16
 ; AVX2-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX2-NEXT:    jne .LBB16_19
 ; AVX2-NEXT:  .LBB16_20: # %else18
 ; AVX2-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    je .LBB16_12
 ; AVX2-NEXT:  .LBB16_11: # %cond.store9
 ; AVX2-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    je .LBB16_14
 ; AVX2-NEXT:  .LBB16_13: # %cond.store11
 ; AVX2-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    je .LBB16_16
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    jns .LBB16_16
 ; AVX2-NEXT:  .LBB16_15: # %cond.store13
 ; AVX2-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX2-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX2-NEXT:    je .LBB16_18
 ; AVX2-NEXT:  .LBB16_17: # %cond.store15
 ; AVX2-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX2-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX2-NEXT:    je .LBB16_20

 ; AVX512F-NEXT:    jne .LBB16_9
 ; AVX512F-NEXT:  .LBB16_10: # %else8
 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    jne .LBB16_11
 ; AVX512F-NEXT:  .LBB16_12: # %else10
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    jne .LBB16_13
 ; AVX512F-NEXT:  .LBB16_14: # %else12
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    jne .LBB16_15
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    js .LBB16_15
 ; AVX512F-NEXT:  .LBB16_16: # %else14
 ; AVX512F-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX512F-NEXT:    jne .LBB16_17
 ; AVX512F-NEXT:  .LBB16_18: # %else16
 ; AVX512F-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX512F-NEXT:    jne .LBB16_19
 ; AVX512F-NEXT:  .LBB16_20: # %else18
 ; AVX512F-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    je .LBB16_12
 ; AVX512F-NEXT:  .LBB16_11: # %cond.store9
 ; AVX512F-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    je .LBB16_14
 ; AVX512F-NEXT:  .LBB16_13: # %cond.store11
 ; AVX512F-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    je .LBB16_16
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    jns .LBB16_16
 ; AVX512F-NEXT:  .LBB16_15: # %cond.store13
 ; AVX512F-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX512F-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX512F-NEXT:    je .LBB16_18
 ; AVX512F-NEXT:  .LBB16_17: # %cond.store15
 ; AVX512F-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX512F-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX512F-NEXT:    je .LBB16_20

llvm/test/CodeGen/X86/masked_store_trunc_ssat.ll

 ; SSE2-NEXT:    jne .LBB9_9
 ; SSE2-NEXT:  .LBB9_10: # %else8
 ; SSE2-NEXT:    testb $32, %al
 ; SSE2-NEXT:    jne .LBB9_11
 ; SSE2-NEXT:  .LBB9_12: # %else10
 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    jne .LBB9_13
 ; SSE2-NEXT:  .LBB9_14: # %else12
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    je .LBB9_16
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    jns .LBB9_16
 ; SSE2-NEXT:  .LBB9_15: # %cond.store13
 ; SSE2-NEXT:    pextrw $7, %xmm0, %ecx
 ; SSE2-NEXT:    movw %cx, 14(%rdi)
 ; SSE2-NEXT:  .LBB9_16: # %else14
 ; SSE2-NEXT:    packssdw %xmm3, %xmm2
 ; SSE2-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE2-NEXT:    jne .LBB9_17
 ; SSE2-NEXT:  # %bb.18: # %else16

 ; SSE2-NEXT:  .LBB9_11: # %cond.store9
 ; SSE2-NEXT:    pextrw $5, %xmm0, %ecx
 ; SSE2-NEXT:    movw %cx, 10(%rdi)
 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    je .LBB9_14
 ; SSE2-NEXT:  .LBB9_13: # %cond.store11
 ; SSE2-NEXT:    pextrw $6, %xmm0, %ecx
 ; SSE2-NEXT:    movw %cx, 12(%rdi)
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    jne .LBB9_15
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    js .LBB9_15
 ; SSE2-NEXT:    jmp .LBB9_16
 ; SSE2-NEXT:  .LBB9_17: # %cond.store15
 ; SSE2-NEXT:    movd %xmm2, %ecx
 ; SSE2-NEXT:    movw %cx, 16(%rdi)
 ; SSE2-NEXT:    testl $512, %eax # imm = 0x200
 ; SSE2-NEXT:    je .LBB9_20
 ; SSE2-NEXT:  .LBB9_19: # %cond.store17
 ; SSE2-NEXT:    pextrw $1, %xmm2, %ecx

 ; SSE4-NEXT:    jne .LBB9_9
 ; SSE4-NEXT:  .LBB9_10: # %else8
 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    jne .LBB9_11
 ; SSE4-NEXT:  .LBB9_12: # %else10
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    jne .LBB9_13
 ; SSE4-NEXT:  .LBB9_14: # %else12
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    je .LBB9_16
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    jns .LBB9_16
 ; SSE4-NEXT:  .LBB9_15: # %cond.store13
 ; SSE4-NEXT:    pextrw $7, %xmm0, 14(%rdi)
 ; SSE4-NEXT:  .LBB9_16: # %else14
 ; SSE4-NEXT:    packssdw %xmm3, %xmm2
 ; SSE4-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE4-NEXT:    jne .LBB9_17
 ; SSE4-NEXT:  # %bb.18: # %else16
 ; SSE4-NEXT:    testl $512, %eax # imm = 0x200

 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    je .LBB9_12
 ; SSE4-NEXT:  .LBB9_11: # %cond.store9
 ; SSE4-NEXT:    pextrw $5, %xmm0, 10(%rdi)
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    je .LBB9_14
 ; SSE4-NEXT:  .LBB9_13: # %cond.store11
 ; SSE4-NEXT:    pextrw $6, %xmm0, 12(%rdi)
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    jne .LBB9_15
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    js .LBB9_15
 ; SSE4-NEXT:    jmp .LBB9_16
 ; SSE4-NEXT:  .LBB9_17: # %cond.store15
 ; SSE4-NEXT:    pextrw $0, %xmm2, 16(%rdi)
 ; SSE4-NEXT:    testl $512, %eax # imm = 0x200
 ; SSE4-NEXT:    je .LBB9_20
 ; SSE4-NEXT:  .LBB9_19: # %cond.store17
 ; SSE4-NEXT:    pextrw $1, %xmm2, 18(%rdi)
 ; SSE4-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX1-NEXT:    jne .LBB9_9
 ; AVX1-NEXT:  .LBB9_10: # %else8
 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    jne .LBB9_11
 ; AVX1-NEXT:  .LBB9_12: # %else10
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    jne .LBB9_13
 ; AVX1-NEXT:  .LBB9_14: # %else12
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    je .LBB9_16
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    jns .LBB9_16
 ; AVX1-NEXT:  .LBB9_15: # %cond.store13
 ; AVX1-NEXT:    vpextrw $7, %xmm0, 14(%rdi)
 ; AVX1-NEXT:  .LBB9_16: # %else14
 ; AVX1-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
 ; AVX1-NEXT:    jne .LBB9_17
 ; AVX1-NEXT:  # %bb.18: # %else16
 ; AVX1-NEXT:    testl $512, %eax # imm = 0x200

 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    je .LBB9_12
 ; AVX1-NEXT:  .LBB9_11: # %cond.store9
 ; AVX1-NEXT:    vpextrw $5, %xmm0, 10(%rdi)
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    je .LBB9_14
 ; AVX1-NEXT:  .LBB9_13: # %cond.store11
 ; AVX1-NEXT:    vpextrw $6, %xmm0, 12(%rdi)
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    jne .LBB9_15
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    js .LBB9_15
 ; AVX1-NEXT:    jmp .LBB9_16
 ; AVX1-NEXT:  .LBB9_17: # %cond.store15
 ; AVX1-NEXT:    vpextrw $0, %xmm0, 16(%rdi)
 ; AVX1-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX1-NEXT:    je .LBB9_20
 ; AVX1-NEXT:  .LBB9_19: # %cond.store17
 ; AVX1-NEXT:    vpextrw $1, %xmm0, 18(%rdi)
 ; AVX1-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX2-NEXT:    jne .LBB9_9
 ; AVX2-NEXT:  .LBB9_10: # %else8
 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    jne .LBB9_11
 ; AVX2-NEXT:  .LBB9_12: # %else10
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    jne .LBB9_13
 ; AVX2-NEXT:  .LBB9_14: # %else12
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    je .LBB9_16
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    jns .LBB9_16
 ; AVX2-NEXT:  .LBB9_15: # %cond.store13
 ; AVX2-NEXT:    vpextrw $7, %xmm0, 14(%rdi)
 ; AVX2-NEXT:  .LBB9_16: # %else14
 ; AVX2-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm0
 ; AVX2-NEXT:    jne .LBB9_17
 ; AVX2-NEXT:  # %bb.18: # %else16
 ; AVX2-NEXT:    testl $512, %eax # imm = 0x200

 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    je .LBB9_12
 ; AVX2-NEXT:  .LBB9_11: # %cond.store9
 ; AVX2-NEXT:    vpextrw $5, %xmm0, 10(%rdi)
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    je .LBB9_14
 ; AVX2-NEXT:  .LBB9_13: # %cond.store11
 ; AVX2-NEXT:    vpextrw $6, %xmm0, 12(%rdi)
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    jne .LBB9_15
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    js .LBB9_15
 ; AVX2-NEXT:    jmp .LBB9_16
 ; AVX2-NEXT:  .LBB9_17: # %cond.store15
 ; AVX2-NEXT:    vpextrw $0, %xmm0, 16(%rdi)
 ; AVX2-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX2-NEXT:    je .LBB9_20
 ; AVX2-NEXT:  .LBB9_19: # %cond.store17
 ; AVX2-NEXT:    vpextrw $1, %xmm0, 18(%rdi)
 ; AVX2-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX512F-NEXT:    jne .LBB9_9
 ; AVX512F-NEXT:  .LBB9_10: # %else8
 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    jne .LBB9_11
 ; AVX512F-NEXT:  .LBB9_12: # %else10
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    jne .LBB9_13
 ; AVX512F-NEXT:  .LBB9_14: # %else12
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    je .LBB9_16
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    jns .LBB9_16
 ; AVX512F-NEXT:  .LBB9_15: # %cond.store13
 ; AVX512F-NEXT:    vpextrw $7, %xmm0, 14(%rdi)
 ; AVX512F-NEXT:  .LBB9_16: # %else14
 ; AVX512F-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX512F-NEXT:    vextracti128 $1, %ymm0, %xmm0
 ; AVX512F-NEXT:    jne .LBB9_17
 ; AVX512F-NEXT:  # %bb.18: # %else16
 ; AVX512F-NEXT:    testl $512, %eax # imm = 0x200

 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    je .LBB9_12
 ; AVX512F-NEXT:  .LBB9_11: # %cond.store9
 ; AVX512F-NEXT:    vpextrw $5, %xmm0, 10(%rdi)
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    je .LBB9_14
 ; AVX512F-NEXT:  .LBB9_13: # %cond.store11
 ; AVX512F-NEXT:    vpextrw $6, %xmm0, 12(%rdi)
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    jne .LBB9_15
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    js .LBB9_15
 ; AVX512F-NEXT:    jmp .LBB9_16
 ; AVX512F-NEXT:  .LBB9_17: # %cond.store15
 ; AVX512F-NEXT:    vpextrw $0, %xmm0, 16(%rdi)
 ; AVX512F-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX512F-NEXT:    je .LBB9_20
 ; AVX512F-NEXT:  .LBB9_19: # %cond.store17
 ; AVX512F-NEXT:    vpextrw $1, %xmm0, 18(%rdi)
 ; AVX512F-NEXT:    testl $1024, %eax # imm = 0x400

 ; SSE2-NEXT:    movb %ch, 5(%rdi)
 ; SSE2-NEXT:  .LBB10_12: # %else10
 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    pextrw $3, %xmm0, %ecx
 ; SSE2-NEXT:    je .LBB10_14
 ; SSE2-NEXT:  # %bb.13: # %cond.store11
 ; SSE2-NEXT:    movb %cl, 6(%rdi)
 ; SSE2-NEXT:  .LBB10_14: # %else12
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    je .LBB10_16
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    jns .LBB10_16
 ; SSE2-NEXT:  # %bb.15: # %cond.store13
 ; SSE2-NEXT:    movb %ch, 7(%rdi)
 ; SSE2-NEXT:  .LBB10_16: # %else14
 ; SSE2-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE2-NEXT:    pextrw $4, %xmm0, %ecx
 ; SSE2-NEXT:    je .LBB10_18
 ; SSE2-NEXT:  # %bb.17: # %cond.store15
 ; SSE2-NEXT:    movb %cl, 8(%rdi)

 ; SSE4-NEXT:    jne .LBB10_9
 ; SSE4-NEXT:  .LBB10_10: # %else8
 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    jne .LBB10_11
 ; SSE4-NEXT:  .LBB10_12: # %else10
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    jne .LBB10_13
 ; SSE4-NEXT:  .LBB10_14: # %else12
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    jne .LBB10_15
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    js .LBB10_15
 ; SSE4-NEXT:  .LBB10_16: # %else14
 ; SSE4-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE4-NEXT:    jne .LBB10_17
 ; SSE4-NEXT:  .LBB10_18: # %else16
 ; SSE4-NEXT:    testl $512, %eax # imm = 0x200
 ; SSE4-NEXT:    jne .LBB10_19
 ; SSE4-NEXT:  .LBB10_20: # %else18
 ; SSE4-NEXT:    testl $1024, %eax # imm = 0x400

 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    je .LBB10_12
 ; SSE4-NEXT:  .LBB10_11: # %cond.store9
 ; SSE4-NEXT:    pextrb $5, %xmm0, 5(%rdi)
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    je .LBB10_14
 ; SSE4-NEXT:  .LBB10_13: # %cond.store11
 ; SSE4-NEXT:    pextrb $6, %xmm0, 6(%rdi)
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    je .LBB10_16
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    jns .LBB10_16
 ; SSE4-NEXT:  .LBB10_15: # %cond.store13
 ; SSE4-NEXT:    pextrb $7, %xmm0, 7(%rdi)
 ; SSE4-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE4-NEXT:    je .LBB10_18
 ; SSE4-NEXT:  .LBB10_17: # %cond.store15
 ; SSE4-NEXT:    pextrb $8, %xmm0, 8(%rdi)
 ; SSE4-NEXT:    testl $512, %eax # imm = 0x200
 ; SSE4-NEXT:    je .LBB10_20

 ; AVX1-NEXT:    jne .LBB10_9
 ; AVX1-NEXT:  .LBB10_10: # %else8
 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    jne .LBB10_11
 ; AVX1-NEXT:  .LBB10_12: # %else10
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    jne .LBB10_13
 ; AVX1-NEXT:  .LBB10_14: # %else12
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    jne .LBB10_15
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    js .LBB10_15
 ; AVX1-NEXT:  .LBB10_16: # %else14
 ; AVX1-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX1-NEXT:    jne .LBB10_17
 ; AVX1-NEXT:  .LBB10_18: # %else16
 ; AVX1-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX1-NEXT:    jne .LBB10_19
 ; AVX1-NEXT:  .LBB10_20: # %else18
 ; AVX1-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    je .LBB10_12
 ; AVX1-NEXT:  .LBB10_11: # %cond.store9
 ; AVX1-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    je .LBB10_14
 ; AVX1-NEXT:  .LBB10_13: # %cond.store11
 ; AVX1-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    je .LBB10_16
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    jns .LBB10_16
 ; AVX1-NEXT:  .LBB10_15: # %cond.store13
 ; AVX1-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX1-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX1-NEXT:    je .LBB10_18
 ; AVX1-NEXT:  .LBB10_17: # %cond.store15
 ; AVX1-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX1-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX1-NEXT:    je .LBB10_20

 ; AVX2-NEXT:    jne .LBB10_9
 ; AVX2-NEXT:  .LBB10_10: # %else8
 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    jne .LBB10_11
 ; AVX2-NEXT:  .LBB10_12: # %else10
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    jne .LBB10_13
 ; AVX2-NEXT:  .LBB10_14: # %else12
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    jne .LBB10_15
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    js .LBB10_15
 ; AVX2-NEXT:  .LBB10_16: # %else14
 ; AVX2-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX2-NEXT:    jne .LBB10_17
 ; AVX2-NEXT:  .LBB10_18: # %else16
 ; AVX2-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX2-NEXT:    jne .LBB10_19
 ; AVX2-NEXT:  .LBB10_20: # %else18
 ; AVX2-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    je .LBB10_12
 ; AVX2-NEXT:  .LBB10_11: # %cond.store9
 ; AVX2-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    je .LBB10_14
 ; AVX2-NEXT:  .LBB10_13: # %cond.store11
 ; AVX2-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    je .LBB10_16
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    jns .LBB10_16
 ; AVX2-NEXT:  .LBB10_15: # %cond.store13
 ; AVX2-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX2-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX2-NEXT:    je .LBB10_18
 ; AVX2-NEXT:  .LBB10_17: # %cond.store15
 ; AVX2-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX2-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX2-NEXT:    je .LBB10_20

 ; AVX512F-NEXT:    jne .LBB10_9
 ; AVX512F-NEXT:  .LBB10_10: # %else8
 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    jne .LBB10_11
 ; AVX512F-NEXT:  .LBB10_12: # %else10
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    jne .LBB10_13
 ; AVX512F-NEXT:  .LBB10_14: # %else12
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    jne .LBB10_15
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    js .LBB10_15
 ; AVX512F-NEXT:  .LBB10_16: # %else14
 ; AVX512F-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX512F-NEXT:    jne .LBB10_17
 ; AVX512F-NEXT:  .LBB10_18: # %else16
 ; AVX512F-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX512F-NEXT:    jne .LBB10_19
 ; AVX512F-NEXT:  .LBB10_20: # %else18
 ; AVX512F-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    je .LBB10_12
 ; AVX512F-NEXT:  .LBB10_11: # %cond.store9
 ; AVX512F-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    je .LBB10_14
 ; AVX512F-NEXT:  .LBB10_13: # %cond.store11
 ; AVX512F-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    je .LBB10_16
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    jns .LBB10_16
 ; AVX512F-NEXT:  .LBB10_15: # %cond.store13
 ; AVX512F-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX512F-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX512F-NEXT:    je .LBB10_18
 ; AVX512F-NEXT:  .LBB10_17: # %cond.store15
 ; AVX512F-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX512F-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX512F-NEXT:    je .LBB10_20

 ; SSE2-NEXT:    movb %ch, 5(%rdi)
 ; SSE2-NEXT:  .LBB15_12: # %else10
 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    pextrw $3, %xmm0, %ecx
 ; SSE2-NEXT:    je .LBB15_14
 ; SSE2-NEXT:  # %bb.13: # %cond.store11
 ; SSE2-NEXT:    movb %cl, 6(%rdi)
 ; SSE2-NEXT:  .LBB15_14: # %else12
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    je .LBB15_16
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    jns .LBB15_16
 ; SSE2-NEXT:  # %bb.15: # %cond.store13
 ; SSE2-NEXT:    movb %ch, 7(%rdi)
 ; SSE2-NEXT:  .LBB15_16: # %else14
 ; SSE2-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE2-NEXT:    pextrw $4, %xmm0, %ecx
 ; SSE2-NEXT:    je .LBB15_18
 ; SSE2-NEXT:  # %bb.17: # %cond.store15
 ; SSE2-NEXT:    movb %cl, 8(%rdi)

 ; SSE2-NEXT:  .LBB15_28: # %else26
 ; SSE2-NEXT:    testl $16384, %eax # imm = 0x4000
 ; SSE2-NEXT:    pextrw $7, %xmm0, %ecx
 ; SSE2-NEXT:    je .LBB15_30
 ; SSE2-NEXT:  # %bb.29: # %cond.store27
 ; SSE2-NEXT:    movb %cl, 14(%rdi)
 ; SSE2-NEXT:  .LBB15_30: # %else28
 ; SSE2-NEXT:    packsswb %xmm3, %xmm2
-; SSE2-NEXT:    testl $32768, %eax # imm = 0x8000
-; SSE2-NEXT:    je .LBB15_32
+; SSE2-NEXT:    testw %ax, %ax
+; SSE2-NEXT:    jns .LBB15_32
 ; SSE2-NEXT:  # %bb.31: # %cond.store29
 ; SSE2-NEXT:    movb %ch, 15(%rdi)
 ; SSE2-NEXT:  .LBB15_32: # %else30
 ; SSE2-NEXT:    testl $65536, %eax # imm = 0x10000
 ; SSE2-NEXT:    movd %xmm2, %ecx
 ; SSE2-NEXT:    jne .LBB15_33
 ; SSE2-NEXT:  # %bb.34: # %else32
 ; SSE2-NEXT:    testl $131072, %eax # imm = 0x20000

 ; SSE4-NEXT:    jne .LBB15_9
 ; SSE4-NEXT:  .LBB15_10: # %else8
 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    jne .LBB15_11
 ; SSE4-NEXT:  .LBB15_12: # %else10
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    jne .LBB15_13
 ; SSE4-NEXT:  .LBB15_14: # %else12
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    jne .LBB15_15
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    js .LBB15_15
 ; SSE4-NEXT:  .LBB15_16: # %else14
 ; SSE4-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE4-NEXT:    jne .LBB15_17
 ; SSE4-NEXT:  .LBB15_18: # %else16
 ; SSE4-NEXT:    testl $512, %eax # imm = 0x200
 ; SSE4-NEXT:    jne .LBB15_19
 ; SSE4-NEXT:  .LBB15_20: # %else18
 ; SSE4-NEXT:    testl $1024, %eax # imm = 0x400
 ; SSE4-NEXT:    jne .LBB15_21
 ; SSE4-NEXT:  .LBB15_22: # %else20
 ; SSE4-NEXT:    testl $2048, %eax # imm = 0x800
 ; SSE4-NEXT:    jne .LBB15_23
 ; SSE4-NEXT:  .LBB15_24: # %else22
 ; SSE4-NEXT:    testl $4096, %eax # imm = 0x1000
 ; SSE4-NEXT:    jne .LBB15_25
 ; SSE4-NEXT:  .LBB15_26: # %else24
 ; SSE4-NEXT:    testl $8192, %eax # imm = 0x2000
 ; SSE4-NEXT:    jne .LBB15_27
 ; SSE4-NEXT:  .LBB15_28: # %else26
 ; SSE4-NEXT:    testl $16384, %eax # imm = 0x4000
 ; SSE4-NEXT:    jne .LBB15_29
 ; SSE4-NEXT:  .LBB15_30: # %else28
-; SSE4-NEXT:    testl $32768, %eax # imm = 0x8000
-; SSE4-NEXT:    je .LBB15_32
+; SSE4-NEXT:    testw %ax, %ax
+; SSE4-NEXT:    jns .LBB15_32
 ; SSE4-NEXT:  .LBB15_31: # %cond.store29
 ; SSE4-NEXT:    pextrb $15, %xmm0, 15(%rdi)
 ; SSE4-NEXT:  .LBB15_32: # %else30
 ; SSE4-NEXT:    packsswb %xmm3, %xmm2
 ; SSE4-NEXT:    testl $65536, %eax # imm = 0x10000
 ; SSE4-NEXT:    jne .LBB15_33
 ; SSE4-NEXT:  # %bb.34: # %else32
 ; SSE4-NEXT:    testl $131072, %eax # imm = 0x20000

 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    je .LBB15_12
 ; SSE4-NEXT:  .LBB15_11: # %cond.store9
 ; SSE4-NEXT:    pextrb $5, %xmm0, 5(%rdi)
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    je .LBB15_14
 ; SSE4-NEXT:  .LBB15_13: # %cond.store11
 ; SSE4-NEXT:    pextrb $6, %xmm0, 6(%rdi)
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    je .LBB15_16
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    jns .LBB15_16
 ; SSE4-NEXT:  .LBB15_15: # %cond.store13
 ; SSE4-NEXT:    pextrb $7, %xmm0, 7(%rdi)
 ; SSE4-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE4-NEXT:    je .LBB15_18
 ; SSE4-NEXT:  .LBB15_17: # %cond.store15
 ; SSE4-NEXT:    pextrb $8, %xmm0, 8(%rdi)
 ; SSE4-NEXT:    testl $512, %eax # imm = 0x200
 ; SSE4-NEXT:    je .LBB15_20

 ; SSE4-NEXT:    testl $8192, %eax # imm = 0x2000
 ; SSE4-NEXT:    je .LBB15_28
 ; SSE4-NEXT:  .LBB15_27: # %cond.store25
 ; SSE4-NEXT:    pextrb $13, %xmm0, 13(%rdi)
 ; SSE4-NEXT:    testl $16384, %eax # imm = 0x4000
 ; SSE4-NEXT:    je .LBB15_30
 ; SSE4-NEXT:  .LBB15_29: # %cond.store27
 ; SSE4-NEXT:    pextrb $14, %xmm0, 14(%rdi)
-; SSE4-NEXT:    testl $32768, %eax # imm = 0x8000
-; SSE4-NEXT:    jne .LBB15_31
+; SSE4-NEXT:    testw %ax, %ax
+; SSE4-NEXT:    js .LBB15_31
 ; SSE4-NEXT:    jmp .LBB15_32
 ; SSE4-NEXT:  .LBB15_33: # %cond.store31
 ; SSE4-NEXT:    pextrb $0, %xmm2, 16(%rdi)
 ; SSE4-NEXT:    testl $131072, %eax # imm = 0x20000
 ; SSE4-NEXT:    je .LBB15_36
 ; SSE4-NEXT:  .LBB15_35: # %cond.store33
 ; SSE4-NEXT:    pextrb $1, %xmm2, 17(%rdi)
 ; SSE4-NEXT:    testl $262144, %eax # imm = 0x40000

 ; AVX1-NEXT:    jne .LBB15_9
 ; AVX1-NEXT:  .LBB15_10: # %else8
 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    jne .LBB15_11
 ; AVX1-NEXT:  .LBB15_12: # %else10
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    jne .LBB15_13
 ; AVX1-NEXT:  .LBB15_14: # %else12
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    jne .LBB15_15
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    js .LBB15_15
 ; AVX1-NEXT:  .LBB15_16: # %else14
 ; AVX1-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX1-NEXT:    jne .LBB15_17
 ; AVX1-NEXT:  .LBB15_18: # %else16
 ; AVX1-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX1-NEXT:    jne .LBB15_19
 ; AVX1-NEXT:  .LBB15_20: # %else18
 ; AVX1-NEXT:    testl $1024, %eax # imm = 0x400
 ; AVX1-NEXT:    jne .LBB15_21
 ; AVX1-NEXT:  .LBB15_22: # %else20
 ; AVX1-NEXT:    testl $2048, %eax # imm = 0x800
 ; AVX1-NEXT:    jne .LBB15_23
 ; AVX1-NEXT:  .LBB15_24: # %else22
 ; AVX1-NEXT:    testl $4096, %eax # imm = 0x1000
 ; AVX1-NEXT:    jne .LBB15_25
 ; AVX1-NEXT:  .LBB15_26: # %else24
 ; AVX1-NEXT:    testl $8192, %eax # imm = 0x2000
 ; AVX1-NEXT:    jne .LBB15_27
 ; AVX1-NEXT:  .LBB15_28: # %else26
 ; AVX1-NEXT:    testl $16384, %eax # imm = 0x4000
 ; AVX1-NEXT:    jne .LBB15_29
 ; AVX1-NEXT:  .LBB15_30: # %else28
-; AVX1-NEXT:    testl $32768, %eax # imm = 0x8000
-; AVX1-NEXT:    je .LBB15_32
+; AVX1-NEXT:    testw %ax, %ax
+; AVX1-NEXT:    jns .LBB15_32
 ; AVX1-NEXT:  .LBB15_31: # %cond.store29
 ; AVX1-NEXT:    vpextrb $15, %xmm0, 15(%rdi)
 ; AVX1-NEXT:  .LBB15_32: # %else30
 ; AVX1-NEXT:    testl $65536, %eax # imm = 0x10000
 ; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
 ; AVX1-NEXT:    jne .LBB15_33
 ; AVX1-NEXT:  # %bb.34: # %else32
 ; AVX1-NEXT:    testl $131072, %eax # imm = 0x20000

 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    je .LBB15_12
 ; AVX1-NEXT:  .LBB15_11: # %cond.store9
 ; AVX1-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    je .LBB15_14
 ; AVX1-NEXT:  .LBB15_13: # %cond.store11
 ; AVX1-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    je .LBB15_16
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    jns .LBB15_16
 ; AVX1-NEXT:  .LBB15_15: # %cond.store13
 ; AVX1-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX1-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX1-NEXT:    je .LBB15_18
 ; AVX1-NEXT:  .LBB15_17: # %cond.store15
 ; AVX1-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX1-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX1-NEXT:    je .LBB15_20

 ; AVX1-NEXT:    testl $8192, %eax # imm = 0x2000
 ; AVX1-NEXT:    je .LBB15_28
 ; AVX1-NEXT:  .LBB15_27: # %cond.store25
 ; AVX1-NEXT:    vpextrb $13, %xmm0, 13(%rdi)
 ; AVX1-NEXT:    testl $16384, %eax # imm = 0x4000
 ; AVX1-NEXT:    je .LBB15_30
 ; AVX1-NEXT:  .LBB15_29: # %cond.store27
 ; AVX1-NEXT:    vpextrb $14, %xmm0, 14(%rdi)
-; AVX1-NEXT:    testl $32768, %eax # imm = 0x8000
-; AVX1-NEXT:    jne .LBB15_31
+; AVX1-NEXT:    testw %ax, %ax
+; AVX1-NEXT:    js .LBB15_31
 ; AVX1-NEXT:    jmp .LBB15_32
 ; AVX1-NEXT:  .LBB15_33: # %cond.store31
 ; AVX1-NEXT:    vpextrb $0, %xmm0, 16(%rdi)
 ; AVX1-NEXT:    testl $131072, %eax # imm = 0x20000
 ; AVX1-NEXT:    je .LBB15_36
 ; AVX1-NEXT:  .LBB15_35: # %cond.store33
 ; AVX1-NEXT:    vpextrb $1, %xmm0, 17(%rdi)
 ; AVX1-NEXT:    testl $262144, %eax # imm = 0x40000

 ; AVX2-NEXT:    jne .LBB15_9
 ; AVX2-NEXT:  .LBB15_10: # %else8
 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    jne .LBB15_11
 ; AVX2-NEXT:  .LBB15_12: # %else10
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    jne .LBB15_13
 ; AVX2-NEXT:  .LBB15_14: # %else12
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    jne .LBB15_15
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    js .LBB15_15
 ; AVX2-NEXT:  .LBB15_16: # %else14
 ; AVX2-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX2-NEXT:    jne .LBB15_17
 ; AVX2-NEXT:  .LBB15_18: # %else16
 ; AVX2-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX2-NEXT:    jne .LBB15_19
 ; AVX2-NEXT:  .LBB15_20: # %else18
 ; AVX2-NEXT:    testl $1024, %eax # imm = 0x400
 ; AVX2-NEXT:    jne .LBB15_21
 ; AVX2-NEXT:  .LBB15_22: # %else20
 ; AVX2-NEXT:    testl $2048, %eax # imm = 0x800
 ; AVX2-NEXT:    jne .LBB15_23
 ; AVX2-NEXT:  .LBB15_24: # %else22
 ; AVX2-NEXT:    testl $4096, %eax # imm = 0x1000
 ; AVX2-NEXT:    jne .LBB15_25
 ; AVX2-NEXT:  .LBB15_26: # %else24
 ; AVX2-NEXT:    testl $8192, %eax # imm = 0x2000
 ; AVX2-NEXT:    jne .LBB15_27
 ; AVX2-NEXT:  .LBB15_28: # %else26
 ; AVX2-NEXT:    testl $16384, %eax # imm = 0x4000
 ; AVX2-NEXT:    jne .LBB15_29
 ; AVX2-NEXT:  .LBB15_30: # %else28
-; AVX2-NEXT:    testl $32768, %eax # imm = 0x8000
-; AVX2-NEXT:    je .LBB15_32
+; AVX2-NEXT:    testw %ax, %ax
+; AVX2-NEXT:    jns .LBB15_32
 ; AVX2-NEXT:  .LBB15_31: # %cond.store29
 ; AVX2-NEXT:    vpextrb $15, %xmm0, 15(%rdi)
 ; AVX2-NEXT:  .LBB15_32: # %else30
 ; AVX2-NEXT:    testl $65536, %eax # imm = 0x10000
 ; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm0
 ; AVX2-NEXT:    jne .LBB15_33
 ; AVX2-NEXT:  # %bb.34: # %else32
 ; AVX2-NEXT:    testl $131072, %eax # imm = 0x20000

 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    je .LBB15_12
 ; AVX2-NEXT:  .LBB15_11: # %cond.store9
 ; AVX2-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    je .LBB15_14
 ; AVX2-NEXT:  .LBB15_13: # %cond.store11
 ; AVX2-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    je .LBB15_16
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    jns .LBB15_16
 ; AVX2-NEXT:  .LBB15_15: # %cond.store13
 ; AVX2-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX2-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX2-NEXT:    je .LBB15_18
 ; AVX2-NEXT:  .LBB15_17: # %cond.store15
 ; AVX2-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX2-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX2-NEXT:    je .LBB15_20

 ; AVX2-NEXT:    testl $8192, %eax # imm = 0x2000
 ; AVX2-NEXT:    je .LBB15_28
 ; AVX2-NEXT:  .LBB15_27: # %cond.store25
 ; AVX2-NEXT:    vpextrb $13, %xmm0, 13(%rdi)
 ; AVX2-NEXT:    testl $16384, %eax # imm = 0x4000
 ; AVX2-NEXT:    je .LBB15_30
 ; AVX2-NEXT:  .LBB15_29: # %cond.store27
 ; AVX2-NEXT:    vpextrb $14, %xmm0, 14(%rdi)
-; AVX2-NEXT:    testl $32768, %eax # imm = 0x8000
-; AVX2-NEXT:    jne .LBB15_31
+; AVX2-NEXT:    testw %ax, %ax
+; AVX2-NEXT:    js .LBB15_31
 ; AVX2-NEXT:    jmp .LBB15_32
 ; AVX2-NEXT:  .LBB15_33: # %cond.store31
 ; AVX2-NEXT:    vpextrb $0, %xmm0, 16(%rdi)
 ; AVX2-NEXT:    testl $131072, %eax # imm = 0x20000
 ; AVX2-NEXT:    je .LBB15_36
 ; AVX2-NEXT:  .LBB15_35: # %cond.store33
 ; AVX2-NEXT:    vpextrb $1, %xmm0, 17(%rdi)
 ; AVX2-NEXT:    testl $262144, %eax # imm = 0x40000

 ; AVX512F-NEXT:    jne .LBB15_9
 ; AVX512F-NEXT:  .LBB15_10: # %else8
 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    jne .LBB15_11
 ; AVX512F-NEXT:  .LBB15_12: # %else10
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    jne .LBB15_13
 ; AVX512F-NEXT:  .LBB15_14: # %else12
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    jne .LBB15_15
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    js .LBB15_15
 ; AVX512F-NEXT:  .LBB15_16: # %else14
 ; AVX512F-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX512F-NEXT:    jne .LBB15_17
 ; AVX512F-NEXT:  .LBB15_18: # %else16
 ; AVX512F-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX512F-NEXT:    jne .LBB15_19
 ; AVX512F-NEXT:  .LBB15_20: # %else18
 ; AVX512F-NEXT:    testl $1024, %eax # imm = 0x400
 ; AVX512F-NEXT:    jne .LBB15_21
 ; AVX512F-NEXT:  .LBB15_22: # %else20
 ; AVX512F-NEXT:    testl $2048, %eax # imm = 0x800
 ; AVX512F-NEXT:    jne .LBB15_23
 ; AVX512F-NEXT:  .LBB15_24: # %else22
 ; AVX512F-NEXT:    testl $4096, %eax # imm = 0x1000
 ; AVX512F-NEXT:    jne .LBB15_25
 ; AVX512F-NEXT:  .LBB15_26: # %else24
 ; AVX512F-NEXT:    testl $8192, %eax # imm = 0x2000
 ; AVX512F-NEXT:    jne .LBB15_27
 ; AVX512F-NEXT:  .LBB15_28: # %else26
 ; AVX512F-NEXT:    testl $16384, %eax # imm = 0x4000
 ; AVX512F-NEXT:    jne .LBB15_29
 ; AVX512F-NEXT:  .LBB15_30: # %else28
-; AVX512F-NEXT:    testl $32768, %eax # imm = 0x8000
-; AVX512F-NEXT:    je .LBB15_32
+; AVX512F-NEXT:    testw %ax, %ax
+; AVX512F-NEXT:    jns .LBB15_32
 ; AVX512F-NEXT:  .LBB15_31: # %cond.store29
 ; AVX512F-NEXT:    vpextrb $15, %xmm0, 15(%rdi)
 ; AVX512F-NEXT:  .LBB15_32: # %else30
 ; AVX512F-NEXT:    testl $65536, %eax # imm = 0x10000
 ; AVX512F-NEXT:    vextracti128 $1, %ymm0, %xmm0
 ; AVX512F-NEXT:    jne .LBB15_33
 ; AVX512F-NEXT:  # %bb.34: # %else32
 ; AVX512F-NEXT:    testl $131072, %eax # imm = 0x20000

 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    je .LBB15_12
 ; AVX512F-NEXT:  .LBB15_11: # %cond.store9
 ; AVX512F-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    je .LBB15_14
 ; AVX512F-NEXT:  .LBB15_13: # %cond.store11
 ; AVX512F-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    je .LBB15_16
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    jns .LBB15_16
 ; AVX512F-NEXT:  .LBB15_15: # %cond.store13
 ; AVX512F-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX512F-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX512F-NEXT:    je .LBB15_18
 ; AVX512F-NEXT:  .LBB15_17: # %cond.store15
 ; AVX512F-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX512F-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX512F-NEXT:    je .LBB15_20

 ; AVX512F-NEXT:    testl $8192, %eax # imm = 0x2000
 ; AVX512F-NEXT:    je .LBB15_28
 ; AVX512F-NEXT:  .LBB15_27: # %cond.store25
 ; AVX512F-NEXT:    vpextrb $13, %xmm0, 13(%rdi)
 ; AVX512F-NEXT:    testl $16384, %eax # imm = 0x4000
 ; AVX512F-NEXT:    je .LBB15_30
 ; AVX512F-NEXT:  .LBB15_29: # %cond.store27
 ; AVX512F-NEXT:    vpextrb $14, %xmm0, 14(%rdi)
-; AVX512F-NEXT:    testl $32768, %eax # imm = 0x8000
-; AVX512F-NEXT:    jne .LBB15_31
+; AVX512F-NEXT:    testw %ax, %ax
+; AVX512F-NEXT:    js .LBB15_31
 ; AVX512F-NEXT:    jmp .LBB15_32
 ; AVX512F-NEXT:  .LBB15_33: # %cond.store31
 ; AVX512F-NEXT:    vpextrb $0, %xmm0, 16(%rdi)
 ; AVX512F-NEXT:    testl $131072, %eax # imm = 0x20000
 ; AVX512F-NEXT:    je .LBB15_36
 ; AVX512F-NEXT:  .LBB15_35: # %cond.store33
 ; AVX512F-NEXT:    vpextrb $1, %xmm0, 17(%rdi)
 ; AVX512F-NEXT:    testl $262144, %eax # imm = 0x40000

 ; SSE2-NEXT:    movb %ch, 5(%rdi)
 ; SSE2-NEXT:  .LBB16_12: # %else10
 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    pextrw $3, %xmm0, %ecx
 ; SSE2-NEXT:    je .LBB16_14
 ; SSE2-NEXT:  # %bb.13: # %cond.store11
 ; SSE2-NEXT:    movb %cl, 6(%rdi)
 ; SSE2-NEXT:  .LBB16_14: # %else12
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    je .LBB16_16
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    jns .LBB16_16
 ; SSE2-NEXT:  # %bb.15: # %cond.store13
 ; SSE2-NEXT:    movb %ch, 7(%rdi)
 ; SSE2-NEXT:  .LBB16_16: # %else14
 ; SSE2-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE2-NEXT:    pextrw $4, %xmm0, %ecx
 ; SSE2-NEXT:    je .LBB16_18
 ; SSE2-NEXT:  # %bb.17: # %cond.store15
 ; SSE2-NEXT:    movb %cl, 8(%rdi)

 ; SSE4-NEXT:    jne .LBB16_9
 ; SSE4-NEXT:  .LBB16_10: # %else8
 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    jne .LBB16_11
 ; SSE4-NEXT:  .LBB16_12: # %else10
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    jne .LBB16_13
 ; SSE4-NEXT:  .LBB16_14: # %else12
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    jne .LBB16_15
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    js .LBB16_15
 ; SSE4-NEXT:  .LBB16_16: # %else14
 ; SSE4-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE4-NEXT:    jne .LBB16_17
 ; SSE4-NEXT:  .LBB16_18: # %else16
 ; SSE4-NEXT:    testl $512, %eax # imm = 0x200
 ; SSE4-NEXT:    jne .LBB16_19
 ; SSE4-NEXT:  .LBB16_20: # %else18
 ; SSE4-NEXT:    testl $1024, %eax # imm = 0x400

 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    je .LBB16_12
 ; SSE4-NEXT:  .LBB16_11: # %cond.store9
 ; SSE4-NEXT:    pextrb $5, %xmm0, 5(%rdi)
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    je .LBB16_14
 ; SSE4-NEXT:  .LBB16_13: # %cond.store11
 ; SSE4-NEXT:    pextrb $6, %xmm0, 6(%rdi)
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    je .LBB16_16
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    jns .LBB16_16
 ; SSE4-NEXT:  .LBB16_15: # %cond.store13
 ; SSE4-NEXT:    pextrb $7, %xmm0, 7(%rdi)
 ; SSE4-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE4-NEXT:    je .LBB16_18
 ; SSE4-NEXT:  .LBB16_17: # %cond.store15
 ; SSE4-NEXT:    pextrb $8, %xmm0, 8(%rdi)
 ; SSE4-NEXT:    testl $512, %eax # imm = 0x200
 ; SSE4-NEXT:    je .LBB16_20

 ; AVX1-NEXT:    jne .LBB16_9
 ; AVX1-NEXT:  .LBB16_10: # %else8
 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    jne .LBB16_11
 ; AVX1-NEXT:  .LBB16_12: # %else10
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    jne .LBB16_13
 ; AVX1-NEXT:  .LBB16_14: # %else12
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    jne .LBB16_15
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    js .LBB16_15
 ; AVX1-NEXT:  .LBB16_16: # %else14
 ; AVX1-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX1-NEXT:    jne .LBB16_17
 ; AVX1-NEXT:  .LBB16_18: # %else16
 ; AVX1-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX1-NEXT:    jne .LBB16_19
 ; AVX1-NEXT:  .LBB16_20: # %else18
 ; AVX1-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    je .LBB16_12
 ; AVX1-NEXT:  .LBB16_11: # %cond.store9
 ; AVX1-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    je .LBB16_14
 ; AVX1-NEXT:  .LBB16_13: # %cond.store11
 ; AVX1-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    je .LBB16_16
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    jns .LBB16_16
 ; AVX1-NEXT:  .LBB16_15: # %cond.store13
 ; AVX1-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX1-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX1-NEXT:    je .LBB16_18
 ; AVX1-NEXT:  .LBB16_17: # %cond.store15
 ; AVX1-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX1-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX1-NEXT:    je .LBB16_20

 ; AVX2-NEXT:    jne .LBB16_9
 ; AVX2-NEXT:  .LBB16_10: # %else8
 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    jne .LBB16_11
 ; AVX2-NEXT:  .LBB16_12: # %else10
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    jne .LBB16_13
 ; AVX2-NEXT:  .LBB16_14: # %else12
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    jne .LBB16_15
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    js .LBB16_15
 ; AVX2-NEXT:  .LBB16_16: # %else14
 ; AVX2-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX2-NEXT:    jne .LBB16_17
 ; AVX2-NEXT:  .LBB16_18: # %else16
 ; AVX2-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX2-NEXT:    jne .LBB16_19
 ; AVX2-NEXT:  .LBB16_20: # %else18
 ; AVX2-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    je .LBB16_12
 ; AVX2-NEXT:  .LBB16_11: # %cond.store9
 ; AVX2-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    je .LBB16_14
 ; AVX2-NEXT:  .LBB16_13: # %cond.store11
 ; AVX2-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    je .LBB16_16
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    jns .LBB16_16
 ; AVX2-NEXT:  .LBB16_15: # %cond.store13
 ; AVX2-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX2-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX2-NEXT:    je .LBB16_18
 ; AVX2-NEXT:  .LBB16_17: # %cond.store15
 ; AVX2-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX2-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX2-NEXT:    je .LBB16_20

 ; AVX512F-NEXT:    jne .LBB16_9
 ; AVX512F-NEXT:  .LBB16_10: # %else8
 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    jne .LBB16_11
 ; AVX512F-NEXT:  .LBB16_12: # %else10
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    jne .LBB16_13
 ; AVX512F-NEXT:  .LBB16_14: # %else12
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    jne .LBB16_15
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    js .LBB16_15
 ; AVX512F-NEXT:  .LBB16_16: # %else14
 ; AVX512F-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX512F-NEXT:    jne .LBB16_17
 ; AVX512F-NEXT:  .LBB16_18: # %else16
 ; AVX512F-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX512F-NEXT:    jne .LBB16_19
 ; AVX512F-NEXT:  .LBB16_20: # %else18
 ; AVX512F-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    je .LBB16_12
 ; AVX512F-NEXT:  .LBB16_11: # %cond.store9
 ; AVX512F-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    je .LBB16_14
 ; AVX512F-NEXT:  .LBB16_13: # %cond.store11
 ; AVX512F-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    je .LBB16_16
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    jns .LBB16_16
 ; AVX512F-NEXT:  .LBB16_15: # %cond.store13
 ; AVX512F-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX512F-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX512F-NEXT:    je .LBB16_18
 ; AVX512F-NEXT:  .LBB16_17: # %cond.store15
 ; AVX512F-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX512F-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX512F-NEXT:    je .LBB16_20

llvm/test/CodeGen/X86/masked_store_trunc_usat.ll

 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    je .LBB9_14
 ; SSE2-NEXT:  # %bb.13: # %cond.store11
 ; SSE2-NEXT:    pextrw $6, %xmm8, %ecx
 ; SSE2-NEXT:    movw %cx, 12(%rdi)
 ; SSE2-NEXT:  .LBB9_14: # %else12
 ; SSE2-NEXT:    psrad $16, %xmm3
 ; SSE2-NEXT:    psrad $16, %xmm2
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    je .LBB9_16
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    jns .LBB9_16
 ; SSE2-NEXT:  # %bb.15: # %cond.store13
 ; SSE2-NEXT:    pextrw $7, %xmm8, %ecx
 ; SSE2-NEXT:    movw %cx, 14(%rdi)
 ; SSE2-NEXT:  .LBB9_16: # %else14
 ; SSE2-NEXT:    packssdw %xmm3, %xmm2
 ; SSE2-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE2-NEXT:    jne .LBB9_17
 ; SSE2-NEXT:  # %bb.18: # %else16

 ; SSE4-NEXT:  .LBB9_12: # %else10
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    je .LBB9_14
 ; SSE4-NEXT:  .LBB9_13: # %cond.store11
 ; SSE4-NEXT:    pextrw $6, %xmm0, 12(%rdi)
 ; SSE4-NEXT:  .LBB9_14: # %else12
 ; SSE4-NEXT:    pminud %xmm8, %xmm3
 ; SSE4-NEXT:    pminud %xmm8, %xmm2
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    je .LBB9_16
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    jns .LBB9_16
 ; SSE4-NEXT:  # %bb.15: # %cond.store13
 ; SSE4-NEXT:    pextrw $7, %xmm0, 14(%rdi)
 ; SSE4-NEXT:  .LBB9_16: # %else14
 ; SSE4-NEXT:    packusdw %xmm3, %xmm2
 ; SSE4-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE4-NEXT:    jne .LBB9_17
 ; SSE4-NEXT:  # %bb.18: # %else16
 ; SSE4-NEXT:    testl $512, %eax # imm = 0x200

 ; AVX1-NEXT:    jne .LBB9_9
 ; AVX1-NEXT:  .LBB9_10: # %else8
 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    jne .LBB9_11
 ; AVX1-NEXT:  .LBB9_12: # %else10
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    jne .LBB9_13
 ; AVX1-NEXT:  .LBB9_14: # %else12
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    je .LBB9_16
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    jns .LBB9_16
 ; AVX1-NEXT:  .LBB9_15: # %cond.store13
 ; AVX1-NEXT:    vpextrw $7, %xmm0, 14(%rdi)
 ; AVX1-NEXT:  .LBB9_16: # %else14
 ; AVX1-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
 ; AVX1-NEXT:    jne .LBB9_17
 ; AVX1-NEXT:  # %bb.18: # %else16
 ; AVX1-NEXT:    testl $512, %eax # imm = 0x200

 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    je .LBB9_12
 ; AVX1-NEXT:  .LBB9_11: # %cond.store9
 ; AVX1-NEXT:    vpextrw $5, %xmm0, 10(%rdi)
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    je .LBB9_14
 ; AVX1-NEXT:  .LBB9_13: # %cond.store11
 ; AVX1-NEXT:    vpextrw $6, %xmm0, 12(%rdi)
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    jne .LBB9_15
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    js .LBB9_15
 ; AVX1-NEXT:    jmp .LBB9_16
 ; AVX1-NEXT:  .LBB9_17: # %cond.store15
 ; AVX1-NEXT:    vpextrw $0, %xmm0, 16(%rdi)
 ; AVX1-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX1-NEXT:    je .LBB9_20
 ; AVX1-NEXT:  .LBB9_19: # %cond.store17
 ; AVX1-NEXT:    vpextrw $1, %xmm0, 18(%rdi)
 ; AVX1-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX2-NEXT:    jne .LBB9_9
 ; AVX2-NEXT:  .LBB9_10: # %else8
 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    jne .LBB9_11
 ; AVX2-NEXT:  .LBB9_12: # %else10
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    jne .LBB9_13
 ; AVX2-NEXT:  .LBB9_14: # %else12
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    je .LBB9_16
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    jns .LBB9_16
 ; AVX2-NEXT:  .LBB9_15: # %cond.store13
 ; AVX2-NEXT:    vpextrw $7, %xmm0, 14(%rdi)
 ; AVX2-NEXT:  .LBB9_16: # %else14
 ; AVX2-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm0
 ; AVX2-NEXT:    jne .LBB9_17
 ; AVX2-NEXT:  # %bb.18: # %else16
 ; AVX2-NEXT:    testl $512, %eax # imm = 0x200

 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    je .LBB9_12
 ; AVX2-NEXT:  .LBB9_11: # %cond.store9
 ; AVX2-NEXT:    vpextrw $5, %xmm0, 10(%rdi)
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    je .LBB9_14
 ; AVX2-NEXT:  .LBB9_13: # %cond.store11
 ; AVX2-NEXT:    vpextrw $6, %xmm0, 12(%rdi)
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    jne .LBB9_15
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    js .LBB9_15
 ; AVX2-NEXT:    jmp .LBB9_16
 ; AVX2-NEXT:  .LBB9_17: # %cond.store15
 ; AVX2-NEXT:    vpextrw $0, %xmm0, 16(%rdi)
 ; AVX2-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX2-NEXT:    je .LBB9_20
 ; AVX2-NEXT:  .LBB9_19: # %cond.store17
 ; AVX2-NEXT:    vpextrw $1, %xmm0, 18(%rdi)
 ; AVX2-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX512F-NEXT:    jne .LBB9_9
 ; AVX512F-NEXT:  .LBB9_10: # %else8
 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    jne .LBB9_11
 ; AVX512F-NEXT:  .LBB9_12: # %else10
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    jne .LBB9_13
 ; AVX512F-NEXT:  .LBB9_14: # %else12
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    je .LBB9_16
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    jns .LBB9_16
 ; AVX512F-NEXT:  .LBB9_15: # %cond.store13
 ; AVX512F-NEXT:    vpextrw $7, %xmm0, 14(%rdi)
 ; AVX512F-NEXT:  .LBB9_16: # %else14
 ; AVX512F-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX512F-NEXT:    vextracti128 $1, %ymm0, %xmm0
 ; AVX512F-NEXT:    jne .LBB9_17
 ; AVX512F-NEXT:  # %bb.18: # %else16
 ; AVX512F-NEXT:    testl $512, %eax # imm = 0x200

 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    je .LBB9_12
 ; AVX512F-NEXT:  .LBB9_11: # %cond.store9
 ; AVX512F-NEXT:    vpextrw $5, %xmm0, 10(%rdi)
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    je .LBB9_14
 ; AVX512F-NEXT:  .LBB9_13: # %cond.store11
 ; AVX512F-NEXT:    vpextrw $6, %xmm0, 12(%rdi)
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    jne .LBB9_15
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    js .LBB9_15
 ; AVX512F-NEXT:    jmp .LBB9_16
 ; AVX512F-NEXT:  .LBB9_17: # %cond.store15
 ; AVX512F-NEXT:    vpextrw $0, %xmm0, 16(%rdi)
 ; AVX512F-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX512F-NEXT:    je .LBB9_20
 ; AVX512F-NEXT:  .LBB9_19: # %cond.store17
 ; AVX512F-NEXT:    vpextrw $1, %xmm0, 18(%rdi)
 ; AVX512F-NEXT:    testl $1024, %eax # imm = 0x400

 ; SSE2-NEXT:    movb %ch, 5(%rdi)
 ; SSE2-NEXT:  .LBB10_12: # %else10
 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    pextrw $3, %xmm1, %ecx
 ; SSE2-NEXT:    je .LBB10_14
 ; SSE2-NEXT:  # %bb.13: # %cond.store11
 ; SSE2-NEXT:    movb %cl, 6(%rdi)
 ; SSE2-NEXT:  .LBB10_14: # %else12
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    je .LBB10_16
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    jns .LBB10_16
 ; SSE2-NEXT:  # %bb.15: # %cond.store13
 ; SSE2-NEXT:    movb %ch, 7(%rdi)
 ; SSE2-NEXT:  .LBB10_16: # %else14
 ; SSE2-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE2-NEXT:    pextrw $4, %xmm1, %ecx
 ; SSE2-NEXT:    je .LBB10_18
 ; SSE2-NEXT:  # %bb.17: # %cond.store15
 ; SSE2-NEXT:    movb %cl, 8(%rdi)

 ; SSE4-NEXT:    jne .LBB10_9
 ; SSE4-NEXT:  .LBB10_10: # %else8
 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    jne .LBB10_11
 ; SSE4-NEXT:  .LBB10_12: # %else10
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    jne .LBB10_13
 ; SSE4-NEXT:  .LBB10_14: # %else12
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    jne .LBB10_15
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    js .LBB10_15
 ; SSE4-NEXT:  .LBB10_16: # %else14
 ; SSE4-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE4-NEXT:    jne .LBB10_17
 ; SSE4-NEXT:  .LBB10_18: # %else16
 ; SSE4-NEXT:    testl $512, %eax # imm = 0x200
 ; SSE4-NEXT:    jne .LBB10_19
 ; SSE4-NEXT:  .LBB10_20: # %else18
 ; SSE4-NEXT:    testl $1024, %eax # imm = 0x400

 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    je .LBB10_12
 ; SSE4-NEXT:  .LBB10_11: # %cond.store9
 ; SSE4-NEXT:    pextrb $5, %xmm0, 5(%rdi)
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    je .LBB10_14
 ; SSE4-NEXT:  .LBB10_13: # %cond.store11
 ; SSE4-NEXT:    pextrb $6, %xmm0, 6(%rdi)
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    je .LBB10_16
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    jns .LBB10_16
 ; SSE4-NEXT:  .LBB10_15: # %cond.store13
 ; SSE4-NEXT:    pextrb $7, %xmm0, 7(%rdi)
 ; SSE4-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE4-NEXT:    je .LBB10_18
 ; SSE4-NEXT:  .LBB10_17: # %cond.store15
 ; SSE4-NEXT:    pextrb $8, %xmm0, 8(%rdi)
 ; SSE4-NEXT:    testl $512, %eax # imm = 0x200
 ; SSE4-NEXT:    je .LBB10_20

 ; AVX1-NEXT:    jne .LBB10_9
 ; AVX1-NEXT:  .LBB10_10: # %else8
 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    jne .LBB10_11
 ; AVX1-NEXT:  .LBB10_12: # %else10
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    jne .LBB10_13
 ; AVX1-NEXT:  .LBB10_14: # %else12
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    jne .LBB10_15
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    js .LBB10_15
 ; AVX1-NEXT:  .LBB10_16: # %else14
 ; AVX1-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX1-NEXT:    jne .LBB10_17
 ; AVX1-NEXT:  .LBB10_18: # %else16
 ; AVX1-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX1-NEXT:    jne .LBB10_19
 ; AVX1-NEXT:  .LBB10_20: # %else18
 ; AVX1-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    je .LBB10_12
 ; AVX1-NEXT:  .LBB10_11: # %cond.store9
 ; AVX1-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    je .LBB10_14
 ; AVX1-NEXT:  .LBB10_13: # %cond.store11
 ; AVX1-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    je .LBB10_16
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    jns .LBB10_16
 ; AVX1-NEXT:  .LBB10_15: # %cond.store13
 ; AVX1-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX1-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX1-NEXT:    je .LBB10_18
 ; AVX1-NEXT:  .LBB10_17: # %cond.store15
 ; AVX1-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX1-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX1-NEXT:    je .LBB10_20

 ; AVX2-NEXT:    jne .LBB10_9
 ; AVX2-NEXT:  .LBB10_10: # %else8
 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    jne .LBB10_11
 ; AVX2-NEXT:  .LBB10_12: # %else10
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    jne .LBB10_13
 ; AVX2-NEXT:  .LBB10_14: # %else12
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    jne .LBB10_15
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    js .LBB10_15
 ; AVX2-NEXT:  .LBB10_16: # %else14
 ; AVX2-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX2-NEXT:    jne .LBB10_17
 ; AVX2-NEXT:  .LBB10_18: # %else16
 ; AVX2-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX2-NEXT:    jne .LBB10_19
 ; AVX2-NEXT:  .LBB10_20: # %else18
 ; AVX2-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    je .LBB10_12
 ; AVX2-NEXT:  .LBB10_11: # %cond.store9
 ; AVX2-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    je .LBB10_14
 ; AVX2-NEXT:  .LBB10_13: # %cond.store11
 ; AVX2-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    je .LBB10_16
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    jns .LBB10_16
 ; AVX2-NEXT:  .LBB10_15: # %cond.store13
 ; AVX2-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX2-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX2-NEXT:    je .LBB10_18
 ; AVX2-NEXT:  .LBB10_17: # %cond.store15
 ; AVX2-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX2-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX2-NEXT:    je .LBB10_20

 ; AVX512F-NEXT:    jne .LBB10_9
 ; AVX512F-NEXT:  .LBB10_10: # %else8
 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    jne .LBB10_11
 ; AVX512F-NEXT:  .LBB10_12: # %else10
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    jne .LBB10_13
 ; AVX512F-NEXT:  .LBB10_14: # %else12
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    jne .LBB10_15
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    js .LBB10_15
 ; AVX512F-NEXT:  .LBB10_16: # %else14
 ; AVX512F-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX512F-NEXT:    jne .LBB10_17
 ; AVX512F-NEXT:  .LBB10_18: # %else16
 ; AVX512F-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX512F-NEXT:    jne .LBB10_19
 ; AVX512F-NEXT:  .LBB10_20: # %else18
 ; AVX512F-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    je .LBB10_12
 ; AVX512F-NEXT:  .LBB10_11: # %cond.store9
 ; AVX512F-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    je .LBB10_14
 ; AVX512F-NEXT:  .LBB10_13: # %cond.store11
 ; AVX512F-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    je .LBB10_16
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    jns .LBB10_16
 ; AVX512F-NEXT:  .LBB10_15: # %cond.store13
 ; AVX512F-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX512F-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX512F-NEXT:    je .LBB10_18
 ; AVX512F-NEXT:  .LBB10_17: # %cond.store15
 ; AVX512F-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX512F-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX512F-NEXT:    je .LBB10_20

 ; SSE2-NEXT:    movb %ch, 5(%rdi)
 ; SSE2-NEXT:  .LBB15_12: # %else10
 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    pextrw $3, %xmm0, %ecx
 ; SSE2-NEXT:    je .LBB15_14
 ; SSE2-NEXT:  # %bb.13: # %cond.store11
 ; SSE2-NEXT:    movb %cl, 6(%rdi)
 ; SSE2-NEXT:  .LBB15_14: # %else12
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    je .LBB15_16
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    jns .LBB15_16
 ; SSE2-NEXT:  # %bb.15: # %cond.store13
 ; SSE2-NEXT:    movb %ch, 7(%rdi)
 ; SSE2-NEXT:  .LBB15_16: # %else14
 ; SSE2-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE2-NEXT:    pextrw $4, %xmm0, %ecx
 ; SSE2-NEXT:    je .LBB15_18
 ; SSE2-NEXT:  # %bb.17: # %cond.store15
 ; SSE2-NEXT:    movb %cl, 8(%rdi)

 ; SSE2-NEXT:    psubw %xmm4, %xmm2
 ; SSE2-NEXT:    testl $16384, %eax # imm = 0x4000
 ; SSE2-NEXT:    pextrw $7, %xmm0, %ecx
 ; SSE2-NEXT:    je .LBB15_30
 ; SSE2-NEXT:  # %bb.29: # %cond.store27
 ; SSE2-NEXT:    movb %cl, 14(%rdi)
 ; SSE2-NEXT:  .LBB15_30: # %else28
 ; SSE2-NEXT:    packuswb %xmm3, %xmm2
-; SSE2-NEXT:    testl $32768, %eax # imm = 0x8000
-; SSE2-NEXT:    je .LBB15_32
+; SSE2-NEXT:    testw %ax, %ax
+; SSE2-NEXT:    jns .LBB15_32
 ; SSE2-NEXT:  # %bb.31: # %cond.store29
 ; SSE2-NEXT:    movb %ch, 15(%rdi)
 ; SSE2-NEXT:  .LBB15_32: # %else30
 ; SSE2-NEXT:    testl $65536, %eax # imm = 0x10000
 ; SSE2-NEXT:    movd %xmm2, %ecx
 ; SSE2-NEXT:    jne .LBB15_33
 ; SSE2-NEXT:  # %bb.34: # %else32
 ; SSE2-NEXT:    testl $131072, %eax # imm = 0x20000

 ; SSE4-NEXT:    jne .LBB15_9
 ; SSE4-NEXT:  .LBB15_10: # %else8
 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    jne .LBB15_11
 ; SSE4-NEXT:  .LBB15_12: # %else10
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    jne .LBB15_13
 ; SSE4-NEXT:  .LBB15_14: # %else12
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    jne .LBB15_15
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    js .LBB15_15
 ; SSE4-NEXT:  .LBB15_16: # %else14
 ; SSE4-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE4-NEXT:    jne .LBB15_17
 ; SSE4-NEXT:  .LBB15_18: # %else16
 ; SSE4-NEXT:    testl $512, %eax # imm = 0x200
 ; SSE4-NEXT:    jne .LBB15_19
 ; SSE4-NEXT:  .LBB15_20: # %else18
 ; SSE4-NEXT:    testl $1024, %eax # imm = 0x400

 ; SSE4-NEXT:  .LBB15_28: # %else26
 ; SSE4-NEXT:    testl $16384, %eax # imm = 0x4000
 ; SSE4-NEXT:    je .LBB15_30
 ; SSE4-NEXT:  .LBB15_29: # %cond.store27
 ; SSE4-NEXT:    pextrb $14, %xmm0, 14(%rdi)
 ; SSE4-NEXT:  .LBB15_30: # %else28
 ; SSE4-NEXT:    pminuw %xmm6, %xmm3
 ; SSE4-NEXT:    pminuw %xmm6, %xmm2
-; SSE4-NEXT:    testl $32768, %eax # imm = 0x8000
-; SSE4-NEXT:    je .LBB15_32
+; SSE4-NEXT:    testw %ax, %ax
+; SSE4-NEXT:    jns .LBB15_32
 ; SSE4-NEXT:  # %bb.31: # %cond.store29
 ; SSE4-NEXT:    pextrb $15, %xmm0, 15(%rdi)
 ; SSE4-NEXT:  .LBB15_32: # %else30
 ; SSE4-NEXT:    packuswb %xmm3, %xmm2
 ; SSE4-NEXT:    testl $65536, %eax # imm = 0x10000
 ; SSE4-NEXT:    jne .LBB15_33
 ; SSE4-NEXT:  # %bb.34: # %else32
 ; SSE4-NEXT:    testl $131072, %eax # imm = 0x20000

 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    je .LBB15_12
 ; SSE4-NEXT:  .LBB15_11: # %cond.store9
 ; SSE4-NEXT:    pextrb $5, %xmm0, 5(%rdi)
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    je .LBB15_14
 ; SSE4-NEXT:  .LBB15_13: # %cond.store11
 ; SSE4-NEXT:    pextrb $6, %xmm0, 6(%rdi)
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    je .LBB15_16
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    jns .LBB15_16
 ; SSE4-NEXT:  .LBB15_15: # %cond.store13
 ; SSE4-NEXT:    pextrb $7, %xmm0, 7(%rdi)
 ; SSE4-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE4-NEXT:    je .LBB15_18
 ; SSE4-NEXT:  .LBB15_17: # %cond.store15
 ; SSE4-NEXT:    pextrb $8, %xmm0, 8(%rdi)
 ; SSE4-NEXT:    testl $512, %eax # imm = 0x200
 ; SSE4-NEXT:    je .LBB15_20

 ; AVX1-NEXT:    jne .LBB15_9
 ; AVX1-NEXT:  .LBB15_10: # %else8
 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    jne .LBB15_11
 ; AVX1-NEXT:  .LBB15_12: # %else10
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    jne .LBB15_13
 ; AVX1-NEXT:  .LBB15_14: # %else12
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    jne .LBB15_15
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    js .LBB15_15
 ; AVX1-NEXT:  .LBB15_16: # %else14
 ; AVX1-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX1-NEXT:    jne .LBB15_17
 ; AVX1-NEXT:  .LBB15_18: # %else16
 ; AVX1-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX1-NEXT:    jne .LBB15_19
 ; AVX1-NEXT:  .LBB15_20: # %else18
 ; AVX1-NEXT:    testl $1024, %eax # imm = 0x400
 ; AVX1-NEXT:    jne .LBB15_21
 ; AVX1-NEXT:  .LBB15_22: # %else20
 ; AVX1-NEXT:    testl $2048, %eax # imm = 0x800
 ; AVX1-NEXT:    jne .LBB15_23
 ; AVX1-NEXT:  .LBB15_24: # %else22
 ; AVX1-NEXT:    testl $4096, %eax # imm = 0x1000
 ; AVX1-NEXT:    jne .LBB15_25
 ; AVX1-NEXT:  .LBB15_26: # %else24
 ; AVX1-NEXT:    testl $8192, %eax # imm = 0x2000
 ; AVX1-NEXT:    jne .LBB15_27
 ; AVX1-NEXT:  .LBB15_28: # %else26
 ; AVX1-NEXT:    testl $16384, %eax # imm = 0x4000
 ; AVX1-NEXT:    jne .LBB15_29
 ; AVX1-NEXT:  .LBB15_30: # %else28
-; AVX1-NEXT:    testl $32768, %eax # imm = 0x8000
-; AVX1-NEXT:    je .LBB15_32
+; AVX1-NEXT:    testw %ax, %ax
+; AVX1-NEXT:    jns .LBB15_32
 ; AVX1-NEXT:  .LBB15_31: # %cond.store29
 ; AVX1-NEXT:    vpextrb $15, %xmm0, 15(%rdi)
 ; AVX1-NEXT:  .LBB15_32: # %else30
 ; AVX1-NEXT:    testl $65536, %eax # imm = 0x10000
 ; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
 ; AVX1-NEXT:    jne .LBB15_33
 ; AVX1-NEXT:  # %bb.34: # %else32
 ; AVX1-NEXT:    testl $131072, %eax # imm = 0x20000

 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    je .LBB15_12
 ; AVX1-NEXT:  .LBB15_11: # %cond.store9
 ; AVX1-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    je .LBB15_14
 ; AVX1-NEXT:  .LBB15_13: # %cond.store11
 ; AVX1-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    je .LBB15_16
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    jns .LBB15_16
 ; AVX1-NEXT:  .LBB15_15: # %cond.store13
 ; AVX1-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX1-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX1-NEXT:    je .LBB15_18
 ; AVX1-NEXT:  .LBB15_17: # %cond.store15
 ; AVX1-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX1-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX1-NEXT:    je .LBB15_20

 ; AVX1-NEXT:    testl $8192, %eax # imm = 0x2000
 ; AVX1-NEXT:    je .LBB15_28
 ; AVX1-NEXT:  .LBB15_27: # %cond.store25
 ; AVX1-NEXT:    vpextrb $13, %xmm0, 13(%rdi)
 ; AVX1-NEXT:    testl $16384, %eax # imm = 0x4000
 ; AVX1-NEXT:    je .LBB15_30
 ; AVX1-NEXT:  .LBB15_29: # %cond.store27
 ; AVX1-NEXT:    vpextrb $14, %xmm0, 14(%rdi)
-; AVX1-NEXT:    testl $32768, %eax # imm = 0x8000
-; AVX1-NEXT:    jne .LBB15_31
+; AVX1-NEXT:    testw %ax, %ax
+; AVX1-NEXT:    js .LBB15_31
 ; AVX1-NEXT:    jmp .LBB15_32
 ; AVX1-NEXT:  .LBB15_33: # %cond.store31
 ; AVX1-NEXT:    vpextrb $0, %xmm0, 16(%rdi)
 ; AVX1-NEXT:    testl $131072, %eax # imm = 0x20000
 ; AVX1-NEXT:    je .LBB15_36
 ; AVX1-NEXT:  .LBB15_35: # %cond.store33
 ; AVX1-NEXT:    vpextrb $1, %xmm0, 17(%rdi)
 ; AVX1-NEXT:    testl $262144, %eax # imm = 0x40000

 ; AVX2-NEXT:    jne .LBB15_9
 ; AVX2-NEXT:  .LBB15_10: # %else8
 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    jne .LBB15_11
 ; AVX2-NEXT:  .LBB15_12: # %else10
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    jne .LBB15_13
 ; AVX2-NEXT:  .LBB15_14: # %else12
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    jne .LBB15_15
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    js .LBB15_15
 ; AVX2-NEXT:  .LBB15_16: # %else14
 ; AVX2-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX2-NEXT:    jne .LBB15_17
 ; AVX2-NEXT:  .LBB15_18: # %else16
 ; AVX2-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX2-NEXT:    jne .LBB15_19
 ; AVX2-NEXT:  .LBB15_20: # %else18
 ; AVX2-NEXT:    testl $1024, %eax # imm = 0x400
 ; AVX2-NEXT:    jne .LBB15_21
 ; AVX2-NEXT:  .LBB15_22: # %else20
 ; AVX2-NEXT:    testl $2048, %eax # imm = 0x800
 ; AVX2-NEXT:    jne .LBB15_23
 ; AVX2-NEXT:  .LBB15_24: # %else22
 ; AVX2-NEXT:    testl $4096, %eax # imm = 0x1000
 ; AVX2-NEXT:    jne .LBB15_25
 ; AVX2-NEXT:  .LBB15_26: # %else24
 ; AVX2-NEXT:    testl $8192, %eax # imm = 0x2000
 ; AVX2-NEXT:    jne .LBB15_27
 ; AVX2-NEXT:  .LBB15_28: # %else26
 ; AVX2-NEXT:    testl $16384, %eax # imm = 0x4000
 ; AVX2-NEXT:    jne .LBB15_29
 ; AVX2-NEXT:  .LBB15_30: # %else28
-; AVX2-NEXT:    testl $32768, %eax # imm = 0x8000
-; AVX2-NEXT:    je .LBB15_32
+; AVX2-NEXT:    testw %ax, %ax
+; AVX2-NEXT:    jns .LBB15_32
 ; AVX2-NEXT:  .LBB15_31: # %cond.store29
 ; AVX2-NEXT:    vpextrb $15, %xmm0, 15(%rdi)
 ; AVX2-NEXT:  .LBB15_32: # %else30
 ; AVX2-NEXT:    testl $65536, %eax # imm = 0x10000
 ; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm0
 ; AVX2-NEXT:    jne .LBB15_33
 ; AVX2-NEXT:  # %bb.34: # %else32
 ; AVX2-NEXT:    testl $131072, %eax # imm = 0x20000

 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    je .LBB15_12
 ; AVX2-NEXT:  .LBB15_11: # %cond.store9
 ; AVX2-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    je .LBB15_14
 ; AVX2-NEXT:  .LBB15_13: # %cond.store11
 ; AVX2-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    je .LBB15_16
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    jns .LBB15_16
 ; AVX2-NEXT:  .LBB15_15: # %cond.store13
 ; AVX2-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX2-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX2-NEXT:    je .LBB15_18
 ; AVX2-NEXT:  .LBB15_17: # %cond.store15
 ; AVX2-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX2-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX2-NEXT:    je .LBB15_20

 ; AVX2-NEXT:    testl $8192, %eax # imm = 0x2000
 ; AVX2-NEXT:    je .LBB15_28
 ; AVX2-NEXT:  .LBB15_27: # %cond.store25
 ; AVX2-NEXT:    vpextrb $13, %xmm0, 13(%rdi)
 ; AVX2-NEXT:    testl $16384, %eax # imm = 0x4000
 ; AVX2-NEXT:    je .LBB15_30
 ; AVX2-NEXT:  .LBB15_29: # %cond.store27
 ; AVX2-NEXT:    vpextrb $14, %xmm0, 14(%rdi)
-; AVX2-NEXT:    testl $32768, %eax # imm = 0x8000
-; AVX2-NEXT:    jne .LBB15_31
+; AVX2-NEXT:    testw %ax, %ax
+; AVX2-NEXT:    js .LBB15_31
 ; AVX2-NEXT:    jmp .LBB15_32
 ; AVX2-NEXT:  .LBB15_33: # %cond.store31
 ; AVX2-NEXT:    vpextrb $0, %xmm0, 16(%rdi)
 ; AVX2-NEXT:    testl $131072, %eax # imm = 0x20000
 ; AVX2-NEXT:    je .LBB15_36
 ; AVX2-NEXT:  .LBB15_35: # %cond.store33
 ; AVX2-NEXT:    vpextrb $1, %xmm0, 17(%rdi)
 ; AVX2-NEXT:    testl $262144, %eax # imm = 0x40000

 ; AVX512F-NEXT:    jne .LBB15_9
 ; AVX512F-NEXT:  .LBB15_10: # %else8
 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    jne .LBB15_11
 ; AVX512F-NEXT:  .LBB15_12: # %else10
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    jne .LBB15_13
 ; AVX512F-NEXT:  .LBB15_14: # %else12
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    jne .LBB15_15
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    js .LBB15_15
 ; AVX512F-NEXT:  .LBB15_16: # %else14
 ; AVX512F-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX512F-NEXT:    jne .LBB15_17
 ; AVX512F-NEXT:  .LBB15_18: # %else16
 ; AVX512F-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX512F-NEXT:    jne .LBB15_19
 ; AVX512F-NEXT:  .LBB15_20: # %else18
 ; AVX512F-NEXT:    testl $1024, %eax # imm = 0x400
 ; AVX512F-NEXT:    jne .LBB15_21
 ; AVX512F-NEXT:  .LBB15_22: # %else20
 ; AVX512F-NEXT:    testl $2048, %eax # imm = 0x800
 ; AVX512F-NEXT:    jne .LBB15_23
 ; AVX512F-NEXT:  .LBB15_24: # %else22
 ; AVX512F-NEXT:    testl $4096, %eax # imm = 0x1000
 ; AVX512F-NEXT:    jne .LBB15_25
 ; AVX512F-NEXT:  .LBB15_26: # %else24
 ; AVX512F-NEXT:    testl $8192, %eax # imm = 0x2000
 ; AVX512F-NEXT:    jne .LBB15_27
 ; AVX512F-NEXT:  .LBB15_28: # %else26
 ; AVX512F-NEXT:    testl $16384, %eax # imm = 0x4000
 ; AVX512F-NEXT:    jne .LBB15_29
 ; AVX512F-NEXT:  .LBB15_30: # %else28
-; AVX512F-NEXT:    testl $32768, %eax # imm = 0x8000
-; AVX512F-NEXT:    je .LBB15_32
+; AVX512F-NEXT:    testw %ax, %ax
+; AVX512F-NEXT:    jns .LBB15_32
 ; AVX512F-NEXT:  .LBB15_31: # %cond.store29
 ; AVX512F-NEXT:    vpextrb $15, %xmm0, 15(%rdi)
 ; AVX512F-NEXT:  .LBB15_32: # %else30
 ; AVX512F-NEXT:    testl $65536, %eax # imm = 0x10000
 ; AVX512F-NEXT:    vextracti128 $1, %ymm0, %xmm0
 ; AVX512F-NEXT:    jne .LBB15_33
 ; AVX512F-NEXT:  # %bb.34: # %else32
 ; AVX512F-NEXT:    testl $131072, %eax # imm = 0x20000

 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    je .LBB15_12
 ; AVX512F-NEXT:  .LBB15_11: # %cond.store9
 ; AVX512F-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    je .LBB15_14
 ; AVX512F-NEXT:  .LBB15_13: # %cond.store11
 ; AVX512F-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    je .LBB15_16
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    jns .LBB15_16
 ; AVX512F-NEXT:  .LBB15_15: # %cond.store13
 ; AVX512F-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX512F-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX512F-NEXT:    je .LBB15_18
 ; AVX512F-NEXT:  .LBB15_17: # %cond.store15
 ; AVX512F-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX512F-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX512F-NEXT:    je .LBB15_20

 ; AVX512F-NEXT:    testl $8192, %eax # imm = 0x2000
 ; AVX512F-NEXT:    je .LBB15_28
 ; AVX512F-NEXT:  .LBB15_27: # %cond.store25
 ; AVX512F-NEXT:    vpextrb $13, %xmm0, 13(%rdi)
 ; AVX512F-NEXT:    testl $16384, %eax # imm = 0x4000
 ; AVX512F-NEXT:    je .LBB15_30
 ; AVX512F-NEXT:  .LBB15_29: # %cond.store27
 ; AVX512F-NEXT:    vpextrb $14, %xmm0, 14(%rdi)
-; AVX512F-NEXT:    testl $32768, %eax # imm = 0x8000
-; AVX512F-NEXT:    jne .LBB15_31
+; AVX512F-NEXT:    testw %ax, %ax
+; AVX512F-NEXT:    js .LBB15_31
 ; AVX512F-NEXT:    jmp .LBB15_32
 ; AVX512F-NEXT:  .LBB15_33: # %cond.store31
 ; AVX512F-NEXT:    vpextrb $0, %xmm0, 16(%rdi)
 ; AVX512F-NEXT:    testl $131072, %eax # imm = 0x20000
 ; AVX512F-NEXT:    je .LBB15_36
 ; AVX512F-NEXT:  .LBB15_35: # %cond.store33
 ; AVX512F-NEXT:    vpextrb $1, %xmm0, 17(%rdi)
 ; AVX512F-NEXT:    testl $262144, %eax # imm = 0x40000

 ; SSE2-NEXT:    movb %ch, 5(%rdi)
 ; SSE2-NEXT:  .LBB16_12: # %else10
 ; SSE2-NEXT:    testb $64, %al
 ; SSE2-NEXT:    pextrw $3, %xmm0, %ecx
 ; SSE2-NEXT:    je .LBB16_14
 ; SSE2-NEXT:  # %bb.13: # %cond.store11
 ; SSE2-NEXT:    movb %cl, 6(%rdi)
 ; SSE2-NEXT:  .LBB16_14: # %else12
-; SSE2-NEXT:    testb $-128, %al
-; SSE2-NEXT:    je .LBB16_16
+; SSE2-NEXT:    testb %al, %al
+; SSE2-NEXT:    jns .LBB16_16
 ; SSE2-NEXT:  # %bb.15: # %cond.store13
 ; SSE2-NEXT:    movb %ch, 7(%rdi)
 ; SSE2-NEXT:  .LBB16_16: # %else14
 ; SSE2-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE2-NEXT:    pextrw $4, %xmm0, %ecx
 ; SSE2-NEXT:    je .LBB16_18
 ; SSE2-NEXT:  # %bb.17: # %cond.store15
 ; SSE2-NEXT:    movb %cl, 8(%rdi)

 ; SSE4-NEXT:    jne .LBB16_9
 ; SSE4-NEXT:  .LBB16_10: # %else8
 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    jne .LBB16_11
 ; SSE4-NEXT:  .LBB16_12: # %else10
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    jne .LBB16_13
 ; SSE4-NEXT:  .LBB16_14: # %else12
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    jne .LBB16_15
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    js .LBB16_15
 ; SSE4-NEXT:  .LBB16_16: # %else14
 ; SSE4-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE4-NEXT:    jne .LBB16_17
 ; SSE4-NEXT:  .LBB16_18: # %else16
 ; SSE4-NEXT:    testl $512, %eax # imm = 0x200
 ; SSE4-NEXT:    jne .LBB16_19
 ; SSE4-NEXT:  .LBB16_20: # %else18
 ; SSE4-NEXT:    testl $1024, %eax # imm = 0x400

 ; SSE4-NEXT:    testb $32, %al
 ; SSE4-NEXT:    je .LBB16_12
 ; SSE4-NEXT:  .LBB16_11: # %cond.store9
 ; SSE4-NEXT:    pextrb $5, %xmm0, 5(%rdi)
 ; SSE4-NEXT:    testb $64, %al
 ; SSE4-NEXT:    je .LBB16_14
 ; SSE4-NEXT:  .LBB16_13: # %cond.store11
 ; SSE4-NEXT:    pextrb $6, %xmm0, 6(%rdi)
-; SSE4-NEXT:    testb $-128, %al
-; SSE4-NEXT:    je .LBB16_16
+; SSE4-NEXT:    testb %al, %al
+; SSE4-NEXT:    jns .LBB16_16
 ; SSE4-NEXT:  .LBB16_15: # %cond.store13
 ; SSE4-NEXT:    pextrb $7, %xmm0, 7(%rdi)
 ; SSE4-NEXT:    testl $256, %eax # imm = 0x100
 ; SSE4-NEXT:    je .LBB16_18
 ; SSE4-NEXT:  .LBB16_17: # %cond.store15
 ; SSE4-NEXT:    pextrb $8, %xmm0, 8(%rdi)
 ; SSE4-NEXT:    testl $512, %eax # imm = 0x200
 ; SSE4-NEXT:    je .LBB16_20

 ; AVX1-NEXT:    jne .LBB16_9
 ; AVX1-NEXT:  .LBB16_10: # %else8
 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    jne .LBB16_11
 ; AVX1-NEXT:  .LBB16_12: # %else10
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    jne .LBB16_13
 ; AVX1-NEXT:  .LBB16_14: # %else12
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    jne .LBB16_15
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    js .LBB16_15
 ; AVX1-NEXT:  .LBB16_16: # %else14
 ; AVX1-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX1-NEXT:    jne .LBB16_17
 ; AVX1-NEXT:  .LBB16_18: # %else16
 ; AVX1-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX1-NEXT:    jne .LBB16_19
 ; AVX1-NEXT:  .LBB16_20: # %else18
 ; AVX1-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX1-NEXT:    testb $32, %al
 ; AVX1-NEXT:    je .LBB16_12
 ; AVX1-NEXT:  .LBB16_11: # %cond.store9
 ; AVX1-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX1-NEXT:    testb $64, %al
 ; AVX1-NEXT:    je .LBB16_14
 ; AVX1-NEXT:  .LBB16_13: # %cond.store11
 ; AVX1-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX1-NEXT:    testb $-128, %al
-; AVX1-NEXT:    je .LBB16_16
+; AVX1-NEXT:    testb %al, %al
+; AVX1-NEXT:    jns .LBB16_16
 ; AVX1-NEXT:  .LBB16_15: # %cond.store13
 ; AVX1-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX1-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX1-NEXT:    je .LBB16_18
 ; AVX1-NEXT:  .LBB16_17: # %cond.store15
 ; AVX1-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX1-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX1-NEXT:    je .LBB16_20

 ; AVX2-NEXT:    jne .LBB16_9
 ; AVX2-NEXT:  .LBB16_10: # %else8
 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    jne .LBB16_11
 ; AVX2-NEXT:  .LBB16_12: # %else10
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    jne .LBB16_13
 ; AVX2-NEXT:  .LBB16_14: # %else12
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    jne .LBB16_15
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    js .LBB16_15
 ; AVX2-NEXT:  .LBB16_16: # %else14
 ; AVX2-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX2-NEXT:    jne .LBB16_17
 ; AVX2-NEXT:  .LBB16_18: # %else16
 ; AVX2-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX2-NEXT:    jne .LBB16_19
 ; AVX2-NEXT:  .LBB16_20: # %else18
 ; AVX2-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX2-NEXT:    testb $32, %al
 ; AVX2-NEXT:    je .LBB16_12
 ; AVX2-NEXT:  .LBB16_11: # %cond.store9
 ; AVX2-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX2-NEXT:    testb $64, %al
 ; AVX2-NEXT:    je .LBB16_14
 ; AVX2-NEXT:  .LBB16_13: # %cond.store11
 ; AVX2-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX2-NEXT:    testb $-128, %al
-; AVX2-NEXT:    je .LBB16_16
+; AVX2-NEXT:    testb %al, %al
+; AVX2-NEXT:    jns .LBB16_16
 ; AVX2-NEXT:  .LBB16_15: # %cond.store13
 ; AVX2-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX2-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX2-NEXT:    je .LBB16_18
 ; AVX2-NEXT:  .LBB16_17: # %cond.store15
 ; AVX2-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX2-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX2-NEXT:    je .LBB16_20

 ; AVX512F-NEXT:    jne .LBB16_9
 ; AVX512F-NEXT:  .LBB16_10: # %else8
 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    jne .LBB16_11
 ; AVX512F-NEXT:  .LBB16_12: # %else10
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    jne .LBB16_13
 ; AVX512F-NEXT:  .LBB16_14: # %else12
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    jne .LBB16_15
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    js .LBB16_15
 ; AVX512F-NEXT:  .LBB16_16: # %else14
 ; AVX512F-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX512F-NEXT:    jne .LBB16_17
 ; AVX512F-NEXT:  .LBB16_18: # %else16
 ; AVX512F-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX512F-NEXT:    jne .LBB16_19
 ; AVX512F-NEXT:  .LBB16_20: # %else18
 ; AVX512F-NEXT:    testl $1024, %eax # imm = 0x400

 ; AVX512F-NEXT:    testb $32, %al
 ; AVX512F-NEXT:    je .LBB16_12
 ; AVX512F-NEXT:  .LBB16_11: # %cond.store9
 ; AVX512F-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
 ; AVX512F-NEXT:    testb $64, %al
 ; AVX512F-NEXT:    je .LBB16_14
 ; AVX512F-NEXT:  .LBB16_13: # %cond.store11
 ; AVX512F-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
-; AVX512F-NEXT:    testb $-128, %al
-; AVX512F-NEXT:    je .LBB16_16
+; AVX512F-NEXT:    testb %al, %al
+; AVX512F-NEXT:    jns .LBB16_16
 ; AVX512F-NEXT:  .LBB16_15: # %cond.store13
 ; AVX512F-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
 ; AVX512F-NEXT:    testl $256, %eax # imm = 0x100
 ; AVX512F-NEXT:    je .LBB16_18
 ; AVX512F-NEXT:  .LBB16_17: # %cond.store15
 ; AVX512F-NEXT:    vpextrb $8, %xmm0, 8(%rdi)
 ; AVX512F-NEXT:    testl $512, %eax # imm = 0x200
 ; AVX512F-NEXT:    je .LBB16_20

llvm/test/CodeGen/X86/omit-urem-of-power-of-two-or-zero-when-comparing-with-zero.ll

 
 ;------------------------------------------------------------------------------;
 ; Basic scalar tests
 ;------------------------------------------------------------------------------;
 
 define i1 @p0_scalar_urem_by_const(i32 %x, i32 %y) {
 ; CHECK-LABEL: p0_scalar_urem_by_const:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    testb $-128, %dil
-; CHECK-NEXT:    sete %al
+; CHECK-NEXT:    testb %dil, %dil
+; CHECK-NEXT:    setns %al
 ; CHECK-NEXT:    retq
   %t0 = and i32 %x, 128 ; clearly a power-of-two or zero
   %t1 = urem i32 %t0, 6 ; '6' is clearly not a power of two
   %t2 = icmp eq i32 %t1, 0
   ret i1 %t2
 }
 
 define i1 @p1_scalar_urem_by_nonconst(i32 %x, i32 %y) {
 ; CHECK-LABEL: p1_scalar_urem_by_nonconst:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    testb $-128, %dil
-; CHECK-NEXT:    sete %al
+; CHECK-NEXT:    testb %dil, %dil
+; CHECK-NEXT:    setns %al
 ; CHECK-NEXT:    retq
   %t0 = and i32 %x, 128 ; clearly a power-of-two or zero
   %t1 = or i32 %y, 6 ; two bits set, clearly not a power of two
   %t2 = urem i32 %t0, %t1
   %t3 = icmp eq i32 %t2, 0
   ret i1 %t3
 }
 

llvm/test/CodeGen/X86/signbit-test.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
 
 define i64 @test_clear_mask_i64_i32(i64 %x) nounwind {
 ; CHECK-LABEL: test_clear_mask_i64_i32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movq %rdi, %rax
-; CHECK-NEXT:    testl $-2147483648, %eax # imm = 0x80000000
-; CHECK-NEXT:    jne .LBB0_2
+; CHECK-NEXT:    testl %eax, %eax
+; CHECK-NEXT:    js .LBB0_2
 ; CHECK-NEXT:  # %bb.1: # %t
 ; CHECK-NEXT:    movl $42, %eax
 ; CHECK-NEXT:  .LBB0_2: # %f
 ; CHECK-NEXT:    retq
 entry:
   %a = and i64 %x, 2147483648
   %r = icmp eq i64 %a, 0
   br i1 %r, label %t, label %f
 t:
   br label %f
 f:
   %ret = phi i64 [ %x, %entry], [ 42, %t]
   ret i64 %ret
 }
 
 define i64 @test_set_mask_i64_i32(i64 %x) nounwind {
 ; CHECK-LABEL: test_set_mask_i64_i32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movq %rdi, %rax
-; CHECK-NEXT:    testl $-2147483648, %eax # imm = 0x80000000
-; CHECK-NEXT:    je .LBB1_2
+; CHECK-NEXT:    testl %eax, %eax
+; CHECK-NEXT:    jns .LBB1_2
 ; CHECK-NEXT:  # %bb.1: # %t
 ; CHECK-NEXT:    movl $42, %eax
 ; CHECK-NEXT:  .LBB1_2: # %f
 ; CHECK-NEXT:    retq
 entry:
   %a = and i64 %x, 2147483648
   %r = icmp ne i64 %a, 0
   br i1 %r, label %t, label %f
 t:
   br label %f
 f:
   %ret = phi i64 [ %x, %entry], [ 42, %t]
   ret i64 %ret
 }
 
 define i64 @test_clear_mask_i64_i16(i64 %x) nounwind {
 ; CHECK-LABEL: test_clear_mask_i64_i16:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movq %rdi, %rax
-; CHECK-NEXT:    testl $32768, %eax # imm = 0x8000
-; CHECK-NEXT:    jne .LBB2_2
+; CHECK-NEXT:    testw %ax, %ax
+; CHECK-NEXT:    js .LBB2_2
 ; CHECK-NEXT:  # %bb.1: # %t
 ; CHECK-NEXT:    movl $42, %eax
 ; CHECK-NEXT:  .LBB2_2: # %f
 ; CHECK-NEXT:    retq
 entry:
   %a = and i64 %x, 32768
   %r = icmp eq i64 %a, 0
   br i1 %r, label %t, label %f
 t:
   br label %f
 f:
   %ret = phi i64 [ %x, %entry], [ 42, %t]
   ret i64 %ret
 }
 
 define i64 @test_set_mask_i64_i16(i64 %x) nounwind {
 ; CHECK-LABEL: test_set_mask_i64_i16:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movq %rdi, %rax
-; CHECK-NEXT:    testl $32768, %eax # imm = 0x8000
-; CHECK-NEXT:    je .LBB3_2
+; CHECK-NEXT:    testw %ax, %ax
+; CHECK-NEXT:    jns .LBB3_2
 ; CHECK-NEXT:  # %bb.1: # %t
 ; CHECK-NEXT:    movl $42, %eax
 ; CHECK-NEXT:  .LBB3_2: # %f
 ; CHECK-NEXT:    retq
 entry:
   %a = and i64 %x, 32768
   %r = icmp ne i64 %a, 0
   br i1 %r, label %t, label %f
 t:
   br label %f
 f:
   %ret = phi i64 [ %x, %entry], [ 42, %t]
   ret i64 %ret
 }
 
 define i64 @test_clear_mask_i64_i8(i64 %x) nounwind {
 ; CHECK-LABEL: test_clear_mask_i64_i8:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movq %rdi, %rax
-; CHECK-NEXT:    testb $-128, %al
-; CHECK-NEXT:    jne .LBB4_2
+; CHECK-NEXT:    testb %al, %al
+; CHECK-NEXT:    js .LBB4_2
 ; CHECK-NEXT:  # %bb.1: # %t
 ; CHECK-NEXT:    movl $42, %eax
 ; CHECK-NEXT:  .LBB4_2: # %f
 ; CHECK-NEXT:    retq
 entry:
   %a = and i64 %x, 128
   %r = icmp eq i64 %a, 0
   br i1 %r, label %t, label %f
 t:
   br label %f
 f:
   %ret = phi i64 [ %x, %entry], [ 42, %t]
   ret i64 %ret
 }
 
 define i64 @test_set_mask_i64_i8(i64 %x) nounwind {
 ; CHECK-LABEL: test_set_mask_i64_i8:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movq %rdi, %rax
-; CHECK-NEXT:    testb $-128, %al
-; CHECK-NEXT:    je .LBB5_2
+; CHECK-NEXT:    testb %al, %al
+; CHECK-NEXT:    jns .LBB5_2
 ; CHECK-NEXT:  # %bb.1: # %t
 ; CHECK-NEXT:    movl $42, %eax
 ; CHECK-NEXT:  .LBB5_2: # %f
 ; CHECK-NEXT:    retq
 entry:
   %a = and i64 %x, 128
   %r = icmp ne i64 %a, 0
   br i1 %r, label %t, label %f
 t:
   br label %f
 f:
   %ret = phi i64 [ %x, %entry], [ 42, %t]
   ret i64 %ret
 }
 
 define i32 @test_clear_mask_i32_i16(i32 %x) nounwind {
 ; CHECK-LABEL: test_clear_mask_i32_i16:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movl %edi, %eax
-; CHECK-NEXT:    testl $32768, %edi # imm = 0x8000
-; CHECK-NEXT:    jne .LBB6_2
+; CHECK-NEXT:    testw %ax, %ax
+; CHECK-NEXT:    js .LBB6_2
 ; CHECK-NEXT:  # %bb.1: # %t
 ; CHECK-NEXT:    movl $42, %eax
 ; CHECK-NEXT:  .LBB6_2: # %f
 ; CHECK-NEXT:    retq
 entry:
   %a = and i32 %x, 32768
   %r = icmp eq i32 %a, 0
   br i1 %r, label %t, label %f
 t:
   br label %f
 f:
   %ret = phi i32 [ %x, %entry], [ 42, %t]
   ret i32 %ret
 }
 
 define i32 @test_set_mask_i32_i16(i32 %x) nounwind {
 ; CHECK-LABEL: test_set_mask_i32_i16:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movl %edi, %eax
-; CHECK-NEXT:    testl $32768, %edi # imm = 0x8000
-; CHECK-NEXT:    je .LBB7_2
+; CHECK-NEXT:    testw %ax, %ax
+; CHECK-NEXT:    jns .LBB7_2
 ; CHECK-NEXT:  # %bb.1: # %t
 ; CHECK-NEXT:    movl $42, %eax
 ; CHECK-NEXT:  .LBB7_2: # %f
 ; CHECK-NEXT:    retq
 entry:
   %a = and i32 %x, 32768
   %r = icmp ne i32 %a, 0
   br i1 %r, label %t, label %f
 t:
   br label %f
 f:
   %ret = phi i32 [ %x, %entry], [ 42, %t]
   ret i32 %ret
 }
 
 define i32 @test_clear_mask_i32_i8(i32 %x) nounwind {
 ; CHECK-LABEL: test_clear_mask_i32_i8:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movl %edi, %eax
-; CHECK-NEXT:    testb $-128, %al
-; CHECK-NEXT:    jne .LBB8_2
+; CHECK-NEXT:    testb %al, %al
+; CHECK-NEXT:    js .LBB8_2
 ; CHECK-NEXT:  # %bb.1: # %t
 ; CHECK-NEXT:    movl $42, %eax
 ; CHECK-NEXT:  .LBB8_2: # %f
 ; CHECK-NEXT:    retq
 entry:
   %a = and i32 %x, 128
   %r = icmp eq i32 %a, 0
   br i1 %r, label %t, label %f
 t:
   br label %f
 f:
   %ret = phi i32 [ %x, %entry], [ 42, %t]
   ret i32 %ret
 }
 
 define i32 @test_set_mask_i32_i8(i32 %x) nounwind {
 ; CHECK-LABEL: test_set_mask_i32_i8:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movl %edi, %eax
-; CHECK-NEXT:    testb $-128, %al
-; CHECK-NEXT:    je .LBB9_2
+; CHECK-NEXT:    testb %al, %al
+; CHECK-NEXT:    jns .LBB9_2
 ; CHECK-NEXT:  # %bb.1: # %t
 ; CHECK-NEXT:    movl $42, %eax
 ; CHECK-NEXT:  .LBB9_2: # %f
 ; CHECK-NEXT:    retq
 entry:
   %a = and i32 %x, 128
   %r = icmp ne i32 %a, 0
   br i1 %r, label %t, label %f
 t:
   br label %f
 f:
   %ret = phi i32 [ %x, %entry], [ 42, %t]
   ret i32 %ret
 }
 
 define i16 @test_clear_mask_i16_i8(i16 %x) nounwind {
 ; CHECK-LABEL: test_clear_mask_i16_i8:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movl %edi, %eax
-; CHECK-NEXT:    testb $-128, %al
-; CHECK-NEXT:    jne .LBB10_2
+; CHECK-NEXT:    testb %al, %al
+; CHECK-NEXT:    js .LBB10_2
 ; CHECK-NEXT:  # %bb.1: # %t
 ; CHECK-NEXT:    movw $42, %ax
 ; CHECK-NEXT:  .LBB10_2: # %f
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
 ; CHECK-NEXT:    retq
 entry:
   %a = and i16 %x, 128
   %r = icmp eq i16 %a, 0
   br i1 %r, label %t, label %f
 t:
   br label %f
 f:
   %ret = phi i16 [ %x, %entry], [ 42, %t]
   ret i16 %ret
 }
 
 define i16 @test_set_mask_i16_i8(i16 %x) nounwind {
 ; CHECK-LABEL: test_set_mask_i16_i8:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movl %edi, %eax
-; CHECK-NEXT:    testb $-128, %al
-; CHECK-NEXT:    je .LBB11_2
+; CHECK-NEXT:    testb %al, %al
+; CHECK-NEXT:    jns .LBB11_2
 ; CHECK-NEXT:  # %bb.1: # %t
 ; CHECK-NEXT:    movw $42, %ax
 ; CHECK-NEXT:  .LBB11_2: # %f
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
 ; CHECK-NEXT:    retq
 entry:
   %a = and i16 %x, 128
   %r = icmp ne i16 %a, 0

llvm/test/CodeGen/X86/test-vs-bittest.ll

; CHECK-NEXT:    retq
   %r = and i32 %sh, 1
   ret i32 %r
 }
 
 define i16 @is_bit_clear_i16(i16 %x) {
 ; CHECK-LABEL: is_bit_clear_i16:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    testb $-128, %dil
-; CHECK-NEXT:    sete %al
+; CHECK-NEXT:    testb %dil, %dil
+; CHECK-NEXT:    setns %al
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
 ; CHECK-NEXT:    retq
   %sh = lshr i16 %x, 7
   %m = and i16 %sh, 1
   %r = xor i16 %m, 1
   ret i16 %r
 }