[RISCV] Generate correct ELF abi flag when empty .ll file has target-abi attribute

[Yunzezhu]

Summary

In patch https://reviews.llvm.org/D121183 target abi value is get from .ll file's target-abi attribute and set in RISCVAsmPrinter::emitFunctionEntryLabel function .
In this problem https://github.com/llvm/llvm-project/issues/57242, an api mismatch error may be caused by failing to call function RISCVAsmPrinter::emitFunctionEntryLabel to set target-abi to correct one when the .ll is empty or a module has no function.
This patch move setting target-abi part to function RISCVAsmPrinter::emitStartOfAsmFile, make sure all .ll file and module in LTO read target-abi from module flag and set, with or without function.

Signed-off-by: xiaojing.zhang <[e-mail]>
Signed-off-by: jianxin.lai <[e-mail]>

[StephenFan]

llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp

191

The curly braces could be deleted?

[Yunzezhu]

Deleted curly braces

[luismarques]

LGTM. Thanks!

llvm/test/CodeGen/RISCV/module-target-abi3.ll

2

Nit: if this test file is just going to contain the flags check for the foreseeable future then there's not much point in overriding the CHECK prefix.

[jrtc27]

llvm/test/CodeGen/RISCV/module-target-abi3.ll

6

Inconsistent spacing in {}

[Yunzezhu]

Deleted unnecessary check prefix.
Added space in attributes flag.

[• pcwang-thead]

Thank you all! I will commit this patch for @Yunzezhu.

llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp

public:
   // Wrapper needed for tblgenned pseudo lowering.
   bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const {
     return lowerRISCVMachineOperandToMCOperand(MO, MCOp, *this);
   }
 
   void emitStartOfAsmFile(Module &M) override;
   void emitEndOfAsmFile(Module &M) override;
 
-  void emitFunctionEntryLabel() override;
-
 private:
   void emitAttributes();
 };
 }
 
 #define GEN_COMPRESS_INSTR
 #include "RISCVGenCompressInstEmitter.inc"
 void RISCVAsmPrinter::EmitToStreamer(MCStreamer &S, const MCInst &Inst) {
bool RISCVAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
   STI = &MF.getSubtarget<RISCVSubtarget>();
 
   SetupMachineFunction(MF);
   emitFunctionBody();
   return false;
 }
 
 void RISCVAsmPrinter::emitStartOfAsmFile(Module &M) {
+  RISCVTargetStreamer &RTS =
+      static_cast<RISCVTargetStreamer &>(*OutStreamer->getTargetStreamer());
+  if (const MDString *ModuleTargetABI =
+          dyn_cast_or_null<MDString>(M.getModuleFlag("target-abi")))
+    RTS.setTargetABI(RISCVABI::getTargetABI(ModuleTargetABI->getString()));
   if (TM.getTargetTriple().isOSBinFormatELF())
     emitAttributes();
 }
 
 void RISCVAsmPrinter::emitEndOfAsmFile(Module &M) {
   RISCVTargetStreamer &RTS =
       static_cast<RISCVTargetStreamer &>(*OutStreamer->getTargetStreamer());
 
   if (TM.getTargetTriple().isOSBinFormatELF())
     RTS.finishAttributeSection();
 }
 
 void RISCVAsmPrinter::emitAttributes() {
   RISCVTargetStreamer &RTS =
       static_cast<RISCVTargetStreamer &>(*OutStreamer->getTargetStreamer());
   RTS.emitTargetAttributes(*MCSTI);
 }
 
-void RISCVAsmPrinter::emitFunctionEntryLabel() {
-  AsmPrinter::emitFunctionEntryLabel();
-  RISCVTargetStreamer &RTS =
-      static_cast<RISCVTargetStreamer &>(*OutStreamer->getTargetStreamer());
-  RTS.setTargetABI(STI->getTargetABI());
-}
-
 // Force static initialization.
 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVAsmPrinter() {
   RegisterAsmPrinter<RISCVAsmPrinter> X(getTheRISCV32Target());
   RegisterAsmPrinter<RISCVAsmPrinter> Y(getTheRISCV64Target());
 }

llvm/test/CodeGen/RISCV/module-target-abi3.ll

+; RUN: llc -mtriple=riscv32 -filetype=obj < %s | llvm-readelf -h - | FileCheck %s
+
+; CHECK: Flags: 0x2, single-float ABI
+
+attributes #0 = { "target-features"="+f" }
+!llvm.module.flags = !{!0}
+!0 = !{i32 1, !"target-abi", !"ilp32f"}