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Differential D121779

[RISCV] Add zihintntl compressed instructions
ClosedPublic

Authored by alextsao1999 on Mar 16 2022, 1:36 AM.

Details

Reviewers
• s
craig.topper
asb
jrtc27
kito-cheng
Commits
rG07a700f814bf: [RISCV] Add zihintntl compressed instructions
Summary

Add zihintntl compressed instructions and some files related to zihintntl.
This patch is base on D121670: [RISCV] Add zihintntl instructions.

Diff Detail

Event Timeline

alextsao1999 created this revision.Mar 16 2022, 1:36 AM
Herald added a project: Restricted Project. · View Herald TranscriptMar 16 2022, 1:36 AM
Herald added subscribers: VincentWu, luke957, vkmr and 28 others. · View Herald Transcript
alextsao1999 requested review of this revision.Mar 16 2022, 1:36 AM
Herald added projects: Restricted Project, Restricted Project. · View Herald TranscriptMar 16 2022, 1:36 AM
Herald added subscribers: llvm-commits, cfe-commits, • pcwang-thead and 2 others. · View Herald Transcript
alextsao1999 added a parent revision: D121670: [RISCV] Add zihintntl instructions.Mar 16 2022, 1:37 AM
alextsao1999 retitled this revision from [RISCV] Add zihintntl instructions to [RISCV] Add zihintntl compressed instructions.Mar 16 2022, 1:39 AM
alextsao1999 edited the summary of this revision. (Show Details)
alextsao1999 added reviewers: craig.topper, asb, jrtc27.
alextsao1999 updated this revision to Diff 415737.Mar 16 2022, 1:58 AM

Update

Harbormaster completed remote builds in B154542: Diff 415737.Mar 16 2022, 1:59 AM
kito-cheng added inline comments.Aug 21 2022, 7:53 PM
llvm/test/MC/RISCV/rv32zihintntlc-valid.s
43

Could you add an invalid check for c.ntl instruction to make sure they can't use without C?
e.g. -mattr=+experimental-zihintntl but no +c.

Herald added subscribers: sunshaoce, StephenFan, shiva0217. · View Herald TranscriptAug 21 2022, 7:53 PM
alextsao1999 updated this revision to Diff 454433.Aug 22 2022, 3:01 AM

Fix check no c

alextsao1999 marked an inline comment as done.Aug 22 2022, 3:01 AM
alextsao1999 added inline comments.
llvm/test/MC/RISCV/rv32zihintntlc-valid.s
43

Done

Harbormaster completed remote builds in B182541: Diff 454433.Aug 22 2022, 3:45 AM
kito-cheng accepted this revision.Aug 23 2022, 12:02 AM
This revision is now accepted and ready to land.Aug 23 2022, 12:02 AM
This revision was landed with ongoing or failed builds.Aug 23 2022, 11:29 PM
Closed by commit rG07a700f814bf: [RISCV] Add zihintntl compressed instructions (authored by alextsao1999). · Explain Why
This revision was automatically updated to reflect the committed changes.
alextsao1999 marked an inline comment as done.
alextsao1999 added a commit: rG07a700f814bf: [RISCV] Add zihintntl compressed instructions.

Revision Contents

PathSize
llvm/
lib/
Target/
RISCV/
7 lines
test/
MC/
RISCV/
6 lines
13 lines
13 lines
52 lines

Diff 455086

llvm/lib/Target/RISCV/RISCVInstrInfoC.td

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} // Predicates = [HasStdExtCOrZca, HasRVCHints], hasSideEffects = 0, mayLoad = 0, } // Predicates = [HasStdExtCOrZca, HasRVCHints], hasSideEffects = 0, mayLoad = 0,
// mayStore = 0 // mayStore = 0
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Assembler Pseudo Instructions // Assembler Pseudo Instructions
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
let Predicates = [HasStdExtC, HasRVCHints, HasStdExtZihintntl] in {
def : InstAlias<"c.ntl.p1", (C_ADD_HINT X0, X2)>;
def : InstAlias<"c.ntl.pall", (C_ADD_HINT X0, X3)>;
def : InstAlias<"c.ntl.s1", (C_ADD_HINT X0, X4)>;
def : InstAlias<"c.ntl.all", (C_ADD_HINT X0, X5)>;
} // Predicates = [HasStdExtC, HasRVCHints, HasStdExtZihintntl]
let EmitPriority = 0 in { let EmitPriority = 0 in {
let Predicates = [HasStdExtCOrZca] in { let Predicates = [HasStdExtCOrZca] in {
def : InstAlias<"c.lw $rd, (${rs1})", (C_LW GPRC:$rd, GPRC:$rs1, 0)>; def : InstAlias<"c.lw $rd, (${rs1})", (C_LW GPRC:$rd, GPRC:$rs1, 0)>;
def : InstAlias<"c.sw $rs2, (${rs1})", (C_SW GPRC:$rs2, GPRC:$rs1, 0)>; def : InstAlias<"c.sw $rs2, (${rs1})", (C_SW GPRC:$rs2, GPRC:$rs1, 0)>;
def : InstAlias<"c.lwsp $rd, (${rs1})", (C_LWSP GPRC:$rd, SP:$rs1, 0)>; def : InstAlias<"c.lwsp $rd, (${rs1})", (C_LWSP GPRC:$rd, SP:$rs1, 0)>;
def : InstAlias<"c.swsp $rs2, (${rs1})", (C_SWSP GPRC:$rs2, SP:$rs1, 0)>; def : InstAlias<"c.swsp $rs2, (${rs1})", (C_SWSP GPRC:$rs2, SP:$rs1, 0)>;
} }
▲ Show 20 Lines • Show All 213 Lines • Show Last 20 Lines

llvm/test/MC/RISCV/attribute-arch.s

Show First 20 Lines • Show All 179 Lines • ▼ Show 20 Lines
# CHECK: attribute 5, "rv32i2p0_zbkb1p0_zbkc1p0_zbkx1p0_zks1p0_zksed1p0_zksh1p0" # CHECK: attribute 5, "rv32i2p0_zbkb1p0_zbkc1p0_zbkx1p0_zks1p0_zksed1p0_zksh1p0"
.attribute arch, "rv32i_zkt1p0" .attribute arch, "rv32i_zkt1p0"
# CHECK: attribute 5, "rv32i2p0_zkt1p0" # CHECK: attribute 5, "rv32i2p0_zkt1p0"
.attribute arch, "rv32i_zk1p0" .attribute arch, "rv32i_zk1p0"
# CHECK: attribute 5, "rv32i2p0_zbkb1p0_zbkc1p0_zbkx1p0_zk1p0_zkn1p0_zknd1p0_zkne1p0_zknh1p0_zkr1p0_zkt1p0" # CHECK: attribute 5, "rv32i2p0_zbkb1p0_zbkc1p0_zbkx1p0_zk1p0_zkn1p0_zknd1p0_zkne1p0_zknh1p0_zkr1p0_zkt1p0"
.attribute arch, "rv32izihintntl0p2"
# CHECK: attribute 5, "rv32i2p0_zihintntl0p2"
.attribute arch, "rv32iczihintntl0p2"
# CHECK: attribute 5, "rv32i2p0_c2p0_zihintntl0p2"
.attribute arch, "rv32if_zkt1p0_zve32f1p0_zve32x1p0_zvl32b1p0" .attribute arch, "rv32if_zkt1p0_zve32f1p0_zve32x1p0_zvl32b1p0"
# CHECK: attribute 5, "rv32i2p0_f2p0_zkt1p0_zve32f1p0_zve32x1p0_zvl32b1p0" # CHECK: attribute 5, "rv32i2p0_f2p0_zkt1p0_zve32f1p0_zve32x1p0_zvl32b1p0"
.attribute arch, "rv32izca0p70" .attribute arch, "rv32izca0p70"
# CHECK: attribute 5, "rv32i2p0_zca0p70" # CHECK: attribute 5, "rv32i2p0_zca0p70"

llvm/test/MC/RISCV/rv32zihintntl-invalid.s

  • This file was added.
# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-zihintntl < %s 2>&1 | FileCheck %s
# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-zihintntl < %s 2>&1 | FileCheck %s
ntl.p1 1 # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
ntl.pall 2 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction
ntl.s1 3 # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
ntl.all 4 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
ntl.p1 t0, t1 # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
ntl.pall t0, t1 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction
ntl.s1 t0, t1 # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
ntl.all t0, t1 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction

llvm/test/MC/RISCV/rv32zihintntlc-invalid.s

  • This file was added.
# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-zihintntl,+c < %s 2>&1 | FileCheck %s
# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-zihintntl,+c < %s 2>&1 | FileCheck %s
c.ntl.p1 1 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction
c.ntl.pall 2 # CHECK: :[[@LINE]]:12: error: invalid operand for instruction
c.ntl.s1 3 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction
c.ntl.all 4 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
c.ntl.p1 t0, t1 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction
c.ntl.pall t0, t1 # CHECK: :[[@LINE]]:12: error: invalid operand for instruction
c.ntl.s1 t0, t1 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction
c.ntl.all t0, t1 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction

llvm/test/MC/RISCV/rv32zihintntlc-valid.s

  • This file was added.
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zihintntl,+c -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zihintntl,+c -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zihintntl,+c < %s \
# RUN: | llvm-objdump --mattr=+experimental-zihintntl,+c -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zihintntl,+c < %s \
# RUN: | llvm-objdump --mattr=+experimental-zihintntl,+c -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# RUN: not llvm-mc %s -triple=riscv32 -mattr=+experimental-zihintntl 2>&1 | FileCheck -check-prefix=CHECK-NO-C %s
# RUN: not llvm-mc %s -triple=riscv64 -mattr=+experimental-zihintntl 2>&1 | FileCheck -check-prefix=CHECK-NO-C %s
# CHECK-ASM-AND-OBJ: ntl.p1
# CHECK-ASM: encoding: [0x33,0x00,0x20,0x00]
ntl.p1
# CHECK-ASM-AND-OBJ: ntl.pall
# CHECK-ASM: encoding: [0x33,0x00,0x30,0x00]
ntl.pall
# CHECK-ASM-AND-OBJ: ntl.s1
# CHECK-ASM: encoding: [0x33,0x00,0x40,0x00]
ntl.s1
# CHECK-ASM-AND-OBJ: ntl.all
# CHECK-ASM: encoding: [0x33,0x00,0x50,0x00]
ntl.all
# CHECK-ASM-AND-OBJ: c.ntl.p1
# CHECK-ASM: encoding: [0x0a,0x90]
# CHECK-NO-C: error: instruction requires the following: 'C' (Compressed Instructions)
# CHECK-NO-C-NEXT: c.ntl.p1
c.ntl.p1
# CHECK-ASM-AND-OBJ: c.ntl.pall
# CHECK-ASM: encoding: [0x0e,0x90]
# CHECK-NO-C: error: instruction requires the following: 'C' (Compressed Instructions)
# CHECK-NO-C-NEXT: c.ntl.pall
c.ntl.pall
# CHECK-ASM-AND-OBJ: c.ntl.s1
# CHECK-ASM: encoding: [0x12,0x90]
kito-chengUnsubmitted
Done
ReplyInline Actions

Could you add an invalid check for c.ntl instruction to make sure they can't use without C?
e.g. -mattr=+experimental-zihintntl but no +c.

kito-cheng: Could you add an invalid check for `c.ntl` instruction to make sure they can't use without `C`?
alextsao1999AuthorUnsubmitted
Done
ReplyInline Actions

Done

alextsao1999: Done
# CHECK-NO-C: error: instruction requires the following: 'C' (Compressed Instructions)
# CHECK-NO-C-NEXT: c.ntl.s1
c.ntl.s1
# CHECK-ASM-AND-OBJ: c.ntl.all
# CHECK-ASM: encoding: [0x16,0x90]
# CHECK-NO-C: error: instruction requires the following: 'C' (Compressed Instructions)
# CHECK-NO-C-NEXT: c.ntl.all
c.ntl.all