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Differential D121507

[DAGCombine] add tests for bitreverse-shift optimization
ClosedPublic

Authored by Chenbing.Zheng on Mar 11 2022, 7:39 PM.

Details

Reviewers
craig.topper
frasercrmck
RKSimon
lebedev.ri
benshi001
spatel
Commits
rG780eb9f5864f: [DAGCombine] add tests for bitreverse-shift optimization
Summary

This patch add some tests to show some optimization opportunities for bitreverse-shift.

Diff Detail

Event Timeline

Chenbing.Zheng created this revision.Mar 11 2022, 7:39 PM
Herald added a project: Restricted Project. · View Herald TranscriptMar 11 2022, 7:39 PM
Herald added subscribers: luke957, luismarques, apazos and 19 others. · View Herald Transcript
Chenbing.Zheng requested review of this revision.Mar 11 2022, 7:39 PM
Herald added subscribers: llvm-commits, • pcwang-thead, jacquesguan, MaskRay. · View Herald TranscriptMar 11 2022, 7:39 PM
Harbormaster completed remote builds in B153879: Diff 414792.Mar 11 2022, 8:33 PM
Chenbing.Zheng mentioned this in D121448: [DAGCombine] fold (bitreverse(srl (bitreverse c), x)) -> (shl c, x).Mar 11 2022, 10:25 PM
Chenbing.Zheng updated this revision to Diff 418513.Mar 28 2022, 1:15 AM
Chenbing.Zheng retitled this revision from [DAGCombine] precommit tests for fold (bitreverse(srl (bitreverse c), x)) -> (shl c, x) to [DAGCombine] add tests for bitreverse-shift optimization.
Chenbing.Zheng edited the summary of this revision. (Show Details)
Chenbing.Zheng added a reviewer: spatel.
Herald added a subscriber: StephenFan. · View Herald TranscriptMar 28 2022, 1:15 AM
Chenbing.Zheng mentioned this in D120648: [DAGCombine] fold (bswap(srl (bswap c), 8*x)) -> (shl c, 8*x).Mar 28 2022, 1:25 AM
RKSimon added inline comments.Mar 29 2022, 12:50 AM
llvm/test/CodeGen/X86/combine-bitreverse.ll
213

Please can you add a i64 test case - to see how well the 32-bit codegen works?

Chenbing.Zheng updated this revision to Diff 418817.Mar 29 2022, 1:32 AM

address comment

RKSimon accepted this revision.Mar 29 2022, 2:41 AM

LGTM

This revision is now accepted and ready to land.Mar 29 2022, 2:41 AM
This revision was landed with ongoing or failed builds.Mar 29 2022, 6:57 PM
Closed by commit rG780eb9f5864f: [DAGCombine] add tests for bitreverse-shift optimization (authored by Chenbing.Zheng). · Explain Why
This revision was automatically updated to reflect the committed changes.
Chenbing.Zheng added a commit: rG780eb9f5864f: [DAGCombine] add tests for bitreverse-shift optimization.
Harbormaster completed remote builds in B156712: Diff 418817.Mar 29 2022, 11:53 PM

Revision Contents

PathSize
llvm/
test/
CodeGen/
RISCV/
223 lines
X86/
356 lines

Diff 419034

llvm/test/CodeGen/RISCV/bitreverse-shift.ll

  • This file was added.
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -mattr=+zbkb -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefixes=RV32ZBKB
; RUN: llc -mtriple=riscv64 -mattr=+zbkb -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefixes=RV64ZBKB
; TODO: These tests can be optmised
; fold (bitreverse(srl (bitreverse c), x)) -> (shl c, x)
; fold (bitreverse(shl (bitreverse c), x)) -> (srl c, x)
declare i8 @llvm.bitreverse.i8(i8)
declare i16 @llvm.bitreverse.i16(i16)
declare i32 @llvm.bitreverse.i32(i32)
declare i64 @llvm.bitreverse.i64(i64)
define i8 @test_bitreverse_srli_bitreverse_i8(i8 %a) nounwind {
; RV32ZBKB-LABEL: test_bitreverse_srli_bitreverse_i8:
; RV32ZBKB: # %bb.0:
; RV32ZBKB-NEXT: rev8 a0, a0
; RV32ZBKB-NEXT: brev8 a0, a0
; RV32ZBKB-NEXT: srli a0, a0, 27
; RV32ZBKB-NEXT: rev8 a0, a0
; RV32ZBKB-NEXT: brev8 a0, a0
; RV32ZBKB-NEXT: srli a0, a0, 24
; RV32ZBKB-NEXT: ret
;
; RV64ZBKB-LABEL: test_bitreverse_srli_bitreverse_i8:
; RV64ZBKB: # %bb.0:
; RV64ZBKB-NEXT: rev8 a0, a0
; RV64ZBKB-NEXT: brev8 a0, a0
; RV64ZBKB-NEXT: srli a0, a0, 59
; RV64ZBKB-NEXT: rev8 a0, a0
; RV64ZBKB-NEXT: brev8 a0, a0
; RV64ZBKB-NEXT: srli a0, a0, 56
; RV64ZBKB-NEXT: ret
%1 = call i8 @llvm.bitreverse.i8(i8 %a)
%2 = lshr i8 %1, 3
%3 = call i8 @llvm.bitreverse.i8(i8 %2)
ret i8 %3
}
define i16 @test_bitreverse_srli_bitreverse_i16(i16 %a) nounwind {
; RV32ZBKB-LABEL: test_bitreverse_srli_bitreverse_i16:
; RV32ZBKB: # %bb.0:
; RV32ZBKB-NEXT: rev8 a0, a0
; RV32ZBKB-NEXT: brev8 a0, a0
; RV32ZBKB-NEXT: srli a0, a0, 23
; RV32ZBKB-NEXT: rev8 a0, a0
; RV32ZBKB-NEXT: brev8 a0, a0
; RV32ZBKB-NEXT: srli a0, a0, 16
; RV32ZBKB-NEXT: ret
;
; RV64ZBKB-LABEL: test_bitreverse_srli_bitreverse_i16:
; RV64ZBKB: # %bb.0:
; RV64ZBKB-NEXT: rev8 a0, a0
; RV64ZBKB-NEXT: brev8 a0, a0
; RV64ZBKB-NEXT: srli a0, a0, 55
; RV64ZBKB-NEXT: rev8 a0, a0
; RV64ZBKB-NEXT: brev8 a0, a0
; RV64ZBKB-NEXT: srli a0, a0, 48
; RV64ZBKB-NEXT: ret
%1 = call i16 @llvm.bitreverse.i16(i16 %a)
%2 = lshr i16 %1, 7
%3 = call i16 @llvm.bitreverse.i16(i16 %2)
ret i16 %3
}
define i32 @test_bitreverse_srli_bitreverse_i32(i32 %a) nounwind {
; RV32ZBKB-LABEL: test_bitreverse_srli_bitreverse_i32:
; RV32ZBKB: # %bb.0:
; RV32ZBKB-NEXT: rev8 a0, a0
; RV32ZBKB-NEXT: brev8 a0, a0
; RV32ZBKB-NEXT: srli a0, a0, 15
; RV32ZBKB-NEXT: rev8 a0, a0
; RV32ZBKB-NEXT: brev8 a0, a0
; RV32ZBKB-NEXT: ret
;
; RV64ZBKB-LABEL: test_bitreverse_srli_bitreverse_i32:
; RV64ZBKB: # %bb.0:
; RV64ZBKB-NEXT: rev8 a0, a0
; RV64ZBKB-NEXT: brev8 a0, a0
; RV64ZBKB-NEXT: srli a0, a0, 47
; RV64ZBKB-NEXT: rev8 a0, a0
; RV64ZBKB-NEXT: brev8 a0, a0
; RV64ZBKB-NEXT: srli a0, a0, 32
; RV64ZBKB-NEXT: ret
%1 = call i32 @llvm.bitreverse.i32(i32 %a)
%2 = lshr i32 %1, 15
%3 = call i32 @llvm.bitreverse.i32(i32 %2)
ret i32 %3
}
define i64 @test_bitreverse_srli_bitreverse_i64(i64 %a) nounwind {
; RV32ZBKB-LABEL: test_bitreverse_srli_bitreverse_i64:
; RV32ZBKB: # %bb.0:
; RV32ZBKB-NEXT: rev8 a0, a0
; RV32ZBKB-NEXT: brev8 a0, a0
; RV32ZBKB-NEXT: srli a0, a0, 1
; RV32ZBKB-NEXT: rev8 a0, a0
; RV32ZBKB-NEXT: brev8 a1, a0
; RV32ZBKB-NEXT: li a0, 0
; RV32ZBKB-NEXT: ret
;
; RV64ZBKB-LABEL: test_bitreverse_srli_bitreverse_i64:
; RV64ZBKB: # %bb.0:
; RV64ZBKB-NEXT: rev8 a0, a0
; RV64ZBKB-NEXT: brev8 a0, a0
; RV64ZBKB-NEXT: srli a0, a0, 33
; RV64ZBKB-NEXT: rev8 a0, a0
; RV64ZBKB-NEXT: brev8 a0, a0
; RV64ZBKB-NEXT: ret
%1 = call i64 @llvm.bitreverse.i64(i64 %a)
%2 = lshr i64 %1, 33
%3 = call i64 @llvm.bitreverse.i64(i64 %2)
ret i64 %3
}
define i8 @test_bitreverse_shli_bitreverse_i8(i8 %a) nounwind {
; RV32ZBKB-LABEL: test_bitreverse_shli_bitreverse_i8:
; RV32ZBKB: # %bb.0:
; RV32ZBKB-NEXT: rev8 a0, a0
; RV32ZBKB-NEXT: brev8 a0, a0
; RV32ZBKB-NEXT: srli a0, a0, 21
; RV32ZBKB-NEXT: andi a0, a0, 2040
; RV32ZBKB-NEXT: rev8 a0, a0
; RV32ZBKB-NEXT: brev8 a0, a0
; RV32ZBKB-NEXT: srli a0, a0, 24
; RV32ZBKB-NEXT: ret
;
; RV64ZBKB-LABEL: test_bitreverse_shli_bitreverse_i8:
; RV64ZBKB: # %bb.0:
; RV64ZBKB-NEXT: rev8 a0, a0
; RV64ZBKB-NEXT: brev8 a0, a0
; RV64ZBKB-NEXT: srli a0, a0, 53
; RV64ZBKB-NEXT: andi a0, a0, 2040
; RV64ZBKB-NEXT: rev8 a0, a0
; RV64ZBKB-NEXT: brev8 a0, a0
; RV64ZBKB-NEXT: srli a0, a0, 56
; RV64ZBKB-NEXT: ret
%1 = call i8 @llvm.bitreverse.i8(i8 %a)
%2 = shl i8 %1, 3
%3 = call i8 @llvm.bitreverse.i8(i8 %2)
ret i8 %3
}
define i16 @test_bitreverse_shli_bitreverse_i16(i16 %a) nounwind {
; RV32ZBKB-LABEL: test_bitreverse_shli_bitreverse_i16:
; RV32ZBKB: # %bb.0:
; RV32ZBKB-NEXT: rev8 a0, a0
; RV32ZBKB-NEXT: brev8 a0, a0
; RV32ZBKB-NEXT: srli a0, a0, 9
; RV32ZBKB-NEXT: andi a0, a0, -128
; RV32ZBKB-NEXT: rev8 a0, a0
; RV32ZBKB-NEXT: brev8 a0, a0
; RV32ZBKB-NEXT: srli a0, a0, 16
; RV32ZBKB-NEXT: ret
;
; RV64ZBKB-LABEL: test_bitreverse_shli_bitreverse_i16:
; RV64ZBKB: # %bb.0:
; RV64ZBKB-NEXT: rev8 a0, a0
; RV64ZBKB-NEXT: brev8 a0, a0
; RV64ZBKB-NEXT: srli a0, a0, 41
; RV64ZBKB-NEXT: andi a0, a0, -128
; RV64ZBKB-NEXT: rev8 a0, a0
; RV64ZBKB-NEXT: brev8 a0, a0
; RV64ZBKB-NEXT: srli a0, a0, 48
; RV64ZBKB-NEXT: ret
%1 = call i16 @llvm.bitreverse.i16(i16 %a)
%2 = shl i16 %1, 7
%3 = call i16 @llvm.bitreverse.i16(i16 %2)
ret i16 %3
}
define i32 @test_bitreverse_shli_bitreverse_i32(i32 %a) nounwind {
; RV32ZBKB-LABEL: test_bitreverse_shli_bitreverse_i32:
; RV32ZBKB: # %bb.0:
; RV32ZBKB-NEXT: rev8 a0, a0
; RV32ZBKB-NEXT: brev8 a0, a0
; RV32ZBKB-NEXT: slli a0, a0, 15
; RV32ZBKB-NEXT: rev8 a0, a0
; RV32ZBKB-NEXT: brev8 a0, a0
; RV32ZBKB-NEXT: ret
;
; RV64ZBKB-LABEL: test_bitreverse_shli_bitreverse_i32:
; RV64ZBKB: # %bb.0:
; RV64ZBKB-NEXT: rev8 a0, a0
; RV64ZBKB-NEXT: brev8 a0, a0
; RV64ZBKB-NEXT: srli a0, a0, 32
; RV64ZBKB-NEXT: slli a0, a0, 15
; RV64ZBKB-NEXT: rev8 a0, a0
; RV64ZBKB-NEXT: brev8 a0, a0
; RV64ZBKB-NEXT: srli a0, a0, 32
; RV64ZBKB-NEXT: ret
%1 = call i32 @llvm.bitreverse.i32(i32 %a)
%2 = shl i32 %1, 15
%3 = call i32 @llvm.bitreverse.i32(i32 %2)
ret i32 %3
}
define i64 @test_bitreverse_shli_bitreverse_i64(i64 %a) nounwind {
; RV32ZBKB-LABEL: test_bitreverse_shli_bitreverse_i64:
; RV32ZBKB: # %bb.0:
; RV32ZBKB-NEXT: rev8 a0, a1
; RV32ZBKB-NEXT: brev8 a0, a0
; RV32ZBKB-NEXT: slli a0, a0, 1
; RV32ZBKB-NEXT: rev8 a0, a0
; RV32ZBKB-NEXT: brev8 a0, a0
; RV32ZBKB-NEXT: li a1, 0
; RV32ZBKB-NEXT: ret
;
; RV64ZBKB-LABEL: test_bitreverse_shli_bitreverse_i64:
; RV64ZBKB: # %bb.0:
; RV64ZBKB-NEXT: rev8 a0, a0
; RV64ZBKB-NEXT: brev8 a0, a0
; RV64ZBKB-NEXT: slli a0, a0, 33
; RV64ZBKB-NEXT: rev8 a0, a0
; RV64ZBKB-NEXT: brev8 a0, a0
; RV64ZBKB-NEXT: ret
%1 = call i64 @llvm.bitreverse.i64(i64 %a)
%2 = shl i64 %1, 33
%3 = call i64 @llvm.bitreverse.i64(i64 %2)
ret i64 %3
}

llvm/test/CodeGen/X86/combine-bitreverse.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
; These tests just check that the plumbing is in place for @llvm.bitreverse. The ; These tests just check that the plumbing is in place for @llvm.bitreverse. The
; actual output is massive at the moment as llvm.bitreverse is not yet legal. ; actual output is massive at the moment as llvm.bitreverse is not yet legal.
declare i32 @llvm.bitreverse.i32(i32) readnone declare i32 @llvm.bitreverse.i32(i32) readnone
declare i64 @llvm.bitreverse.i64(i64) readnone
declare <4 x i32> @llvm.bitreverse.v4i32(<4 x i32>) readnone declare <4 x i32> @llvm.bitreverse.v4i32(<4 x i32>) readnone
; fold (bitreverse undef) -> undef ; fold (bitreverse undef) -> undef
define i32 @test_undef() nounwind { define i32 @test_undef() nounwind {
; X86-LABEL: test_undef: ; X86-LABEL: test_undef:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: retl ; X86-NEXT: retl
; ;
Show All 15 Lines
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax ; X64-NEXT: movl %edi, %eax
; X64-NEXT: retq ; X64-NEXT: retq
%b = call i32 @llvm.bitreverse.i32(i32 %a0) %b = call i32 @llvm.bitreverse.i32(i32 %a0)
%c = call i32 @llvm.bitreverse.i32(i32 %b) %c = call i32 @llvm.bitreverse.i32(i32 %b)
ret i32 %c ret i32 %c
} }
; TODO: fold (bitreverse(srl (bitreverse c), x)) -> (shl c, x)
define i32 @test_bitreverse_srli_bitreverse(i32 %a0) nounwind {
; X86-LABEL: test_bitreverse_srli_bitreverse:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: bswapl %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andl $252645135, %ecx # imm = 0xF0F0F0F
; X86-NEXT: shll $4, %ecx
; X86-NEXT: shrl $4, %eax
; X86-NEXT: andl $252645135, %eax # imm = 0xF0F0F0F
; X86-NEXT: orl %ecx, %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andl $858993459, %ecx # imm = 0x33333333
; X86-NEXT: shrl $2, %eax
; X86-NEXT: andl $858993459, %eax # imm = 0x33333333
; X86-NEXT: leal (%eax,%ecx,4), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andl $1431655744, %ecx # imm = 0x55555540
; X86-NEXT: shrl %eax
; X86-NEXT: andl $1431655680, %eax # imm = 0x55555500
; X86-NEXT: leal (%eax,%ecx,2), %eax
; X86-NEXT: shrl $7, %eax
; X86-NEXT: bswapl %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andl $252645121, %ecx # imm = 0xF0F0F01
; X86-NEXT: shll $4, %ecx
; X86-NEXT: shrl $4, %eax
; X86-NEXT: andl $252645120, %eax # imm = 0xF0F0F00
; X86-NEXT: orl %ecx, %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andl $858993424, %ecx # imm = 0x33333310
; X86-NEXT: shrl $2, %eax
; X86-NEXT: andl $858993408, %eax # imm = 0x33333300
; X86-NEXT: leal (%eax,%ecx,4), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andl $1431655765, %ecx # imm = 0x55555555
; X86-NEXT: shrl %eax
; X86-NEXT: andl $1431655765, %eax # imm = 0x55555555
; X86-NEXT: leal (%eax,%ecx,2), %eax
; X86-NEXT: retl
;
; X64-LABEL: test_bitreverse_srli_bitreverse:
; X64: # %bb.0:
; X64-NEXT: # kill: def $edi killed $edi def $rdi
; X64-NEXT: bswapl %edi
; X64-NEXT: movl %edi, %eax
; X64-NEXT: andl $252645135, %eax # imm = 0xF0F0F0F
; X64-NEXT: shll $4, %eax
; X64-NEXT: shrl $4, %edi
; X64-NEXT: andl $252645135, %edi # imm = 0xF0F0F0F
; X64-NEXT: orl %eax, %edi
; X64-NEXT: movl %edi, %eax
; X64-NEXT: andl $858993459, %eax # imm = 0x33333333
; X64-NEXT: shrl $2, %edi
; X64-NEXT: andl $858993459, %edi # imm = 0x33333333
; X64-NEXT: leal (%rdi,%rax,4), %eax
; X64-NEXT: movl %eax, %ecx
; X64-NEXT: andl $1431655744, %ecx # imm = 0x55555540
; X64-NEXT: shrl %eax
; X64-NEXT: andl $1431655680, %eax # imm = 0x55555500
; X64-NEXT: leal (%rax,%rcx,2), %eax
; X64-NEXT: shrl $7, %eax
; X64-NEXT: bswapl %eax
; X64-NEXT: movl %eax, %ecx
; X64-NEXT: andl $252645121, %ecx # imm = 0xF0F0F01
; X64-NEXT: shll $4, %ecx
; X64-NEXT: shrl $4, %eax
; X64-NEXT: andl $252645120, %eax # imm = 0xF0F0F00
; X64-NEXT: orl %ecx, %eax
; X64-NEXT: movl %eax, %ecx
; X64-NEXT: andl $858993424, %ecx # imm = 0x33333310
; X64-NEXT: shrl $2, %eax
; X64-NEXT: andl $858993408, %eax # imm = 0x33333300
; X64-NEXT: leal (%rax,%rcx,4), %eax
; X64-NEXT: movl %eax, %ecx
; X64-NEXT: andl $1431655765, %ecx # imm = 0x55555555
; X64-NEXT: shrl %eax
; X64-NEXT: andl $1431655765, %eax # imm = 0x55555555
; X64-NEXT: leal (%rax,%rcx,2), %eax
; X64-NEXT: retq
%b = call i32 @llvm.bitreverse.i32(i32 %a0)
%c = lshr i32 %b, 7
%d = call i32 @llvm.bitreverse.i32(i32 %c)
ret i32 %d
}
define i64 @test_bitreverse_srli_bitreverse_i64(i64 %a) nounwind {
; X86-LABEL: test_bitreverse_srli_bitreverse_i64:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: bswapl %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andl $252645135, %ecx # imm = 0xF0F0F0F
; X86-NEXT: shll $4, %ecx
; X86-NEXT: shrl $4, %eax
; X86-NEXT: andl $252645135, %eax # imm = 0xF0F0F0F
; X86-NEXT: orl %ecx, %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andl $858993459, %ecx # imm = 0x33333333
; X86-NEXT: shrl $2, %eax
; X86-NEXT: andl $858993459, %eax # imm = 0x33333333
; X86-NEXT: leal (%eax,%ecx,4), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andl $1431655765, %ecx # imm = 0x55555555
; X86-NEXT: shrl %eax
; X86-NEXT: andl $1431655764, %eax # imm = 0x55555554
; X86-NEXT: leal (%eax,%ecx,2), %eax
; X86-NEXT: shrl %eax
; X86-NEXT: bswapl %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andl $252645135, %ecx # imm = 0xF0F0F0F
; X86-NEXT: shll $4, %ecx
; X86-NEXT: shrl $4, %eax
; X86-NEXT: andl $252645127, %eax # imm = 0xF0F0F07
; X86-NEXT: orl %ecx, %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andl $858993459, %ecx # imm = 0x33333333
; X86-NEXT: shrl $2, %eax
; X86-NEXT: andl $858993457, %eax # imm = 0x33333331
; X86-NEXT: leal (%eax,%ecx,4), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andl $1431655765, %ecx # imm = 0x55555555
; X86-NEXT: shrl %eax
; X86-NEXT: andl $1431655765, %eax # imm = 0x55555555
; X86-NEXT: leal (%eax,%ecx,2), %edx
; X86-NEXT: xorl %eax, %eax
; X86-NEXT: retl
;
; X64-LABEL: test_bitreverse_srli_bitreverse_i64:
; X64: # %bb.0:
; X64-NEXT: bswapq %rdi
; X64-NEXT: movq %rdi, %rax
; X64-NEXT: shrq $4, %rax
; X64-NEXT: movabsq $1085102592571150095, %rcx # imm = 0xF0F0F0F0F0F0F0F
; X64-NEXT: andq %rcx, %rax
; X64-NEXT: andq %rcx, %rdi
; X64-NEXT: shlq $4, %rdi
; X64-NEXT: orq %rax, %rdi
; X64-NEXT: movabsq $3689348814741910323, %rax # imm = 0x3333333333333333
; X64-NEXT: movq %rdi, %rcx
; X64-NEXT: andq %rax, %rcx
; X64-NEXT: shrq $2, %rdi
; X64-NEXT: andq %rax, %rdi
; X64-NEXT: leaq (%rdi,%rcx,4), %rax
; X64-NEXT: movabsq $6148914689804861440, %rcx # imm = 0x5555555500000000
; X64-NEXT: andq %rax, %rcx
; X64-NEXT: shrq %rax
; X64-NEXT: movabsq $6148914685509894144, %rdx # imm = 0x5555555400000000
; X64-NEXT: andq %rax, %rdx
; X64-NEXT: leaq (%rdx,%rcx,2), %rax
; X64-NEXT: shrq $33, %rax
; X64-NEXT: bswapq %rax
; X64-NEXT: movabsq $1085102592318504960, %rcx # imm = 0xF0F0F0F00000000
; X64-NEXT: andq %rax, %rcx
; X64-NEXT: shrq $4, %rax
; X64-NEXT: movabsq $1085102557958766592, %rdx # imm = 0xF0F0F0700000000
; X64-NEXT: andq %rax, %rdx
; X64-NEXT: shlq $4, %rcx
; X64-NEXT: orq %rdx, %rcx
; X64-NEXT: movabsq $3689348813882916864, %rax # imm = 0x3333333300000000
; X64-NEXT: andq %rcx, %rax
; X64-NEXT: shrq $2, %rcx
; X64-NEXT: movabsq $3689348805292982272, %rdx # imm = 0x3333333100000000
; X64-NEXT: andq %rcx, %rdx
; X64-NEXT: leaq (%rdx,%rax,4), %rax
; X64-NEXT: movabsq $6148914691236517205, %rcx # imm = 0x5555555555555555
; X64-NEXT: movq %rax, %rdx
; X64-NEXT: andq %rcx, %rdx
; X64-NEXT: shrq %rax
; X64-NEXT: andq %rcx, %rax
; X64-NEXT: leaq (%rax,%rdx,2), %rax
; X64-NEXT: retq
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Please can you add a i64 test case - to see how well the 32-bit codegen works?

RKSimon: Please can you add a i64 test case - to see how well the 32-bit codegen works?
%1 = call i64 @llvm.bitreverse.i64(i64 %a)
%2 = lshr i64 %1, 33
%3 = call i64 @llvm.bitreverse.i64(i64 %2)
ret i64 %3
}
; TODO: fold (bitreverse(shl (bitreverse c), x)) -> (srl c, x)
define i32 @test_bitreverse_shli_bitreverse(i32 %a0) nounwind {
; X86-LABEL: test_bitreverse_shli_bitreverse:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: bswapl %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andl $252645135, %ecx # imm = 0xF0F0F0F
; X86-NEXT: shll $4, %ecx
; X86-NEXT: shrl $4, %eax
; X86-NEXT: andl $252645135, %eax # imm = 0xF0F0F0F
; X86-NEXT: orl %ecx, %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andl $858993459, %ecx # imm = 0x33333333
; X86-NEXT: shrl $2, %eax
; X86-NEXT: andl $858993459, %eax # imm = 0x33333333
; X86-NEXT: leal (%eax,%ecx,4), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andl $5592405, %ecx # imm = 0x555555
; X86-NEXT: shrl %eax
; X86-NEXT: andl $22369621, %eax # imm = 0x1555555
; X86-NEXT: leal (%eax,%ecx,2), %eax
; X86-NEXT: shll $7, %eax
; X86-NEXT: bswapl %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andl $986895, %ecx # imm = 0xF0F0F
; X86-NEXT: shll $4, %ecx
; X86-NEXT: shrl $4, %eax
; X86-NEXT: andl $135204623, %eax # imm = 0x80F0F0F
; X86-NEXT: orl %ecx, %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andl $3355443, %ecx # imm = 0x333333
; X86-NEXT: shrl $2, %eax
; X86-NEXT: andl $36909875, %eax # imm = 0x2333333
; X86-NEXT: leal (%eax,%ecx,4), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andl $1431655765, %ecx # imm = 0x55555555
; X86-NEXT: shrl %eax
; X86-NEXT: andl $1431655765, %eax # imm = 0x55555555
; X86-NEXT: leal (%eax,%ecx,2), %eax
; X86-NEXT: retl
;
; X64-LABEL: test_bitreverse_shli_bitreverse:
; X64: # %bb.0:
; X64-NEXT: # kill: def $edi killed $edi def $rdi
; X64-NEXT: bswapl %edi
; X64-NEXT: movl %edi, %eax
; X64-NEXT: andl $252645135, %eax # imm = 0xF0F0F0F
; X64-NEXT: shll $4, %eax
; X64-NEXT: shrl $4, %edi
; X64-NEXT: andl $252645135, %edi # imm = 0xF0F0F0F
; X64-NEXT: orl %eax, %edi
; X64-NEXT: movl %edi, %eax
; X64-NEXT: andl $858993459, %eax # imm = 0x33333333
; X64-NEXT: shrl $2, %edi
; X64-NEXT: andl $858993459, %edi # imm = 0x33333333
; X64-NEXT: leal (%rdi,%rax,4), %eax
; X64-NEXT: movl %eax, %ecx
; X64-NEXT: andl $5592405, %ecx # imm = 0x555555
; X64-NEXT: shrl %eax
; X64-NEXT: andl $22369621, %eax # imm = 0x1555555
; X64-NEXT: leal (%rax,%rcx,2), %eax
; X64-NEXT: shll $7, %eax
; X64-NEXT: bswapl %eax
; X64-NEXT: movl %eax, %ecx
; X64-NEXT: andl $986895, %ecx # imm = 0xF0F0F
; X64-NEXT: shll $4, %ecx
; X64-NEXT: shrl $4, %eax
; X64-NEXT: andl $135204623, %eax # imm = 0x80F0F0F
; X64-NEXT: orl %ecx, %eax
; X64-NEXT: movl %eax, %ecx
; X64-NEXT: andl $3355443, %ecx # imm = 0x333333
; X64-NEXT: shrl $2, %eax
; X64-NEXT: andl $36909875, %eax # imm = 0x2333333
; X64-NEXT: leal (%rax,%rcx,4), %eax
; X64-NEXT: movl %eax, %ecx
; X64-NEXT: andl $1431655765, %ecx # imm = 0x55555555
; X64-NEXT: shrl %eax
; X64-NEXT: andl $1431655765, %eax # imm = 0x55555555
; X64-NEXT: leal (%rax,%rcx,2), %eax
; X64-NEXT: retq
%b = call i32 @llvm.bitreverse.i32(i32 %a0)
%c = shl i32 %b, 7
%d = call i32 @llvm.bitreverse.i32(i32 %c)
ret i32 %d
}
define i64 @test_bitreverse_shli_bitreverse_i64(i64 %a) nounwind {
; X86-LABEL: test_bitreverse_shli_bitreverse_i64:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: bswapl %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andl $252645135, %ecx # imm = 0xF0F0F0F
; X86-NEXT: shll $4, %ecx
; X86-NEXT: shrl $4, %eax
; X86-NEXT: andl $252645135, %eax # imm = 0xF0F0F0F
; X86-NEXT: orl %ecx, %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andl $858993459, %ecx # imm = 0x33333333
; X86-NEXT: shrl $2, %eax
; X86-NEXT: andl $858993459, %eax # imm = 0x33333333
; X86-NEXT: leal (%eax,%ecx,4), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andl $357913941, %ecx # imm = 0x15555555
; X86-NEXT: shrl %eax
; X86-NEXT: andl $1431655765, %eax # imm = 0x55555555
; X86-NEXT: leal (%eax,%ecx,2), %eax
; X86-NEXT: addl %eax, %eax
; X86-NEXT: bswapl %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andl $235867919, %ecx # imm = 0xE0F0F0F
; X86-NEXT: shll $4, %ecx
; X86-NEXT: shrl $4, %eax
; X86-NEXT: andl $252645135, %eax # imm = 0xF0F0F0F
; X86-NEXT: orl %ecx, %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andl $590558003, %ecx # imm = 0x23333333
; X86-NEXT: shrl $2, %eax
; X86-NEXT: andl $858993459, %eax # imm = 0x33333333
; X86-NEXT: leal (%eax,%ecx,4), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: andl $1431655765, %ecx # imm = 0x55555555
; X86-NEXT: shrl %eax
; X86-NEXT: andl $1431655765, %eax # imm = 0x55555555
; X86-NEXT: leal (%eax,%ecx,2), %eax
; X86-NEXT: xorl %edx, %edx
; X86-NEXT: retl
;
; X64-LABEL: test_bitreverse_shli_bitreverse_i64:
; X64: # %bb.0:
; X64-NEXT: bswapq %rdi
; X64-NEXT: movq %rdi, %rax
; X64-NEXT: shrq $4, %rax
; X64-NEXT: movabsq $1085102592571150095, %rcx # imm = 0xF0F0F0F0F0F0F0F
; X64-NEXT: andq %rcx, %rax
; X64-NEXT: andq %rcx, %rdi
; X64-NEXT: shlq $4, %rdi
; X64-NEXT: orq %rax, %rdi
; X64-NEXT: movabsq $3689348814741910323, %rax # imm = 0x3333333333333333
; X64-NEXT: movq %rdi, %rcx
; X64-NEXT: andq %rax, %rcx
; X64-NEXT: shrq $2, %rdi
; X64-NEXT: andq %rax, %rdi
; X64-NEXT: leaq (%rdi,%rcx,4), %rax
; X64-NEXT: movl %eax, %ecx
; X64-NEXT: andl $357913941, %ecx # imm = 0x15555555
; X64-NEXT: shrl %eax
; X64-NEXT: andl $1431655765, %eax # imm = 0x55555555
; X64-NEXT: leal (%rax,%rcx,2), %eax
; X64-NEXT: shlq $33, %rax
; X64-NEXT: bswapq %rax
; X64-NEXT: movl %eax, %ecx
; X64-NEXT: andl $235867919, %ecx # imm = 0xE0F0F0F
; X64-NEXT: shlq $4, %rcx
; X64-NEXT: shrq $4, %rax
; X64-NEXT: andl $252645135, %eax # imm = 0xF0F0F0F
; X64-NEXT: orq %rcx, %rax
; X64-NEXT: movl %eax, %ecx
; X64-NEXT: andl $590558003, %ecx # imm = 0x23333333
; X64-NEXT: shrq $2, %rax
; X64-NEXT: andl $858993459, %eax # imm = 0x33333333
; X64-NEXT: leaq (%rax,%rcx,4), %rax
; X64-NEXT: movabsq $6148914691236517205, %rcx # imm = 0x5555555555555555
; X64-NEXT: movq %rax, %rdx
; X64-NEXT: andq %rcx, %rdx
; X64-NEXT: shrq %rax
; X64-NEXT: andq %rcx, %rax
; X64-NEXT: leaq (%rax,%rdx,2), %rax
; X64-NEXT: retq
%1 = call i64 @llvm.bitreverse.i64(i64 %a)
%2 = shl i64 %1, 33
%3 = call i64 @llvm.bitreverse.i64(i64 %2)
ret i64 %3
}
define <4 x i32> @test_demandedbits_bitreverse(<4 x i32> %a0) nounwind { define <4 x i32> @test_demandedbits_bitreverse(<4 x i32> %a0) nounwind {
; X86-LABEL: test_demandedbits_bitreverse: ; X86-LABEL: test_demandedbits_bitreverse:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pxor %xmm1, %xmm1 ; X86-NEXT: pxor %xmm1, %xmm1
; X86-NEXT: movdqa %xmm0, %xmm2 ; X86-NEXT: movdqa %xmm0, %xmm2
; X86-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15] ; X86-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
; X86-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[3,2,1,0,4,5,6,7] ; X86-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[3,2,1,0,4,5,6,7]
; X86-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,7,6,5,4] ; X86-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,7,6,5,4]
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