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[RISCV] Add scheduling resources for Vector pseudo instructions.
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Authored by HsiangKai on Sat, Nov 6, 4:21 PM.

Details

Summary

Add the scheduling resources for the V extension pseudo instructions.

Authored-by: Evandro Menezes <evandro.menezes@sifive.com>

Diff Detail

Event Timeline

HsiangKai created this revision.Sat, Nov 6, 4:21 PM
HsiangKai requested review of this revision.Sat, Nov 6, 4:21 PM
Herald added a project: Restricted Project. · View Herald TranscriptSat, Nov 6, 4:21 PM
HsiangKai updated this revision to Diff 387571.Tue, Nov 16, 4:00 AM

Fix failed test.

Generally looks good to me, thanks @HsiangKai

llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
2038

nit: MINMAX?

2059

nit: VFMUL? I know VF helps disambiguate it but I think people are generally more opcode focused.

2066

nit: VFDIV?

2073

VFRDIV

2224

nit: can probably get rid of this extra space

craig.topper added inline comments.Wed, Nov 24, 11:27 AM
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
2158–2162

Based on Fraser's FMUL and FDIV comments, this should be VFWALU

2165–2171

Same here

2448

VWFRED -> VFWRED to match the scheduler class name and instruction names

HsiangKai updated this revision to Diff 390160.Sat, Nov 27, 6:32 AM

Address comments.