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[AArch64][SVE] Better utilisation of unpredicated forms of remaining intrinsics
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Authored by bsmith on May 4 2021, 5:08 AM.

Details

Summary

When using predicated intrinsics, if the predicate used is all lanes active,
use an unpredicated form of the instruction, additionally this allows for
better use of immediate forms.

This only includes instructions where the unpredicated/predicated forms
matched in such a way that instruction selection would not introduce extra
ptrue instructions. This allows us to convert the intrinsics directly to
architecture independent ISD nodes.

Depends on D101062

Diff Detail

Unit TestsFailed

TimeTest
280 msx64 debian > Polly.Isl/CodeGen::multiple-codegens.ll
Script: -- : 'RUN: at line 1'; opt -polly-process-unprofitable -polly-remarks-minimal -polly-use-llvm-names -polly-import-jscop-dir=/mnt/disks/ssd0/agent/llvm-project/polly/test/Isl/CodeGen -polly-codegen-verify -polly-scops -polly-opt-isl -polly-codegen -polly-scops -polly-codegen -S < /mnt/disks/ssd0/agent/llvm-project/polly/test/Isl/CodeGen/multiple-codegens.ll | FileCheck /mnt/disks/ssd0/agent/llvm-project/polly/test/Isl/CodeGen/multiple-codegens.ll

Event Timeline

bsmith created this revision.May 4 2021, 5:08 AM
bsmith requested review of this revision.May 4 2021, 5:08 AM
Herald added a project: Restricted Project. · View Herald TranscriptMay 4 2021, 5:08 AM
Matt added a subscriber: Matt.May 4 2021, 9:34 AM
joechrisellis accepted this revision.May 5 2021, 3:55 AM

One nit, otherwise LGTM.

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
13880

nit: double negative -- I think the code would read better if this was PredicatedOp.

This revision is now accepted and ready to land.May 5 2021, 3:55 AM
This revision was landed with ongoing or failed builds.May 10 2021, 5:43 AM
This revision was automatically updated to reflect the committed changes.