joechrisellis retitled D99569: [LoopVectorize] Fix bug where predicated loads/stores were dropped from [AArch64][SVE] Fix vectoriser bug where predicated stores were dropped to [LoopVectorize] Fix bug where predicated loads/stores were dropped.

Wed, Mar 31, 5:29 AM · Restricted Project

joechrisellis updated the diff for D99569: [LoopVectorize] Fix bug where predicated loads/stores were dropped.

Minor change to x86-predication.ll test.

Wed, Mar 31, 5:22 AM · Restricted Project

Tue, Mar 30

joechrisellis planned changes to D99569: [LoopVectorize] Fix bug where predicated loads/stores were dropped.

Hmm. I anticipated there might be some test failures for this one.

Tue, Mar 30, 3:07 AM · Restricted Project

joechrisellis committed rGa7dde4c5f7aa: [AArch64][SVE] Lower fixed length INSERT_VECTOR_ELT (authored by joechrisellis).

[AArch64][SVE] Lower fixed length INSERT_VECTOR_ELT

Tue, Mar 30, 2:44 AM

joechrisellis committed rGc4d39f64d088: [AArch64][SVE] Lower fixed length EXTRACT_VECTOR_ELT (authored by joechrisellis).

[AArch64][SVE] Lower fixed length EXTRACT_VECTOR_ELT

Tue, Mar 30, 2:44 AM

joechrisellis closed D98496: [AArch64][SVE] Lower fixed length INSERT_VECTOR_ELT.

Tue, Mar 30, 2:43 AM · Restricted Project

joechrisellis closed D98625: [AArch64][SVE] Lower fixed length EXTRACT_VECTOR_ELT.

Tue, Mar 30, 2:43 AM · Restricted Project

joechrisellis requested review of D99569: [LoopVectorize] Fix bug where predicated loads/stores were dropped.

Tue, Mar 30, 2:08 AM · Restricted Project

Mon, Mar 29

joechrisellis updated joechrisellis.

Mon, Mar 29, 3:59 AM

joechrisellis accepted D99412: [AArch64][SVEIntrinsicOpts] Optimize tbl+dup into dup+extractelement.

LGTM. 😄

Mon, Mar 29, 3:53 AM · Restricted Project

joechrisellis updated the diff for D98496: [AArch64][SVE] Lower fixed length INSERT_VECTOR_ELT.

Apply @paulwalker-arm's comments from D98625 -- just test updates.

Mon, Mar 29, 3:50 AM · Restricted Project

joechrisellis updated the diff for D98625: [AArch64][SVE] Lower fixed length EXTRACT_VECTOR_ELT.

Address comments.

Mon, Mar 29, 2:02 AM · Restricted Project

joechrisellis added a comment to D99412: [AArch64][SVEIntrinsicOpts] Optimize tbl+dup into dup+extractelement.

Hi, thank you for the patch! The optimisation seems sound to me -- just a few comments on the test side. 😄

Mon, Mar 29, 1:32 AM · Restricted Project

Tue, Mar 23

joechrisellis updated the diff for D98625: [AArch64][SVE] Lower fixed length EXTRACT_VECTOR_ELT.

Address review comments.

Tue, Mar 23, 10:42 AM · Restricted Project

Mon, Mar 22

joechrisellis committed rG6dc32da1b077: [AArch64][SVE] Test more types in sve-fixed-length-subvector.ll (authored by joechrisellis).

[AArch64][SVE] Test more types in sve-fixed-length-subvector.ll

Mon, Mar 22, 7:09 AM

joechrisellis closed D98690: [AArch64][SVE] Test more types in sve-fixed-length-subvector.ll.

Mon, Mar 22, 7:09 AM · Restricted Project

Wed, Mar 17

joechrisellis accepted D98506: [SVE][LoopVectorize] Verify support for vectorizing loops with invariant loads.

Hi @kmclaughlin -- looks good to me modulo @david-arm's and @CarolineConcatto's comments. 🙂

Wed, Mar 17, 10:09 AM · Restricted Project

joechrisellis updated subscribers of D98625: [AArch64][SVE] Lower fixed length EXTRACT_VECTOR_ELT.

Wed, Mar 17, 9:49 AM · Restricted Project

joechrisellis updated subscribers of D98496: [AArch64][SVE] Lower fixed length INSERT_VECTOR_ELT.

Wed, Mar 17, 9:48 AM · Restricted Project

joechrisellis updated the diff for D98690: [AArch64][SVE] Test more types in sve-fixed-length-subvector.ll.

Address review comments.

Wed, Mar 17, 4:53 AM · Restricted Project

Tue, Mar 16

joechrisellis committed rGff2dd8a21251: [AArch64][SVE] Fold vector ZExt/SExt into gather loads where possible (authored by joechrisellis).

[AArch64][SVE] Fold vector ZExt/SExt into gather loads where possible

Tue, Mar 16, 8:10 AM

joechrisellis closed D97858: [AArch64][SVE] Fold vector ZExt/SExt into gather loads where possible.

Tue, Mar 16, 8:10 AM · Restricted Project

joechrisellis updated the diff for D97858: [AArch64][SVE] Fold vector ZExt/SExt into gather loads where possible.

Address code review comments.

Tue, Mar 16, 8:06 AM · Restricted Project

joechrisellis committed rG14bd44edc6af: [AArch64][SVEIntrinsicOpts] Factor out redundant SVE mul/fmul intrinsics (authored by joechrisellis).

[AArch64][SVEIntrinsicOpts] Factor out redundant SVE mul/fmul intrinsics

Tue, Mar 16, 7:51 AM

joechrisellis closed D98033: [AArch64][SVEIntrinsicOpts] Factor out redundant SVE mul/fmul intrinsics.

Tue, Mar 16, 7:50 AM · Restricted Project

joechrisellis updated the diff for D98033: [AArch64][SVEIntrinsicOpts] Factor out redundant SVE mul/fmul intrinsics.

Address comments:

Tue, Mar 16, 7:35 AM · Restricted Project

joechrisellis updated the diff for D98690: [AArch64][SVE] Test more types in sve-fixed-length-subvector.ll.

Amend labels.

Tue, Mar 16, 3:33 AM · Restricted Project

joechrisellis updated the diff for D98690: [AArch64][SVE] Test more types in sve-fixed-length-subvector.ll.

Remove the -aarch64-sve-vector-bits-min=4096 case; the architectural maximum is 2048 bits, so this case is erroneous.

Tue, Mar 16, 3:28 AM · Restricted Project

joechrisellis requested review of D98690: [AArch64][SVE] Test more types in sve-fixed-length-subvector.ll.

Tue, Mar 16, 3:03 AM · Restricted Project

Mon, Mar 15

joechrisellis added a comment to D98033: [AArch64][SVEIntrinsicOpts] Factor out redundant SVE mul/fmul intrinsics.

Politely pinging this. 🙂

Mon, Mar 15, 9:26 AM · Restricted Project

joechrisellis added a comment to D97858: [AArch64][SVE] Fold vector ZExt/SExt into gather loads where possible.

Politely pinging this. 🙂

Mon, Mar 15, 9:26 AM · Restricted Project

joechrisellis requested review of D98625: [AArch64][SVE] Lower fixed length EXTRACT_VECTOR_ELT.

Mon, Mar 15, 4:21 AM · Restricted Project

Mar 12 2021

joechrisellis requested review of D98496: [AArch64][SVE] Lower fixed length INSERT_VECTOR_ELT.

Mar 12 2021, 5:21 AM · Restricted Project

Mar 8 2021

joechrisellis updated the diff for D98033: [AArch64][SVEIntrinsicOpts] Factor out redundant SVE mul/fmul intrinsics.

Address review comments.

Mar 8 2021, 6:53 AM · Restricted Project

joechrisellis added inline comments to D97858: [AArch64][SVE] Fold vector ZExt/SExt into gather loads where possible.

Mar 8 2021, 2:17 AM · Restricted Project

joechrisellis updated the diff for D97858: [AArch64][SVE] Fold vector ZExt/SExt into gather loads where possible.

Address comments.

Mar 8 2021, 2:17 AM · Restricted Project

Mar 5 2021

joechrisellis accepted D98043: [LoopVectorize][SVE] Add tests for vectorising conditional loads of invariant addresses.

LGTM -- the test is a little noisy but I suppose that's par for the course for this kind of check. 🙂

Mar 5 2021, 7:56 AM · Restricted Project

joechrisellis added inline comments to D97858: [AArch64][SVE] Fold vector ZExt/SExt into gather loads where possible.

Mar 5 2021, 6:14 AM · Restricted Project

joechrisellis updated the diff for D97858: [AArch64][SVE] Fold vector ZExt/SExt into gather loads where possible.

Address review comments.

Mar 5 2021, 6:11 AM · Restricted Project

joechrisellis requested review of D98033: [AArch64][SVEIntrinsicOpts] Factor out redundant SVE mul/fmul intrinsics.

Mar 5 2021, 3:42 AM · Restricted Project

joechrisellis abandoned D96961: [AArch64][SVE][DAGCombine] Factor out redundant SVE mul/fmul intrinsics.

After some discussion with @paulwalker-arm we think this might be better placed as an IR-level optimisation in SVEIntrinsicOpts.cpp. Therefore, I am going to abandon this revision and create a new one. 🙂

Mar 5 2021, 3:00 AM · Restricted Project

Mar 4 2021

joechrisellis added inline comments to D97858: [AArch64][SVE] Fold vector ZExt/SExt into gather loads where possible.

Mar 4 2021, 7:00 AM · Restricted Project

joechrisellis updated the diff for D97858: [AArch64][SVE] Fold vector ZExt/SExt into gather loads where possible.

Address comments.

Mar 4 2021, 6:57 AM · Restricted Project

Mar 3 2021

joechrisellis added a reviewer for D97858: [AArch64][SVE] Fold vector ZExt/SExt into gather loads where possible: awarzynski.

Mar 3 2021, 7:15 AM · Restricted Project

joechrisellis requested review of D97858: [AArch64][SVE] Fold vector ZExt/SExt into gather loads where possible.

Mar 3 2021, 7:10 AM · Restricted Project

Feb 23 2021

joechrisellis committed rG1b1b30cf0f7d: [clang][SVE] Don't warn on vector to sizeless builtin implicit conversion (authored by joechrisellis).

[clang][SVE] Don't warn on vector to sizeless builtin implicit conversion

Feb 23 2021, 5:41 AM

joechrisellis closed D97053: [clang][SVE] Don't warn on vector to sizeless builtin implicit conversion.

Feb 23 2021, 5:41 AM · Restricted Project

joechrisellis updated the diff for D97053: [clang][SVE] Don't warn on vector to sizeless builtin implicit conversion.

Address linter comments.

Feb 23 2021, 5:20 AM · Restricted Project

Feb 22 2021

joechrisellis updated the diff for D97053: [clang][SVE] Don't warn on vector to sizeless builtin implicit conversion.

Address @c-rhodes's comment.

Feb 22 2021, 8:57 AM · Restricted Project

joechrisellis added inline comments to D97053: [clang][SVE] Don't warn on vector to sizeless builtin implicit conversion.

Feb 22 2021, 8:57 AM · Restricted Project

joechrisellis updated the diff for D97053: [clang][SVE] Don't warn on vector to sizeless builtin implicit conversion.

Address comments.

Feb 22 2021, 3:26 AM · Restricted Project

Feb 19 2021

joechrisellis added inline comments to D97053: [clang][SVE] Don't warn on vector to sizeless builtin implicit conversion.

Feb 19 2021, 9:25 AM · Restricted Project

joechrisellis added inline comments to D96961: [AArch64][SVE][DAGCombine] Factor out redundant SVE mul/fmul intrinsics.

Feb 19 2021, 8:44 AM · Restricted Project

joechrisellis updated the diff for D96961: [AArch64][SVE][DAGCombine] Factor out redundant SVE mul/fmul intrinsics.

Address @david-arm's comments.

Feb 19 2021, 8:43 AM · Restricted Project

joechrisellis requested review of D97053: [clang][SVE] Don't warn on vector to sizeless builtin implicit conversion.

Feb 19 2021, 7:51 AM · Restricted Project

Feb 18 2021

joechrisellis committed rG1f2122c9b046: [clang][SVE] Use __inline__ instead of inline in arm_sve.h (authored by joechrisellis).

[clang][SVE] Use __inline__ instead of inline in arm_sve.h

Feb 18 2021, 9:11 AM

joechrisellis closed D96852: [clang][SVE] Use __inline__ instead of inline in arm_sve.h.

Feb 18 2021, 9:10 AM · Restricted Project

joechrisellis added a comment to D96961: [AArch64][SVE][DAGCombine] Factor out redundant SVE mul/fmul intrinsics.

Ideas for more tests appreciated. 😄

Feb 18 2021, 8:10 AM · Restricted Project

joechrisellis requested review of D96961: [AArch64][SVE][DAGCombine] Factor out redundant SVE mul/fmul intrinsics.

Feb 18 2021, 8:10 AM · Restricted Project

Feb 17 2021

joechrisellis retitled D96852: [clang][SVE] Use __inline__ instead of inline in arm_sve.h from [clang][SVE] Remove inline keyword from arm_sve.h to [clang][SVE] Use __inline__ instead of inline in arm_sve.h.

Feb 17 2021, 7:38 AM · Restricted Project

joechrisellis updated the diff for D96852: [clang][SVE] Use __inline__ instead of inline in arm_sve.h.

Use inline instead of inline.

Feb 17 2021, 7:37 AM · Restricted Project

joechrisellis added a comment to D96852: [clang][SVE] Use __inline__ instead of inline in arm_sve.h.

That makes sense and suggests we're missing some additional C++ testing?

Feb 17 2021, 6:21 AM · Restricted Project

joechrisellis planned changes to D96852: [clang][SVE] Use __inline__ instead of inline in arm_sve.h.

Speaking to @DavidTruby about this, it appears that this fix is insufficient -- inline has important semantic meaning in C++ that means that we can't simply omit the keyword here.

Feb 17 2021, 6:10 AM · Restricted Project

joechrisellis requested review of D96852: [clang][SVE] Use __inline__ instead of inline in arm_sve.h.

Feb 17 2021, 3:05 AM · Restricted Project

Feb 11 2021

joechrisellis committed rG67464dfe366b: [DebugInfo] Only perform TypeSize -> unsigned cast when necessary (authored by joechrisellis).

[DebugInfo] Only perform TypeSize -> unsigned cast when necessary

Feb 11 2021, 5:54 AM

joechrisellis closed D96423: [DebugInfo] Only perform TypeSize -> unsigned cast when necessary.

Feb 11 2021, 5:54 AM · Restricted Project

joechrisellis retitled D96423: [DebugInfo] Only perform TypeSize -> unsigned cast when necessary from [DebugInfo] Remove early implicit cast of TypeSize to unsigned to [DebugInfo] Only perform TypeSize -> unsigned cast when necessary.

Feb 11 2021, 5:53 AM · Restricted Project

joechrisellis added a comment to D96423: [DebugInfo] Only perform TypeSize -> unsigned cast when necessary.

ACK, fair point!

Feb 11 2021, 2:03 AM · Restricted Project

joechrisellis updated the diff for D96423: [DebugInfo] Only perform TypeSize -> unsigned cast when necessary.

Address @david-arm's comments.

Feb 11 2021, 2:03 AM · Restricted Project

Feb 10 2021

joechrisellis requested review of D96423: [DebugInfo] Only perform TypeSize -> unsigned cast when necessary.

Feb 10 2021, 7:48 AM · Restricted Project

Feb 5 2021

joechrisellis committed rG3d257fde75f8: [AArch64][SVE] Coalesce ptrue instrinsic calls where possible (authored by joechrisellis).

[AArch64][SVE] Coalesce ptrue instrinsic calls where possible

Feb 5 2021, 2:45 AM

joechrisellis closed D94230: [AArch64][SVE] Coalesce ptrue instrinsic calls where possible.

Feb 5 2021, 2:45 AM · Restricted Project

joechrisellis retitled D94230: [AArch64][SVE] Coalesce ptrue instrinsic calls where possible from [AArch64][SVE] Add SVE IR pass to coalesce ptrue instrinsic calls to [AArch64][SVE] Coalesce ptrue instrinsic calls where possible.

Feb 5 2021, 2:42 AM · Restricted Project