[PowerPC] Scalar IBM MASS library conversion pass

[masoud.ataei]

Summary

This patch introduces an option to enable conversions from math function calls
to MASS library calls. To resolves calls generated with these conversions, one
need to link libxlopt.a library.

This patch is tested on PowerPC Linux and AIX.

[bmahjour]

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

1403

why are these being handled here instead of PPCGenScalarMASSEntries.cpp?

[bmahjour]

llvm/include/llvm/Analysis/ScalarFuncs.def

18

shouldn't these map from llvm.* intrinsics to mass entry points as well?

[masoud.ataei]

llvm/include/llvm/Analysis/ScalarFuncs.def

18

llvm intrinsics is handled in PPCISelLowering.cpp.

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

1403

We are not handling llvm intrinsics in PPCGenScalarMASSEntries.cpp because we don't want to block any type of existing optimizations (like pow(x,0.5) --> sqrt(x)) and future optimizations (like https://reviews.llvm.org/D94543 ?).

[bmahjour]

llvm/lib/Target/PowerPC/PPCGenScalarMASSEntries.cpp

71

There should be a todo comment to handle non-finite entries using fewer fast-math flags.

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

1403

I see, could you please put a comment in the code to explain that? Alternatively you can put the comment at the top of llvm/include/llvm/Analysis/ScalarFuncs.def.

1403

Instead of TM.Options.UnsafeFPMath we should test for the individual fast-math flags that are required for safety. Checking for "unsafe-fp-math" has a few drawbacks:

1. To make clang enable that flag it is necessary but not enough to specify -funsafe-math-optimizations! You'd have to specify -fno-math-errno as well.
2. Clang sets the "unsafe-fp-math" flag when all four of -fno-math-errno -fassociative-math -freciprocal-math -fno-signed-zeros are specified, regardless of other flags... For example this command does the conversion to the _finite calls despite the user request to honor NaNs. clang t.c -c -O3 -fno-math-errno -fassociative-math -freciprocal-math -fno-signed-zeros -fhonor-nans

Even if the clang inconsistencies/issues are resolved, it would still be better to check for the individual flags for finer control and for consistency with other front-ends.

llvm/test/CodeGen/PowerPC/lower-intrinsics-mass-aix.ll

2

why not just use the default CHECK prefix? CHECK-ALL and CHECK-LWR don't distinguish anything based on this run command.

20

CHECK-DFLT is not in the list of prefixes defined.

llvm/test/CodeGen/PowerPC/lower-intrinsics-nofast-mass.ll

148

Remove this line, #1 is unused.

[masoud.ataei]

Sorry it took me so long to update this patch -- I think I addressed all reviews till now.

[bmahjour]

llvm/include/llvm/Analysis/ScalarFuncs.def

12

[nit] ISelLowing -> PPCISelLowering

llvm/lib/Target/PowerPC/PPCGenScalarMASSEntries.cpp

10

Since LLVM math intrinsic lowerings are done in ISellLowering, this comment should not say "and LLVM math intrinsics".

14

llvm.cos.f32 is an intrinsic and not handled by this transformation.

73

remove this line

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

1406

Why do you still check for TM.Options.UnsafeFPMath ? If you do it out of concerns for -fno-math-errno, then it's not needed. Note that these llvm intrinsics already mention that their semantics are identical to their libm counter parts but "without trapping or setting errno".

llvm/test/CodeGen/PowerPC/lower-intrinsics-fast-mass.ll

148

See above comment and remove "unsafe-fp-math".

llvm/test/CodeGen/PowerPC/pow-025-075-intrinsic-scalar-mass.ll

302 ↗

(On Diff #355347)

See above comment and remove "unsafe-fp-math".

[masoud.ataei]

Removed dependency to unsafe-fp-math and added clang option to
control afn flag.

[bmahjour]

clang/include/clang/Driver/Options.td

1726 ↗

(On Diff #358756)

I think we should separate out the clang driver interface into its own patch and ask for feedback on the mailing list. One key question would be, should this option assume no-errno and no-trapping-math or not (given that there is no IR representation for them).

There should also be LIT tests dedicated to this to verify the clang interface. I only see llc interface being tested in this patch.

llvm/include/llvm/Target/TargetOptions.h

179 ↗

(On Diff #358756)

We already have the PPCGenScalarMASSEntries bit, why do we need another one? Perhaps we can remove PPCGenScalarMASSEntries, but we should not have to turn on two options to get one transformation enabled.

llvm/lib/Target/PowerPC/PPCGenScalarMASSEntries.cpp

73

...but errno and trapping-math would be an issue for non-finite entries as well.

Again, I think this function should just check for nnan/ninf/afn flags. We need to find out (with the help of the wider community) how to deal with the concerns surrounding errno and traps separately. One way to do that would be to broaden the definition of the afn flag to include no-errno and no-trapping semantics. Another way might be to make clang FE set the afn bit only if -fno-math-errno and -fno-trapping-math options are enabled (less desirable). A third way might be to add corresponding function attributes to the IR for -fno-math-errno and -fno-trapping-math.

Once these issues are sorted out, we can add the appropriate constraints to the isCandidateSafeToLower function.

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

1406

if someone compiles with -Ofast without any extra options, would TM.Options.ApproxFuncFPMath be true here?

[masoud.ataei]

Removed clang changes from this PR.
Removed extra option for MASS pass.
Now MASS pass is active with -O3 and approx-func option.

Adding another PR for clang changes on approx-func option.

[masoud.ataei]

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

1406

In clang changes, I had Options.ApproxFuncFPMath = LangOpts.ApproxFunc; in clang/lib/CodeGen/BackendUtil.cpp. That was responsible to update this TM option based on the clang approximate func option. And clang approximate func option will be set with -Ofast.

Then, the answer for your question is yes.

[lebedev.ri]

Do we *really* need -enable-approx-func-fp-math?
I'm pretty sure we are moving away from such global options, onto relying only on the per-instruction fast-math flags.

[masoud.ataei]

In D101759#2967250, @lebedev.ri wrote:

Do we *really* need -enable-approx-func-fp-math?
I'm pretty sure we are moving away from such global options, onto relying only on the per-instruction fast-math flags.

I am handling LLVM intrinsic math functions in PPCISelLowering.cpp, so I need to check for TM.Options.ApproxFuncFPMath. This is the only place that I think I need it.
Currently, I am updating TM.Options.ApproxFuncFPMath in llvm/lib/CodeGen/CommandFlags.cpp using the global option. Please let me know if there is a better way to update TM.Options.ApproxFuncFPMath based on the local fast-math flag.

[lebedev.ri]

In D101759#2967331, @masoud.ataei wrote:

In D101759#2967250, @lebedev.ri wrote:

Do we *really* need -enable-approx-func-fp-math?
I'm pretty sure we are moving away from such global options, onto relying only on the per-instruction fast-math flags.

I am handling LLVM intrinsic math functions in PPCISelLowering.cpp, so I need to check for TM.Options.ApproxFuncFPMath. This is the only place that I think I need it.

How is this going to work e.g. in LTO when not all TU's are compiled with fast-math flags?

I'm not familiar with those llc flags, but i'm quite sure that e.g. DAGCombiner
is transitioned away from using them, so i'm wary of adding new ones.

Currently, I am updating TM.Options.ApproxFuncFPMath in llvm/lib/CodeGen/CommandFlags.cpp using the global option. Please let me know if there is a better way to update TM.Options.ApproxFuncFPMath based on the local fast-math flag.

[masoud.ataei]

Removing dependency to the global option to convert math functions to MASS.

[spatel]

I'm not familiar with this library, and I haven't looked at current state of how we enable/map optional libs in a while...
We definitely want to avoid adding another target option/debug flag, and if we can avoid relying on a function parameter too, that would be even better.
Ie, the "afn" fast-math-flag (possibly in combination with some other IR- or node-level flags) seems like it should be enough to allow this transform/lowering.
Scanning the earlier review comments, there was some concern about the semantics wrt errno. If we need to adjust the "afn" definition, it's probably fine. There haven't been many uses of that flag AFAIK.

[efriedma]

errno handling for math library functions is a mess. Currently, we don't model it properly; we just mark the calls "readnone" and hope for the best. If you don't want to fix that, just check for readnone for now.

I don't think we want to be querying function attributes or options here; afn plus enabling MASS should be enough. The function attributes are the old mechanism; we just haven't completely migrated some parts of SelectionDAG yet.

llvm/include/llvm/Analysis/ScalarFuncs.def

20

Do "__acosf_finite" etc. actually exist on AIX? I thought they only existed on glibc, and the glibc functions are all deprecated.

I think I'd prefer to track this information in TargetLibraryInfo, like we do for the vector functions, so we can more easily generalize this mechanism in the future.

[bmahjour]

In D101759#2971567, @efriedma wrote:

errno handling for math library functions is a mess. Currently, we don't model it properly; we just mark the calls "readnone" and hope for the best. If you don't want to fix that, just check for readnone for now.

I think using readnone would work fine. It seems that clang marks math functions with that attribute when -fno-math-errno is in effect. To get the non-finite MASS lowerings at -O3 one would have to compile with both -fapprox-func and -fno-math-errno, which seems reasonable to me.

I don't think we want to be querying function attributes or options here; afn plus enabling MASS should be enough. The function attributes are the old mechanism; we just haven't completely migrated some parts of SelectionDAG yet.

I agree. I think the problem is that this patch is trying to decide on a global lowering strategy for llvm.* math intrinsics in llvm/lib/Target/PowerPC/PPCISelLowering.cpp but such global decision making does not go well with finer granularity of fast-math flags. My understanding is that the reason we need to handle intrinsic math functions later is because of strength-reduction transformations like pow(x,0.5) --> sqrt(x) that currently operate on intrinsic calls only. If we could apply those operations on things like __xl_pow_finite and produce calls to __xl_sqrt_finite then we wouldn't have this problem. Another possibility might be to have two versions of PPCGenScalarMASSEntries one that handles non-intrinsics and runs earlier, and another one that handles intrinsics after transformations likes pow(x,0.5) --> sqrt(x) are done.

[efriedma]

I agree. I think the problem is that this patch is trying to decide on a global lowering strategy for llvm.* math intrinsics in llvm/lib/Target/PowerPC/PPCISelLowering.cpp but such global decision making does not go well with finer granularity of fast-math flags.

Hmm. Instead of using setLibcallName() and letting the legalizer generate the calls, it should be possible to use custom lowering to generate the appropriate calls, at the cost of writing a little more code.

My understanding is that the reason we need to handle intrinsic math functions later is because of strength-reduction transformations like pow(x,0.5) --> sqrt(x) that currently operate on intrinsic calls only.

instcombine should be primarily responsible for this sort of optimization. See LibCallSimplifier::optimizePow. I guess a few transforms (D51630 etc.) landed in DAGCombine; probably we could move them earlier.

[masoud.ataei]

As suggested before, I removed dependency to the global option to convert math functions to MASS for all intrinsic and non-intrinsic functions.
The main changes here with respect to the last proposal is in PPCIselLowing.cpp file, about how to handle llvm intrinsic math function.

• and sorry for taking so long to update the patch.

[masoud.ataei]

llvm/include/llvm/Analysis/ScalarFuncs.def

20

Some machines still have the old glibc, so I kept them for compatibility.

[masoud.ataei]

This update will fix the type of arguments passing to the converted math function in PPCISelLowing.cpp.

[bmahjour]

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

386

what about tan, acos, and the others?

llvm/test/CodeGen/PowerPC/lower-intrinsics-afn-mass.ll

148

All the calls have afn....why do we need this attribute?

llvm/test/CodeGen/PowerPC/lower-intrinsics-fast-mass.ll

148

do we need this attribute? Can we remove it or have separate tests for functions with attributes?

llvm/test/CodeGen/PowerPC/lower-intrinsics-mass-aix.ll

1

We don't really need a separate aix file. Can we just add a run line with the aix triple to llvm/test/CodeGen/PowerPC/lower-intrinsics-nofast-mass.ll?

llvm/test/CodeGen/PowerPC/lower-scalar-mass-fast.ll

796

shouldn't the tests starting from here move to a different file? This test file is called ...mass-fast.ll so one would expect it only contains tests with fast-math flag on.

llvm/test/CodeGen/PowerPC/pow-025-075-intrinsic-scalar-mass-fast.ll

246

How come pow -> sqrt conversion didn't happen here?

llvm/test/CodeGen/PowerPC/pow-025-075-nointrinsic-scalar-mass-fast.ll

22

so pow->sqrt translation never happens for non-intrinsic pow. Is that expected? If so, are we planning to recognize these patterns inside PPCGenScalarMASSEntries in the future and do the translation as part of that transform?

[masoud.ataei]

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

386

These are the list of math functions that llvm creates intrinsic call for them. There is no llvm intrinsic for tan, acos and other math functions which (exist in MASS and) are not in this list.

llvm/test/CodeGen/PowerPC/lower-intrinsics-afn-mass.ll

148

Removed

llvm/test/CodeGen/PowerPC/lower-intrinsics-fast-mass.ll

148

Removed

llvm/test/CodeGen/PowerPC/lower-intrinsics-mass-aix.ll

1

Done

llvm/test/CodeGen/PowerPC/lower-scalar-mass-fast.ll

796

Done

llvm/test/CodeGen/PowerPC/pow-025-075-intrinsic-scalar-mass-fast.ll

246

Honestly, I am not sure why the conversion is not happening in this case. But without this patch we will get powf call (the conversion is not happening again). So this is a separate issue that someone needs to look at independent of this patch.

llvm/test/CodeGen/PowerPC/pow-025-075-nointrinsic-scalar-mass-fast.ll

22

Correct, pow->sqrt translation is not happening for none intrinsic cases. It is the case independent of this patch. I guess the reason is DAGCombiner only apply this optimization on llvm intrinsics. This is an issue that either we need to handle it in DAGCombiner (same as intrinsic one) or in MASS pass. I feel DAGCombiner is a better option and I think this is also a separate issue.

[masoud.ataei]

Fix test cases.

[masoud.ataei]

Changing function name: lowerLibCall() -> lowerLibCallType()

[masoud.ataei]

Ready for another round of review.

[bmahjour]

Apart from some minor inline comments this revision addresses all my outstanding comments. LGTM.

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

17747

[nit] a better name would be lowerLibCallBasedOnType

llvm/test/CodeGen/PowerPC/pow-025-075-intrinsic-scalar-mass-fast.ll

246

Could you please make a note of this as a todo comment in each test that is affected?

llvm/test/CodeGen/PowerPC/pow-025-075-nointrinsic-scalar-mass-fast.ll

22

Ok, I understand now. We'll have to come back to this later at some point.

llvm/include/llvm/Analysis/ScalarFuncs.def

+//===-- ScalarFuncs.def - Library information ----------*- C++ -*----------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+// This .def file creates mapping from standard IEEE math functions
+// their corresponding entries in the IBM MASS (scalar) library.
+// LLVM intrinsic math functions will be handled in PPCISelLowing to
+// allow existing optimizations like pow(x,0.5) --> sqrt(x).
+
+#if defined(TLI_DEFINE_SCALAR_MASS_FUNCS)
+#define TLI_DEFINE_SCALAR_MASS_FUNC(SCAL, MASSENTRY) {SCAL, MASSENTRY},
+#endif
+
+TLI_DEFINE_SCALAR_MASS_FUNC("acosf", "__xl_acosf")
+TLI_DEFINE_SCALAR_MASS_FUNC("__acosf_finite", "__xl_acosf")
+TLI_DEFINE_SCALAR_MASS_FUNC("acos", "__xl_acos")
+TLI_DEFINE_SCALAR_MASS_FUNC("__acos_finite", "__xl_acos")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("acoshf", "__xl_acoshf")
+TLI_DEFINE_SCALAR_MASS_FUNC("__acoshf_finite", "__xl_acoshf")
+TLI_DEFINE_SCALAR_MASS_FUNC("acosh", "__xl_acosh")
+TLI_DEFINE_SCALAR_MASS_FUNC("__acosh_finite", "__xl_acosh")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("asinf", "__xl_asinf")
+TLI_DEFINE_SCALAR_MASS_FUNC("__asinf_finite", "__xl_asinf")
+TLI_DEFINE_SCALAR_MASS_FUNC("asin", "__xl_asin")
+TLI_DEFINE_SCALAR_MASS_FUNC("__asin_finite", "__xl_asin")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("asinhf", "__xl_asinhf")
+TLI_DEFINE_SCALAR_MASS_FUNC("asinh", "__xl_asinh")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("atanf", "__xl_atanf")
+TLI_DEFINE_SCALAR_MASS_FUNC("atan", "__xl_atan")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("atan2f", "__xl_atan2f")
+TLI_DEFINE_SCALAR_MASS_FUNC("__atan2f_finite", "__xl_atan2f")
+TLI_DEFINE_SCALAR_MASS_FUNC("atan2", "__xl_atan2")
+TLI_DEFINE_SCALAR_MASS_FUNC("__atan2_finite", "__xl_atan2")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("atanhf", "__xl_atanhf")
+TLI_DEFINE_SCALAR_MASS_FUNC("__atanhf_finite", "__xl_atanhf")
+TLI_DEFINE_SCALAR_MASS_FUNC("atanh", "__xl_atanh")
+TLI_DEFINE_SCALAR_MASS_FUNC("__atanh_finite", "__xl_atanh")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("cbrtf", "__xl_cbrtf")
+TLI_DEFINE_SCALAR_MASS_FUNC("cbrt", "__xl_cbrt")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("cosf", "__xl_cosf")
+TLI_DEFINE_SCALAR_MASS_FUNC("cos", "__xl_cos")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("coshf", "__xl_coshf")
+TLI_DEFINE_SCALAR_MASS_FUNC("__coshf_finite", "__xl_coshf")
+TLI_DEFINE_SCALAR_MASS_FUNC("cosh", "__xl_cosh")
+TLI_DEFINE_SCALAR_MASS_FUNC("__cosh_finite", "__xl_cosh")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("erff", "__xl_erff")
+TLI_DEFINE_SCALAR_MASS_FUNC("erf", "__xl_erf")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("erfcf", "__xl_erfcf")
+TLI_DEFINE_SCALAR_MASS_FUNC("erfc", "__xl_erfc")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("expf", "__xl_expf")
+TLI_DEFINE_SCALAR_MASS_FUNC("__expf_finite", "__xl_expf")
+TLI_DEFINE_SCALAR_MASS_FUNC("exp", "__xl_exp")
+TLI_DEFINE_SCALAR_MASS_FUNC("__exp_finite", "__xl_exp")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("expm1f", "__xl_expm1f")
+TLI_DEFINE_SCALAR_MASS_FUNC("expm1", "__xl_expm1")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("hypotf", "__xl_hypotf")
+TLI_DEFINE_SCALAR_MASS_FUNC("hypot", "__xl_hypot")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("lgammaf", "__xl_lgammaf")
+TLI_DEFINE_SCALAR_MASS_FUNC("lgamma", "__xl_lgamma")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("logf", "__xl_logf")
+TLI_DEFINE_SCALAR_MASS_FUNC("__logf_finite", "__xl_logf")
+TLI_DEFINE_SCALAR_MASS_FUNC("log", "__xl_log")
+TLI_DEFINE_SCALAR_MASS_FUNC("__log_finite", "__xl_log")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("log10f", "__xl_log10f")
+TLI_DEFINE_SCALAR_MASS_FUNC("__log10f_finite", "__xl_log10f")
+TLI_DEFINE_SCALAR_MASS_FUNC("log10", "__xl_log10")
+TLI_DEFINE_SCALAR_MASS_FUNC("__log10_finite", "__xl_log10")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("log1pf", "__xl_log1pf")
+TLI_DEFINE_SCALAR_MASS_FUNC("log1p", "__xl_log1p")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("powf", "__xl_powf")
+TLI_DEFINE_SCALAR_MASS_FUNC("__powf_finite", "__xl_powf")
+TLI_DEFINE_SCALAR_MASS_FUNC("pow", "__xl_pow")
+TLI_DEFINE_SCALAR_MASS_FUNC("__pow_finite", "__xl_pow")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("rsqrt", "__xl_rsqrt")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("sinf", "__xl_sinf")
+TLI_DEFINE_SCALAR_MASS_FUNC("sin", "__xl_sin")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("sinhf", "__xl_sinhf")
+TLI_DEFINE_SCALAR_MASS_FUNC("__sinhf_finite", "__xl_sinhf")
+TLI_DEFINE_SCALAR_MASS_FUNC("sinh", "__xl_sinh")
+TLI_DEFINE_SCALAR_MASS_FUNC("__sinh_finite", "__xl_sinh")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("sqrt", "__xl_sqrt")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("tanf", "__xl_tanf")
+TLI_DEFINE_SCALAR_MASS_FUNC("tan", "__xl_tan")
+
+TLI_DEFINE_SCALAR_MASS_FUNC("tanhf", "__xl_tanhf")
+TLI_DEFINE_SCALAR_MASS_FUNC("tanh", "__xl_tanh")
+
+#undef TLI_DEFINE_SCALAR_MASS_FUNCS
+#undef TLI_DEFINE_SCALAR_MASS_FUNC

llvm/include/llvm/CodeGen/CommandFlags.h

 bool getEnableUnsafeFPMath();
 
 bool getEnableNoInfsFPMath();
 
 bool getEnableNoNaNsFPMath();
 
 bool getEnableNoSignedZerosFPMath();
 
+bool getEnableApproxFuncFPMath();
+
 bool getEnableNoTrappingFPMath();
 
 DenormalMode::DenormalModeKind getDenormalFPMath();
 DenormalMode::DenormalModeKind getDenormalFP32Math();
 
 bool getEnableHonorSignDependentRoundingFPMath();
 
 llvm::FloatABI::ABIType getFloatABIForCalls();

llvm/include/llvm/IR/Attributes.td

 
 /// Function is required to make Forward Progress.
 def MustProgress : EnumAttr<"mustprogress", [FnAttr]>;
 
 /// Target-independent string attributes.
 def LessPreciseFPMAD : StrBoolAttr<"less-precise-fpmad">;
 def NoInfsFPMath : StrBoolAttr<"no-infs-fp-math">;
 def NoNansFPMath : StrBoolAttr<"no-nans-fp-math">;
+def ApproxFuncFPMath : StrBoolAttr<"approx-func-fp-math">;
 def NoSignedZerosFPMath : StrBoolAttr<"no-signed-zeros-fp-math">;
 def UnsafeFPMath : StrBoolAttr<"unsafe-fp-math">;
 def NoJumpTables : StrBoolAttr<"no-jump-tables">;
 def NoInlineLineTables : StrBoolAttr<"no-inline-line-tables">;
 def ProfileSampleAccurate : StrBoolAttr<"profile-sample-accurate">;
 def UseSampleProfile : StrBoolAttr<"use-sample-profile">;
 
 class CompatRule<string F> {
class MergeRule<string F> {
   // reference to the caller and the second parameter is the reference to the
   // callee.
   string MergeFunc = F;
 }
 
 def : MergeRule<"setAND<LessPreciseFPMADAttr>">;
 def : MergeRule<"setAND<NoInfsFPMathAttr>">;
 def : MergeRule<"setAND<NoNansFPMathAttr>">;
+def : MergeRule<"setAND<ApproxFuncFPMathAttr>">;
 def : MergeRule<"setAND<NoSignedZerosFPMathAttr>">;
 def : MergeRule<"setAND<UnsafeFPMathAttr>">;
 def : MergeRule<"setOR<NoImplicitFloatAttr>">;
 def : MergeRule<"setOR<NoJumpTablesAttr>">;
 def : MergeRule<"setOR<ProfileSampleAccurateAttr>">;
 def : MergeRule<"setOR<SpeculativeLoadHardeningAttr>">;
 def : MergeRule<"adjustCallerSSPLevel">;
 def : MergeRule<"adjustCallerStackProbes">;
 def : MergeRule<"adjustCallerStackProbeSize">;
 def : MergeRule<"adjustMinLegalVectorWidth">;
 def : MergeRule<"adjustNullPointerValidAttr">;
 def : MergeRule<"setAND<MustProgressAttr>">;
 
 // Target dependent attributes
 include "llvm/IR/AttributesAMDGPU.td"

llvm/lib/CodeGen/CommandFlags.cpp

 CGOPT_EXP(CodeModel::Model, CodeModel)
 CGOPT(ExceptionHandling, ExceptionModel)
 CGOPT_EXP(CodeGenFileType, FileType)
 CGOPT(FramePointerKind, FramePointerUsage)
 CGOPT(bool, EnableUnsafeFPMath)
 CGOPT(bool, EnableNoInfsFPMath)
 CGOPT(bool, EnableNoNaNsFPMath)
 CGOPT(bool, EnableNoSignedZerosFPMath)
+CGOPT(bool, EnableApproxFuncFPMath)
 CGOPT(bool, EnableNoTrappingFPMath)
 CGOPT(bool, EnableAIXExtendedAltivecABI)
 CGOPT(DenormalMode::DenormalModeKind, DenormalFPMath)
 CGOPT(DenormalMode::DenormalModeKind, DenormalFP32Math)
 CGOPT(bool, EnableHonorSignDependentRoundingFPMath)
 CGOPT(FloatABI::ABIType, FloatABIForCalls)
 CGOPT(FPOpFusion::FPOpFusionMode, FuseFPOps)
 CGOPT(SwiftAsyncFramePointerMode, SwiftAsyncFramePointer)
#define CGBINDOPT(NAME)                                                        \
 
   static cl::opt<bool> EnableNoSignedZerosFPMath(
       "enable-no-signed-zeros-fp-math",
       cl::desc("Enable FP math optimizations that assume "
                "the sign of 0 is insignificant"),
       cl::init(false));
   CGBINDOPT(EnableNoSignedZerosFPMath);
 
+  static cl::opt<bool> EnableApproxFuncFPMath(
+      "enable-approx-func-fp-math",
+      cl::desc("Enable FP math optimizations that assume approx func"),
+      cl::init(false));
+  CGBINDOPT(EnableApproxFuncFPMath);
+
   static cl::opt<bool> EnableNoTrappingFPMath(
       "enable-no-trapping-fp-math",
       cl::desc("Enable setting the FP exceptions build "
                "attribute not to use exceptions"),
       cl::init(false));
   CGBINDOPT(EnableNoTrappingFPMath);
 
   static const auto DenormFlagEnumOptions =

 TargetOptions
 codegen::InitTargetOptionsFromCodeGenFlags(const Triple &TheTriple) {
   TargetOptions Options;
   Options.AllowFPOpFusion = getFuseFPOps();
   Options.UnsafeFPMath = getEnableUnsafeFPMath();
   Options.NoInfsFPMath = getEnableNoInfsFPMath();
   Options.NoNaNsFPMath = getEnableNoNaNsFPMath();
   Options.NoSignedZerosFPMath = getEnableNoSignedZerosFPMath();
+  Options.ApproxFuncFPMath = getEnableApproxFuncFPMath();
   Options.NoTrappingFPMath = getEnableNoTrappingFPMath();
 
   DenormalMode::DenormalModeKind DenormKind = getDenormalFPMath();
 
   // FIXME: Should have separate input and output flags
   Options.setFPDenormalMode(DenormalMode(DenormKind, DenormKind));
 
   Options.HonorSignDependentRoundingFPMathOption =
NewAttrs.addAttribute("disable-tail-calls",
                           toStringRef(getDisableTailCalls()));
   if (getStackRealign())
     NewAttrs.addAttribute("stackrealign");
 
   HANDLE_BOOL_ATTR(EnableUnsafeFPMathView, "unsafe-fp-math");
   HANDLE_BOOL_ATTR(EnableNoInfsFPMathView, "no-infs-fp-math");
   HANDLE_BOOL_ATTR(EnableNoNaNsFPMathView, "no-nans-fp-math");
   HANDLE_BOOL_ATTR(EnableNoSignedZerosFPMathView, "no-signed-zeros-fp-math");
+  HANDLE_BOOL_ATTR(EnableApproxFuncFPMathView, "approx-func-fp-math");
 
   if (DenormalFPMathView->getNumOccurrences() > 0 &&
       !F.hasFnAttribute("denormal-fp-math")) {
     DenormalMode::DenormalModeKind DenormKind = getDenormalFPMath();
 
     // FIXME: Command line flag should expose separate input/output modes.
     NewAttrs.addAttribute("denormal-fp-math",
                           DenormalMode(DenormKind, DenormKind).str());

llvm/lib/Target/PowerPC/CMakeLists.txt

add_llvm_target(PowerPCCodeGen
   PPCTLSDynamicCall.cpp
   PPCVSXCopy.cpp
   PPCReduceCRLogicals.cpp
   PPCVSXFMAMutate.cpp
   PPCVSXSwapRemoval.cpp
   PPCExpandISEL.cpp
   PPCPreEmitPeephole.cpp
   PPCLowerMASSVEntries.cpp
+  PPCGenScalarMASSEntries.cpp
   GISel/PPCCallLowering.cpp
   GISel/PPCRegisterBankInfo.cpp
   GISel/PPCLegalizerInfo.cpp
 
   LINK_COMPONENTS
   Analysis
   AsmPrinter
   BinaryFormat

llvm/lib/Target/PowerPC/PPC.h

#endif
   void initializePPCExpandAtomicPseudoPass(PassRegistry &);
 
   extern char &PPCVSXFMAMutateID;
 
   ModulePass *createPPCLowerMASSVEntriesPass();
   void initializePPCLowerMASSVEntriesPass(PassRegistry &);
   extern char &PPCLowerMASSVEntriesID;
 
+  ModulePass *createPPCGenScalarMASSEntriesPass();
+  void initializePPCGenScalarMASSEntriesPass(PassRegistry &);
+  extern char &PPCGenScalarMASSEntriesID;
+
   InstructionSelector *
   createPPCInstructionSelector(const PPCTargetMachine &, const PPCSubtarget &,
                                const PPCRegisterBankInfo &);
   namespace PPCII {
 
   /// Target Operand Flag enum.
   enum TOF {
     //===------------------------------------------------------------------===//

llvm/lib/Target/PowerPC/PPCGenScalarMASSEntries.cpp

+//===-- PPCGenScalarMASSEntries.cpp ---------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This transformation converts standard math functions into their
+// corresponding MASS (scalar) entries for PowerPC targets.
+// Following are examples of such conversion:
+//     tanh ---> __xl_tanh_finite
+// Such lowering is legal under the fast-math option.
+//
+//===----------------------------------------------------------------------===//
+
+#include "PPC.h"
+#include "PPCSubtarget.h"
+#include "PPCTargetMachine.h"
+#include "llvm/Analysis/TargetTransformInfo.h"
+#include "llvm/CodeGen/TargetPassConfig.h"
+#include "llvm/IR/Instructions.h"
+#include "llvm/IR/Module.h"
+
+#define DEBUG_TYPE "ppc-gen-scalar-mass"
+
+using namespace llvm;
+
+namespace {
+
+class PPCGenScalarMASSEntries : public ModulePass {
+public:
+  static char ID;
+
+  PPCGenScalarMASSEntries() : ModulePass(ID) {
+    ScalarMASSFuncs = {
+#define TLI_DEFINE_SCALAR_MASS_FUNCS
+#include "llvm/Analysis/ScalarFuncs.def"
+    };
+  }
+
+  bool runOnModule(Module &M) override;
+
+  StringRef getPassName() const override {
+    return "PPC Generate Scalar MASS Entries";
+  }
+
+  void getAnalysisUsage(AnalysisUsage &AU) const override {
+    AU.addRequired<TargetTransformInfoWrapperPass>();
+  }
+
+private:
+  std::map<StringRef, StringRef> ScalarMASSFuncs;
+  bool isCandidateSafeToLower(const CallInst &CI) const;
+  bool isFiniteCallSafe(const CallInst &CI) const;
+  bool createScalarMASSCall(StringRef MASSEntry, CallInst &CI,
+                            Function &Func) const;
+};
+
+} // namespace
+
+// Returns true if 'afn' flag exists on the call instruction with the math
+// function
+bool PPCGenScalarMASSEntries::isCandidateSafeToLower(const CallInst &CI) const {
+  return CI.hasApproxFunc();
+}
+
+// Returns true if 'nnan', 'ninf' and 'nsz' flags exist on the call instruction
+// with the math function
+bool PPCGenScalarMASSEntries::isFiniteCallSafe(const CallInst &CI) const {
+  // FIXME: no-errno and trapping-math need to be set for MASS converstion
+  // but they don't have IR representation.
+  return CI.hasNoNaNs() && CI.hasNoInfs() && CI.hasNoSignedZeros();
+}
+
+/// Lowers scalar math functions to scalar MASS functions.
+///     e.g.: tanh         --> __xl_tanh_finite or __xl_tanh
+/// Both function prototype and its callsite is updated during lowering.
+bool PPCGenScalarMASSEntries::createScalarMASSCall(StringRef MASSEntry,
+                                                   CallInst &CI,
+                                                   Function &Func) const {
+  if (CI.use_empty())
+    return false;
+
+  Module *M = Func.getParent();
+  assert(M && "Expecting a valid Module");
+
+  std::string MASSEntryStr = MASSEntry.str();
+  if (isFiniteCallSafe(CI))
+    MASSEntryStr += "_finite";
+
+  FunctionCallee FCache = M->getOrInsertFunction(
+      MASSEntryStr, Func.getFunctionType(), Func.getAttributes());
+
+  CI.setCalledFunction(FCache);
+
+  return true;
+}
+
+bool PPCGenScalarMASSEntries::runOnModule(Module &M) {
+  bool Changed = false;
+
+  auto *TPC = getAnalysisIfAvailable<TargetPassConfig>();
+  if (!TPC || skipModule(M))
+    return false;
+
+  for (Function &Func : M) {
+    if (!Func.isDeclaration())
+      continue;
+
+    auto Iter = ScalarMASSFuncs.find(Func.getName());
+    if (Iter == ScalarMASSFuncs.end())
+      continue;
+
+    // The call to createScalarMASSCall() invalidates the iterator over users
+    // upon replacing the users. Precomputing the current list of users allows
+    // us to replace all the call sites.
+    SmallVector<User *, 4> TheUsers;
+    for (auto *User : Func.users())
+      TheUsers.push_back(User);
+
+    for (auto *User : TheUsers)
+      if (auto *CI = dyn_cast_or_null<CallInst>(User)) {
+        if (isCandidateSafeToLower(*CI))
+          Changed |= createScalarMASSCall(Iter->second, *CI, Func);
+      }
+  }
+
+  return Changed;
+}
+
+char PPCGenScalarMASSEntries::ID = 0;
+
+char &llvm::PPCGenScalarMASSEntriesID = PPCGenScalarMASSEntries::ID;
+
+INITIALIZE_PASS(PPCGenScalarMASSEntries, DEBUG_TYPE,
+                "Generate Scalar MASS entries", false, false)
+
+ModulePass *llvm::createPPCGenScalarMASSEntriesPass() {
+  return new PPCGenScalarMASSEntries();
+}

llvm/lib/Target/PowerPC/PPCISelLowering.h

private:
     SDValue LowerFunnelShift(SDValue Op, SelectionDAG &DAG) const;
     SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
     SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const;
     SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
     SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
     SDValue LowerINTRINSIC_VOID(SDValue Op, SelectionDAG &DAG) const;
     SDValue LowerBSWAP(SDValue Op, SelectionDAG &DAG) const;
     SDValue LowerATOMIC_CMP_SWAP(SDValue Op, SelectionDAG &DAG) const;
+    SDValue lowerToLibCall(const char *LibCallName, SDValue Op,
+                           SelectionDAG &DAG) const;
+    SDValue lowerLibCall(const char *LibCallFloatName,
+                         const char *LibCallDoubleName, SDValue Op,
+                         SelectionDAG &DAG) const;
+    bool isLowringToMASSFiniteSafe(SDValue Op) const;
+    bool isLowringToMASSSafe(SDValue Op) const;
+    SDValue lowerLibCallBase(const char *LibCallDoubleName,
+                             const char *LibCallFloatName,
+                             const char *LibCallDoubleNameFinite,
+                             const char *LibCallFloatNameFinite, SDValue Op,
+                             SelectionDAG &DAG) const;
+    SDValue lowerPow(SDValue Op, SelectionDAG &DAG) const;
+    SDValue lowerSin(SDValue Op, SelectionDAG &DAG) const;
+    SDValue lowerCos(SDValue Op, SelectionDAG &DAG) const;
+    SDValue lowerLog(SDValue Op, SelectionDAG &DAG) const;
+    SDValue lowerLog10(SDValue Op, SelectionDAG &DAG) const;
+    SDValue lowerExp(SDValue Op, SelectionDAG &DAG) const;
     SDValue LowerATOMIC_LOAD_STORE(SDValue Op, SelectionDAG &DAG) const;
     SDValue LowerSCALAR_TO_VECTOR(SDValue Op, SelectionDAG &DAG) const;
     SDValue LowerMUL(SDValue Op, SelectionDAG &DAG) const;
     SDValue LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const;
     SDValue LowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const;
     SDValue LowerROTL(SDValue Op, SelectionDAG &DAG) const;
 
     SDValue LowerVectorLoad(SDValue Op, SelectionDAG &DAG) const;

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM,
   setOperationAction(ISD::FSINCOS, MVT::f64, Expand);
   setOperationAction(ISD::FREM , MVT::f64, Expand);
   setOperationAction(ISD::FPOW , MVT::f64, Expand);
   setOperationAction(ISD::FSIN , MVT::f32, Expand);
   setOperationAction(ISD::FCOS , MVT::f32, Expand);
   setOperationAction(ISD::FSINCOS, MVT::f32, Expand);
   setOperationAction(ISD::FREM , MVT::f32, Expand);
   setOperationAction(ISD::FPOW , MVT::f32, Expand);
+
+  // MASS transformation for LLVM intrinsics with replicating fast-math flag
+  // to be consistent to PPCGenScalarMASSEntries pass  
+  if (TM.getOptLevel() == CodeGenOpt::Aggressive){
+    setOperationAction(ISD::FSIN , MVT::f64, Custom);
+    setOperationAction(ISD::FCOS , MVT::f64, Custom);
+    setOperationAction(ISD::FPOW , MVT::f64, Custom);
+    setOperationAction(ISD::FLOG, MVT::f64, Custom);
+    setOperationAction(ISD::FLOG10, MVT::f64, Custom);
+    setOperationAction(ISD::FEXP, MVT::f64, Custom);
+    setOperationAction(ISD::FSIN , MVT::f32, Custom);
+    setOperationAction(ISD::FCOS , MVT::f32, Custom);
+    setOperationAction(ISD::FPOW , MVT::f32, Custom);
+    setOperationAction(ISD::FLOG, MVT::f32, Custom);
+    setOperationAction(ISD::FLOG10, MVT::f32, Custom);
+    setOperationAction(ISD::FEXP, MVT::f32, Custom);
+  }
+
   if (Subtarget.hasSPE()) {
     setOperationAction(ISD::FMA  , MVT::f64, Expand);
     setOperationAction(ISD::FMA  , MVT::f32, Expand);
   } else {
     setOperationAction(ISD::FMA  , MVT::f64, Legal);
     setOperationAction(ISD::FMA  , MVT::f32, Legal);
   }
 

   setLibcallName(RTLIB::ROUND_F128, "roundf128");
   setLibcallName(RTLIB::LROUND_F128, "lroundf128");
   setLibcallName(RTLIB::LLROUND_F128, "llroundf128");
   setLibcallName(RTLIB::RINT_F128, "rintf128");
   setLibcallName(RTLIB::LRINT_F128, "lrintf128");
   setLibcallName(RTLIB::LLRINT_F128, "llrintf128");
   setLibcallName(RTLIB::NEARBYINT_F128, "nearbyintf128");
   setLibcallName(RTLIB::FMA_F128, "fmaf128");
 
   // With 32 condition bits, we don't need to sink (and duplicate) compares
   // aggressively in CodeGenPrep.
   if (Subtarget.useCRBits()) {
     setHasMultipleConditionRegisters();
     setJumpIsExpensive();
   }
 
   setMinFunctionAlignment(Align(4));
 
   switch (Subtarget.getCPUDirective()) {
   default: break;
SDValue PPCTargetLowering::LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const {
   llvm_unreachable("ERROR:Should return for all cases within swtich.");
 }
 
 /// LowerOperation - Provide custom lowering hooks for some operations.
 ///
 SDValue PPCTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
   switch (Op.getOpcode()) {
   default: llvm_unreachable("Wasn't expecting to be able to lower this!");
+  case ISD::FPOW:               return lowerPow(Op, DAG);
+  case ISD::FSIN:               return lowerSin(Op, DAG);
+  case ISD::FCOS:               return lowerCos(Op, DAG);
+  case ISD::FLOG:               return lowerLog(Op, DAG);
+  case ISD::FLOG10:             return lowerLog10(Op, DAG);
+  case ISD::FEXP:               return lowerExp(Op, DAG);
   case ISD::ConstantPool:       return LowerConstantPool(Op, DAG);
   case ISD::BlockAddress:       return LowerBlockAddress(Op, DAG);
   case ISD::GlobalAddress:      return LowerGlobalAddress(Op, DAG);
   case ISD::GlobalTLSAddress:   return LowerGlobalTLSAddress(Op, DAG);
   case ISD::JumpTable:          return LowerJumpTable(Op, DAG);
   case ISD::STRICT_FSETCC:
   case ISD::STRICT_FSETCCS:
   case ISD::SETCC:              return LowerSETCC(Op, DAG);
if (PartVT == MVT::f64 &&
     Val = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, Val);
     Val = DAG.getNode(ISD::BITCAST, DL, MVT::f64, Val);
     Parts[0] = Val;
     return true;
   }
   return false;
 }
 
+SDValue PPCTargetLowering::lowerToLibCall(const char *LibCallName, SDValue Op,
+                                          SelectionDAG &DAG) const {
+  const TargetLowering &TLI = DAG.getTargetLoweringInfo();
+  TargetLowering::CallLoweringInfo CLI(DAG);
+  EVT RetVT = Op.getValueType();
+  SDValue Callee =
+      DAG.getExternalSymbol(LibCallName, TLI.getPointerTy(DAG.getDataLayout()));
+  bool SignExtend = TLI.shouldSignExtendTypeInLibCall(RetVT, false);
+  TargetLowering::ArgListTy Args;
+  TargetLowering::ArgListEntry Entry;
+  for (const SDValue &N : Op->op_values()) {
+    EVT ArgVT = N.getValueType();
+    Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext());
+    Entry.Node = N;
+    Entry.Ty = ArgTy;
+    Entry.IsSExt = TLI.shouldSignExtendTypeInLibCall(ArgVT, SignExtend);
+    Entry.IsZExt = !Entry.IsSExt;
+    Args.push_back(Entry);
+  }
+  CLI.setDebugLoc(SDLoc(Op))
+      .setChain(DAG.getEntryNode())
+      .setLibCallee(CallingConv::C, RetVT.getTypeForEVT(*DAG.getContext()),
+                    Callee, std::move(Args))
+      .setTailCall(true)
+      .setSExtResult(SignExtend)
+      .setZExtResult(!SignExtend)
+      .setIsPostTypeLegalization(true);
+  return TLI.LowerCallTo(CLI).first;
+}
+
+SDValue PPCTargetLowering::lowerLibCall(const char *LibCallFloatName,
+                                        const char *LibCallDoubleName,
+                                        SDValue Op, SelectionDAG &DAG) const {
+  if (Op.getValueType() == MVT::f32)
+    return lowerToLibCall(LibCallFloatName, Op, DAG);
+
+  if (Op.getValueType() == MVT::f64)
+    return lowerToLibCall(LibCallDoubleName, Op, DAG);
+
+  return SDValue();
+}
+
+bool PPCTargetLowering::isLowringToMASSFiniteSafe(SDValue Op) const {
+  SDNodeFlags Flags = Op.getNode()->getFlags();
+  return isLowringToMASSSafe(Op) && Flags.hasNoSignedZeros() &&
+         Flags.hasNoNaNs() && Flags.hasNoInfs();
+}
+
+bool PPCTargetLowering::isLowringToMASSSafe(SDValue Op) const {
+  return Op.getNode()->getFlags().hasApproximateFuncs();
+}
+
+SDValue PPCTargetLowering::lowerLibCallBase(const char *LibCallDoubleName,
+                                            const char *LibCallFloatName,
+                                            const char *LibCallDoubleNameFinite,
+                                            const char *LibCallFloatNameFinite,
+                                            SDValue Op,
+                                            SelectionDAG &DAG) const {
+  if (!isLowringToMASSSafe(Op))
+    return SDValue();
+
+  if (!isLowringToMASSFiniteSafe(Op))
+    return lowerLibCall(LibCallFloatName, LibCallDoubleName, Op, DAG);
+
+  return lowerLibCall(LibCallFloatNameFinite, LibCallDoubleNameFinite, Op, DAG);
+}
+
+SDValue PPCTargetLowering::lowerPow(SDValue Op, SelectionDAG &DAG) const {
+  return lowerLibCallBase("__xl_pow", "__xl_powf", "__xl_pow_finite",
+                          "__xl_powf_finite", Op, DAG);
+}
+
+SDValue PPCTargetLowering::lowerSin(SDValue Op, SelectionDAG &DAG) const {
+  return lowerLibCallBase("__xl_sin", "__xl_sinf", "__xl_sin_finite",
+                          "__xl_sinf_finite", Op, DAG);
+}
+
+SDValue PPCTargetLowering::lowerCos(SDValue Op, SelectionDAG &DAG) const {
+  return lowerLibCallBase("__xl_cos", "__xl_cosf", "__xl_cos_finite",
+                          "__xl_cosf_finite", Op, DAG);
+}
+
+SDValue PPCTargetLowering::lowerLog(SDValue Op, SelectionDAG &DAG) const {
+  return lowerLibCallBase("__xl_log", "__xl_logf", "__xl_log_finite",
+                          "__xl_logf_finite", Op, DAG);
+}
+
+SDValue PPCTargetLowering::lowerLog10(SDValue Op, SelectionDAG &DAG) const {
+  return lowerLibCallBase("__xl_log10", "__xl_log10f", "__xl_log10_finite",
+                          "__xl_log10f_finite", Op, DAG);
+}
+
+SDValue PPCTargetLowering::lowerExp(SDValue Op, SelectionDAG &DAG) const {
+  return lowerLibCallBase("__xl_exp", "__xl_expf", "__xl_exp_finite",
+                          "__xl_expf_finite", Op, DAG);
+}
+
 // If we happen to match to an aligned D-Form, check if the Frame Index is
 // adequately aligned. If it is not, reset the mode to match to X-Form.
 static void setXFormForUnalignedFI(SDValue N, unsigned Flags,
                                    PPC::AddrMode &Mode) {
   if (!isa<FrameIndexSDNode>(N))
     return;
   if ((Mode == PPC::AM_DSForm && !(Flags & PPC::MOF_RPlusSImm16Mult4)) ||
       (Mode == PPC::AM_DQForm && !(Flags & PPC::MOF_RPlusSImm16Mult16)))

llvm/lib/Target/PowerPC/PPCTargetMachine.cpp

#endif
   initializePPCBSelPass(PR);
   initializePPCBranchCoalescingPass(PR);
   initializePPCBoolRetToIntPass(PR);
   initializePPCExpandISELPass(PR);
   initializePPCPreEmitPeepholePass(PR);
   initializePPCTLSDynamicCallPass(PR);
   initializePPCMIPeepholePass(PR);
   initializePPCLowerMASSVEntriesPass(PR);
+  initializePPCGenScalarMASSEntriesPass(PR);
   initializePPCExpandAtomicPseudoPass(PR);
   initializeGlobalISel(PR);
 }
 
 static bool isLittleEndianTriple(const Triple &T) {
   return T.getArch() == Triple::ppc64le || T.getArch() == Triple::ppcle;
 }
 

 void PPCPassConfig::addIRPasses() {
   if (TM->getOptLevel() != CodeGenOpt::None)
     addPass(createPPCBoolRetToIntPass());
   addPass(createAtomicExpandPass());
 
   // Lower generic MASSV routines to PowerPC subtarget-specific entries.
   addPass(createPPCLowerMASSVEntriesPass());
 
+  // Generate PowerPC target-specific entries for scalar math functions
+  // that are available in IBM MASS (scalar) library.
+  if (TM->getOptLevel() == CodeGenOpt::Aggressive) {
+    addPass(createPPCGenScalarMASSEntriesPass());
+  }
+
   // If explicitly requested, add explicit data prefetch intrinsics.
   if (EnablePrefetch.getNumOccurrences() > 0)
     addPass(createLoopDataPrefetchPass());
 
   if (TM->getOptLevel() >= CodeGenOpt::Default && EnableGEPOpt) {
     // Call SeparateConstOffsetFromGEP pass to extract constants within indices
     // and lower a GEP with multiple indices to either arithmetic operations or
     // multiple GEPs with single index.

llvm/lib/Target/TargetMachine.cpp

#define RESET_OPTION(X, Y)                                              \
   do {                                                                  \
     Options.X = F.getFnAttribute(Y).getValueAsBool();     \
   } while (0)
 
   RESET_OPTION(UnsafeFPMath, "unsafe-fp-math");
   RESET_OPTION(NoInfsFPMath, "no-infs-fp-math");
   RESET_OPTION(NoNaNsFPMath, "no-nans-fp-math");
   RESET_OPTION(NoSignedZerosFPMath, "no-signed-zeros-fp-math");
+  RESET_OPTION(ApproxFuncFPMath, "approx-func-fp-math");
 }
 
 /// Returns the code generation relocation model. The choices are static, PIC,
 /// and dynamic-no-pic.
 Reloc::Model TargetMachine::getRelocationModel() const { return RM; }
 
 /// Returns the code model. The choices are small, kernel, medium, large, and
 /// target default.

llvm/test/CodeGen/PowerPC/O3-pipeline.ll

 ; CHECK-NEXT: Machine Branch Probability Analysis
 ; CHECK-NEXT: Default Regalloc Eviction Advisor
 ; CHECK-NEXT:   ModulePass Manager
 ; CHECK-NEXT:     Pre-ISel Intrinsic Lowering
 ; CHECK-NEXT:     FunctionPass Manager
 ; CHECK-NEXT:       Convert i1 constants to i32/i64 if they are returned
 ; CHECK-NEXT:       Expand Atomic instructions
 ; CHECK-NEXT:     PPC Lower MASS Entries
+; CHECK-NEXT:     PPC Generate Scalar MASS Entries
 ; CHECK-NEXT:     FunctionPass Manager
 ; CHECK-NEXT:       Dominator Tree Construction
 ; CHECK-NEXT:       Natural Loop Information
 ; CHECK-NEXT:       Scalar Evolution Analysis
 ; CHECK-NEXT:       Split GEPs to a variadic base and a constant offset for better CSE
 ; CHECK-NEXT:       Early CSE
 ; CHECK-NEXT:       Basic Alias Analysis (stateless AA impl)
 ; CHECK-NEXT:       Function Alias Analysis Results

 ; CHECK-NEXT:       PowerPC Branch Selector
 ; CHECK-NEXT:       Lazy Machine Block Frequency Analysis
 ; CHECK-NEXT:       Machine Optimization Remark Emitter
 ; CHECK-NEXT:       Linux PPC Assembly Printer
 ; CHECK-NEXT:       Free MachineFunction
 
 define void @f() {
   ret void
-}
+}
 

llvm/test/CodeGen/PowerPC/lower-intrinsics-afn-mass.ll

+; RUN: llc -O3 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -O3 -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck %s
+
+declare float @llvm.cos.f32(float)
+declare float @llvm.exp.f32(float)
+declare float @llvm.log10.f32(float)
+declare float @llvm.log.f32(float)
+declare float @llvm.pow.f32(float, float)
+declare float @llvm.rint.f32(float)
+declare float @llvm.sin.f32(float)
+declare double @llvm.cos.f64(double)
+declare double @llvm.exp.f64(double)
+declare double @llvm.log.f64(double)
+declare double @llvm.log10.f64(double)
+declare double @llvm.pow.f64(double, double)
+declare double @llvm.sin.f64(double)
+
+; With afn flag specified per-function
+define float @cosf_f32(float %a) #1 {
+; CHECK-LABEL: cosf_f32
+; CHECK: __xl_cosf
+; CHECK: blr
+entry:
+  %0 = tail call afn float @llvm.cos.f32(float %a)
+  ret float %0
+}
+
+; With afn flag specified per-function
+define float @expf_f32(float %a) #1 {
+; CHECK-LABEL: expf_f32
+; CHECK: __xl_expf
+; CHECK: blr
+entry:
+  %0 = tail call afn float @llvm.exp.f32(float %a)
+  ret float %0
+}
+
+; With afn flag specified per-function
+define float @log10f_f32(float %a) #1 {
+; CHECK-LABEL: log10f_f32
+; CHECK: __xl_log10f
+; CHECK: blr
+entry:
+  %0 = tail call afn float @llvm.log10.f32(float %a)
+  ret float %0
+}
+
+; With afn flag specified per-function
+define float @logf_f32(float %a) #1 {
+; CHECK-LABEL: logf_f32
+; CHECK: __xl_logf
+; CHECK: blr
+entry:
+  %0 = tail call afn float @llvm.log.f32(float %a)
+  ret float %0
+}
+
+; With afn flag specified per-function
+define float @powf_f32(float %a, float %b) #1 {
+; CHECK-LABEL: powf_f32
+; CHECK: __xl_powf
+; CHECK: blr
+entry:
+  %0 = tail call afn float @llvm.pow.f32(float %a, float %b)
+  ret float %0
+}
+
+; With afn flag specified per-function
+define float @rintf_f32(float %a) #1 {
+; CHECK-LABEL: rintf_f32
+; CHECK-NOT: bl __xl_rintf
+; CHECK: blr
+entry:
+  %0 = tail call afn float @llvm.rint.f32(float %a)
+  ret float %0
+}
+
+; With afn flag specified per-function
+define float @sinf_f32(float %a) #1 {
+; CHECK-LABEL: sinf_f32
+; CHECK: __xl_sinf
+; CHECK: blr
+entry:
+  %0 = tail call afn float @llvm.sin.f32(float %a)
+  ret float %0
+}
+
+; With afn flag specified per-function
+define double @cos_f64(double %a) #1 {
+; CHECK-LABEL: cos_f64
+; CHECK: __xl_cos
+; CHECK: blr
+entry:
+  %0 = tail call afn double @llvm.cos.f64(double %a)
+  ret double %0
+}
+
+; With afn flag specified per-function
+define double @exp_f64(double %a) #1 {
+; CHECK-LABEL: exp_f64
+; CHECK: __xl_exp
+; CHECK: blr
+entry:
+  %0 = tail call afn double @llvm.exp.f64(double %a)
+  ret double %0
+}
+
+; With afn flag specified per-function
+define double @log_f64(double %a) #1 {
+; CHECK-LABEL: log_f64
+; CHECK: __xl_log
+; CHECK: blr
+entry:
+  %0 = tail call afn double @llvm.log.f64(double %a)
+  ret double %0
+}
+
+; With afn flag specified per-function
+define double @log10_f64(double %a) #1 {
+; CHECK-LABEL: log10_f64
+; CHECK: __xl_log10
+; CHECK: blr
+entry:
+  %0 = tail call afn double @llvm.log10.f64(double %a)
+  ret double %0
+}
+
+; With afn flag specified per-function
+define double @pow_f64(double %a, double %b) #1 {
+; CHECK-LABEL: pow_f64
+; CHECK: __xl_pow
+; CHECK: blr
+entry:
+  %0 = tail call afn double @llvm.pow.f64(double %a, double %b)
+  ret double %0
+}
+
+; With afn flag specified per-function
+define double @sin_f64(double %a) #1 {
+; CHECK-LABEL: sin_f64
+; CHECK: __xl_sin
+; CHECK: blr
+entry:
+  %0 = tail call afn double @llvm.sin.f64(double %a)
+  ret double %0
+}
+
+attributes #1 = { "approx-func-fp-math"="true" }

llvm/test/CodeGen/PowerPC/lower-intrinsics-fast-mass.ll

+; RUN: llc -O3 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -O3 -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck %s
+
+declare float @llvm.cos.f32(float)
+declare float @llvm.exp.f32(float)
+declare float @llvm.log10.f32(float)
+declare float @llvm.log.f32(float)
+declare float @llvm.pow.f32(float, float)
+declare float @llvm.rint.f32(float)
+declare float @llvm.sin.f32(float)
+declare double @llvm.cos.f64(double)
+declare double @llvm.exp.f64(double)
+declare double @llvm.log.f64(double)
+declare double @llvm.log10.f64(double)
+declare double @llvm.pow.f64(double, double)
+declare double @llvm.sin.f64(double)
+
+; With fast-math flag specified per-function
+define float @cosf_f32(float %a) #1 {
+; CHECK-LABEL: cosf_f32
+; CHECK: __xl_cosf_finite
+; CHECK: blr
+entry:
+  %0 = tail call nnan ninf afn nsz float @llvm.cos.f32(float %a)
+  ret float %0
+}
+
+; With fast-math flag specified per-function
+define float @expf_f32(float %a) #1 {
+; CHECK-LABEL: expf_f32
+; CHECK: __xl_expf_finite
+; CHECK: blr
+entry:
+  %0 = tail call nnan ninf afn nsz float @llvm.exp.f32(float %a)
+  ret float %0
+}
+
+; With fast-math flag specified per-function
+define float @log10f_f32(float %a) #1 {
+; CHECK-LABEL: log10f_f32
+; CHECK: __xl_log10f_finite
+; CHECK: blr
+entry:
+  %0 = tail call nnan ninf afn nsz float @llvm.log10.f32(float %a)
+  ret float %0
+}
+
+; With fast-math flag specified per-function
+define float @logf_f32(float %a) #1 {
+; CHECK-LABEL: logf_f32
+; CHECK: __xl_logf_finite
+; CHECK: blr
+entry:
+  %0 = tail call nnan ninf afn nsz float @llvm.log.f32(float %a)
+  ret float %0
+}
+
+; With fast-math flag specified per-function
+define float @powf_f32(float %a, float %b) #1 {
+; CHECK-LABEL: powf_f32
+; CHECK: __xl_powf_finite
+; CHECK: blr
+entry:
+  %0 = tail call nnan ninf afn nsz float @llvm.pow.f32(float %a, float %b)
+  ret float %0
+}
+
+; With fast-math flag specified per-function
+define float @rintf_f32(float %a) #1 {
+; CHECK-LABEL: rintf_f32
+; CHECK-NOT: bl __xl_rintf_finite
+; CHECK: blr
+entry:
+  %0 = tail call nnan ninf afn nsz float @llvm.rint.f32(float %a)
+  ret float %0
+}
+
+; With fast-math flag specified per-function
+define float @sinf_f32(float %a) #1 {
+; CHECK-LABEL: sinf_f32
+; CHECK: __xl_sinf_finite
+; CHECK: blr
+entry:
+  %0 = tail call nnan ninf afn nsz float @llvm.sin.f32(float %a)
+  ret float %0
+}
+
+; With fast-math flag specified per-function
+define double @cos_f64(double %a) #1 {
+; CHECK-LABEL: cos_f64
+; CHECK: __xl_cos_finite
+; CHECK: blr
+entry:
+  %0 = tail call nnan ninf afn nsz double @llvm.cos.f64(double %a)
+  ret double %0
+}
+
+; With fast-math flag specified per-function
+define double @exp_f64(double %a) #1 {
+; CHECK-LABEL: exp_f64
+; CHECK: __xl_exp_finite
+; CHECK: blr
+entry:
+  %0 = tail call nnan ninf afn nsz double @llvm.exp.f64(double %a)
+  ret double %0
+}
+
+; With fast-math flag specified per-function
+define double @log_f64(double %a) #1 {
+; CHECK-LABEL: log_f64
+; CHECK: __xl_log_finite
+; CHECK: blr
+entry:
+  %0 = tail call nnan ninf afn nsz double @llvm.log.f64(double %a)
+  ret double %0
+}
+
+; With fast-math flag specified per-function
+define double @log10_f64(double %a) #1 {
+; CHECK-LABEL: log10_f64
+; CHECK: __xl_log10_finite
+; CHECK: blr
+entry:
+  %0 = tail call nnan ninf afn nsz double @llvm.log10.f64(double %a)
+  ret double %0
+}
+
+; With fast-math flag specified per-function
+define double @pow_f64(double %a, double %b) #1 {
+; CHECK-LABEL: pow_f64
+; CHECK: __xl_pow_finite
+; CHECK: blr
+entry:
+  %0 = tail call nnan ninf afn nsz double @llvm.pow.f64(double %a, double %b)
+  ret double %0
+}
+
+; With fast-math flag specified per-function
+define double @sin_f64(double %a) #1 {
+; CHECK-LABEL: sin_f64
+; CHECK: __xl_sin_finite
+; CHECK: blr
+entry:
+  %0 = tail call nnan ninf afn nsz double @llvm.sin.f64(double %a)
+  ret double %0
+}
+
+attributes #1 = { "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "approx-func-fp-math"="true" }

llvm/test/CodeGen/PowerPC/lower-intrinsics-mass-aix.ll

+; RUN: llc -O3 -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck %s
+
+declare float @llvm.cos.f32(float) 
+declare double @llvm.cos.f64(double) 
+declare float @llvm.exp.f32(float) 
+declare double @llvm.exp.f64(double) 
+declare float @llvm.log10.f32(float) 
+declare double @llvm.log10.f64(double) 
+declare float @llvm.log.f32(float)
+declare double @llvm.log.f64(double) 
+declare float @llvm.pow.f32(float, float) 
+declare double @llvm.pow.f64(double, double) 
+declare float @llvm.rint.f32(float) 
+declare float @llvm.sin.f32(float) 
+declare double @llvm.sin.f64(double) 
+
+define float @cosf_f32(float %a) {
+; CHECK-LABEL: cosf_f32
+; CHECK-NOT: bl __xl_cosf
+; CHECK: blr
+entry:
+  %0 = tail call float @llvm.cos.f32(float %a)
+  ret float %0
+}
+
+define double @cos_f64(double %a) {
+; CHECK-LABEL: cos_f64
+; CHECK-NOT: bl __xl_cos
+; CHECK: blr
+entry:
+  %0 = tail call double @llvm.cos.f64(double %a)
+  ret double %0
+}
+
+define float @expf_f32(float %a) {
+; CHECK-LABEL: expf_f32
+; CHECK-NOT: bl __xl_expf
+; CHECK: blr
+entry:
+  %0 = tail call float @llvm.exp.f32(float %a)
+  ret float %0
+}
+
+define double @exp_f64(double %a) {
+; CHECK-LABEL: exp_f64
+; CHECK-NOT: bl __xl_exp
+; CHECK: blr
+entry:
+  %0 = tail call double @llvm.exp.f64(double %a)
+  ret double %0
+}
+
+define float @log10f_f32(float %a) {
+; CHECK-LABEL: log10f_f32
+; CHECK-NOT: bl __xl_log10f
+; CHECK: blr
+entry:
+  %0 = tail call float @llvm.log10.f32(float %a)
+  ret float %0
+}
+
+define double @log_f64(double %a) {
+; CHECK-LABEL: log_f64
+; CHECK-NOT: bl __xl_log
+; CHECK: blr
+entry:
+  %0 = tail call double @llvm.log.f64(double %a)
+  ret double %0
+}
+
+define float @logf_f32(float %a) {
+; CHECK-LABEL: logf_f32
+; CHECK-NOT: bl __xl_logf
+; CHECK: blr
+entry:
+  %0 = tail call float @llvm.log.f32(float %a)
+  ret float %0
+}
+
+define double @log10_f64(double %a) {
+; CHECK-LABEL: log10_f64
+; CHECK-NOT: bl __xl_log10
+; CHECK: blr
+entry:
+  %0 = tail call double @llvm.log10.f64(double %a)
+  ret double %0
+}
+
+define float @powf_f32(float %a, float %b) {
+; CHECK-LABEL: powf_f32
+; CHECK-NOT: bl __xl_powf
+; CHECK: blr
+entry:
+  %0 = tail call float @llvm.pow.f32(float %a, float %b)
+  ret float %0
+}
+
+define double @pow_f64(double %a, double %b) {
+; CHECK-LABEL: pow_f64
+; CHECK-NOT: bl __xl_pow
+; CHECK: blr
+entry:
+  %0 = tail call double @llvm.pow.f64(double %a, double %b)
+  ret double %0
+}
+
+define float @rintf_f32(float %a) {
+; CHECK-LABEL: rintf_f32
+; CHECK-NOT: bl __xl_rintf
+; CHECK: blr
+entry:
+  %0 = tail call float @llvm.rint.f32(float %a)
+  ret float %0
+}
+
+define float @sinf_f32(float %a) {
+; CHECK-LABEL: sinf_f32
+; CHECK-NOT: bl __xl_sinf
+; CHECK: blr
+entry:
+  %0 = tail call float @llvm.sin.f32(float %a)
+  ret float %0
+}
+
+define double @sin_f64(double %a) {
+; CHECK-LABEL: sin_f64
+; CHECK-NOT: bl __xl_sin
+; CHECK: blr
+entry:
+  %0 = tail call double @llvm.sin.f64(double %a)
+  ret double %0
+}
+

llvm/test/CodeGen/PowerPC/lower-intrinsics-nofast-mass.ll

+; RUN: llc -O3 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
+
+declare float @llvm.cos.f32(float) 
+declare float @llvm.exp.f32(float) 
+declare float @llvm.log10.f32(float) 
+declare float @llvm.log.f32(float) 
+declare float @llvm.pow.f32(float, float) 
+declare float @llvm.rint.f32(float) 
+declare float @llvm.sin.f32(float) 
+declare double @llvm.cos.f64(double) 
+declare double @llvm.exp.f64(double) 
+declare double @llvm.log.f64(double) 
+declare double @llvm.log10.f64(double) 
+declare double @llvm.pow.f64(double, double) 
+declare double @llvm.sin.f64(double) 
+
+
+; With no fast math flag specified per-function
+define float @cosf_f32_nofast(float %a) {
+; CHECK-LABEL: cosf_f32_nofast
+; CHECK-NOT: bl __xl_cosf
+; CHECK: blr
+entry:
+  %0 = tail call float @llvm.cos.f32(float %a)
+  ret float %0
+}
+
+; With no fast math flag specified per-function
+define float @expf_f32_nofast(float %a) {
+; CHECK-LABEL: expf_f32_nofast
+; CHECK-NOT: bl __xl_expf
+; CHECK: blr
+entry:
+  %0 = tail call float @llvm.exp.f32(float %a)
+  ret float %0
+}
+
+; With no fast math flag specified per-function
+define float @log10f_f32_nofast(float %a) {
+; CHECK-LABEL: log10f_f32_nofast
+; CHECK-NOT: bl __xl_log10f
+; CHECK: blr
+entry:
+  %0 = tail call float @llvm.log10.f32(float %a)
+  ret float %0
+}
+
+; With no fast math flag specified per-function
+define float @logf_f32_nofast(float %a) {
+; CHECK-LABEL: logf_f32_nofast
+; CHECK-NOT: bl __xl_logf
+; CHECK: blr
+entry:
+  %0 = tail call float @llvm.log.f32(float %a)
+  ret float %0
+}
+
+; With no fast math flag specified per-function
+define float @powf_f32_nofast(float %a, float %b) {
+; CHECK-LABEL: powf_f32_nofast
+; CHECK-NOT: bl __xl_powf
+; CHECK: blr
+entry:
+  %0 = tail call float @llvm.pow.f32(float %a, float %b)
+  ret float %0
+}
+
+; With no fast math flag specified per-function
+define float @rintf_f32_nofast(float %a) {
+; CHECK-LABEL: rintf_f32_nofast
+; CHECK-NOT: bl __xl_rintf
+; CHECK: blr
+entry:
+  %0 = tail call float @llvm.rint.f32(float %a)
+  ret float %0
+}
+
+; With no fast math flag specified per-function
+define float @sinf_f32_nofast(float %a) {
+; CHECK-LABEL: sinf_f32_nofast
+; CHECK-NOT: bl __xl_sinf
+; CHECK: blr
+entry:
+  %0 = tail call float @llvm.sin.f32(float %a)
+  ret float %0
+}
+
+; With no fast math flag specified per-function
+define double @cos_f64_nofast(double %a) {
+; CHECK-LABEL: cos_f64_nofast
+; CHECK-NOT: bl __xl_cos
+; CHECK: blr
+entry:
+  %0 = tail call double @llvm.cos.f64(double %a)
+  ret double %0
+}
+
+; With no fast math flag specified per-function
+define double @exp_f64_nofast(double %a) {
+; CHECK-LABEL: exp_f64_nofast
+; CHECK-NOT: bl __xl_exp
+; CHECK: blr
+entry:
+  %0 = tail call double @llvm.exp.f64(double %a)
+  ret double %0
+}
+
+; With no fast math flag specified per-function
+define double @log_f64_nofast(double %a) {
+; CHECK-LABEL: log_f64_nofast
+; CHECK-NOT: bl __xl_log
+; CHECK: blr
+entry:
+  %0 = tail call double @llvm.log.f64(double %a)
+  ret double %0
+}
+
+; With no fast math flag specified per-function
+define double @log10_f64_nofast(double %a) {
+; CHECK-LABEL: log10_f64_nofast
+; CHECK-NOT: bl __xl_log10
+; CHECK: blr
+entry:
+  %0 = tail call double @llvm.log10.f64(double %a)
+  ret double %0
+}
+
+; With no fast math flag specified per-function
+define double @pow_f64_nofast(double %a, double %b) {
+; CHECK-LABEL: pow_f64_nofast
+; CHECK-NOT: bl __xl_pow
+; CHECK: blr
+entry:
+  %0 = tail call double @llvm.pow.f64(double %a, double %b)
+  ret double %0
+}
+
+; With no fast math flag specified per-function
+define double @sin_f64_nofast(double %a) {
+; CHECK-LABEL: sin_f64_nofast
+; CHECK-NOT: bl __xl_sin
+; CHECK: blr
+entry:
+  %0 = tail call double @llvm.sin.f64(double %a)
+  ret double %0
+}

llvm/test/CodeGen/PowerPC/lower-scalar-mass-afn.ll

+; RUN: llc -O3 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -O3 -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck %s
+
+declare float @acosf (float);
+declare float @acoshf (float);
+declare float @asinf (float);
+declare float @asinhf (float);
+declare float @atan2f (float, float);
+declare float @atanf (float);
+declare float @atanhf (float);
+declare float @cbrtf (float);
+declare float @copysignf (float, float);
+declare float @cosf (float);
+declare float @coshf (float);
+declare float @erfcf (float);
+declare float @erff (float);
+declare float @expf (float);
+declare float @expm1f (float);
+declare float @hypotf (float, float);
+declare float @lgammaf (float);
+declare float @log10f (float);
+declare float @log1pf (float);
+declare float @logf (float);
+declare float @powf (float, float);
+declare float @rintf (float);
+declare float @sinf (float);
+declare float @sinhf (float);
+declare float @tanf (float);
+declare float @tanhf (float);
+declare double @acos (double);
+declare double @acosh (double);
+declare double @anint (double);
+declare double @asin (double);
+declare double @asinh (double);
+declare double @atan (double);
+declare double @atan2 (double, double);
+declare double @atanh (double);
+declare double @cbrt (double);
+declare double @copysign (double, double);
+declare double @cos (double);
+declare double @cosh (double);
+declare double @cosisin (double);
+declare double @dnint (double);
+declare double @erf (double);
+declare double @erfc (double);
+declare double @exp (double);
+declare double @expm1 (double);
+declare double @hypot (double, double);
+declare double @lgamma (double);
+declare double @log (double);
+declare double @log10 (double);
+declare double @log1p (double);
+declare double @pow (double, double);
+declare double @rsqrt (double);
+declare double @sin (double);
+declare double @sincos (double);
+declare double @sinh (double);
+declare double @sqrt (double);
+declare double @tan (double);
+declare double @tanh (double);
+declare float @__acosf_finite (float);
+declare float @__acoshf_finite (float);
+declare float @__asinf_finite (float);
+declare float @__atan2f_finite (float, float);
+declare float @__atanhf_finite (float);
+declare float @__coshf_finite (float);
+declare float @__expf_finite (float);
+declare float @__logf_finite (float);
+declare float @__log10f_finite (float);
+declare float @__powf_finite (float, float);
+declare float @__sinhf_finite (float);
+declare double @__acos_finite (double);
+declare double @__acosh_finite (double);
+declare double @__asin_finite (double);
+declare double @__atan2_finite (double, double);
+declare double @__atanh_finite (double);
+declare double @__cosh_finite (double);
+declare double @__exp_finite (double);
+declare double @__log_finite (double);
+declare double @__log10_finite (double);
+declare double @__pow_finite (double, double);
+declare double @__sinh_finite (double);
+
+define float @acosf_f32(float %a) #0 {
+; CHECK-LABEL: acosf_f32
+; CHECK: __xl_acosf
+; CHECK: blr
+entry:
+  %call = tail call afn float @acosf(float %a)
+  ret float %call
+}
+
+define float @acoshf_f32(float %a) #0 {
+; CHECK-LABEL: acoshf_f32
+; CHECK: __xl_acoshf
+; CHECK: blr
+entry:
+  %call = tail call afn float @acoshf(float %a)
+  ret float %call
+}
+
+define float @asinf_f32(float %a) #0 {
+; CHECK-LABEL: asinf_f32
+; CHECK: __xl_asinf
+; CHECK: blr
+entry:
+  %call = tail call afn float @asinf(float %a)
+  ret float %call
+}
+
+define float @asinhf_f32(float %a) #0 {
+; CHECK-LABEL: asinhf_f32
+; CHECK: __xl_asinhf
+; CHECK: blr
+entry:
+  %call = tail call afn float @asinhf(float %a)
+  ret float %call
+}
+
+define float @atan2f_f32(float %a, float %b) #0 {
+; CHECK-LABEL: atan2f_f32
+; CHECK: __xl_atan2f
+; CHECK: blr
+entry:
+  %call = tail call afn float @atan2f(float %a, float %b)
+  ret float %call
+}
+
+define float @atanf_f32(float %a) #0 {
+; CHECK-LABEL: atanf_f32
+; CHECK: __xl_atanf
+; CHECK: blr
+entry:
+  %call = tail call afn float @atanf(float %a)
+  ret float %call
+}
+
+define float @atanhf_f32(float %a) #0 {
+; CHECK-LABEL: atanhf_f32
+; CHECK: __xl_atanhf
+; CHECK: blr
+entry:
+  %call = tail call afn float @atanhf(float %a)
+  ret float %call
+}
+
+define float @cbrtf_f32(float %a) #0 {
+; CHECK-LABEL: cbrtf_f32
+; CHECK: __xl_cbrtf
+; CHECK: blr
+entry:
+  %call = tail call afn float @cbrtf(float %a)
+  ret float %call
+}
+
+define float @copysignf_f32(float %a, float %b) #0 {
+; CHECK-LABEL: copysignf_f32
+; CHECK: copysignf
+; CHECK: blr
+entry:
+  %call = tail call afn float @copysignf(float %a, float %b)
+  ret float %call
+}
+
+define float @cosf_f32(float %a) #0 {
+; CHECK-LABEL: cosf_f32
+; CHECK: __xl_cosf
+; CHECK: blr
+entry:
+  %call = tail call afn float @cosf(float %a)
+  ret float %call
+}
+
+define float @coshf_f32(float %a) #0 {
+; CHECK-LABEL: coshf_f32
+; CHECK: __xl_coshf
+; CHECK: blr
+entry:
+  %call = tail call afn float @coshf(float %a)
+  ret float %call
+}
+
+define float @erfcf_f32(float %a) #0 {
+; CHECK-LABEL: erfcf_f32
+; CHECK: __xl_erfcf
+; CHECK: blr
+entry:
+  %call = tail call afn float @erfcf(float %a)
+  ret float %call
+}
+
+define float @erff_f32(float %a) #0 {
+; CHECK-LABEL: erff_f32
+; CHECK: __xl_erff
+; CHECK: blr
+entry:
+  %call = tail call afn float @erff(float %a)
+  ret float %call
+}
+
+define float @expf_f32(float %a) #0 {
+; CHECK-LABEL: expf_f32
+; CHECK: __xl_expf
+; CHECK: blr
+entry:
+  %call = tail call afn float @expf(float %a)
+  ret float %call
+}
+
+define float @expm1f_f32(float %a) #0 {
+; CHECK-LABEL: expm1f_f32
+; CHECK: __xl_expm1f
+; CHECK: blr
+entry:
+  %call = tail call afn float @expm1f(float %a)
+  ret float %call
+}
+
+define float @hypotf_f32(float %a, float %b) #0 {
+; CHECK-LABEL: hypotf_f32
+; CHECK: __xl_hypotf
+; CHECK: blr
+entry:
+  %call = tail call afn float @hypotf(float %a, float %b)
+  ret float %call
+}
+
+define float @lgammaf_f32(float %a) #0 {
+; CHECK-LABEL: lgammaf_f32
+; CHECK: __xl_lgammaf
+; CHECK: blr
+entry:
+  %call = tail call afn float @lgammaf(float %a)
+  ret float %call
+}
+
+define float @log10f_f32(float %a) #0 {
+; CHECK-LABEL: log10f_f32
+; CHECK: __xl_log10f
+; CHECK: blr
+entry:
+  %call = tail call afn float @log10f(float %a)
+  ret float %call
+}
+
+define float @log1pf_f32(float %a) #0 {
+; CHECK-LABEL: log1pf_f32
+; CHECK: __xl_log1pf
+; CHECK: blr
+entry:
+  %call = tail call afn float @log1pf(float %a)
+  ret float %call
+}
+
+define float @logf_f32(float %a) #0 {
+; CHECK-LABEL: logf_f32
+; CHECK: __xl_logf
+; CHECK: blr
+entry:
+  %call = tail call afn float @logf(float %a)
+  ret float %call
+}
+
+define float @powf_f32(float %a, float %b) #0 {
+; CHECK-LABEL: powf_f32
+; CHECK: __xl_powf
+; CHECK: blr
+entry:
+  %call = tail call afn float @powf(float %a, float %b)
+  ret float %call
+}
+
+define float @rintf_f32(float %a) #0 {
+; CHECK-LABEL: rintf_f32
+; CHECK-NOT: __xl_rintf
+; CHECK: blr
+entry:
+  %call = tail call afn float @rintf(float %a)
+  ret float %call
+}
+
+define float @sinf_f32(float %a) #0 {
+; CHECK-LABEL: sinf_f32
+; CHECK: __xl_sinf
+; CHECK: blr
+entry:
+  %call = tail call afn float @sinf(float %a)
+  ret float %call
+}
+
+define float @sinhf_f32(float %a) #0 {
+; CHECK-LABEL: sinhf_f32
+; CHECK: __xl_sinhf
+; CHECK: blr
+entry:
+  %call = tail call afn float @sinhf(float %a)
+  ret float %call
+}
+
+define float @tanf_f32(float %a) #0 {
+; CHECK-LABEL: tanf_f32
+; CHECK: __xl_tanf
+; CHECK: blr
+entry:
+  %call = tail call afn float @tanf(float %a)
+  ret float %call
+}
+
+define float @tanhf_f32(float %a) #0 {
+; CHECK-LABEL: tanhf_f32
+; CHECK: __xl_tanhf
+; CHECK: blr
+entry:
+  %call = tail call afn float @tanhf(float %a)
+  ret float %call
+}
+
+define double @acos_f64(double %a) #0 {
+; CHECK-LABEL: acos_f64
+; CHECK: __xl_acos
+; CHECK: blr
+entry:
+  %call = tail call afn double @acos(double %a)
+  ret double %call
+}
+
+define double @acosh_f64(double %a) #0 {
+; CHECK-LABEL: acosh_f64
+; CHECK: __xl_acosh
+; CHECK: blr
+entry:
+  %call = tail call afn double @acosh(double %a)
+  ret double %call
+}
+
+define double @anint_f64(double %a) #0 {
+; CHECK-LABEL: anint_f64
+; CHECK-NOT: __xl_anint
+; CHECK: blr
+entry:
+  %call = tail call afn double @anint(double %a)
+  ret double %call
+}
+
+define double @asin_f64(double %a) #0 {
+; CHECK-LABEL: asin_f64
+; CHECK: __xl_asin
+; CHECK: blr
+entry:
+  %call = tail call afn double @asin(double %a)
+  ret double %call
+}
+
+define double @asinh_f64(double %a) #0 {
+; CHECK-LABEL: asinh_f64
+; CHECK: __xl_asinh
+; CHECK: blr
+entry:
+  %call = tail call afn double @asinh(double %a)
+  ret double %call
+}
+
+define double @atan_f64(double %a) #0 {
+; CHECK-LABEL: atan_f64
+; CHECK: __xl_atan
+; CHECK: blr
+entry:
+  %call = tail call afn double @atan(double %a)
+  ret double %call
+}
+
+define double @atan2_f64(double %a, double %b) #0 {
+; CHECK-LABEL: atan2_f64
+; CHECK: __xl_atan2
+; CHECK: blr
+entry:
+  %call = tail call afn double @atan2(double %a, double %b)
+  ret double %call
+}
+
+define double @atanh_f64(double %a) #0 {
+; CHECK-LABEL: atanh_f64
+; CHECK: __xl_atanh
+; CHECK: blr
+entry:
+  %call = tail call afn double @atanh(double %a)
+  ret double %call
+}
+
+define double @cbrt_f64(double %a) #0 {
+; CHECK-LABEL: cbrt_f64
+; CHECK: __xl_cbrt
+; CHECK: blr
+entry:
+  %call = tail call afn double @cbrt(double %a)
+  ret double %call
+}
+
+define double @copysign_f64(double %a, double %b) #0 {
+; CHECK-LABEL: copysign_f64
+; CHECK: copysign
+; CHECK: blr
+entry:
+  %call = tail call afn double @copysign(double %a, double %b)
+  ret double %call
+}
+
+define double @cos_f64(double %a) #0 {
+; CHECK-LABEL: cos_f64
+; CHECK: __xl_cos
+; CHECK: blr
+entry:
+  %call = tail call afn double @cos(double %a)
+  ret double %call
+}
+
+define double @cosh_f64(double %a) #0 {
+; CHECK-LABEL: cosh_f64
+; CHECK: __xl_cosh
+; CHECK: blr
+entry:
+  %call = tail call afn double @cosh(double %a)
+  ret double %call
+}
+
+define double @cosisin_f64(double %a) #0 {
+; CHECK-LABEL: cosisin_f64
+; CHECK-NOT: __xl_cosisin
+; CHECK: blr
+entry:
+  %call = tail call afn double @cosisin(double %a)
+  ret double %call
+}
+
+define double @dnint_f64(double %a) #0 {
+; CHECK-LABEL: dnint_f64
+; CHECK-NOT: __xl_dnint
+; CHECK: blr
+entry:
+  %call = tail call afn double @dnint(double %a)
+  ret double %call
+}
+
+define double @erf_f64(double %a) #0 {
+; CHECK-LABEL: erf_f64
+; CHECK: __xl_erf
+; CHECK: blr
+entry:
+  %call = tail call afn double @erf(double %a)
+  ret double %call
+}
+
+define double @erfc_f64(double %a) #0 {
+; CHECK-LABEL: erfc_f64
+; CHECK: __xl_erfc
+; CHECK: blr
+entry:
+  %call = tail call afn double @erfc(double %a)
+  ret double %call
+}
+
+define double @exp_f64(double %a) #0 {
+; CHECK-LABEL: exp_f64
+; CHECK: __xl_exp
+; CHECK: blr
+entry:
+  %call = tail call afn double @exp(double %a)
+  ret double %call
+}
+
+define double @expm1_f64(double %a) #0 {
+; CHECK-LABEL: expm1_f64
+; CHECK: __xl_expm1
+; CHECK: blr
+entry:
+  %call = tail call afn double @expm1(double %a)
+  ret double %call
+}
+
+define double @hypot_f64(double %a, double %b) #0 {
+; CHECK-LABEL: hypot_f64
+; CHECK: __xl_hypot
+; CHECK: blr
+entry:
+  %call = tail call afn double @hypot(double %a, double %b)
+  ret double %call
+}
+
+define double @lgamma_f64(double %a) #0 {
+; CHECK-LABEL: lgamma_f64
+; CHECK: __xl_lgamma
+; CHECK: blr
+entry:
+  %call = tail call afn double @lgamma(double %a)
+  ret double %call
+}
+
+define double @log_f64(double %a) #0 {
+; CHECK-LABEL: log_f64
+; CHECK: __xl_log
+; CHECK: blr
+entry:
+  %call = tail call afn double @log(double %a)
+  ret double %call
+}
+
+define double @log10_f64(double %a) #0 {
+; CHECK-LABEL: log10_f64
+; CHECK: __xl_log10
+; CHECK: blr
+entry:
+  %call = tail call afn double @log10(double %a)
+  ret double %call
+}
+
+define double @log1p_f64(double %a) #0 {
+; CHECK-LABEL: log1p_f64
+; CHECK: __xl_log1p
+; CHECK: blr
+entry:
+  %call = tail call afn double @log1p(double %a)
+  ret double %call
+}
+
+define double @pow_f64(double %a, double %b) #0 {
+; CHECK-LABEL: pow_f64
+; CHECK: __xl_pow
+; CHECK: blr
+entry:
+  %call = tail call afn double @pow(double %a, double %b)
+  ret double %call
+}
+
+define double @rsqrt_f64(double %a) #0 {
+; CHECK-LABEL: rsqrt_f64
+; CHECK: __xl_rsqrt
+; CHECK: blr
+entry:
+  %call = tail call afn double @rsqrt(double %a)
+  ret double %call
+}
+
+define double @sin_f64(double %a) #0 {
+; CHECK-LABEL: sin_f64
+; CHECK: __xl_sin
+; CHECK: blr
+entry:
+  %call = tail call afn double @sin(double %a)
+  ret double %call
+}
+
+define double @sincos_f64(double %a) #0 {
+; CHECK-LABEL: sincos_f64
+; CHECK-NOT: __xl_sincos
+; CHECK: blr
+entry:
+  %call = tail call afn double @sincos(double %a)
+  ret double %call
+}
+
+define double @sinh_f64(double %a) #0 {
+; CHECK-LABEL: sinh_f64
+; CHECK: __xl_sinh
+; CHECK: blr
+entry:
+  %call = tail call afn double @sinh(double %a)
+  ret double %call
+}
+
+define double @sqrt_f64(double %a) #0 {
+; CHECK-LABEL: sqrt_f64
+; CHECK: __xl_sqrt
+; CHECK: blr
+entry:
+  %call = tail call afn double @sqrt(double %a)
+  ret double %call
+}
+
+define double @tan_f64(double %a) #0 {
+; CHECK-LABEL: tan_f64
+; CHECK: __xl_tan
+; CHECK: blr
+entry:
+  %call = tail call afn double @tan(double %a)
+  ret double %call
+}
+
+define double @tanh_f64(double %a) #0 {
+; CHECK-LABEL: tanh_f64
+; CHECK: __xl_tanh
+; CHECK: blr
+entry:
+  %call = tail call afn double @tanh(double %a)
+  ret double %call
+}
+
+define float @__acosf_finite_f32(float %a) #0 {
+; CHECK-LABEL: __acosf_finite_f32
+; CHECK: __xl_acosf
+; CHECK: blr
+entry:
+  %call = tail call afn float @__acosf_finite(float %a)
+  ret float %call
+}
+
+define float @__acoshf_finite_f32(float %a) #0 {
+; CHECK-LABEL: __acoshf_finite_f32
+; CHECK: __xl_acoshf
+; CHECK: blr
+entry:
+  %call = tail call afn float @__acoshf_finite(float %a)
+  ret float %call
+}
+
+define float @__asinf_finite_f32(float %a) #0 {
+; CHECK-LABEL: __asinf_finite_f32
+; CHECK: __xl_asinf
+; CHECK: blr
+entry:
+  %call = tail call afn float @__asinf_finite(float %a)
+  ret float %call
+}
+
+define float @__atan2f_finite_f32(float %a, float %b) #0 {
+; CHECK-LABEL: __atan2f_finite_f32
+; CHECK: __xl_atan2f
+; CHECK: blr
+entry:
+  %call = tail call afn float @__atan2f_finite(float %a, float %b)
+  ret float %call
+}
+
+define float @__atanhf_finite_f32(float %a) #0 {
+; CHECK-LABEL: __atanhf_finite_f32
+; CHECK: __xl_atanhf
+; CHECK: blr
+entry:
+  %call = tail call afn float @__atanhf_finite(float %a)
+  ret float %call
+}
+
+define float @__coshf_finite_f32(float %a) #0 {
+; CHECK-LABEL: __coshf_finite_f32
+; CHECK: __xl_coshf
+; CHECK: blr
+entry:
+  %call = tail call afn float @__coshf_finite(float %a)
+  ret float %call
+}
+define float @__expf_finite_f32(float %a) #0 {
+; CHECK-LABEL: __expf_finite_f32
+; CHECK: __xl_expf
+; CHECK: blr
+entry:
+  %call = tail call afn float @__expf_finite(float %a)
+  ret float %call
+}
+define float @__logf_finite_f32(float %a) #0 {
+; CHECK-LABEL: __logf_finite_f32
+; CHECK: __xl_logf
+; CHECK: blr
+entry:
+  %call = tail call afn float @__logf_finite(float %a)
+  ret float %call
+}
+define float @__log10f_finite_f32(float %a) #0 {
+; CHECK-LABEL: __log10f_finite_f32
+; CHECK: __xl_log10f
+; CHECK: blr
+entry:
+  %call = tail call afn float @__log10f_finite(float %a)
+  ret float %call
+}
+define float @__powf_finite_f32(float %a, float %b) #0 {
+; CHECK-LABEL: __powf_finite_f32
+; CHECK: __xl_powf
+; CHECK: blr
+entry:
+  %call = tail call afn float @__powf_finite(float %a, float %b)
+  ret float %call
+}
+define float @__sinhf_finite_f32(float %a) #0 {
+; CHECK-LABEL: __sinhf_finite_f32
+; CHECK: __xl_sinhf
+; CHECK: blr
+entry:
+  %call = tail call afn float @__sinhf_finite(float %a)
+  ret float %call
+}
+
+define double @__acos_finite_f64(double %a) #0 {
+; CHECK-LABEL: __acos_finite_f64
+; CHECK: __xl_acos
+; CHECK: blr
+entry:
+  %call = tail call afn double @__acos_finite(double %a)
+  ret double %call
+}
+
+define double @__acosh_finite_f64(double %a) #0 {
+; CHECK-LABEL: __acosh_finite_f64
+; CHECK: __xl_acosh
+; CHECK: blr
+entry:
+  %call = tail call afn double @__acosh_finite(double %a)
+  ret double %call
+}
+
+define double @__asin_finite_f64(double %a) #0 {
+; CHECK-LABEL: __asin_finite_f64
+; CHECK: __xl_asin
+; CHECK: blr
+entry:
+  %call = tail call afn double @__asin_finite(double %a)
+  ret double %call
+}
+
+define double @__atan2_finite_f64(double %a, double %b) #0 {
+; CHECK-LABEL: __atan2_finite_f64
+; CHECK: __xl_atan2
+; CHECK: blr
+entry:
+  %call = tail call afn double @__atan2_finite(double %a, double %b)
+  ret double %call
+}
+
+define double @__atanh_finite_f64(double %a) #0 {
+; CHECK-LABEL: __atanh_finite_f64
+; CHECK: __xl_atanh
+; CHECK: blr
+entry:
+  %call = tail call afn double @__atanh_finite(double %a)
+  ret double %call
+}
+
+define double @__cosh_finite_f64(double %a) #0 {
+; CHECK-LABEL: __cosh_finite_f64
+; CHECK: __xl_cosh
+; CHECK: blr
+entry:
+  %call = tail call afn double @__cosh_finite(double %a)
+  ret double %call
+}
+
+define double @__exp_finite_f64(double %a) #0 {
+; CHECK-LABEL: __exp_finite_f64
+; CHECK: __xl_exp
+; CHECK: blr
+entry:
+  %call = tail call afn double @__exp_finite(double %a)
+  ret double %call
+}
+
+define double @__log_finite_f64(double %a) #0 {
+; CHECK-LABEL: __log_finite_f64
+; CHECK: __xl_log
+; CHECK: blr
+entry:
+  %call = tail call afn double @__log_finite(double %a)
+  ret double %call
+}
+
+define double @__log10_finite_f64(double %a) #0 {
+; CHECK-LABEL: __log10_finite_f64
+; CHECK: __xl_log10
+; CHECK: blr
+entry:
+  %call = tail call afn double @__log10_finite(double %a)
+  ret double %call
+}
+
+define double @__pow_finite_f64(double %a, double %b) #0 {
+; CHECK-LABEL: __pow_finite_f64
+; CHECK: __xl_pow
+; CHECK: blr
+entry:
+  %call = tail call afn double @__pow_finite(double %a, double %b)
+  ret double %call
+}
+
+define double @__sinh_finite_f64(double %a) #0 {
+; CHECK-LABEL: __sinh_finite_f64
+; CHECK: __xl_sinh
+; CHECK: blr
+entry:
+  %call = tail call afn double @__sinh_finite(double %a)
+  ret double %call
+}
+
+attributes #0 = { "approx-func-fp-math"="true" }

llvm/test/CodeGen/PowerPC/lower-scalar-mass-fast.ll

+; RUN: llc -O3 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -O3 -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck %s
+
+declare float @acosf (float);
+declare float @acoshf (float);
+declare float @asinf (float);
+declare float @asinhf (float);
+declare float @atan2f (float, float);
+declare float @atanf (float);
+declare float @atanhf (float);
+declare float @cbrtf (float);
+declare float @copysignf (float, float);
+declare float @cosf (float);
+declare float @coshf (float);
+declare float @erfcf (float);
+declare float @erff (float);
+declare float @expf (float);
+declare float @expm1f (float);
+declare float @hypotf (float, float);
+declare float @lgammaf (float);
+declare float @log10f (float);
+declare float @log1pf (float);
+declare float @logf (float);
+declare float @powf (float, float);
+declare float @rintf (float);
+declare float @sinf (float);
+declare float @sinhf (float);
+declare float @tanf (float);
+declare float @tanhf (float);
+declare double @acos (double);
+declare double @acosh (double);
+declare double @anint (double);
+declare double @asin (double);
+declare double @asinh (double);
+declare double @atan (double);
+declare double @atan2 (double);
+declare double @atanh (double);
+declare double @cbrt (double);
+declare double @copysign (double, double);
+declare double @cos (double);
+declare double @cosh (double);
+declare double @cosisin (double);
+declare double @dnint (double);
+declare double @erf (double);
+declare double @erfc (double);
+declare double @exp (double);
+declare double @expm1 (double);
+declare double @hypot (double, double);
+declare double @lgamma (double);
+declare double @log (double);
+declare double @log10 (double);
+declare double @log1p (double);
+declare double @pow (double, double);
+declare double @rsqrt (double);
+declare double @sin (double);
+declare double @sincos (double);
+declare double @sinh (double);
+declare double @sqrt (double);
+declare double @tan (double);
+declare double @tanh (double);
+declare float @__acosf_finite (float);
+declare float @__acoshf_finite (float);
+declare float @__asinf_finite (float);
+declare float @__atan2f_finite (float, float);
+declare float @__atanhf_finite (float);
+declare float @__coshf_finite (float);
+declare float @__expf_finite (float);
+declare float @__logf_finite (float);
+declare float @__log10f_finite (float);
+declare float @__powf_finite (float, float);
+declare float @__sinhf_finite (float);
+declare double @__acos_finite (double);
+declare double @__acosh_finite (double);
+declare double @__asin_finite (double);
+declare double @__atan2_finite (double, double);
+declare double @__atanh_finite (double);
+declare double @__cosh_finite (double);
+declare double @__exp_finite (double);
+declare double @__log_finite (double);
+declare double @__log10_finite (double);
+declare double @__pow_finite (double, double);
+declare double @__sinh_finite (double);
+
+define float @acosf_f32(float %a) #0 {
+; CHECK-LABEL: acosf_f32
+; CHECK: __xl_acosf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @acosf(float %a)
+  ret float %call
+}
+
+define float @acoshf_f32(float %a) #0 {
+; CHECK-LABEL: acoshf_f32
+; CHECK: __xl_acoshf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @acoshf(float %a)
+  ret float %call
+}
+
+define float @asinf_f32(float %a) #0 {
+; CHECK-LABEL: asinf_f32
+; CHECK: __xl_asinf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @asinf(float %a)
+  ret float %call
+}
+
+define float @asinhf_f32(float %a) #0 {
+; CHECK-LABEL: asinhf_f32
+; CHECK: __xl_asinhf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @asinhf(float %a)
+  ret float %call
+}
+
+define float @atan2f_f32(float %a, float %b) #0 {
+; CHECK-LABEL: atan2f_f32
+; CHECK: __xl_atan2f_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @atan2f(float %a, float %b)
+  ret float %call
+}
+
+define float @atanf_f32(float %a) #0 {
+; CHECK-LABEL: atanf_f32
+; CHECK: __xl_atanf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @atanf(float %a)
+  ret float %call
+}
+
+define float @atanhf_f32(float %a) #0 {
+; CHECK-LABEL: atanhf_f32
+; CHECK: __xl_atanhf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @atanhf(float %a)
+  ret float %call
+}
+
+define float @cbrtf_f32(float %a) #0 {
+; CHECK-LABEL: cbrtf_f32
+; CHECK: __xl_cbrtf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @cbrtf(float %a)
+  ret float %call
+}
+
+define float @copysignf_f32(float %a, float %b) #0 {
+; CHECK-LABEL: copysignf_f32
+; CHECK: copysignf
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @copysignf(float %a, float %b)
+  ret float %call
+}
+
+define float @cosf_f32(float %a) #0 {
+; CHECK-LABEL: cosf_f32
+; CHECK: __xl_cosf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @cosf(float %a)
+  ret float %call
+}
+
+define float @coshf_f32(float %a) #0 {
+; CHECK-LABEL: coshf_f32
+; CHECK: __xl_coshf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @coshf(float %a)
+  ret float %call
+}
+
+define float @erfcf_f32(float %a) #0 {
+; CHECK-LABEL: erfcf_f32
+; CHECK: __xl_erfcf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @erfcf(float %a)
+  ret float %call
+}
+
+define float @erff_f32(float %a) #0 {
+; CHECK-LABEL: erff_f32
+; CHECK: __xl_erff_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @erff(float %a)
+  ret float %call
+}
+
+define float @expf_f32(float %a) #0 {
+; CHECK-LABEL: expf_f32
+; CHECK: __xl_expf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @expf(float %a)
+  ret float %call
+}
+
+define float @expm1f_f32(float %a) #0 {
+; CHECK-LABEL: expm1f_f32
+; CHECK: __xl_expm1f_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @expm1f(float %a)
+  ret float %call
+}
+
+define float @hypotf_f32(float %a, float %b) #0 {
+; CHECK-LABEL: hypotf_f32
+; CHECK: __xl_hypotf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @hypotf(float %a, float %b)
+  ret float %call
+}
+
+define float @lgammaf_f32(float %a) #0 {
+; CHECK-LABEL: lgammaf_f32
+; CHECK: __xl_lgammaf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @lgammaf(float %a)
+  ret float %call
+}
+
+define float @log10f_f32(float %a) #0 {
+; CHECK-LABEL: log10f_f32
+; CHECK: __xl_log10f_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @log10f(float %a)
+  ret float %call
+}
+
+define float @log1pf_f32(float %a) #0 {
+; CHECK-LABEL: log1pf_f32
+; CHECK: __xl_log1pf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @log1pf(float %a)
+  ret float %call
+}
+
+define float @logf_f32(float %a) #0 {
+; CHECK-LABEL: logf_f32
+; CHECK: __xl_logf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @logf(float %a)
+  ret float %call
+}
+
+define float @powf_f32(float %a, float %b) #0 {
+; CHECK-LABEL: powf_f32
+; CHECK: __xl_powf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @powf(float %a, float %b)
+  ret float %call
+}
+
+define float @rintf_f32(float %a) #0 {
+; CHECK-LABEL: rintf_f32
+; CHECK-NOT: __xl_rintf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @rintf(float %a)
+  ret float %call
+}
+
+define float @sinf_f32(float %a) #0 {
+; CHECK-LABEL: sinf_f32
+; CHECK: __xl_sinf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @sinf(float %a)
+  ret float %call
+}
+
+define float @sinhf_f32(float %a) #0 {
+; CHECK-LABEL: sinhf_f32
+; CHECK: __xl_sinhf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @sinhf(float %a)
+  ret float %call
+}
+
+define float @tanf_f32(float %a) #0 {
+; CHECK-LABEL: tanf_f32
+; CHECK: __xl_tanf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @tanf(float %a)
+  ret float %call
+}
+
+define float @tanhf_f32(float %a) #0 {
+; CHECK-LABEL: tanhf_f32
+; CHECK: __xl_tanhf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @tanhf(float %a)
+  ret float %call
+}
+
+define double @acos_f64(double %a) #0 {
+; CHECK-LABEL: acos_f64
+; CHECK: __xl_acos_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @acos(double %a)
+  ret double %call
+}
+
+define double @acosh_f64(double %a) #0 {
+; CHECK-LABEL: acosh_f64
+; CHECK: __xl_acosh_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @acosh(double %a)
+  ret double %call
+}
+
+define double @anint_f64(double %a) #0 {
+; CHECK-LABEL: anint_f64
+; CHECK-NOT: __xl_anint_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @anint(double %a)
+  ret double %call
+}
+
+define double @asin_f64(double %a) #0 {
+; CHECK-LABEL: asin_f64
+; CHECK: __xl_asin_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @asin(double %a)
+  ret double %call
+}
+
+define double @asinh_f64(double %a) #0 {
+; CHECK-LABEL: asinh_f64
+; CHECK: __xl_asinh_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @asinh(double %a)
+  ret double %call
+}
+
+define double @atan_f64(double %a) #0 {
+; CHECK-LABEL: atan_f64
+; CHECK: __xl_atan_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @atan(double %a)
+  ret double %call
+}
+
+define double @atan2_f64(double %a) #0 {
+; CHECK-LABEL: atan2_f64
+; CHECK: __xl_atan2_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @atan2(double %a)
+  ret double %call
+}
+
+define double @atanh_f64(double %a) #0 {
+; CHECK-LABEL: atanh_f64
+; CHECK: __xl_atanh_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @atanh(double %a)
+  ret double %call
+}
+
+define double @cbrt_f64(double %a) #0 {
+; CHECK-LABEL: cbrt_f64
+; CHECK: __xl_cbrt_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @cbrt(double %a)
+  ret double %call
+}
+
+define double @copysign_f64(double %a, double %b) #0 {
+; CHECK-LABEL: copysign_f64
+; CHECK: copysign
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @copysign(double %a, double %b)
+  ret double %call
+}
+
+define double @cos_f64(double %a) #0 {
+; CHECK-LABEL: cos_f64
+; CHECK: __xl_cos_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @cos(double %a)
+  ret double %call
+}
+
+define double @cosh_f64(double %a) #0 {
+; CHECK-LABEL: cosh_f64
+; CHECK: __xl_cosh_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @cosh(double %a)
+  ret double %call
+}
+
+define double @cosisin_f64(double %a) #0 {
+; CHECK-LABEL: cosisin_f64
+; CHECK-NOT: __xl_cosisin_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @cosisin(double %a)
+  ret double %call
+}
+
+define double @dnint_f64(double %a) #0 {
+; CHECK-LABEL: dnint_f64
+; CHECK-NOT: __xl_dnint_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @dnint(double %a)
+  ret double %call
+}
+
+define double @erf_f64(double %a) #0 {
+; CHECK-LABEL: erf_f64
+; CHECK: __xl_erf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @erf(double %a)
+  ret double %call
+}
+
+define double @erfc_f64(double %a) #0 {
+; CHECK-LABEL: erfc_f64
+; CHECK: __xl_erfc_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @erfc(double %a)
+  ret double %call
+}
+
+define double @exp_f64(double %a) #0 {
+; CHECK-LABEL: exp_f64
+; CHECK: __xl_exp_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @exp(double %a)
+  ret double %call
+}
+
+define double @expm1_f64(double %a) #0 {
+; CHECK-LABEL: expm1_f64
+; CHECK: __xl_expm1_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @expm1(double %a)
+  ret double %call
+}
+
+define double @hypot_f64(double %a, double %b) #0 {
+; CHECK-LABEL: hypot_f64
+; CHECK: __xl_hypot_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @hypot(double %a, double %b)
+  ret double %call
+}
+
+define double @lgamma_f64(double %a) #0 {
+; CHECK-LABEL: lgamma_f64
+; CHECK: __xl_lgamma_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @lgamma(double %a)
+  ret double %call
+}
+
+define double @log_f64(double %a) #0 {
+; CHECK-LABEL: log_f64
+; CHECK: __xl_log_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @log(double %a)
+  ret double %call
+}
+
+define double @log10_f64(double %a) #0 {
+; CHECK-LABEL: log10_f64
+; CHECK: __xl_log10_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @log10(double %a)
+  ret double %call
+}
+
+define double @log1p_f64(double %a) #0 {
+; CHECK-LABEL: log1p_f64
+; CHECK: __xl_log1p_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @log1p(double %a)
+  ret double %call
+}
+
+define double @pow_f64(double %a, double %b) #0 {
+; CHECK-LABEL: pow_f64
+; CHECK: __xl_pow_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @pow(double %a, double %b)
+  ret double %call
+}
+
+define double @rsqrt_f64(double %a) #0 {
+; CHECK-LABEL: rsqrt_f64
+; CHECK: __xl_rsqrt_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @rsqrt(double %a)
+  ret double %call
+}
+
+define double @sin_f64(double %a) #0 {
+; CHECK-LABEL: sin_f64
+; CHECK: __xl_sin_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @sin(double %a)
+  ret double %call
+}
+
+define double @sincos_f64(double %a) #0 {
+; CHECK-LABEL: sincos_f64
+; CHECK-NOT: __xl_sincos_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @sincos(double %a)
+  ret double %call
+}
+
+define double @sinh_f64(double %a) #0 {
+; CHECK-LABEL: sinh_f64
+; CHECK: __xl_sinh_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @sinh(double %a)
+  ret double %call
+}
+
+define double @sqrt_f64(double %a) #0 {
+; CHECK-LABEL: sqrt_f64
+; CHECK: __xl_sqrt_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @sqrt(double %a)
+  ret double %call
+}
+
+define double @tan_f64(double %a) #0 {
+; CHECK-LABEL: tan_f64
+; CHECK: __xl_tan_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @tan(double %a)
+  ret double %call
+}
+
+define double @tanh_f64(double %a) #0 {
+; CHECK-LABEL: tanh_f64
+; CHECK: __xl_tanh_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @tanh(double %a)
+  ret double %call
+}
+
+define float @__acosf_finite_f32(float %a) #0 {
+; CHECK-LABEL: __acosf_finite_f32
+; CHECK: __xl_acosf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @__acosf_finite(float %a)
+  ret float %call
+}
+
+define float @__acoshf_finite_f32(float %a) #0 {
+; CHECK-LABEL: __acoshf_finite_f32
+; CHECK: __xl_acoshf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @__acoshf_finite(float %a)
+  ret float %call
+}
+
+define float @__asinf_finite_f32(float %a) #0 {
+; CHECK-LABEL: __asinf_finite_f32
+; CHECK: __xl_asinf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @__asinf_finite(float %a)
+  ret float %call
+}
+
+define float @__atan2f_finite_f32(float %a, float %b) #0 {
+; CHECK-LABEL: __atan2f_finite_f32
+; CHECK: __xl_atan2f_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @__atan2f_finite(float %a, float %b)
+  ret float %call
+}
+
+define float @__atanhf_finite_f32(float %a) #0 {
+; CHECK-LABEL: __atanhf_finite_f32
+; CHECK: __xl_atanhf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @__atanhf_finite(float %a)
+  ret float %call
+}
+
+define float @__coshf_finite_f32(float %a) #0 {
+; CHECK-LABEL: __coshf_finite_f32
+; CHECK: __xl_coshf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @__coshf_finite(float %a)
+  ret float %call
+}
+
+define float @__expf_finite_f32(float %a) #0 {
+; CHECK-LABEL: __expf_finite_f32
+; CHECK: __xl_expf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @__expf_finite(float %a)
+  ret float %call
+}
+
+define float @__logf_finite_f32(float %a) #0 {
+; CHECK-LABEL: __logf_finite_f32
+; CHECK: __xl_logf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @__logf_finite(float %a)
+  ret float %call
+}
+
+define float @__log10f_finite_f32(float %a) #0 {
+; CHECK-LABEL: __log10f_finite_f32
+; CHECK: __xl_log10f_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @__log10f_finite(float %a)
+  ret float %call
+}
+
+define float @__powf_finite_f32(float %a, float %b) #0 {
+; CHECK-LABEL: __powf_finite_f32
+; CHECK: __xl_powf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @__powf_finite(float %a, float %b)
+  ret float %call
+}
+
+define float @__sinhf_finite_f32(float %a) #0 {
+; CHECK-LABEL: __sinhf_finite_f32
+; CHECK: __xl_sinhf_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz float @__sinhf_finite(float %a)
+  ret float %call
+}
+
+define double @__acos_finite_f64(double %a) #0 {
+; CHECK-LABEL: __acos_finite_f64
+; CHECK: __xl_acos_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @__acos_finite(double %a)
+  ret double %call
+}
+
+define double @__acosh_finite_f64(double %a) #0 {
+; CHECK-LABEL: __acosh_finite_f64
+; CHECK: __xl_acosh_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @__acosh_finite(double %a)
+  ret double %call
+}
+
+define double @__asin_finite_f64(double %a) #0 {
+; CHECK-LABEL: __asin_finite_f64
+; CHECK: __xl_asin_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @__asin_finite(double %a)
+  ret double %call
+}
+
+define double @__atan2_finite_f64(double %a, double %b) #0 {
+; CHECK-LABEL: __atan2_finite_f64
+; CHECK: __xl_atan2_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @__atan2_finite(double %a, double %b)
+  ret double %call
+}
+
+define double @__atanh_finite_f64(double %a) #0 {
+; CHECK-LABEL: __atanh_finite_f64
+; CHECK: __xl_atanh_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @__atanh_finite(double %a)
+  ret double %call
+}
+
+define double @__cosh_finite_f64(double %a) #0 {
+; CHECK-LABEL: __cosh_finite_f64
+; CHECK: __xl_cosh_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @__cosh_finite(double %a)
+  ret double %call
+}
+
+define double @__exp_finite_f64(double %a) #0 {
+; CHECK-LABEL: __exp_finite_f64
+; CHECK: __xl_exp_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @__exp_finite(double %a)
+  ret double %call
+}
+
+define double @__log_finite_f64(double %a) #0 {
+; CHECK-LABEL: __log_finite_f64
+; CHECK: __xl_log_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @__log_finite(double %a)
+  ret double %call
+}
+
+define double @__log10_finite_f64(double %a) #0 {
+; CHECK-LABEL: __log10_finite_f64
+; CHECK: __xl_log10_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @__log10_finite(double %a)
+  ret double %call
+}
+
+define double @__pow_finite_f64(double %a, double %b) #0 {
+; CHECK-LABEL: __pow_finite_f64
+; CHECK: __xl_pow_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @__pow_finite(double %a, double %b)
+  ret double %call
+}
+
+define double @__sinh_finite_f64(double %a) #0 {
+; CHECK-LABEL: __sinh_finite_f64
+; CHECK: __xl_sinh_finite
+; CHECK: blr
+entry:
+  %call = tail call nnan ninf afn nsz double @__sinh_finite(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @acosf_f32_nofast(float %a) {
+; CHECK-LABEL: acosf_f32_nofast
+; CHECK-NOT: __xl_acosf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @acosf(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @acoshf_f32_nofast(float %a) {
+; CHECK-LABEL: acoshf_f32_nofast
+; CHECK-NOT: __xl_acoshf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @acoshf(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @asinf_f32_nofast(float %a) {
+; CHECK-LABEL: asinf_f32_nofast
+; CHECK-NOT: __xl_asinf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @asinf(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @asinhf_f32_nofast(float %a) {
+; CHECK-LABEL: asinhf_f32_nofast
+; CHECK-NOT: __xl_asinhf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @asinhf(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @atan2f_f32_nofast(float %a, float %b) {
+; CHECK-LABEL: atan2f_f32_nofast
+; CHECK-NOT: __xl_atan2f_finite
+; CHECK: blr
+entry:
+  %call = tail call float @atan2f(float %a, float %b)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @atanf_f32_nofast(float %a) {
+; CHECK-LABEL: atanf_f32_nofast
+; CHECK-NOT: __xl_atanf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @atanf(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @atanhf_f32_nofast(float %a) {
+; CHECK-LABEL: atanhf_f32_nofast
+; CHECK-NOT: __xl_atanhf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @atanhf(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @cbrtf_f32_nofast(float %a) {
+; CHECK-LABEL: cbrtf_f32_nofast
+; CHECK-NOT: __xl_cbrtf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @cbrtf(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @copysignf_f32_nofast(float %a, float %b) {
+; CHECK-LABEL: copysignf_f32_nofast
+; CHECK-NOT: __xl_copysignf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @copysignf(float %a, float %b)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @cosf_f32_nofast(float %a) {
+; CHECK-LABEL: cosf_f32_nofast
+; CHECK-NOT: __xl_cosf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @cosf(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @coshf_f32_nofast(float %a) {
+; CHECK-LABEL: coshf_f32_nofast
+; CHECK-NOT: __xl_coshf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @coshf(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @erfcf_f32_nofast(float %a) {
+; CHECK-LABEL: erfcf_f32_nofast
+; CHECK-NOT: __xl_erfcf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @erfcf(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @erff_f32_nofast(float %a) {
+; CHECK-LABEL: erff_f32_nofast
+; CHECK-NOT: __xl_erff_finite
+; CHECK: blr
+entry:
+  %call = tail call float @erff(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @expf_f32_nofast(float %a) {
+; CHECK-LABEL: expf_f32_nofast
+; CHECK-NOT: __xl_expf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @expf(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @expm1f_f32_nofast(float %a) {
+; CHECK-LABEL: expm1f_f32_nofast
+; CHECK-NOT: __xl_expm1f_finite
+; CHECK: blr
+entry:
+  %call = tail call float @expm1f(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @hypotf_f32_nofast(float %a, float %b) {
+; CHECK-LABEL: hypotf_f32_nofast
+; CHECK-NOT: __xl_hypotf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @hypotf(float %a, float %b)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @lgammaf_f32_nofast(float %a) {
+; CHECK-LABEL: lgammaf_f32_nofast
+; CHECK-NOT: __xl_lgammaf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @lgammaf(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @log10f_f32_nofast(float %a) {
+; CHECK-LABEL: log10f_f32_nofast
+; CHECK-NOT: __xl_log10f_finite
+; CHECK: blr
+entry:
+  %call = tail call float @log10f(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @log1pf_f32_nofast(float %a) {
+; CHECK-LABEL: log1pf_f32_nofast
+; CHECK-NOT: __xl_log1pf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @log1pf(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @logf_f32_nofast(float %a) {
+; CHECK-LABEL: logf_f32_nofast
+; CHECK-NOT: __xl_logf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @logf(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @powf_f32_nofast(float %a, float %b) {
+; CHECK-LABEL: powf_f32_nofast
+; CHECK-NOT: __xl_powf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @powf(float %a, float %b)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @rintf_f32_nofast(float %a) {
+; CHECK-LABEL: rintf_f32_nofast
+; CHECK-NOT: __xl_rintf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @rintf(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @sinf_f32_nofast(float %a) {
+; CHECK-LABEL: sinf_f32_nofast
+; CHECK-NOT: __xl_sinf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @sinf(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @sinhf_f32_nofast(float %a) {
+; CHECK-LABEL: sinhf_f32_nofast
+; CHECK-NOT: __xl_sinhf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @sinhf(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @tanf_f32_nofast(float %a) {
+; CHECK-LABEL: tanf_f32_nofast
+; CHECK-NOT: __xl_tanf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @tanf(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @tanhf_f32_nofast(float %a) {
+; CHECK-LABEL: tanhf_f32_nofast
+; CHECK-NOT: __xl_tanhf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @tanhf(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @acos_f64_nofast(double %a) {
+; CHECK-LABEL: acos_f64_nofast
+; CHECK-NOT: __xl_acos_finite
+; CHECK: blr
+entry:
+  %call = tail call double @acos(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @acosh_f64_nofast(double %a) {
+; CHECK-LABEL: acosh_f64_nofast
+; CHECK-NOT: __xl_acosh_finite
+; CHECK: blr
+entry:
+  %call = tail call double @acosh(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @anint_f64_nofast(double %a) {
+; CHECK-LABEL: anint_f64_nofast
+; CHECK-NOT: __xl_anint_finite
+; CHECK: blr
+entry:
+  %call = tail call double @anint(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @asin_f64_nofast(double %a) {
+; CHECK-LABEL: asin_f64_nofast
+; CHECK-NOT: __xl_asin_finite
+; CHECK: blr
+entry:
+  %call = tail call double @asin(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @asinh_f64_nofast(double %a) {
+; CHECK-LABEL: asinh_f64_nofast
+; CHECK-NOT: __xl_asinh_finite
+; CHECK: blr
+entry:
+  %call = tail call double @asinh(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @atan_f64_nofast(double %a) {
+; CHECK-LABEL: atan_f64_nofast
+; CHECK-NOT: __xl_atan_finite
+; CHECK: blr
+entry:
+  %call = tail call double @atan(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @atan2_f64_nofast(double %a) {
+; CHECK-LABEL: atan2_f64_nofast
+; CHECK-NOT: __xl_atan2_finite
+; CHECK: blr
+entry:
+  %call = tail call double @atan2(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @atanh_f64_nofast(double %a) {
+; CHECK-LABEL: atanh_f64_nofast
+; CHECK-NOT: __xl_atanh_finite
+; CHECK: blr
+entry:
+  %call = tail call double @atanh(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @cbrt_f64_nofast(double %a) {
+; CHECK-LABEL: cbrt_f64_nofast
+; CHECK-NOT: __xl_cbrt_finite
+; CHECK: blr
+entry:
+  %call = tail call double @cbrt(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @copysign_f64_nofast(double %a, double %b) {
+; CHECK-LABEL: copysign_f64_nofast
+; CHECK-NOT: __xl_copysign_finite
+; CHECK: blr
+entry:
+  %call = tail call double @copysign(double %a, double %b)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @cos_f64_nofast(double %a) {
+; CHECK-LABEL: cos_f64_nofast
+; CHECK-NOT: __xl_cos_finite
+; CHECK: blr
+entry:
+  %call = tail call double @cos(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @cosh_f64_nofast(double %a) {
+; CHECK-LABEL: cosh_f64_nofast
+; CHECK-NOT: __xl_cosh_finite
+; CHECK: blr
+entry:
+  %call = tail call double @cosh(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @cosisin_f64_nofast(double %a) {
+; CHECK-LABEL: cosisin_f64_nofast
+; CHECK-NOT: __xl_cosisin_finite
+; CHECK: blr
+entry:
+  %call = tail call double @cosisin(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @dnint_f64_nofast(double %a) {
+; CHECK-LABEL: dnint_f64_nofast
+; CHECK-NOT: __xl_dnint_finite
+; CHECK: blr
+entry:
+  %call = tail call double @dnint(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @erf_f64_nofast(double %a) {
+; CHECK-LABEL: erf_f64_nofast
+; CHECK-NOT: __xl_erf_finite
+; CHECK: blr
+entry:
+  %call = tail call double @erf(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @erfc_f64_nofast(double %a) {
+; CHECK-LABEL: erfc_f64_nofast
+; CHECK-NOT: __xl_erfc_finite
+; CHECK: blr
+entry:
+  %call = tail call double @erfc(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @exp_f64_nofast(double %a) {
+; CHECK-LABEL: exp_f64_nofast
+; CHECK-NOT: __xl_exp_finite
+; CHECK: blr
+entry:
+  %call = tail call double @exp(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @expm1_f64_nofast(double %a) {
+; CHECK-LABEL: expm1_f64_nofast
+; CHECK-NOT: __xl_expm1_finite
+; CHECK: blr
+entry:
+  %call = tail call double @expm1(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @hypot_f64_nofast(double %a, double %b) {
+; CHECK-LABEL: hypot_f64_nofast
+; CHECK-NOT: __xl_hypot_finite
+; CHECK: blr
+entry:
+  %call = tail call double @hypot(double %a, double %b)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @lgamma_f64_nofast(double %a) {
+; CHECK-LABEL: lgamma_f64_nofast
+; CHECK-NOT: __xl_lgamma_finite
+; CHECK: blr
+entry:
+  %call = tail call double @lgamma(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @log_f64_nofast(double %a) {
+; CHECK-LABEL: log_f64_nofast
+; CHECK-NOT: __xl_log_finite
+; CHECK: blr
+entry:
+  %call = tail call double @log(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @log10_f64_nofast(double %a) {
+; CHECK-LABEL: log10_f64_nofast
+; CHECK-NOT: __xl_log10_finite
+; CHECK: blr
+entry:
+  %call = tail call double @log10(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @log1p_f64_nofast(double %a) {
+; CHECK-LABEL: log1p_f64_nofast
+; CHECK-NOT: __xl_log1p_finite
+; CHECK: blr
+entry:
+  %call = tail call double @log1p(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @pow_f64_nofast(double %a, double %b) {
+; CHECK-LABEL: pow_f64_nofast
+; CHECK-NOT: __xl_pow_finite
+; CHECK: blr
+entry:
+  %call = tail call double @pow(double %a, double %b)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @rsqrt_f64_nofast(double %a) {
+; CHECK-LABEL: rsqrt_f64_nofast
+; CHECK-NOT: __xl_rsqrt_finite
+; CHECK: blr
+entry:
+  %call = tail call double @rsqrt(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @sin_f64_nofast(double %a) {
+; CHECK-LABEL: sin_f64_nofast
+; CHECK-NOT: __xl_sin_finite
+; CHECK: blr
+entry:
+  %call = tail call double @sin(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @sincos_f64_nofast(double %a) {
+; CHECK-LABEL: sincos_f64_nofast
+; CHECK-NOT: __xl_sincos_finite
+; CHECK: blr
+entry:
+  %call = tail call double @sincos(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @sinh_f64_nofast(double %a) {
+; CHECK-LABEL: sinh_f64_nofast
+; CHECK-NOT: __xl_sinh_finite
+; CHECK: blr
+entry:
+  %call = tail call double @sinh(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @sqrt_f64_nofast(double %a) {
+; CHECK-LABEL: sqrt_f64_nofast
+; CHECK-NOT: __xl_sqrt_finite
+; CHECK: blr
+entry:
+  %call = tail call double @sqrt(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @tan_f64_nofast(double %a) {
+; CHECK-LABEL: tan_f64_nofast
+; CHECK-NOT: __xl_tan_finite
+; CHECK: blr
+entry:
+  %call = tail call double @tan(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @tanh_f64_nofast(double %a) {
+; CHECK-LABEL: tanh_f64_nofast
+; CHECK-NOT: __xl_tanh_finite
+; CHECK: blr
+entry:
+  %call = tail call double @tanh(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @__acosf_finite_f32_nofast(float %a) #0 {
+; CHECK-LABEL: __acosf_finite_f32_nofast
+; CHECK-NOT: __xl_acosf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @__acosf_finite(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @__acoshf_finite_f32_nofast(float %a) #0 {
+; CHECK-LABEL: __acoshf_finite_f32_nofast
+; CHECK-NOT: __xl_acoshf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @__acoshf_finite(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @__asinf_finite_f32_nofast(float %a) #0 {
+; CHECK-LABEL: __asinf_finite_f32_nofast
+; CHECK-NOT: __xl_asinf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @__asinf_finite(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @__atan2f_finite_f32_nofast(float %a, float %b) #0 {
+; CHECK-LABEL: __atan2f_finite_f32_nofast
+; CHECK-NOT: __xl_atan2f_finite
+; CHECK: blr
+entry:
+  %call = tail call float @__atan2f_finite(float %a, float %b)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @__atanhf_finite_f32_nofast(float %a) #0 {
+; CHECK-LABEL: __atanhf_finite_f32_nofast
+; CHECK-NOT: __xl_atanhf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @__atanhf_finite(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @__coshf_finite_f32_nofast(float %a) #0 {
+; CHECK-LABEL: __coshf_finite_f32_nofast
+; CHECK-NOT: __xl_coshf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @__coshf_finite(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @__expf_finite_f32_nofast(float %a) #0 {
+; CHECK-LABEL: __expf_finite_f32_nofast
+; CHECK-NOT: __xl_expf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @__expf_finite(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @__logf_finite_f32_nofast(float %a) #0 {
+; CHECK-LABEL: __logf_finite_f32_nofast
+; CHECK-NOT: __xl_logf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @__logf_finite(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @__log10f_finite_f32_nofast(float %a) #0 {
+; CHECK-LABEL: __log10f_finite_f32_nofast
+; CHECK-NOT: __xl_log10f_finite
+; CHECK: blr
+entry:
+  %call = tail call float @__log10f_finite(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @__powf_finite_f32_nofast(float %a, float %b) #0 {
+; CHECK-LABEL: __powf_finite_f32_nofast
+; CHECK-NOT: __xl_powf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @__powf_finite(float %a, float %b)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define float @__sinhf_finite_f32_nofast(float %a) #0 {
+; CHECK-LABEL: __sinhf_finite_f32_nofast
+; CHECK-NOT: __xl_sinhf_finite
+; CHECK: blr
+entry:
+  %call = tail call float @__sinhf_finite(float %a)
+  ret float %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @__acos_finite_f64_nofast(double %a) #0 {
+; CHECK-LABEL: __acos_finite_f64_nofast
+; CHECK-NOT: __xl_acos_finite
+; CHECK: blr
+entry:
+  %call = tail call double @__acos_finite(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @__acosh_finite_f64_nofast(double %a) #0 {
+; CHECK-LABEL: __acosh_finite_f64_nofast
+; CHECK-NOT: __xl_acosh_finite
+; CHECK: blr
+entry:
+  %call = tail call double @__acosh_finite(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @__asin_finite_f64_nofast(double %a) #0 {
+; CHECK-LABEL: __asin_finite_f64_nofast
+; CHECK-NOT: __xl_asin_finite
+; CHECK: blr
+entry:
+  %call = tail call double @__asin_finite(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @__atan2_finite_f64_nofast(double %a, double %b) #0 {
+; CHECK-LABEL: __atan2_finite_f64_nofast
+; CHECK-NOT: __xl_atan2_finite
+; CHECK: blr
+entry:
+  %call = tail call double @__atan2_finite(double %a, double %b)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @__atanh_finite_f64_nofast(double %a) #0 {
+; CHECK-LABEL: __atanh_finite_f64_nofast
+; CHECK-NOT: __xl_atanh_finite
+; CHECK: blr
+entry:
+  %call = tail call double @__atanh_finite(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @__cosh_finite_f64_nofast(double %a) #0 {
+; CHECK-LABEL: __cosh_finite_f64_nofast
+; CHECK-NOT: __xl_cosh_finite
+; CHECK: blr
+entry:
+  %call = tail call double @__cosh_finite(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @__exp_finite_f64_nofast(double %a) #0 {
+; CHECK-LABEL: __exp_finite_f64_nofast
+; CHECK-NOT: __xl_exp_finite
+; CHECK: blr
+entry:
+  %call = tail call double @__exp_finite(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @__log_finite_f64_nofast(double %a) #0 {
+; CHECK-LABEL: __log_finite_f64_nofast
+; CHECK-NOT: __xl_log_finite
+; CHECK: blr
+entry:
+  %call = tail call double @__log_finite(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @__log10_finite_f64_nofast(double %a) #0 {
+; CHECK-LABEL: __log10_finite_f64_nofast
+; CHECK-NOT: __xl_log10_finite
+; CHECK: blr
+entry:
+  %call = tail call double @__log10_finite(double %a)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @__pow_finite_f64_nofast(double %a, double %b) #0 {
+; CHECK-LABEL: __pow_finite_f64_nofast
+; CHECK-NOT: __xl_pow_finite
+; CHECK: blr
+entry:
+  %call = tail call double @__pow_finite(double %a, double %b)
+  ret double %call
+}
+
+; Without nnan ninf afn nsz flags on the call instruction
+define double @__sinh_finite_f64_nofast(double %a) #0 {
+; CHECK-LABEL: __sinh_finite_f64_nofast
+; CHECK-NOT: __xl_sinh_finite
+; CHECK: blr
+entry:
+  %call = tail call double @__sinh_finite(double %a)
+  ret double %call
+}
+

llvm/test/CodeGen/PowerPC/pow-025-075-intrinsic-scalar-mass-afn.ll

+; RUN: llc -verify-machineinstrs -O3 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck --check-prefix=CHECK-LNX %s
+; RUN: llc -verify-machineinstrs -O3 -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefix=CHECK-AIX %s
+
+declare float @llvm.pow.f32 (float, float);
+declare double @llvm.pow.f64 (double, double);
+
+; afn flag powf with 0.25
+define float @llvmintr_powf_f32_afn025(float %a) #1 {
+; CHECK-LNX-LABEL: llvmintr_powf_f32_afn025:
+; CHECK-LNX:       bl __xl_powf
+; CHECK-LNX:       blr
+;
+; CHECK-AIX-LABEL: llvmintr_powf_f32_afn025:
+; CHECK-AIX:       bl .__xl_powf[PR]
+; CHECK-AIX:       blr
+entry:
+  %call = tail call afn float @llvm.pow.f32(float %a, float 2.500000e-01)
+  ret float %call
+}
+
+; afn flag pow with 0.25
+define double @llvmintr_pow_f64_afn025(double %a) #1 {
+; CHECK-LNX-LABEL: llvmintr_pow_f64_afn025:
+; CHECK-LNX:       bl __xl_pow
+; CHECK-LNX:       blr
+;
+; CHECK-AIX-LABEL: llvmintr_pow_f64_afn025:
+; CHECK-AIX:       bl .__xl_pow[PR]
+; CHECK-AIX:       blr
+entry:
+  %call = tail call afn double @llvm.pow.f64(double %a, double 2.500000e-01)
+  ret double %call
+}
+
+; afn flag powf with 0.75
+define float @llvmintr_powf_f32_afn075(float %a) #1 {
+; CHECK-LNX-LABEL: llvmintr_powf_f32_afn075:
+; CHECK-LNX:       bl __xl_powf
+; CHECK-LNX:       blr
+;
+; CHECK-AIX-LABEL: llvmintr_powf_f32_afn075:
+; CHECK-AIX:       # %bb.0: # %entry
+; CHECK-AIX:       bl .__xl_powf[PR]
+; CHECK-AIX:       blr
+entry:
+  %call = tail call afn float @llvm.pow.f32(float %a, float 7.500000e-01)
+  ret float %call
+}
+
+; afn flag pow with 0.75
+define double @llvmintr_pow_f64_afn075(double %a) #1 {
+; CHECK-LNX-LABEL: llvmintr_pow_f64_afn075:
+; CHECK-LNX:       bl __xl_pow
+; CHECK-LNX:       blr
+;
+; CHECK-AIX-LABEL: llvmintr_pow_f64_afn075:
+; CHECK-AIX:       bl .__xl_pow[PR]
+; CHECK-AIX:       blr
+entry:
+  %call = tail call afn double @llvm.pow.f64(double %a, double 7.500000e-01)
+  ret double %call
+}
+
+; afn flag powf with 0.50
+define float @llvmintr_powf_f32_afn050(float %a) #1 {
+; CHECK-LNX-LABEL: llvmintr_powf_f32_afn050:
+; CHECK-LNX:       # %bb.0: # %entry
+; CHECK-LNX:       bl __xl_powf
+; CHECK-LNX:       blr
+;
+; CHECK-AIX-LABEL: llvmintr_powf_f32_afn050:
+; CHECK-AIX:       # %bb.0: # %entry
+; CHECK-AIX:       bl .__xl_powf[PR]
+; CHECK-AIX:       blr
+entry:
+  %call = tail call afn float @llvm.pow.f32(float %a, float 5.000000e-01)
+  ret float %call
+}
+
+; afn flag pow with 0.50
+define double @llvmintr_pow_f64_afn050(double %a) #1 {
+; CHECK-LNX-LABEL: llvmintr_pow_f64_afn050:
+; CHECK-LNX:       # %bb.0: # %entry
+; CHECK-LNX:       bl __xl_pow
+; CHECK-LNX:       blr
+;
+; CHECK-AIX-LABEL: llvmintr_pow_f64_afn050:
+; CHECK-AIX:       # %bb.0: # %entry
+; CHECK-AIX:       bl .__xl_pow[PR]
+; CHECK-AIX:       blr
+entry:
+  %call = tail call afn double @llvm.pow.f64(double %a, double 5.000000e-01)
+  ret double %call
+}
+attributes #1 = { "approx-func-fp-math"="true" }

llvm/test/CodeGen/PowerPC/pow-025-075-intrinsic-scalar-mass-fast.ll

+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -O3 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck --check-prefix=CHECK-LNX %s
+; RUN: llc -verify-machineinstrs -O3 -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefix=CHECK-AIX %s
+
+declare float @llvm.pow.f32 (float, float);
+declare double @llvm.pow.f64 (double, double);
+
+; fast-math powf with 0.25
+define float @llvmintr_powf_f32_fast025(float %a) #1 {
+; CHECK-LNX-LABEL: llvmintr_powf_f32_fast025:
+; CHECK-LNX:       # %bb.0: # %entry
+; CHECK-LNX-NEXT:    xsrsqrtesp 0, 1
+; CHECK-LNX-NEXT:    addis 3, 2, .LCPI0_0@toc@ha
+; CHECK-LNX-NEXT:    lfs 3, .LCPI0_0@toc@l(3)
+; CHECK-LNX-NEXT:    addis 3, 2, .LCPI0_1@toc@ha
+; CHECK-LNX-NEXT:    lfs 4, .LCPI0_1@toc@l(3)
+; CHECK-LNX-NEXT:    addis 3, 2, .LCPI0_2@toc@ha
+; CHECK-LNX-NEXT:    lfs 5, .LCPI0_2@toc@l(3)
+; CHECK-LNX-NEXT:    xsmulsp 2, 1, 0
+; CHECK-LNX-NEXT:    xsabsdp 1, 1
+; CHECK-LNX-NEXT:    xsmulsp 0, 2, 0
+; CHECK-LNX-NEXT:    xsmulsp 2, 2, 3
+; CHECK-LNX-NEXT:    xssubsp 1, 1, 5
+; CHECK-LNX-NEXT:    xsaddsp 0, 0, 4
+; CHECK-LNX-NEXT:    xsmulsp 0, 2, 0
+; CHECK-LNX-NEXT:    xxlxor 2, 2, 2
+; CHECK-LNX-NEXT:    fsel 0, 1, 0, 2
+; CHECK-LNX-NEXT:    xsrsqrtesp 1, 0
+; CHECK-LNX-NEXT:    xsmulsp 6, 0, 1
+; CHECK-LNX-NEXT:    xsabsdp 0, 0
+; CHECK-LNX-NEXT:    xsmulsp 1, 6, 1
+; CHECK-LNX-NEXT:    xsmulsp 3, 6, 3
+; CHECK-LNX-NEXT:    xssubsp 0, 0, 5
+; CHECK-LNX-NEXT:    xsaddsp 1, 1, 4
+; CHECK-LNX-NEXT:    xsmulsp 1, 3, 1
+; CHECK-LNX-NEXT:    fsel 1, 0, 1, 2
+; CHECK-LNX-NEXT:    blr
+;
+; CHECK-AIX-LABEL: llvmintr_powf_f32_fast025:
+; CHECK-AIX:       # %bb.0: # %entry
+; CHECK-AIX-NEXT:    mflr 0
+; CHECK-AIX-NEXT:    stw 0, 8(1)
+; CHECK-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-AIX-NEXT:    lwz 3, L..C0(2) # %const.0
+; CHECK-AIX-NEXT:    lfs 2, 0(3)
+; CHECK-AIX-NEXT:    bl .__xl_powf_finite[PR]
+; CHECK-AIX-NEXT:    nop
+; CHECK-AIX-NEXT:    addi 1, 1, 64
+; CHECK-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-AIX-NEXT:    mtlr 0
+; CHECK-AIX-NEXT:    blr
+entry:
+  %call = tail call nnan ninf afn nsz float @llvm.pow.f32(float %a, float 2.500000e-01)
+  ret float %call
+}
+
+; fast-math pow with 0.25
+define double @llvmintr_pow_f64_fast025(double %a) #1 {
+; CHECK-LNX-LABEL: llvmintr_pow_f64_fast025:
+; CHECK-LNX:       # %bb.0: # %entry
+; CHECK-LNX-NEXT:    xstsqrtdp 0, 1
+; CHECK-LNX-NEXT:    addis 3, 2, .LCPI1_0@toc@ha
+; CHECK-LNX-NEXT:    addis 4, 2, .LCPI1_1@toc@ha
+; CHECK-LNX-NEXT:    lfs 0, .LCPI1_0@toc@l(3)
+; CHECK-LNX-NEXT:    lfs 2, .LCPI1_1@toc@l(4)
+; CHECK-LNX-NEXT:    bc 12, 2, .LBB1_3
+; CHECK-LNX-NEXT:  # %bb.1: # %entry
+; CHECK-LNX-NEXT:    xsrsqrtedp 3, 1
+; CHECK-LNX-NEXT:    xsmuldp 4, 1, 3
+; CHECK-LNX-NEXT:    xsmuldp 4, 4, 3
+; CHECK-LNX-NEXT:    xsmuldp 3, 3, 0
+; CHECK-LNX-NEXT:    xsadddp 4, 4, 2
+; CHECK-LNX-NEXT:    xsmuldp 3, 3, 4
+; CHECK-LNX-NEXT:    xsmuldp 1, 1, 3
+; CHECK-LNX-NEXT:    xsmuldp 3, 1, 3
+; CHECK-LNX-NEXT:    xsmuldp 1, 1, 0
+; CHECK-LNX-NEXT:    xsadddp 3, 3, 2
+; CHECK-LNX-NEXT:    xsmuldp 1, 1, 3
+; CHECK-LNX-NEXT:    xstsqrtdp 0, 1
+; CHECK-LNX-NEXT:    bc 4, 2, .LBB1_4
+; CHECK-LNX-NEXT:  .LBB1_2:
+; CHECK-LNX-NEXT:    xssqrtdp 1, 1
+; CHECK-LNX-NEXT:    blr
+; CHECK-LNX-NEXT:  .LBB1_3:
+; CHECK-LNX-NEXT:    xssqrtdp 1, 1
+; CHECK-LNX-NEXT:    xstsqrtdp 0, 1
+; CHECK-LNX-NEXT:    bc 12, 2, .LBB1_2
+; CHECK-LNX-NEXT:  .LBB1_4: # %entry
+; CHECK-LNX-NEXT:    xsrsqrtedp 3, 1
+; CHECK-LNX-NEXT:    xsmuldp 4, 1, 3
+; CHECK-LNX-NEXT:    xsmuldp 4, 4, 3
+; CHECK-LNX-NEXT:    xsmuldp 3, 3, 0
+; CHECK-LNX-NEXT:    xsadddp 4, 4, 2
+; CHECK-LNX-NEXT:    xsmuldp 3, 3, 4
+; CHECK-LNX-NEXT:    xsmuldp 1, 1, 3
+; CHECK-LNX-NEXT:    xsmuldp 3, 1, 3
+; CHECK-LNX-NEXT:    xsmuldp 0, 1, 0
+; CHECK-LNX-NEXT:    xsadddp 2, 3, 2
+; CHECK-LNX-NEXT:    xsmuldp 1, 0, 2
+; CHECK-LNX-NEXT:    blr
+;
+; CHECK-AIX-LABEL: llvmintr_pow_f64_fast025:
+; CHECK-AIX:       # %bb.0: # %entry
+; CHECK-AIX-NEXT:    mflr 0
+; CHECK-AIX-NEXT:    stw 0, 8(1)
+; CHECK-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-AIX-NEXT:    lwz 3, L..C1(2) # %const.0
+; CHECK-AIX-NEXT:    lfs 2, 0(3)
+; CHECK-AIX-NEXT:    bl .__xl_pow_finite[PR]
+; CHECK-AIX-NEXT:    nop
+; CHECK-AIX-NEXT:    addi 1, 1, 64
+; CHECK-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-AIX-NEXT:    mtlr 0
+; CHECK-AIX-NEXT:    blr
+entry:
+  %call = tail call nnan ninf afn nsz double @llvm.pow.f64(double %a, double 2.500000e-01)
+  ret double %call
+}
+
+; fast-math powf with 0.75
+define float @llvmintr_powf_f32_fast075(float %a) #1 {
+; CHECK-LNX-LABEL: llvmintr_powf_f32_fast075:
+; CHECK-LNX:       # %bb.0: # %entry
+; CHECK-LNX-NEXT:    xsrsqrtesp 0, 1
+; CHECK-LNX-NEXT:    addis 3, 2, .LCPI2_0@toc@ha
+; CHECK-LNX-NEXT:    lfs 3, .LCPI2_0@toc@l(3)
+; CHECK-LNX-NEXT:    addis 3, 2, .LCPI2_1@toc@ha
+; CHECK-LNX-NEXT:    lfs 4, .LCPI2_1@toc@l(3)
+; CHECK-LNX-NEXT:    addis 3, 2, .LCPI2_2@toc@ha
+; CHECK-LNX-NEXT:    lfs 5, .LCPI2_2@toc@l(3)
+; CHECK-LNX-NEXT:    xsmulsp 2, 1, 0
+; CHECK-LNX-NEXT:    xsabsdp 1, 1
+; CHECK-LNX-NEXT:    xsmulsp 0, 2, 0
+; CHECK-LNX-NEXT:    xsmulsp 2, 2, 3
+; CHECK-LNX-NEXT:    xssubsp 1, 1, 5
+; CHECK-LNX-NEXT:    xsaddsp 0, 0, 4
+; CHECK-LNX-NEXT:    xsmulsp 0, 2, 0
+; CHECK-LNX-NEXT:    xxlxor 2, 2, 2
+; CHECK-LNX-NEXT:    fsel 0, 1, 0, 2
+; CHECK-LNX-NEXT:    xsrsqrtesp 1, 0
+; CHECK-LNX-NEXT:    xsmulsp 6, 0, 1
+; CHECK-LNX-NEXT:    xsmulsp 1, 6, 1
+; CHECK-LNX-NEXT:    xsmulsp 3, 6, 3
+; CHECK-LNX-NEXT:    xsaddsp 1, 1, 4
+; CHECK-LNX-NEXT:    xsabsdp 4, 0
+; CHECK-LNX-NEXT:    xsmulsp 1, 3, 1
+; CHECK-LNX-NEXT:    xssubsp 3, 4, 5
+; CHECK-LNX-NEXT:    fsel 1, 3, 1, 2
+; CHECK-LNX-NEXT:    xsmulsp 1, 0, 1
+; CHECK-LNX-NEXT:    blr
+;
+; CHECK-AIX-LABEL: llvmintr_powf_f32_fast075:
+; CHECK-AIX:       # %bb.0: # %entry
+; CHECK-AIX-NEXT:    mflr 0
+; CHECK-AIX-NEXT:    stw 0, 8(1)
+; CHECK-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-AIX-NEXT:    lwz 3, L..C2(2) # %const.0
+; CHECK-AIX-NEXT:    lfs 2, 0(3)
+; CHECK-AIX-NEXT:    bl .__xl_powf_finite[PR]
+; CHECK-AIX-NEXT:    nop
+; CHECK-AIX-NEXT:    addi 1, 1, 64
+; CHECK-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-AIX-NEXT:    mtlr 0
+; CHECK-AIX-NEXT:    blr
+entry:
+  %call = tail call nnan ninf afn nsz float @llvm.pow.f32(float %a, float 7.500000e-01)
+  ret float %call
+}
+
+; fast-math pow with 0.75
+define double @llvmintr_pow_f64_fast075(double %a) #1 {
+; CHECK-LNX-LABEL: llvmintr_pow_f64_fast075:
+; CHECK-LNX:       # %bb.0: # %entry
+; CHECK-LNX-NEXT:    xstsqrtdp 0, 1
+; CHECK-LNX-NEXT:    addis 3, 2, .LCPI3_0@toc@ha
+; CHECK-LNX-NEXT:    addis 4, 2, .LCPI3_1@toc@ha
+; CHECK-LNX-NEXT:    lfs 0, .LCPI3_0@toc@l(3)
+; CHECK-LNX-NEXT:    lfs 2, .LCPI3_1@toc@l(4)
+; CHECK-LNX-NEXT:    bc 12, 2, .LBB3_3
+; CHECK-LNX-NEXT:  # %bb.1: # %entry
+; CHECK-LNX-NEXT:    xsrsqrtedp 3, 1
+; CHECK-LNX-NEXT:    xsmuldp 4, 1, 3
+; CHECK-LNX-NEXT:    xsmuldp 4, 4, 3
+; CHECK-LNX-NEXT:    xsmuldp 3, 3, 0
+; CHECK-LNX-NEXT:    xsadddp 4, 4, 2
+; CHECK-LNX-NEXT:    xsmuldp 3, 3, 4
+; CHECK-LNX-NEXT:    xsmuldp 1, 1, 3
+; CHECK-LNX-NEXT:    xsmuldp 3, 1, 3
+; CHECK-LNX-NEXT:    xsmuldp 1, 1, 0
+; CHECK-LNX-NEXT:    xsadddp 3, 3, 2
+; CHECK-LNX-NEXT:    xsmuldp 1, 1, 3
+; CHECK-LNX-NEXT:    xstsqrtdp 0, 1
+; CHECK-LNX-NEXT:    bc 4, 2, .LBB3_4
+; CHECK-LNX-NEXT:  .LBB3_2:
+; CHECK-LNX-NEXT:    xssqrtdp 0, 1
+; CHECK-LNX-NEXT:    xsmuldp 1, 1, 0
+; CHECK-LNX-NEXT:    blr
+; CHECK-LNX-NEXT:  .LBB3_3:
+; CHECK-LNX-NEXT:    xssqrtdp 1, 1
+; CHECK-LNX-NEXT:    xstsqrtdp 0, 1
+; CHECK-LNX-NEXT:    bc 12, 2, .LBB3_2
+; CHECK-LNX-NEXT:  .LBB3_4: # %entry
+; CHECK-LNX-NEXT:    xsrsqrtedp 3, 1
+; CHECK-LNX-NEXT:    xsmuldp 4, 1, 3
+; CHECK-LNX-NEXT:    xsmuldp 4, 4, 3
+; CHECK-LNX-NEXT:    xsmuldp 3, 3, 0
+; CHECK-LNX-NEXT:    xsadddp 4, 4, 2
+; CHECK-LNX-NEXT:    xsmuldp 3, 3, 4
+; CHECK-LNX-NEXT:    xsmuldp 4, 1, 3
+; CHECK-LNX-NEXT:    xsmuldp 3, 4, 3
+; CHECK-LNX-NEXT:    xsmuldp 0, 4, 0
+; CHECK-LNX-NEXT:    xsadddp 2, 3, 2
+; CHECK-LNX-NEXT:    xsmuldp 0, 0, 2
+; CHECK-LNX-NEXT:    xsmuldp 1, 1, 0
+; CHECK-LNX-NEXT:    blr
+;
+; CHECK-AIX-LABEL: llvmintr_pow_f64_fast075:
+; CHECK-AIX:       # %bb.0: # %entry
+; CHECK-AIX-NEXT:    mflr 0
+; CHECK-AIX-NEXT:    stw 0, 8(1)
+; CHECK-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-AIX-NEXT:    lwz 3, L..C3(2) # %const.0
+; CHECK-AIX-NEXT:    lfs 2, 0(3)
+; CHECK-AIX-NEXT:    bl .__xl_pow_finite[PR]
+; CHECK-AIX-NEXT:    nop
+; CHECK-AIX-NEXT:    addi 1, 1, 64
+; CHECK-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-AIX-NEXT:    mtlr 0
+; CHECK-AIX-NEXT:    blr
+entry:
+  %call = tail call nnan ninf afn nsz double @llvm.pow.f64(double %a, double 7.500000e-01)
+  ret double %call
+}
+
+; fast-math powf with 0.50
+define float @llvmintr_powf_f32_fast050(float %a) #1 {
+; CHECK-LNX-LABEL: llvmintr_powf_f32_fast050:
+; CHECK-LNX:       # %bb.0: # %entry
+; CHECK-LNX-NEXT:    mflr 0
+; CHECK-LNX-NEXT:    std 0, 16(1)
+; CHECK-LNX-NEXT:    stdu 1, -32(1)
+; CHECK-LNX-NEXT:    .cfi_def_cfa_offset 32
+; CHECK-LNX-NEXT:    .cfi_offset lr, 16
+; CHECK-LNX-NEXT:    addis 3, 2, .LCPI4_0@toc@ha
+; CHECK-LNX-NEXT:    lfs 2, .LCPI4_0@toc@l(3)
+; CHECK-LNX-NEXT:    bl __xl_powf_finite
+; CHECK-LNX-NEXT:    nop
+; CHECK-LNX-NEXT:    addi 1, 1, 32
+; CHECK-LNX-NEXT:    ld 0, 16(1)
+; CHECK-LNX-NEXT:    mtlr 0
+; CHECK-LNX-NEXT:    blr
+;
+; CHECK-AIX-LABEL: llvmintr_powf_f32_fast050:
+; CHECK-AIX:       # %bb.0: # %entry
+; CHECK-AIX-NEXT:    mflr 0
+; CHECK-AIX-NEXT:    stw 0, 8(1)
+; CHECK-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-AIX-NEXT:    lwz 3, L..C4(2) # %const.0
+; CHECK-AIX-NEXT:    lfs 2, 0(3)
+; CHECK-AIX-NEXT:    bl .__xl_powf_finite[PR]
+; CHECK-AIX-NEXT:    nop
+; CHECK-AIX-NEXT:    addi 1, 1, 64
+; CHECK-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-AIX-NEXT:    mtlr 0
+; CHECK-AIX-NEXT:    blr
+entry:
+  %call = tail call nnan ninf afn nsz float @llvm.pow.f32(float %a, float 5.000000e-01)
+  ret float %call
+}
+
+; fast-math pow with 0.50
+define double @llvmintr_pow_f64_fast050(double %a) #1 {
+; CHECK-LNX-LABEL: llvmintr_pow_f64_fast050:
+; CHECK-LNX:       # %bb.0: # %entry
+; CHECK-LNX-NEXT:    mflr 0
+; CHECK-LNX-NEXT:    std 0, 16(1)
+; CHECK-LNX-NEXT:    stdu 1, -32(1)
+; CHECK-LNX-NEXT:    .cfi_def_cfa_offset 32
+; CHECK-LNX-NEXT:    .cfi_offset lr, 16
+; CHECK-LNX-NEXT:    addis 3, 2, .LCPI5_0@toc@ha
+; CHECK-LNX-NEXT:    lfs 2, .LCPI5_0@toc@l(3)
+; CHECK-LNX-NEXT:    bl __xl_pow_finite
+; CHECK-LNX-NEXT:    nop
+; CHECK-LNX-NEXT:    addi 1, 1, 32
+; CHECK-LNX-NEXT:    ld 0, 16(1)
+; CHECK-LNX-NEXT:    mtlr 0
+; CHECK-LNX-NEXT:    blr
+;
+; CHECK-AIX-LABEL: llvmintr_pow_f64_fast050:
+; CHECK-AIX:       # %bb.0: # %entry
+; CHECK-AIX-NEXT:    mflr 0
+; CHECK-AIX-NEXT:    stw 0, 8(1)
+; CHECK-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-AIX-NEXT:    lwz 3, L..C5(2) # %const.0
+; CHECK-AIX-NEXT:    lfs 2, 0(3)
+; CHECK-AIX-NEXT:    bl .__xl_pow_finite[PR]
+; CHECK-AIX-NEXT:    nop
+; CHECK-AIX-NEXT:    addi 1, 1, 64
+; CHECK-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-AIX-NEXT:    mtlr 0
+; CHECK-AIX-NEXT:    blr
+entry:
+  %call = tail call nnan ninf afn nsz double @llvm.pow.f64(double %a, double 5.000000e-01)
+  ret double %call
+}
+attributes #1 = { "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "approx-func-fp-math"="true" }

llvm/test/CodeGen/PowerPC/pow-025-075-nointrinsic-scalar-mass-fast.ll

+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -O3 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck --check-prefix=CHECK-LNX %s
+; RUN: llc -verify-machineinstrs -O3 -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefix=CHECK-AIX %s
+
+declare float @powf (float, float);
+declare double @pow (double, double);
+declare float @__powf_finite (float, float);
+declare double @__pow_finite (double, double);
+
+; fast-math powf with 0.25
+define float @powf_f32_fast025(float %a) #1 {
+;
+; CHECK-LNX-LABEL: powf_f32_fast025:
+; CHECK-LNX:       # %bb.0: # %entry
+; CHECK-LNX-NEXT:    mflr 0
+; CHECK-LNX-NEXT:    std 0, 16(1)
+; CHECK-LNX-NEXT:    stdu 1, -32(1)
+; CHECK-LNX-NEXT:    .cfi_def_cfa_offset 32
+; CHECK-LNX-NEXT:    .cfi_offset lr, 16
+; CHECK-LNX-NEXT:    addis 3, 2, .LCPI0_0@toc@ha
+; CHECK-LNX-NEXT:    lfs 2, .LCPI0_0@toc@l(3)
+; CHECK-LNX-NEXT:    bl __xl_powf_finite
+; CHECK-LNX-NEXT:    nop
+; CHECK-LNX-NEXT:    addi 1, 1, 32
+; CHECK-LNX-NEXT:    ld 0, 16(1)
+; CHECK-LNX-NEXT:    mtlr 0
+; CHECK-LNX-NEXT:    blr
+;
+; CHECK-AIX-LABEL: powf_f32_fast025:
+; CHECK-AIX:       # %bb.0: # %entry
+; CHECK-AIX-NEXT:    mflr 0
+; CHECK-AIX-NEXT:    stw 0, 8(1)
+; CHECK-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-AIX-NEXT:    lwz 3, L..C0(2) # %const.0
+; CHECK-AIX-NEXT:    lfs 2, 0(3)
+; CHECK-AIX-NEXT:    bl .__xl_powf_finite[PR]
+; CHECK-AIX-NEXT:    nop
+; CHECK-AIX-NEXT:    addi 1, 1, 64
+; CHECK-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-AIX-NEXT:    mtlr 0
+; CHECK-AIX-NEXT:    blr
+entry:
+  %call = tail call nnan ninf afn nsz float @powf(float %a, float 2.500000e-01)
+  ret float %call
+}
+
+; fast-math pow with 0.25
+define double @pow_f64_fast025(double %a) #1 {
+;
+; CHECK-LNX-LABEL: pow_f64_fast025:
+; CHECK-LNX:       # %bb.0: # %entry
+; CHECK-LNX-NEXT:    mflr 0
+; CHECK-LNX-NEXT:    std 0, 16(1)
+; CHECK-LNX-NEXT:    stdu 1, -32(1)
+; CHECK-LNX-NEXT:    .cfi_def_cfa_offset 32
+; CHECK-LNX-NEXT:    .cfi_offset lr, 16
+; CHECK-LNX-NEXT:    addis 3, 2, .LCPI1_0@toc@ha
+; CHECK-LNX-NEXT:    lfs 2, .LCPI1_0@toc@l(3)
+; CHECK-LNX-NEXT:    bl __xl_pow_finite
+; CHECK-LNX-NEXT:    nop
+; CHECK-LNX-NEXT:    addi 1, 1, 32
+; CHECK-LNX-NEXT:    ld 0, 16(1)
+; CHECK-LNX-NEXT:    mtlr 0
+; CHECK-LNX-NEXT:    blr
+;
+; CHECK-AIX-LABEL: pow_f64_fast025:
+; CHECK-AIX:       # %bb.0: # %entry
+; CHECK-AIX-NEXT:    mflr 0
+; CHECK-AIX-NEXT:    stw 0, 8(1)
+; CHECK-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-AIX-NEXT:    lwz 3, L..C1(2) # %const.0
+; CHECK-AIX-NEXT:    lfs 2, 0(3)
+; CHECK-AIX-NEXT:    bl .__xl_pow_finite[PR]
+; CHECK-AIX-NEXT:    nop
+; CHECK-AIX-NEXT:    addi 1, 1, 64
+; CHECK-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-AIX-NEXT:    mtlr 0
+; CHECK-AIX-NEXT:    blr
+entry:
+  %call = tail call nnan ninf afn nsz double @pow(double %a, double 2.500000e-01)
+  ret double %call
+}
+
+; fast-math powf with 0.75
+define float @powf_f32_fast075(float %a) #1 {
+;
+; CHECK-LNX-LABEL: powf_f32_fast075:
+; CHECK-LNX:       # %bb.0: # %entry
+; CHECK-LNX-NEXT:    mflr 0
+; CHECK-LNX-NEXT:    std 0, 16(1)
+; CHECK-LNX-NEXT:    stdu 1, -32(1)
+; CHECK-LNX-NEXT:    .cfi_def_cfa_offset 32
+; CHECK-LNX-NEXT:    .cfi_offset lr, 16
+; CHECK-LNX-NEXT:    addis 3, 2, .LCPI2_0@toc@ha
+; CHECK-LNX-NEXT:    lfs 2, .LCPI2_0@toc@l(3)
+; CHECK-LNX-NEXT:    bl __xl_powf_finite
+; CHECK-LNX-NEXT:    nop
+; CHECK-LNX-NEXT:    addi 1, 1, 32
+; CHECK-LNX-NEXT:    ld 0, 16(1)
+; CHECK-LNX-NEXT:    mtlr 0
+; CHECK-LNX-NEXT:    blr
+;
+; CHECK-AIX-LABEL: powf_f32_fast075:
+; CHECK-AIX:       # %bb.0: # %entry
+; CHECK-AIX-NEXT:    mflr 0
+; CHECK-AIX-NEXT:    stw 0, 8(1)
+; CHECK-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-AIX-NEXT:    lwz 3, L..C2(2) # %const.0
+; CHECK-AIX-NEXT:    lfs 2, 0(3)
+; CHECK-AIX-NEXT:    bl .__xl_powf_finite[PR]
+; CHECK-AIX-NEXT:    nop
+; CHECK-AIX-NEXT:    addi 1, 1, 64
+; CHECK-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-AIX-NEXT:    mtlr 0
+; CHECK-AIX-NEXT:    blr
+entry:
+  %call = tail call nnan ninf afn nsz float @powf(float %a, float 7.500000e-01)
+  ret float %call
+}
+
+; fast-math pow with 0.75
+define double @pow_f64_fast075(double %a) #1 {
+;
+; CHECK-LNX-LABEL: pow_f64_fast075:
+; CHECK-LNX:       # %bb.0: # %entry
+; CHECK-LNX-NEXT:    mflr 0
+; CHECK-LNX-NEXT:    std 0, 16(1)
+; CHECK-LNX-NEXT:    stdu 1, -32(1)
+; CHECK-LNX-NEXT:    .cfi_def_cfa_offset 32
+; CHECK-LNX-NEXT:    .cfi_offset lr, 16
+; CHECK-LNX-NEXT:    addis 3, 2, .LCPI3_0@toc@ha
+; CHECK-LNX-NEXT:    lfs 2, .LCPI3_0@toc@l(3)
+; CHECK-LNX-NEXT:    bl __xl_pow_finite
+; CHECK-LNX-NEXT:    nop
+; CHECK-LNX-NEXT:    addi 1, 1, 32
+; CHECK-LNX-NEXT:    ld 0, 16(1)
+; CHECK-LNX-NEXT:    mtlr 0
+; CHECK-LNX-NEXT:    blr
+;
+; CHECK-AIX-LABEL: pow_f64_fast075:
+; CHECK-AIX:       # %bb.0: # %entry
+; CHECK-AIX-NEXT:    mflr 0
+; CHECK-AIX-NEXT:    stw 0, 8(1)
+; CHECK-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-AIX-NEXT:    lwz 3, L..C3(2) # %const.0
+; CHECK-AIX-NEXT:    lfs 2, 0(3)
+; CHECK-AIX-NEXT:    bl .__xl_pow_finite[PR]
+; CHECK-AIX-NEXT:    nop
+; CHECK-AIX-NEXT:    addi 1, 1, 64
+; CHECK-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-AIX-NEXT:    mtlr 0
+; CHECK-AIX-NEXT:    blr
+entry:
+  %call = tail call nnan ninf afn nsz double @pow(double %a, double 7.500000e-01)
+  ret double %call
+}
+
+; fast-math powf with 0.50
+define float @powf_f32_fast050(float %a) #1 {
+;
+; CHECK-LNX-LABEL: powf_f32_fast050:
+; CHECK-LNX:       # %bb.0: # %entry
+; CHECK-LNX-NEXT:    mflr 0
+; CHECK-LNX-NEXT:    std 0, 16(1)
+; CHECK-LNX-NEXT:    stdu 1, -32(1)
+; CHECK-LNX-NEXT:    .cfi_def_cfa_offset 32
+; CHECK-LNX-NEXT:    .cfi_offset lr, 16
+; CHECK-LNX-NEXT:    addis 3, 2, .LCPI4_0@toc@ha
+; CHECK-LNX-NEXT:    lfs 2, .LCPI4_0@toc@l(3)
+; CHECK-LNX-NEXT:    bl __xl_powf_finite
+; CHECK-LNX-NEXT:    nop
+; CHECK-LNX-NEXT:    addi 1, 1, 32
+; CHECK-LNX-NEXT:    ld 0, 16(1)
+; CHECK-LNX-NEXT:    mtlr 0
+; CHECK-LNX-NEXT:    blr
+;
+; CHECK-AIX-LABEL: powf_f32_fast050:
+; CHECK-AIX:       # %bb.0: # %entry
+; CHECK-AIX-NEXT:    mflr 0
+; CHECK-AIX-NEXT:    stw 0, 8(1)
+; CHECK-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-AIX-NEXT:    lwz 3, L..C4(2) # %const.0
+; CHECK-AIX-NEXT:    lfs 2, 0(3)
+; CHECK-AIX-NEXT:    bl .__xl_powf_finite[PR]
+; CHECK-AIX-NEXT:    nop
+; CHECK-AIX-NEXT:    addi 1, 1, 64
+; CHECK-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-AIX-NEXT:    mtlr 0
+; CHECK-AIX-NEXT:    blr
+entry:
+  %call = tail call nnan ninf afn nsz float @powf(float %a, float 5.000000e-01)
+  ret float %call
+}
+
+; fast-math pow with 0.50
+define double @pow_f64_fast050(double %a) #1 {
+;
+; CHECK-LNX-LABEL: pow_f64_fast050:
+; CHECK-LNX:       # %bb.0: # %entry
+; CHECK-LNX-NEXT:    mflr 0
+; CHECK-LNX-NEXT:    std 0, 16(1)
+; CHECK-LNX-NEXT:    stdu 1, -32(1)
+; CHECK-LNX-NEXT:    .cfi_def_cfa_offset 32
+; CHECK-LNX-NEXT:    .cfi_offset lr, 16
+; CHECK-LNX-NEXT:    addis 3, 2, .LCPI5_0@toc@ha
+; CHECK-LNX-NEXT:    lfs 2, .LCPI5_0@toc@l(3)
+; CHECK-LNX-NEXT:    bl __xl_pow_finite
+; CHECK-LNX-NEXT:    nop
+; CHECK-LNX-NEXT:    addi 1, 1, 32
+; CHECK-LNX-NEXT:    ld 0, 16(1)
+; CHECK-LNX-NEXT:    mtlr 0
+; CHECK-LNX-NEXT:    blr
+;
+; CHECK-AIX-LABEL: pow_f64_fast050:
+; CHECK-AIX:       # %bb.0: # %entry
+; CHECK-AIX-NEXT:    mflr 0
+; CHECK-AIX-NEXT:    stw 0, 8(1)
+; CHECK-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-AIX-NEXT:    lwz 3, L..C5(2) # %const.0
+; CHECK-AIX-NEXT:    lfs 2, 0(3)
+; CHECK-AIX-NEXT:    bl .__xl_pow_finite[PR]
+; CHECK-AIX-NEXT:    nop
+; CHECK-AIX-NEXT:    addi 1, 1, 64
+; CHECK-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-AIX-NEXT:    mtlr 0
+; CHECK-AIX-NEXT:    blr
+entry:
+  %call = tail call nnan ninf afn nsz double @pow(double %a, double 5.000000e-01)
+  ret double %call
+}
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+; fast-math __powf_finite with 0.25
+define float @__powf_finite_f32_fast025(float %a) #1 {
+;
+; CHECK-LNX-LABEL: __powf_finite_f32_fast025:
+; CHECK-LNX:       # %bb.0: # %entry
+; CHECK-LNX-NEXT:    mflr 0
+; CHECK-LNX-NEXT:    std 0, 16(1)
+; CHECK-LNX-NEXT:    stdu 1, -32(1)
+; CHECK-LNX-NEXT:    .cfi_def_cfa_offset 32
+; CHECK-LNX-NEXT:    .cfi_offset lr, 16
+; CHECK-LNX-NEXT:    addis 3, 2, .LCPI6_0@toc@ha
+; CHECK-LNX-NEXT:    lfs 2, .LCPI6_0@toc@l(3)
+; CHECK-LNX-NEXT:    bl __xl_powf_finite
+; CHECK-LNX-NEXT:    nop
+; CHECK-LNX-NEXT:    addi 1, 1, 32
+; CHECK-LNX-NEXT:    ld 0, 16(1)
+; CHECK-LNX-NEXT:    mtlr 0
+; CHECK-LNX-NEXT:    blr
+;
+; CHECK-AIX-LABEL: __powf_finite_f32_fast025:
+; CHECK-AIX:       # %bb.0: # %entry
+; CHECK-AIX-NEXT:    mflr 0
+; CHECK-AIX-NEXT:    stw 0, 8(1)
+; CHECK-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-AIX-NEXT:    lwz 3, L..C6(2) # %const.0
+; CHECK-AIX-NEXT:    lfs 2, 0(3)
+; CHECK-AIX-NEXT:    bl .__xl_powf_finite[PR]
+; CHECK-AIX-NEXT:    nop
+; CHECK-AIX-NEXT:    addi 1, 1, 64
+; CHECK-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-AIX-NEXT:    mtlr 0
+; CHECK-AIX-NEXT:    blr
+entry:
+  %call = tail call nnan ninf afn nsz float @__powf_finite(float %a, float 2.500000e-01)
+  ret float %call
+}
+
+; fast-math __pow_finite with 0.25
+define double @__pow_finite_f64_fast025(double %a) #1 {
+;
+; CHECK-LNX-LABEL: __pow_finite_f64_fast025:
+; CHECK-LNX:       # %bb.0: # %entry
+; CHECK-LNX-NEXT:    mflr 0
+; CHECK-LNX-NEXT:    std 0, 16(1)
+; CHECK-LNX-NEXT:    stdu 1, -32(1)
+; CHECK-LNX-NEXT:    .cfi_def_cfa_offset 32
+; CHECK-LNX-NEXT:    .cfi_offset lr, 16
+; CHECK-LNX-NEXT:    addis 3, 2, .LCPI7_0@toc@ha
+; CHECK-LNX-NEXT:    lfs 2, .LCPI7_0@toc@l(3)
+; CHECK-LNX-NEXT:    bl __xl_pow_finite
+; CHECK-LNX-NEXT:    nop
+; CHECK-LNX-NEXT:    addi 1, 1, 32
+; CHECK-LNX-NEXT:    ld 0, 16(1)
+; CHECK-LNX-NEXT:    mtlr 0
+; CHECK-LNX-NEXT:    blr
+;
+; CHECK-AIX-LABEL: __pow_finite_f64_fast025:
+; CHECK-AIX:       # %bb.0: # %entry
+; CHECK-AIX-NEXT:    mflr 0
+; CHECK-AIX-NEXT:    stw 0, 8(1)
+; CHECK-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-AIX-NEXT:    lwz 3, L..C7(2) # %const.0
+; CHECK-AIX-NEXT:    lfs 2, 0(3)
+; CHECK-AIX-NEXT:    bl .__xl_pow_finite[PR]
+; CHECK-AIX-NEXT:    nop
+; CHECK-AIX-NEXT:    addi 1, 1, 64
+; CHECK-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-AIX-NEXT:    mtlr 0
+; CHECK-AIX-NEXT:    blr
+entry:
+  %call = tail call nnan ninf afn nsz double @__pow_finite(double %a, double 2.500000e-01)
+  ret double %call
+}
+
+; fast-math __powf_finite with 0.75
+define float @__powf_finite_f32_fast075(float %a) #1 {
+;
+; CHECK-LNX-LABEL: __powf_finite_f32_fast075:
+; CHECK-LNX:       # %bb.0: # %entry
+; CHECK-LNX-NEXT:    mflr 0
+; CHECK-LNX-NEXT:    std 0, 16(1)
+; CHECK-LNX-NEXT:    stdu 1, -32(1)
+; CHECK-LNX-NEXT:    .cfi_def_cfa_offset 32
+; CHECK-LNX-NEXT:    .cfi_offset lr, 16
+; CHECK-LNX-NEXT:    addis 3, 2, .LCPI8_0@toc@ha
+; CHECK-LNX-NEXT:    lfs 2, .LCPI8_0@toc@l(3)
+; CHECK-LNX-NEXT:    bl __xl_powf_finite
+; CHECK-LNX-NEXT:    nop
+; CHECK-LNX-NEXT:    addi 1, 1, 32
+; CHECK-LNX-NEXT:    ld 0, 16(1)
+; CHECK-LNX-NEXT:    mtlr 0
+; CHECK-LNX-NEXT:    blr
+;
+; CHECK-AIX-LABEL: __powf_finite_f32_fast075:
+; CHECK-AIX:       # %bb.0: # %entry
+; CHECK-AIX-NEXT:    mflr 0
+; CHECK-AIX-NEXT:    stw 0, 8(1)
+; CHECK-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-AIX-NEXT:    lwz 3, L..C8(2) # %const.0
+; CHECK-AIX-NEXT:    lfs 2, 0(3)
+; CHECK-AIX-NEXT:    bl .__xl_powf_finite[PR]
+; CHECK-AIX-NEXT:    nop
+; CHECK-AIX-NEXT:    addi 1, 1, 64
+; CHECK-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-AIX-NEXT:    mtlr 0
+; CHECK-AIX-NEXT:    blr
+entry:
+  %call = tail call nnan ninf afn nsz float @__powf_finite(float %a, float 7.500000e-01)
+  ret float %call
+}
+
+; fast-math __pow_finite with 0.75
+define double @__pow_finite_f64_fast075(double %a) #1 {
+;
+; CHECK-LNX-LABEL: __pow_finite_f64_fast075:
+; CHECK-LNX:       # %bb.0: # %entry
+; CHECK-LNX-NEXT:    mflr 0
+; CHECK-LNX-NEXT:    std 0, 16(1)
+; CHECK-LNX-NEXT:    stdu 1, -32(1)
+; CHECK-LNX-NEXT:    .cfi_def_cfa_offset 32
+; CHECK-LNX-NEXT:    .cfi_offset lr, 16
+; CHECK-LNX-NEXT:    addis 3, 2, .LCPI9_0@toc@ha
+; CHECK-LNX-NEXT:    lfs 2, .LCPI9_0@toc@l(3)
+; CHECK-LNX-NEXT:    bl __xl_pow_finite
+; CHECK-LNX-NEXT:    nop
+; CHECK-LNX-NEXT:    addi 1, 1, 32
+; CHECK-LNX-NEXT:    ld 0, 16(1)
+; CHECK-LNX-NEXT:    mtlr 0
+; CHECK-LNX-NEXT:    blr
+;
+; CHECK-AIX-LABEL: __pow_finite_f64_fast075:
+; CHECK-AIX:       # %bb.0: # %entry
+; CHECK-AIX-NEXT:    mflr 0
+; CHECK-AIX-NEXT:    stw 0, 8(1)
+; CHECK-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-AIX-NEXT:    lwz 3, L..C9(2) # %const.0
+; CHECK-AIX-NEXT:    lfs 2, 0(3)
+; CHECK-AIX-NEXT:    bl .__xl_pow_finite[PR]
+; CHECK-AIX-NEXT:    nop
+; CHECK-AIX-NEXT:    addi 1, 1, 64
+; CHECK-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-AIX-NEXT:    mtlr 0
+; CHECK-AIX-NEXT:    blr
+entry:
+  %call = tail call nnan ninf afn nsz double @__pow_finite(double %a, double 7.500000e-01)
+  ret double %call
+}
+
+; fast-math __powf_finite with 0.50
+define float @__powf_finite_f32_fast050(float %a) #1 {
+;
+; CHECK-LNX-LABEL: __powf_finite_f32_fast050:
+; CHECK-LNX:       # %bb.0: # %entry
+; CHECK-LNX-NEXT:    mflr 0
+; CHECK-LNX-NEXT:    std 0, 16(1)
+; CHECK-LNX-NEXT:    stdu 1, -32(1)
+; CHECK-LNX-NEXT:    .cfi_def_cfa_offset 32
+; CHECK-LNX-NEXT:    .cfi_offset lr, 16
+; CHECK-LNX-NEXT:    addis 3, 2, .LCPI10_0@toc@ha
+; CHECK-LNX-NEXT:    lfs 2, .LCPI10_0@toc@l(3)
+; CHECK-LNX-NEXT:    bl __xl_powf_finite
+; CHECK-LNX-NEXT:    nop
+; CHECK-LNX-NEXT:    addi 1, 1, 32
+; CHECK-LNX-NEXT:    ld 0, 16(1)
+; CHECK-LNX-NEXT:    mtlr 0
+; CHECK-LNX-NEXT:    blr
+;
+; CHECK-AIX-LABEL: __powf_finite_f32_fast050:
+; CHECK-AIX:       # %bb.0: # %entry
+; CHECK-AIX-NEXT:    mflr 0
+; CHECK-AIX-NEXT:    stw 0, 8(1)
+; CHECK-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-AIX-NEXT:    lwz 3, L..C10(2) # %const.0
+; CHECK-AIX-NEXT:    lfs 2, 0(3)
+; CHECK-AIX-NEXT:    bl .__xl_powf_finite[PR]
+; CHECK-AIX-NEXT:    nop
+; CHECK-AIX-NEXT:    addi 1, 1, 64
+; CHECK-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-AIX-NEXT:    mtlr 0
+; CHECK-AIX-NEXT:    blr
+entry:
+  %call = tail call nnan ninf afn nsz float @__powf_finite(float %a, float 5.000000e-01)
+  ret float %call
+}
+
+; fast-math __pow_finite with 0.50
+define double @__pow_finite_f64_fast050(double %a) #1 {
+;
+; CHECK-LNX-LABEL: __pow_finite_f64_fast050:
+; CHECK-LNX:       # %bb.0: # %entry
+; CHECK-LNX-NEXT:    mflr 0
+; CHECK-LNX-NEXT:    std 0, 16(1)
+; CHECK-LNX-NEXT:    stdu 1, -32(1)
+; CHECK-LNX-NEXT:    .cfi_def_cfa_offset 32
+; CHECK-LNX-NEXT:    .cfi_offset lr, 16
+; CHECK-LNX-NEXT:    addis 3, 2, .LCPI11_0@toc@ha
+; CHECK-LNX-NEXT:    lfs 2, .LCPI11_0@toc@l(3)
+; CHECK-LNX-NEXT:    bl __xl_pow_finite
+; CHECK-LNX-NEXT:    nop
+; CHECK-LNX-NEXT:    addi 1, 1, 32
+; CHECK-LNX-NEXT:    ld 0, 16(1)
+; CHECK-LNX-NEXT:    mtlr 0
+; CHECK-LNX-NEXT:    blr
+;
+; CHECK-AIX-LABEL: __pow_finite_f64_fast050:
+; CHECK-AIX:       # %bb.0: # %entry
+; CHECK-AIX-NEXT:    mflr 0
+; CHECK-AIX-NEXT:    stw 0, 8(1)
+; CHECK-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-AIX-NEXT:    lwz 3, L..C11(2) # %const.0
+; CHECK-AIX-NEXT:    lfs 2, 0(3)
+; CHECK-AIX-NEXT:    bl .__xl_pow_finite[PR]
+; CHECK-AIX-NEXT:    nop
+; CHECK-AIX-NEXT:    addi 1, 1, 64
+; CHECK-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-AIX-NEXT:    mtlr 0
+; CHECK-AIX-NEXT:    blr
+entry:
+  %call = tail call nnan ninf afn nsz double @__pow_finite(double %a, double 5.000000e-01)
+  ret double %call
+}
+
+attributes #1 = { "approx-func-fp-math"="true" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" }