Correctly parse and print Tag_THUMB_ISA_use=3

[LemonBoy]

Summary

I took the "Permitted"/"Not Permitted" combo from the Tag_ARM_ISA_use case (GNU tools print "Yes").

[LemonBoy]

Ping?

[MaskRay]

llvm/test/MC/ARM/directive-arch-armv8m.s

2

Does this add additional coverage not available by other tests?

[LemonBoy]

llvm/test/MC/ARM/directive-arch-armv8m.s

2

This tests that the THUMB_ISA_use=3 case round-trips correctly, llvm-mc emits it and llvm-readobj is able to read/interpret/dump it.

[MaskRay]

Please give other reviewers some time to chime in

llvm/test/MC/ARM/directive-arch-armv8m.s

7

Minor nit: in other places, | at the end of the previous line is more common
The next line should be idented, usually by 2, as you already do.

[LemonBoy]

I am once again asking for your financial support.
@MaskRay would you mind landing this now that it got another approval mark?

[aemerson]

@simon_tatham Can you take a look?

[MaskRay]

In D90305#2404827, @LemonBoy wrote:

I am once again asking for your financial support.
@MaskRay would you mind landing this now that it got another approval mark?

I can after @simon_tatham has taken a look

[LemonBoy]

@MaskRay Is this ready to go now?

llvm/lib/Support/ARMAttributeParser.cpp

 }
 
 Error ARMAttributeParser::ARM_ISA_use(AttrType tag) {
   static const char *strings[] = {"Not Permitted", "Permitted"};
   return parseStringAttribute("ARM_ISA_use", tag, makeArrayRef(strings));
 }
 
 Error ARMAttributeParser::THUMB_ISA_use(AttrType tag) {
-  static const char *strings[] = {"Not Permitted", "Thumb-1", "Thumb-2"};
+  static const char *strings[] = {"Not Permitted", "Thumb-1", "Thumb-2", "Permitted"};
   return parseStringAttribute("THUMB_ISA_use", tag, makeArrayRef(strings));
 }
 
 Error ARMAttributeParser::FP_arch(AttrType tag) {
   static const char *strings[] = {
       "Not Permitted", "VFPv1",     "VFPv2",      "VFPv3",         "VFPv3-D16",
       "VFPv4",         "VFPv4-D16", "ARMv8-a FP", "ARMv8-a FP-D16"};
   return parseStringAttribute("FP_arch", tag, makeArrayRef(strings));

llvm/test/MC/ARM/assembly-default-build-attributes.s

 // RUN: llvm-mc -triple armv7a < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v7A
 // RUN: llvm-mc -triple armv6m < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v6M
 // RUN: llvm-mc -triple armv7m < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v7M
 // RUN: llvm-mc -triple armv7a -mcpu=cortex-a15 < %s -arm-add-build-attributes | FileCheck %s --check-prefix=Cortex-A15
+// RUN: llvm-mc -triple armv8m.base < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v8M_Baseline
+// RUN: llvm-mc -triple armv8m.main < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v8M_Mainline
 
 // This isn't intended to be a through check of the build attributes emitted
 // for each target (that's tested elsewhere), but just to check that the
 // hardware attributes are emitted by the assembler based on the selected
 // target when requested.
 
 // v7A-NOT: .cpu
 // v7A: .eabi_attribute 6, 10   @ Tag_CPU_arch

 
 // v7M-NOT: .cpu
 // v7M: .eabi_attribute 6, 10   @ Tag_CPU_arch
 // v7M: .eabi_attribute 7, 77   @ Tag_CPU_arch_profile
 // v7M: .eabi_attribute 8, 0    @ Tag_ARM_ISA_use
 // v7M: .eabi_attribute 9, 2    @ Tag_THUMB_ISA_use
 // v7M: .eabi_attribute 34, 1   @ Tag_CPU_unaligned_access
 
+// v8M_Baseline-NOT: .cpu
+// v8M_Baseline: .eabi_attribute 6, 16   @ Tag_CPU_arch
+// v8M_Baseline: .eabi_attribute 7, 77   @ Tag_CPU_arch_profile
+// v8M_Baseline: .eabi_attribute 8, 0    @ Tag_ARM_ISA_use
+// v8M_Baseline: .eabi_attribute 9, 3    @ Tag_THUMB_ISA_use
+// v8M_Baseline: .eabi_attribute 34, 0   @ Tag_CPU_unaligned_access
+
+// v8M_Mainline-NOT: .cpu
+// v8M_Mainline: .eabi_attribute 6, 17   @ Tag_CPU_arch
+// v8M_Mainline: .eabi_attribute 7, 77   @ Tag_CPU_arch_profile
+// v8M_Mainline: .eabi_attribute 8, 0    @ Tag_ARM_ISA_use
+// v8M_Mainline: .eabi_attribute 9, 3    @ Tag_THUMB_ISA_use
+// v8M_Mainline: .eabi_attribute 34, 1   @ Tag_CPU_unaligned_access
+
 // Cortex-A15: .cpu    cortex-a15
 // Cortex-A15: .eabi_attribute 6, 10   @ Tag_CPU_arch
 // Cortex-A15: .eabi_attribute 7, 65   @ Tag_CPU_arch_profile
 // Cortex-A15: .eabi_attribute 8, 1    @ Tag_ARM_ISA_use
 // Cortex-A15: .eabi_attribute 9, 2    @ Tag_THUMB_ISA_use
 // Cortex-A15: .fpu    neon-vfpv4
 // Cortex-A15: .eabi_attribute 36, 1   @ Tag_FP_HP_extension
 // Cortex-A15: .eabi_attribute 42, 1   @ Tag_MPextension_use
 // Cortex-A15: .eabi_attribute 44, 2   @ Tag_DIV_use
 // Cortex-A15: .eabi_attribute 34, 1   @ Tag_CPU_unaligned_access
 // Cortex-A15: .eabi_attribute 68, 3   @ Tag_Virtualization_use

llvm/test/MC/ARM/directive-arch-armv8m.s

+@ Test the .arch directive for armv8m
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv8-a architecture when using the armv8m.base alias.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj --arch-specific - | FileCheck %s -check-prefix CHECK-ATTR
+
+  .syntax unified
+  .arch armv8m.base
+
+@ CHECK-ASM:  .arch armv8-m.base
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 8-M.Baseline
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v8
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch_profile
+@ CHECK-ATTR:     Description: Microcontroller
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: THUMB_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+

llvm/unittests/Support/ARMAttributeParser.cpp

 }
 
 TEST(ThumbISABuildAttr, testBuildAttr) {
   EXPECT_TRUE(testTagString(9, "Tag_THUMB_ISA_use"));
   EXPECT_TRUE(testBuildAttr(9, 0, ARMBuildAttrs::THUMB_ISA_use,
                                ARMBuildAttrs::Not_Allowed));
   EXPECT_TRUE(testBuildAttr(9, 1, ARMBuildAttrs::THUMB_ISA_use,
                                ARMBuildAttrs::Allowed));
+  EXPECT_TRUE(testBuildAttr(9, 2, ARMBuildAttrs::THUMB_ISA_use,
+                               ARMBuildAttrs::AllowThumb32));
+  EXPECT_TRUE(testBuildAttr(9, 3, ARMBuildAttrs::THUMB_ISA_use,
+                               ARMBuildAttrs::AllowThumbDerived));
 }
 
 TEST(FPArchBuildAttr, testBuildAttr) {
   EXPECT_TRUE(testTagString(10, "Tag_FP_arch"));
   EXPECT_TRUE(testBuildAttr(10, 0, ARMBuildAttrs::FP_arch,
                                ARMBuildAttrs::Not_Allowed));
   EXPECT_TRUE(testBuildAttr(10, 1, ARMBuildAttrs::FP_arch,
                                ARMBuildAttrs::Allowed));