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Differential D70913

[FPEnv][SelectionDAG] Relax chain requirements
ClosedPublic

Authored by uweigand on Dec 2 2019, 11:01 AM.

Details

Reviewers
cameron.mcinally
craig.topper
andrew.w.kaylor
kpn
arsenm
Commits
rGdaee549b1756: [FPEnv][SelectionDAG] Relax chain requirements
Summary

This patch fixes one remaining problem in matching strict FP operations in the SystemZ back-end: it is currently not possible to have the DAG matcher accept certain complex expressions involving strict FP operations; specifically this affects matching the MDEB(R) etc. family of multiply instructions that implicitly extend their input (32x32 -> 64 bit or 64x64 -> 128 bit).

The matcher currently fails because of two reasons:

  1. FP intrinsics are too rigidly sequenced due to the way their chains are constructed
  2. The chain output confuses a hasOneUse check in the matcher

As to 1), SelectionDAGBuilder::visitConstrainedFPIntrinsic currently treats each constrained intrinsic like a global barrier (e.g. a function call) and fully serializes all pending chains. This is actually not required; it is allowed for constrained intrinsics to be reordered w.r.t one another or (nonvolatile) memory accesses. The MI-level scheduler already allows for that flexibility, so it makes sense to allow it at the DAG level as well.

This patch therefore changes the way chains for constrained intrisincs are created, and handles them basically like load operations are handled. This has the effect that constrained intrinsics are no longer serialized against one another or (nonvolatile) loads. They are still serialized against stores, but that seems hard to change with the current DAG chain setup, and it also doesn't seem to be a big problem preventing DAG optimizations.

As to 2), even with the above change, I still was unable to match more that two linked DAG nodes in a single pattern (e.g. load -> extend -> multiply). This is because the OPC_CheckFoldableChainNode check requires that each of the intermediate nodes ("extend" in the above example) only has a single use. This check fails for strict operations as the chain output of the extend indeed has another use. However, we don't really need to consider chains here at all, since they will all be rewritten anyway by UpdateChains later. Other parts of the matcher therefore already ignore chains, but this hasOneUse check doesn't.

This patch replaces hasOneUse by a custom test that verifies there is no more than one use of any non-chain output value.

With those two changes (and a few SystemZ backend updates), I am able to match all remaining versions of the extended-multiply instruction against constrained intrinsics. This also fixes the last remaining set of test cases that were mixing strict and nonstrict operations in a single function.

The OPC_CheckFoldableChainNode change might theoretically affect code unrelated to strict FP nodes, but at least on SystemZ I could not find any single instance of that happening.

Diff Detail

Event Timeline

uweigand created this revision.Dec 2 2019, 11:01 AM
Herald added a project: Restricted Project. · View Herald TranscriptDec 2 2019, 11:01 AM
Herald added subscribers: llvm-commits, hiraditya, wdng. · View Herald Transcript
craig.topper added inline comments.Dec 2 2019, 11:10 AM
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
3178

Can we break this loop when NonChainUses is greater than 1? No need to keep scanning.

uweigand updated this revision to Diff 231894.Dec 3 2019, 6:07 AM
uweigand marked 2 inline comments as done.
uweigand added inline comments.
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
3178

Sure, makes sense.

craig.topper accepted this revision.Dec 5 2019, 3:49 PM

LGTM

This revision is now accepted and ready to land.Dec 5 2019, 3:49 PM
Closed by commit rGdaee549b1756: [FPEnv][SelectionDAG] Relax chain requirements (authored by uweigand). · Explain WhyDec 6 2019, 2:12 AM
This revision was automatically updated to reflect the committed changes.
uweigand marked an inline comment as done.
thakis added a subscriber: thakis.Dec 6 2019, 3:08 AM

This breaks a test for me: http://45.33.8.238/linux/5145/step_10.txt

uweigand added a comment.Dec 6 2019, 3:52 AM
In D70913#1772426, @thakis wrote:

This breaks a test for me: http://45.33.8.238/linux/5145/step_10.txt

Should be fixed by b3009ed -- sorry!

craig.topper added a comment.Jan 2 2020, 5:17 PM

I think this doesn't work if a constrained intrinsic is created that doesn't have have any uses, but needs to trigger an exception. The chain output ends up in PendingLoads, but PendingLoads isn't flushed if there's no stores or other operations that need to be ordered. So the basic block ends without connecting the chain from the constrained intrinsic to anything. This makes the node subject to deletion.

pengfei added a subscriber: pengfei.Jan 2 2020, 7:12 PM
uweigand added a comment.Jan 3 2020, 6:52 AM
In D70913#1802248, @craig.topper wrote:

I think this doesn't work if a constrained intrinsic is created that doesn't have have any uses, but needs to trigger an exception. The chain output ends up in PendingLoads, but PendingLoads isn't flushed if there's no stores or other operations that need to be ordered. So the basic block ends without connecting the chain from the constrained intrinsic to anything. This makes the node subject to deletion.

I guess you're right -- the current behavior seems correct only for fpexcept.maytrap but not fpexcept.strict nodes. The latter need to be part of both getRoot and getControlRoot. I'm not sure whether simply adding the nodes to both PendingLoads and PendingExports will work though, since then we might get duplicate chain links ... we may need a seperate list for the FP nodes. I'll have a look.

uweigand mentioned this in D72341: [FPEnv] Fix chain handling for fpexcept.strict nodes.Jan 7 2020, 8:54 AM
uweigand added a comment.Jan 7 2020, 8:56 AM
In D70913#1802960, @uweigand wrote:

I guess you're right -- the current behavior seems correct only for fpexcept.maytrap but not fpexcept.strict nodes. The latter need to be part of both getRoot and getControlRoot. I'm not sure whether simply adding the nodes to both PendingLoads and PendingExports will work though, since then we might get duplicate chain links ... we may need a seperate list for the FP nodes. I'll have a look.

See D72341.

Revision Contents

PathSize
llvm/
lib/
CodeGen/
SelectionDAG/
8 lines
18 lines
Target/
SystemZ/
16 lines
test/
CodeGen/
SystemZ/
131 lines
131 lines
806 lines
X86/
24 lines
12 lines
144 lines
72 lines

Diff 232515

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 6,882 Lines • ▼ Show 20 Linesvoid SelectionDAGBuilder::visitConstrainedFPIntrinsic(
const ConstrainedFPIntrinsic &FPI) { const ConstrainedFPIntrinsic &FPI) {
SDLoc sdl = getCurSDLoc(); SDLoc sdl = getCurSDLoc();
const TargetLowering &TLI = DAG.getTargetLoweringInfo(); const TargetLowering &TLI = DAG.getTargetLoweringInfo();
SmallVector<EVT, 4> ValueVTs; SmallVector<EVT, 4> ValueVTs;
ComputeValueVTs(TLI, DAG.getDataLayout(), FPI.getType(), ValueVTs); ComputeValueVTs(TLI, DAG.getDataLayout(), FPI.getType(), ValueVTs);
ValueVTs.push_back(MVT::Other); // Out chain ValueVTs.push_back(MVT::Other); // Out chain
SDValue Chain = getRoot(); // We do not need to serialize constrained FP intrinsics against
// each other or against (nonvolatile) loads, so they can be
// chained like loads.
SDValue Chain = DAG.getRoot();
SmallVector<SDValue, 4> Opers; SmallVector<SDValue, 4> Opers;
Opers.push_back(Chain); Opers.push_back(Chain);
if (FPI.isUnaryOp()) { if (FPI.isUnaryOp()) {
Opers.push_back(getValue(FPI.getArgOperand(0))); Opers.push_back(getValue(FPI.getArgOperand(0)));
} else if (FPI.isTernaryOp()) { } else if (FPI.isTernaryOp()) {
Opers.push_back(getValue(FPI.getArgOperand(0))); Opers.push_back(getValue(FPI.getArgOperand(0)));
Opers.push_back(getValue(FPI.getArgOperand(1))); Opers.push_back(getValue(FPI.getArgOperand(1)));
Opers.push_back(getValue(FPI.getArgOperand(2))); Opers.push_back(getValue(FPI.getArgOperand(2)));
Show All 21 Lines#include "llvm/IR/ConstrainedOps.def"
if (FPI.getExceptionBehavior() != fp::ExceptionBehavior::ebIgnore) { if (FPI.getExceptionBehavior() != fp::ExceptionBehavior::ebIgnore) {
SDNodeFlags Flags; SDNodeFlags Flags;
Flags.setFPExcept(true); Flags.setFPExcept(true);
Result->setFlags(Flags); Result->setFlags(Flags);
} }
assert(Result.getNode()->getNumValues() == 2); assert(Result.getNode()->getNumValues() == 2);
// See above -- chain is handled like for loads here.
SDValue OutChain = Result.getValue(1); SDValue OutChain = Result.getValue(1);
DAG.setRoot(OutChain); PendingLoads.push_back(OutChain);
SDValue FPResult = Result.getValue(0); SDValue FPResult = Result.getValue(0);
setValue(&FPI, FPResult); setValue(&FPI, FPResult);
} }
std::pair<SDValue, SDValue> std::pair<SDValue, SDValue>
SelectionDAGBuilder::lowerInvokable(TargetLowering::CallLoweringInfo &CLI, SelectionDAGBuilder::lowerInvokable(TargetLowering::CallLoweringInfo &CLI,
const BasicBlock *EHPadBB) { const BasicBlock *EHPadBB) {
MachineFunction &MF = DAG.getMachineFunction(); MachineFunction &MF = DAG.getMachineFunction();
▲ Show 20 Lines • Show All 3,564 Lines • Show Last 20 Lines

llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Show First 20 Lines • Show All 3,165 Lines • ▼ Show 20 Lines case OPC_CheckImmAllOnesV:
continue; continue;
case OPC_CheckImmAllZerosV: case OPC_CheckImmAllZerosV:
if (!ISD::isBuildVectorAllZeros(N.getNode())) break; if (!ISD::isBuildVectorAllZeros(N.getNode())) break;
continue; continue;
case OPC_CheckFoldableChainNode: { case OPC_CheckFoldableChainNode: {
assert(NodeStack.size() != 1 && "No parent node"); assert(NodeStack.size() != 1 && "No parent node");
// Verify that all intermediate nodes between the root and this one have // Verify that all intermediate nodes between the root and this one have
// a single use. // a single use (ignoring chains, which are handled in UpdateChains).
bool HasMultipleUses = false; bool HasMultipleUses = false;
for (unsigned i = 1, e = NodeStack.size()-1; i != e; ++i) for (unsigned i = 1, e = NodeStack.size()-1; i != e; ++i) {
if (!NodeStack[i].getNode()->hasOneUse()) { unsigned NNonChainUses = 0;
SDNode *NS = NodeStack[i].getNode();
craig.topperUnsubmitted
Done
ReplyInline Actions

Can we break this loop when NonChainUses is greater than 1? No need to keep scanning.

craig.topper: Can we break this loop when NonChainUses is greater than 1? No need to keep scanning.
uweigandAuthorUnsubmitted
Done
ReplyInline Actions

Sure, makes sense.

uweigand: Sure, makes sense.
for (auto UI = NS->use_begin(), UE = NS->use_end(); UI != UE; ++UI)
if (UI.getUse().getValueType() != MVT::Other)
if (++NNonChainUses > 1) {
HasMultipleUses = true; HasMultipleUses = true;
break; break;
} }
if (HasMultipleUses) break; if (HasMultipleUses) break;
}
if (HasMultipleUses) break;
// Check to see that the target thinks this is profitable to fold and that // Check to see that the target thinks this is profitable to fold and that
// we can fold it without inducing cycles in the graph. // we can fold it without inducing cycles in the graph.
if (!IsProfitableToFold(N, NodeStack[NodeStack.size()-2].getNode(), if (!IsProfitableToFold(N, NodeStack[NodeStack.size()-2].getNode(),
NodeToMatch) || NodeToMatch) ||
!IsLegalToFold(N, NodeStack[NodeStack.size()-2].getNode(), !IsLegalToFold(N, NodeStack[NodeStack.size()-2].getNode(),
NodeToMatch, OptLevel, NodeToMatch, OptLevel,
true/*We validate our own chains*/)) true/*We validate our own chains*/))
▲ Show 20 Lines • Show All 471 Lines • Show Last 20 Lines

llvm/lib/Target/SystemZ/SystemZInstrFP.td

Show First 20 Lines • Show All 461 Lines • ▼ Show 20 Lineslet Uses = [FPC], mayRaiseFPException = 1 in {
} }
def MEEB : BinaryRXE<"meeb", 0xED17, any_fmul, FP32, load, 4>; def MEEB : BinaryRXE<"meeb", 0xED17, any_fmul, FP32, load, 4>;
def MDB : BinaryRXE<"mdb", 0xED1C, any_fmul, FP64, load, 8>; def MDB : BinaryRXE<"mdb", 0xED1C, any_fmul, FP64, load, 8>;
} }
// f64 multiplication of two FP32 registers. // f64 multiplication of two FP32 registers.
let Uses = [FPC], mayRaiseFPException = 1 in let Uses = [FPC], mayRaiseFPException = 1 in
def MDEBR : BinaryRRE<"mdebr", 0xB30C, null_frag, FP64, FP32>; def MDEBR : BinaryRRE<"mdebr", 0xB30C, null_frag, FP64, FP32>;
def : Pat<(any_fmul (f64 (fpextend FP32:$src1)), def : Pat<(any_fmul (f64 (any_fpextend FP32:$src1)),
(f64 (fpextend FP32:$src2))), (f64 (any_fpextend FP32:$src2))),
(MDEBR (INSERT_SUBREG (f64 (IMPLICIT_DEF)), (MDEBR (INSERT_SUBREG (f64 (IMPLICIT_DEF)),
FP32:$src1, subreg_h32), FP32:$src2)>; FP32:$src1, subreg_h32), FP32:$src2)>;
// f64 multiplication of an FP32 register and an f32 memory. // f64 multiplication of an FP32 register and an f32 memory.
let Uses = [FPC], mayRaiseFPException = 1 in let Uses = [FPC], mayRaiseFPException = 1 in
def MDEB : BinaryRXE<"mdeb", 0xED0C, null_frag, FP64, load, 4>; def MDEB : BinaryRXE<"mdeb", 0xED0C, null_frag, FP64, load, 4>;
def : Pat<(any_fmul (f64 (fpextend FP32:$src1)), def : Pat<(any_fmul (f64 (any_fpextend FP32:$src1)),
(f64 (extloadf32 bdxaddr12only:$addr))), (f64 (any_extloadf32 bdxaddr12only:$addr))),
(MDEB (INSERT_SUBREG (f64 (IMPLICIT_DEF)), FP32:$src1, subreg_h32), (MDEB (INSERT_SUBREG (f64 (IMPLICIT_DEF)), FP32:$src1, subreg_h32),
bdxaddr12only:$addr)>; bdxaddr12only:$addr)>;
// f128 multiplication of two FP64 registers. // f128 multiplication of two FP64 registers.
let Uses = [FPC], mayRaiseFPException = 1 in let Uses = [FPC], mayRaiseFPException = 1 in
def MXDBR : BinaryRRE<"mxdbr", 0xB307, null_frag, FP128, FP64>; def MXDBR : BinaryRRE<"mxdbr", 0xB307, null_frag, FP128, FP64>;
let Predicates = [FeatureNoVectorEnhancements1] in let Predicates = [FeatureNoVectorEnhancements1] in
def : Pat<(any_fmul (f128 (fpextend FP64:$src1)), def : Pat<(any_fmul (f128 (any_fpextend FP64:$src1)),
(f128 (fpextend FP64:$src2))), (f128 (any_fpextend FP64:$src2))),
(MXDBR (INSERT_SUBREG (f128 (IMPLICIT_DEF)), (MXDBR (INSERT_SUBREG (f128 (IMPLICIT_DEF)),
FP64:$src1, subreg_h64), FP64:$src2)>; FP64:$src1, subreg_h64), FP64:$src2)>;
// f128 multiplication of an FP64 register and an f64 memory. // f128 multiplication of an FP64 register and an f64 memory.
let Uses = [FPC], mayRaiseFPException = 1 in let Uses = [FPC], mayRaiseFPException = 1 in
def MXDB : BinaryRXE<"mxdb", 0xED07, null_frag, FP128, load, 8>; def MXDB : BinaryRXE<"mxdb", 0xED07, null_frag, FP128, load, 8>;
let Predicates = [FeatureNoVectorEnhancements1] in let Predicates = [FeatureNoVectorEnhancements1] in
def : Pat<(any_fmul (f128 (fpextend FP64:$src1)), def : Pat<(any_fmul (f128 (any_fpextend FP64:$src1)),
(f128 (extloadf64 bdxaddr12only:$addr))), (f128 (any_extloadf64 bdxaddr12only:$addr))),
(MXDB (INSERT_SUBREG (f128 (IMPLICIT_DEF)), FP64:$src1, subreg_h64), (MXDB (INSERT_SUBREG (f128 (IMPLICIT_DEF)), FP64:$src1, subreg_h64),
bdxaddr12only:$addr)>; bdxaddr12only:$addr)>;
// Fused multiply-add. // Fused multiply-add.
let Uses = [FPC], mayRaiseFPException = 1 in { let Uses = [FPC], mayRaiseFPException = 1 in {
def MAEBR : TernaryRRD<"maebr", 0xB30E, z_any_fma, FP32, FP32>; def MAEBR : TernaryRRD<"maebr", 0xB30E, z_any_fma, FP32, FP32>;
def MADBR : TernaryRRD<"madbr", 0xB31E, z_any_fma, FP64, FP64>; def MADBR : TernaryRRD<"madbr", 0xB31E, z_any_fma, FP64, FP64>;
▲ Show 20 Lines • Show All 94 Lines • Show Last 20 Lines

llvm/test/CodeGen/SystemZ/fp-strict-mul-02.ll

; Test strict multiplication of two f32s, producing an f64 result. ; Test strict multiplication of two f32s, producing an f64 result.
; FIXME: We should use llvm.experimental.constrained.fpext, but we currently
; cannot match a combination of two strict operations in ISel.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
declare float @foo() declare float @foo()
declare double @llvm.experimental.constrained.fmul.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.fmul.f64(double, double, metadata, metadata)
declare float @llvm.experimental.constrained.fadd.f32(float, float, metadata, metadata) declare float @llvm.experimental.constrained.fadd.f32(float, float, metadata, metadata)
declare float @llvm.experimental.constrained.fptrunc.f32.f64(double, metadata, metadata) declare float @llvm.experimental.constrained.fptrunc.f32.f64(double, metadata, metadata)
declare double @llvm.experimental.constrained.fpext.f64.f32(float, metadata)
; Check register multiplication. ; Check register multiplication.
define double @f1(float %f1, float %f2) #0 { define double @f1(float %f1, float %f2) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: mdebr %f0, %f2 ; CHECK: mdebr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%f1x = fpext float %f1 to double %f1x = call double @llvm.experimental.constrained.fpext.f64.f32(
%f2x = fpext float %f2 to double float %f1,
metadata !"fpexcept.strict") #0
%f2x = call double @llvm.experimental.constrained.fpext.f64.f32(
float %f2,
metadata !"fpexcept.strict") #0
%res = call double @llvm.experimental.constrained.fmul.f64( %res = call double @llvm.experimental.constrained.fmul.f64(
double %f1x, double %f2x, double %f1x, double %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check the low end of the MDEB range. ; Check the low end of the MDEB range.
define double @f2(float %f1, float *%ptr) #0 { define double @f2(float %f1, float *%ptr) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: mdeb %f0, 0(%r2) ; CHECK: mdeb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%f1x = fpext float %f1 to double %f1x = call double @llvm.experimental.constrained.fpext.f64.f32(
%f2x = fpext float %f2 to double float %f1,
metadata !"fpexcept.strict") #0
%f2x = call double @llvm.experimental.constrained.fpext.f64.f32(
float %f2,
metadata !"fpexcept.strict") #0
%res = call double @llvm.experimental.constrained.fmul.f64( %res = call double @llvm.experimental.constrained.fmul.f64(
double %f1x, double %f2x, double %f1x, double %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check the high end of the aligned MDEB range. ; Check the high end of the aligned MDEB range.
define double @f3(float %f1, float *%base) #0 { define double @f3(float %f1, float *%base) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: mdeb %f0, 4092(%r2) ; CHECK: mdeb %f0, 4092(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 1023 %ptr = getelementptr float, float *%base, i64 1023
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%f1x = fpext float %f1 to double %f1x = call double @llvm.experimental.constrained.fpext.f64.f32(
%f2x = fpext float %f2 to double float %f1,
metadata !"fpexcept.strict") #0
%f2x = call double @llvm.experimental.constrained.fpext.f64.f32(
float %f2,
metadata !"fpexcept.strict") #0
%res = call double @llvm.experimental.constrained.fmul.f64( %res = call double @llvm.experimental.constrained.fmul.f64(
double %f1x, double %f2x, double %f1x, double %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check the next word up, which needs separate address logic. ; Check the next word up, which needs separate address logic.
; Other sequences besides this one would be OK. ; Other sequences besides this one would be OK.
define double @f4(float %f1, float *%base) #0 { define double @f4(float %f1, float *%base) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: aghi %r2, 4096 ; CHECK: aghi %r2, 4096
; CHECK: mdeb %f0, 0(%r2) ; CHECK: mdeb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 1024 %ptr = getelementptr float, float *%base, i64 1024
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%f1x = fpext float %f1 to double %f1x = call double @llvm.experimental.constrained.fpext.f64.f32(
%f2x = fpext float %f2 to double float %f1,
metadata !"fpexcept.strict") #0
%f2x = call double @llvm.experimental.constrained.fpext.f64.f32(
float %f2,
metadata !"fpexcept.strict") #0
%res = call double @llvm.experimental.constrained.fmul.f64( %res = call double @llvm.experimental.constrained.fmul.f64(
double %f1x, double %f2x, double %f1x, double %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check negative displacements, which also need separate address logic. ; Check negative displacements, which also need separate address logic.
define double @f5(float %f1, float *%base) #0 { define double @f5(float %f1, float *%base) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: aghi %r2, -4 ; CHECK: aghi %r2, -4
; CHECK: mdeb %f0, 0(%r2) ; CHECK: mdeb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 -1 %ptr = getelementptr float, float *%base, i64 -1
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%f1x = fpext float %f1 to double %f1x = call double @llvm.experimental.constrained.fpext.f64.f32(
%f2x = fpext float %f2 to double float %f1,
metadata !"fpexcept.strict") #0
%f2x = call double @llvm.experimental.constrained.fpext.f64.f32(
float %f2,
metadata !"fpexcept.strict") #0
%res = call double @llvm.experimental.constrained.fmul.f64( %res = call double @llvm.experimental.constrained.fmul.f64(
double %f1x, double %f2x, double %f1x, double %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check that MDEB allows indices. ; Check that MDEB allows indices.
define double @f6(float %f1, float *%base, i64 %index) #0 { define double @f6(float %f1, float *%base, i64 %index) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: sllg %r1, %r3, 2 ; CHECK: sllg %r1, %r3, 2
; CHECK: mdeb %f0, 400(%r1,%r2) ; CHECK: mdeb %f0, 400(%r1,%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr float, float *%base, i64 %index %ptr1 = getelementptr float, float *%base, i64 %index
%ptr2 = getelementptr float, float *%ptr1, i64 100 %ptr2 = getelementptr float, float *%ptr1, i64 100
%f2 = load float, float *%ptr2 %f2 = load float, float *%ptr2
%f1x = fpext float %f1 to double %f1x = call double @llvm.experimental.constrained.fpext.f64.f32(
%f2x = fpext float %f2 to double float %f1,
metadata !"fpexcept.strict") #0
%f2x = call double @llvm.experimental.constrained.fpext.f64.f32(
float %f2,
metadata !"fpexcept.strict") #0
%res = call double @llvm.experimental.constrained.fmul.f64( %res = call double @llvm.experimental.constrained.fmul.f64(
double %f1x, double %f2x, double %f1x, double %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check that multiplications of spilled values can use MDEB rather than MDEBR. ; Check that multiplications of spilled values can use MDEB rather than MDEBR.
▲ Show 20 Lines • Show All 79 Lines • ▼ Show 20 Lines; CHECK: br %r14
store float %frob6, float *%ptr6 store float %frob6, float *%ptr6
store float %frob7, float *%ptr7 store float %frob7, float *%ptr7
store float %frob8, float *%ptr8 store float %frob8, float *%ptr8
store float %frob9, float *%ptr9 store float %frob9, float *%ptr9
store float %frob10, float *%ptr10 store float %frob10, float *%ptr10
%ret = call float @foo() #0 %ret = call float @foo() #0
%accext0 = fpext float %ret to double %accext0 = call double @llvm.experimental.constrained.fpext.f64.f32(
%ext0 = fpext float %frob0 to double float %ret,
metadata !"fpexcept.strict") #0
%ext0 = call double @llvm.experimental.constrained.fpext.f64.f32(
float %frob0,
metadata !"fpexcept.strict") #0
%mul0 = call double @llvm.experimental.constrained.fmul.f64( %mul0 = call double @llvm.experimental.constrained.fmul.f64(
double %accext0, double %ext0, double %accext0, double %ext0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%extra0 = call double @llvm.experimental.constrained.fmul.f64( %extra0 = call double @llvm.experimental.constrained.fmul.f64(
double %mul0, double 1.01, double %mul0, double 1.01,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%trunc0 = call float @llvm.experimental.constrained.fptrunc.f32.f64( %trunc0 = call float @llvm.experimental.constrained.fptrunc.f32.f64(
double %extra0, double %extra0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%accext1 = fpext float %trunc0 to double %accext1 = call double @llvm.experimental.constrained.fpext.f64.f32(
%ext1 = fpext float %frob1 to double float %trunc0,
metadata !"fpexcept.strict") #0
%ext1 = call double @llvm.experimental.constrained.fpext.f64.f32(
float %frob1,
metadata !"fpexcept.strict") #0
%mul1 = call double @llvm.experimental.constrained.fmul.f64( %mul1 = call double @llvm.experimental.constrained.fmul.f64(
double %accext1, double %ext1, double %accext1, double %ext1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%extra1 = call double @llvm.experimental.constrained.fmul.f64( %extra1 = call double @llvm.experimental.constrained.fmul.f64(
double %mul1, double 1.11, double %mul1, double 1.11,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%trunc1 = call float @llvm.experimental.constrained.fptrunc.f32.f64( %trunc1 = call float @llvm.experimental.constrained.fptrunc.f32.f64(
double %extra1, double %extra1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%accext2 = fpext float %trunc1 to double %accext2 = call double @llvm.experimental.constrained.fpext.f64.f32(
%ext2 = fpext float %frob2 to double float %trunc1,
metadata !"fpexcept.strict") #0
%ext2 = call double @llvm.experimental.constrained.fpext.f64.f32(
float %frob2,
metadata !"fpexcept.strict") #0
%mul2 = call double @llvm.experimental.constrained.fmul.f64( %mul2 = call double @llvm.experimental.constrained.fmul.f64(
double %accext2, double %ext2, double %accext2, double %ext2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%extra2 = call double @llvm.experimental.constrained.fmul.f64( %extra2 = call double @llvm.experimental.constrained.fmul.f64(
double %mul2, double 1.21, double %mul2, double 1.21,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%trunc2 = call float @llvm.experimental.constrained.fptrunc.f32.f64( %trunc2 = call float @llvm.experimental.constrained.fptrunc.f32.f64(
double %extra2, double %extra2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%accext3 = fpext float %trunc2 to double %accext3 = call double @llvm.experimental.constrained.fpext.f64.f32(
%ext3 = fpext float %frob3 to double float %trunc2,
metadata !"fpexcept.strict") #0
%ext3 = call double @llvm.experimental.constrained.fpext.f64.f32(
float %frob3,
metadata !"fpexcept.strict") #0
%mul3 = call double @llvm.experimental.constrained.fmul.f64( %mul3 = call double @llvm.experimental.constrained.fmul.f64(
double %accext3, double %ext3, double %accext3, double %ext3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%extra3 = call double @llvm.experimental.constrained.fmul.f64( %extra3 = call double @llvm.experimental.constrained.fmul.f64(
double %mul3, double 1.31, double %mul3, double 1.31,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%trunc3 = call float @llvm.experimental.constrained.fptrunc.f32.f64( %trunc3 = call float @llvm.experimental.constrained.fptrunc.f32.f64(
double %extra3, double %extra3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%accext4 = fpext float %trunc3 to double %accext4 = call double @llvm.experimental.constrained.fpext.f64.f32(
%ext4 = fpext float %frob4 to double float %trunc3,
metadata !"fpexcept.strict") #0
%ext4 = call double @llvm.experimental.constrained.fpext.f64.f32(
float %frob4,
metadata !"fpexcept.strict") #0
%mul4 = call double @llvm.experimental.constrained.fmul.f64( %mul4 = call double @llvm.experimental.constrained.fmul.f64(
double %accext4, double %ext4, double %accext4, double %ext4,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%extra4 = call double @llvm.experimental.constrained.fmul.f64( %extra4 = call double @llvm.experimental.constrained.fmul.f64(
double %mul4, double 1.41, double %mul4, double 1.41,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%trunc4 = call float @llvm.experimental.constrained.fptrunc.f32.f64( %trunc4 = call float @llvm.experimental.constrained.fptrunc.f32.f64(
double %extra4, double %extra4,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%accext5 = fpext float %trunc4 to double %accext5 = call double @llvm.experimental.constrained.fpext.f64.f32(
%ext5 = fpext float %frob5 to double float %trunc4,
metadata !"fpexcept.strict") #0
%ext5 = call double @llvm.experimental.constrained.fpext.f64.f32(
float %frob5,
metadata !"fpexcept.strict") #0
%mul5 = call double @llvm.experimental.constrained.fmul.f64( %mul5 = call double @llvm.experimental.constrained.fmul.f64(
double %accext5, double %ext5, double %accext5, double %ext5,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%extra5 = call double @llvm.experimental.constrained.fmul.f64( %extra5 = call double @llvm.experimental.constrained.fmul.f64(
double %mul5, double 1.51, double %mul5, double 1.51,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%trunc5 = call float @llvm.experimental.constrained.fptrunc.f32.f64( %trunc5 = call float @llvm.experimental.constrained.fptrunc.f32.f64(
double %extra5, double %extra5,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%accext6 = fpext float %trunc5 to double %accext6 = call double @llvm.experimental.constrained.fpext.f64.f32(
%ext6 = fpext float %frob6 to double float %trunc5,
metadata !"fpexcept.strict") #0
%ext6 = call double @llvm.experimental.constrained.fpext.f64.f32(
float %frob6,
metadata !"fpexcept.strict") #0
%mul6 = call double @llvm.experimental.constrained.fmul.f64( %mul6 = call double @llvm.experimental.constrained.fmul.f64(
double %accext6, double %ext6, double %accext6, double %ext6,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%extra6 = call double @llvm.experimental.constrained.fmul.f64( %extra6 = call double @llvm.experimental.constrained.fmul.f64(
double %mul6, double 1.61, double %mul6, double 1.61,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%trunc6 = call float @llvm.experimental.constrained.fptrunc.f32.f64( %trunc6 = call float @llvm.experimental.constrained.fptrunc.f32.f64(
double %extra6, double %extra6,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%accext7 = fpext float %trunc6 to double %accext7 = call double @llvm.experimental.constrained.fpext.f64.f32(
%ext7 = fpext float %frob7 to double float %trunc6,
metadata !"fpexcept.strict") #0
%ext7 = call double @llvm.experimental.constrained.fpext.f64.f32(
float %frob7,
metadata !"fpexcept.strict") #0
%mul7 = call double @llvm.experimental.constrained.fmul.f64( %mul7 = call double @llvm.experimental.constrained.fmul.f64(
double %accext7, double %ext7, double %accext7, double %ext7,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%extra7 = call double @llvm.experimental.constrained.fmul.f64( %extra7 = call double @llvm.experimental.constrained.fmul.f64(
double %mul7, double 1.71, double %mul7, double 1.71,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%trunc7 = call float @llvm.experimental.constrained.fptrunc.f32.f64( %trunc7 = call float @llvm.experimental.constrained.fptrunc.f32.f64(
double %extra7, double %extra7,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%accext8 = fpext float %trunc7 to double %accext8 = call double @llvm.experimental.constrained.fpext.f64.f32(
%ext8 = fpext float %frob8 to double float %trunc7,
metadata !"fpexcept.strict") #0
%ext8 = call double @llvm.experimental.constrained.fpext.f64.f32(
float %frob8,
metadata !"fpexcept.strict") #0
%mul8 = call double @llvm.experimental.constrained.fmul.f64( %mul8 = call double @llvm.experimental.constrained.fmul.f64(
double %accext8, double %ext8, double %accext8, double %ext8,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%extra8 = call double @llvm.experimental.constrained.fmul.f64( %extra8 = call double @llvm.experimental.constrained.fmul.f64(
double %mul8, double 1.81, double %mul8, double 1.81,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%trunc8 = call float @llvm.experimental.constrained.fptrunc.f32.f64( %trunc8 = call float @llvm.experimental.constrained.fptrunc.f32.f64(
double %extra8, double %extra8,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%accext9 = fpext float %trunc8 to double %accext9 = call double @llvm.experimental.constrained.fpext.f64.f32(
%ext9 = fpext float %frob9 to double float %trunc8,
metadata !"fpexcept.strict") #0
%ext9 = call double @llvm.experimental.constrained.fpext.f64.f32(
float %frob9,
metadata !"fpexcept.strict") #0
%mul9 = call double @llvm.experimental.constrained.fmul.f64( %mul9 = call double @llvm.experimental.constrained.fmul.f64(
double %accext9, double %ext9, double %accext9, double %ext9,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%extra9 = call double @llvm.experimental.constrained.fmul.f64( %extra9 = call double @llvm.experimental.constrained.fmul.f64(
double %mul9, double 1.91, double %mul9, double 1.91,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
Show All 9 Lines

llvm/test/CodeGen/SystemZ/fp-strict-mul-04.ll

; Test strict multiplication of two f64s, producing an f128 result. ; Test strict multiplication of two f64s, producing an f128 result.
; FIXME: We should use llvm.experimental.constrained.fpext, but we currently
; cannot match a combination of two strict operations in ISel.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
declare fp128 @llvm.experimental.constrained.fmul.f128(fp128, fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.fmul.f128(fp128, fp128, metadata, metadata)
declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata)
declare double @llvm.experimental.constrained.fptrunc.f64.f128(fp128, metadata, metadata) declare double @llvm.experimental.constrained.fptrunc.f64.f128(fp128, metadata, metadata)
declare fp128 @llvm.experimental.constrained.fpext.f128.f64(double, metadata)
declare double @foo() declare double @foo()
; Check register multiplication. "mxdbr %f0, %f2" is not valid from LLVM's ; Check register multiplication. "mxdbr %f0, %f2" is not valid from LLVM's
; point of view, because %f2 is the low register of the FP128 %f0. Pass the ; point of view, because %f2 is the low register of the FP128 %f0. Pass the
; multiplier in %f4 instead. ; multiplier in %f4 instead.
define void @f1(double %f1, double %dummy, double %f2, fp128 *%dst) #0 { define void @f1(double %f1, double %dummy, double %f2, fp128 *%dst) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: mxdbr %f0, %f4 ; CHECK: mxdbr %f0, %f4
; CHECK: std %f0, 0(%r2) ; CHECK: std %f0, 0(%r2)
; CHECK: std %f2, 8(%r2) ; CHECK: std %f2, 8(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%f1x = fpext double %f1 to fp128 %f1x = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
%f2x = fpext double %f2 to fp128 double %f1,
metadata !"fpexcept.strict") #0
%f2x = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
double %f2,
metadata !"fpexcept.strict") #0
%res = call fp128 @llvm.experimental.constrained.fmul.f128( %res = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %f1x, fp128 %f2x, fp128 %f1x, fp128 %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
; Check the low end of the MXDB range. ; Check the low end of the MXDB range.
define void @f2(double %f1, double *%ptr, fp128 *%dst) #0 { define void @f2(double %f1, double *%ptr, fp128 *%dst) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: mxdb %f0, 0(%r2) ; CHECK: mxdb %f0, 0(%r2)
; CHECK: std %f0, 0(%r3) ; CHECK: std %f0, 0(%r3)
; CHECK: std %f2, 8(%r3) ; CHECK: std %f2, 8(%r3)
; CHECK: br %r14 ; CHECK: br %r14
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%f1x = fpext double %f1 to fp128 %f1x = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
%f2x = fpext double %f2 to fp128 double %f1,
metadata !"fpexcept.strict") #0
%f2x = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
double %f2,
metadata !"fpexcept.strict") #0
%res = call fp128 @llvm.experimental.constrained.fmul.f128( %res = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %f1x, fp128 %f2x, fp128 %f1x, fp128 %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
; Check the high end of the aligned MXDB range. ; Check the high end of the aligned MXDB range.
define void @f3(double %f1, double *%base, fp128 *%dst) #0 { define void @f3(double %f1, double *%base, fp128 *%dst) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: mxdb %f0, 4088(%r2) ; CHECK: mxdb %f0, 4088(%r2)
; CHECK: std %f0, 0(%r3) ; CHECK: std %f0, 0(%r3)
; CHECK: std %f2, 8(%r3) ; CHECK: std %f2, 8(%r3)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 511 %ptr = getelementptr double, double *%base, i64 511
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%f1x = fpext double %f1 to fp128 %f1x = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
%f2x = fpext double %f2 to fp128 double %f1,
metadata !"fpexcept.strict") #0
%f2x = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
double %f2,
metadata !"fpexcept.strict") #0
%res = call fp128 @llvm.experimental.constrained.fmul.f128( %res = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %f1x, fp128 %f2x, fp128 %f1x, fp128 %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
; Check the next doubleword up, which needs separate address logic. ; Check the next doubleword up, which needs separate address logic.
; Other sequences besides this one would be OK. ; Other sequences besides this one would be OK.
define void @f4(double %f1, double *%base, fp128 *%dst) #0 { define void @f4(double %f1, double *%base, fp128 *%dst) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: aghi %r2, 4096 ; CHECK: aghi %r2, 4096
; CHECK: mxdb %f0, 0(%r2) ; CHECK: mxdb %f0, 0(%r2)
; CHECK: std %f0, 0(%r3) ; CHECK: std %f0, 0(%r3)
; CHECK: std %f2, 8(%r3) ; CHECK: std %f2, 8(%r3)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 512 %ptr = getelementptr double, double *%base, i64 512
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%f1x = fpext double %f1 to fp128 %f1x = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
%f2x = fpext double %f2 to fp128 double %f1,
metadata !"fpexcept.strict") #0
%f2x = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
double %f2,
metadata !"fpexcept.strict") #0
%res = call fp128 @llvm.experimental.constrained.fmul.f128( %res = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %f1x, fp128 %f2x, fp128 %f1x, fp128 %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
; Check negative displacements, which also need separate address logic. ; Check negative displacements, which also need separate address logic.
define void @f5(double %f1, double *%base, fp128 *%dst) #0 { define void @f5(double %f1, double *%base, fp128 *%dst) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: aghi %r2, -8 ; CHECK: aghi %r2, -8
; CHECK: mxdb %f0, 0(%r2) ; CHECK: mxdb %f0, 0(%r2)
; CHECK: std %f0, 0(%r3) ; CHECK: std %f0, 0(%r3)
; CHECK: std %f2, 8(%r3) ; CHECK: std %f2, 8(%r3)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 -1 %ptr = getelementptr double, double *%base, i64 -1
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%f1x = fpext double %f1 to fp128 %f1x = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
%f2x = fpext double %f2 to fp128 double %f1,
metadata !"fpexcept.strict") #0
%f2x = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
double %f2,
metadata !"fpexcept.strict") #0
%res = call fp128 @llvm.experimental.constrained.fmul.f128( %res = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %f1x, fp128 %f2x, fp128 %f1x, fp128 %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
; Check that MXDB allows indices. ; Check that MXDB allows indices.
define void @f6(double %f1, double *%base, i64 %index, fp128 *%dst) #0 { define void @f6(double %f1, double *%base, i64 %index, fp128 *%dst) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: sllg %r1, %r3, 3 ; CHECK: sllg %r1, %r3, 3
; CHECK: mxdb %f0, 800(%r1,%r2) ; CHECK: mxdb %f0, 800(%r1,%r2)
; CHECK: std %f0, 0(%r4) ; CHECK: std %f0, 0(%r4)
; CHECK: std %f2, 8(%r4) ; CHECK: std %f2, 8(%r4)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr double, double *%base, i64 %index %ptr1 = getelementptr double, double *%base, i64 %index
%ptr2 = getelementptr double, double *%ptr1, i64 100 %ptr2 = getelementptr double, double *%ptr1, i64 100
%f2 = load double, double *%ptr2 %f2 = load double, double *%ptr2
%f1x = fpext double %f1 to fp128 %f1x = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
%f2x = fpext double %f2 to fp128 double %f1,
metadata !"fpexcept.strict") #0
%f2x = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
double %f2,
metadata !"fpexcept.strict") #0
%res = call fp128 @llvm.experimental.constrained.fmul.f128( %res = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %f1x, fp128 %f2x, fp128 %f1x, fp128 %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
▲ Show 20 Lines • Show All 80 Lines • ▼ Show 20 Lines; CHECK: br %r14
store double %frob6, double *%ptr6 store double %frob6, double *%ptr6
store double %frob7, double *%ptr7 store double %frob7, double *%ptr7
store double %frob8, double *%ptr8 store double %frob8, double *%ptr8
store double %frob9, double *%ptr9 store double %frob9, double *%ptr9
store double %frob10, double *%ptr10 store double %frob10, double *%ptr10
%ret = call double @foo() #0 %ret = call double @foo() #0
%accext0 = fpext double %ret to fp128 %accext0 = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
%ext0 = fpext double %frob0 to fp128 double %ret,
metadata !"fpexcept.strict") #0
%ext0 = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
double %frob0,
metadata !"fpexcept.strict") #0
%mul0 = call fp128 @llvm.experimental.constrained.fmul.f128( %mul0 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %accext0, fp128 %ext0, fp128 %accext0, fp128 %ext0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%extra0 = call fp128 @llvm.experimental.constrained.fmul.f128( %extra0 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %mul0, fp128 0xL00000000000000003fff000001000000, fp128 %mul0, fp128 0xL00000000000000003fff000001000000,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%trunc0 = call double @llvm.experimental.constrained.fptrunc.f64.f128( %trunc0 = call double @llvm.experimental.constrained.fptrunc.f64.f128(
fp128 %extra0, fp128 %extra0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%accext1 = fpext double %trunc0 to fp128 %accext1 = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
%ext1 = fpext double %frob1 to fp128 double %trunc0,
metadata !"fpexcept.strict") #0
%ext1 = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
double %frob1,
metadata !"fpexcept.strict") #0
%mul1 = call fp128 @llvm.experimental.constrained.fmul.f128( %mul1 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %accext1, fp128 %ext1, fp128 %accext1, fp128 %ext1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%extra1 = call fp128 @llvm.experimental.constrained.fmul.f128( %extra1 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %mul1, fp128 0xL00000000000000003fff000002000000, fp128 %mul1, fp128 0xL00000000000000003fff000002000000,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%trunc1 = call double @llvm.experimental.constrained.fptrunc.f64.f128( %trunc1 = call double @llvm.experimental.constrained.fptrunc.f64.f128(
fp128 %extra1, fp128 %extra1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%accext2 = fpext double %trunc1 to fp128 %accext2 = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
%ext2 = fpext double %frob2 to fp128 double %trunc1,
metadata !"fpexcept.strict") #0
%ext2 = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
double %frob2,
metadata !"fpexcept.strict") #0
%mul2 = call fp128 @llvm.experimental.constrained.fmul.f128( %mul2 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %accext2, fp128 %ext2, fp128 %accext2, fp128 %ext2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%extra2 = call fp128 @llvm.experimental.constrained.fmul.f128( %extra2 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %mul2, fp128 0xL00000000000000003fff000003000000, fp128 %mul2, fp128 0xL00000000000000003fff000003000000,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%trunc2 = call double @llvm.experimental.constrained.fptrunc.f64.f128( %trunc2 = call double @llvm.experimental.constrained.fptrunc.f64.f128(
fp128 %extra2, fp128 %extra2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%accext3 = fpext double %trunc2 to fp128 %accext3 = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
%ext3 = fpext double %frob3 to fp128 double %trunc2,
metadata !"fpexcept.strict") #0
%ext3 = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
double %frob3,
metadata !"fpexcept.strict") #0
%mul3 = call fp128 @llvm.experimental.constrained.fmul.f128( %mul3 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %accext3, fp128 %ext3, fp128 %accext3, fp128 %ext3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%extra3 = call fp128 @llvm.experimental.constrained.fmul.f128( %extra3 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %mul3, fp128 0xL00000000000000003fff000004000000, fp128 %mul3, fp128 0xL00000000000000003fff000004000000,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%trunc3 = call double @llvm.experimental.constrained.fptrunc.f64.f128( %trunc3 = call double @llvm.experimental.constrained.fptrunc.f64.f128(
fp128 %extra3, fp128 %extra3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%accext4 = fpext double %trunc3 to fp128 %accext4 = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
%ext4 = fpext double %frob4 to fp128 double %trunc3,
metadata !"fpexcept.strict") #0
%ext4 = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
double %frob4,
metadata !"fpexcept.strict") #0
%mul4 = call fp128 @llvm.experimental.constrained.fmul.f128( %mul4 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %accext4, fp128 %ext4, fp128 %accext4, fp128 %ext4,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%extra4 = call fp128 @llvm.experimental.constrained.fmul.f128( %extra4 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %mul4, fp128 0xL00000000000000003fff000005000000, fp128 %mul4, fp128 0xL00000000000000003fff000005000000,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%trunc4 = call double @llvm.experimental.constrained.fptrunc.f64.f128( %trunc4 = call double @llvm.experimental.constrained.fptrunc.f64.f128(
fp128 %extra4, fp128 %extra4,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%accext5 = fpext double %trunc4 to fp128 %accext5 = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
%ext5 = fpext double %frob5 to fp128 double %trunc4,
metadata !"fpexcept.strict") #0
%ext5 = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
double %frob5,
metadata !"fpexcept.strict") #0
%mul5 = call fp128 @llvm.experimental.constrained.fmul.f128( %mul5 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %accext5, fp128 %ext5, fp128 %accext5, fp128 %ext5,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%extra5 = call fp128 @llvm.experimental.constrained.fmul.f128( %extra5 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %mul5, fp128 0xL00000000000000003fff000006000000, fp128 %mul5, fp128 0xL00000000000000003fff000006000000,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%trunc5 = call double @llvm.experimental.constrained.fptrunc.f64.f128( %trunc5 = call double @llvm.experimental.constrained.fptrunc.f64.f128(
fp128 %extra5, fp128 %extra5,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%accext6 = fpext double %trunc5 to fp128 %accext6 = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
%ext6 = fpext double %frob6 to fp128 double %trunc5,
metadata !"fpexcept.strict") #0
%ext6 = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
double %frob6,
metadata !"fpexcept.strict") #0
%mul6 = call fp128 @llvm.experimental.constrained.fmul.f128( %mul6 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %accext6, fp128 %ext6, fp128 %accext6, fp128 %ext6,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%extra6 = call fp128 @llvm.experimental.constrained.fmul.f128( %extra6 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %mul6, fp128 0xL00000000000000003fff000007000000, fp128 %mul6, fp128 0xL00000000000000003fff000007000000,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%trunc6 = call double @llvm.experimental.constrained.fptrunc.f64.f128( %trunc6 = call double @llvm.experimental.constrained.fptrunc.f64.f128(
fp128 %extra6, fp128 %extra6,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%accext7 = fpext double %trunc6 to fp128 %accext7 = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
%ext7 = fpext double %frob7 to fp128 double %trunc6,
metadata !"fpexcept.strict") #0
%ext7 = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
double %frob7,
metadata !"fpexcept.strict") #0
%mul7 = call fp128 @llvm.experimental.constrained.fmul.f128( %mul7 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %accext7, fp128 %ext7, fp128 %accext7, fp128 %ext7,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%extra7 = call fp128 @llvm.experimental.constrained.fmul.f128( %extra7 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %mul7, fp128 0xL00000000000000003fff000008000000, fp128 %mul7, fp128 0xL00000000000000003fff000008000000,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%trunc7 = call double @llvm.experimental.constrained.fptrunc.f64.f128( %trunc7 = call double @llvm.experimental.constrained.fptrunc.f64.f128(
fp128 %extra7, fp128 %extra7,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%accext8 = fpext double %trunc7 to fp128 %accext8 = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
%ext8 = fpext double %frob8 to fp128 double %trunc7,
metadata !"fpexcept.strict") #0
%ext8 = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
double %frob8,
metadata !"fpexcept.strict") #0
%mul8 = call fp128 @llvm.experimental.constrained.fmul.f128( %mul8 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %accext8, fp128 %ext8, fp128 %accext8, fp128 %ext8,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%extra8 = call fp128 @llvm.experimental.constrained.fmul.f128( %extra8 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %mul8, fp128 0xL00000000000000003fff000009000000, fp128 %mul8, fp128 0xL00000000000000003fff000009000000,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%trunc8 = call double @llvm.experimental.constrained.fptrunc.f64.f128( %trunc8 = call double @llvm.experimental.constrained.fptrunc.f64.f128(
fp128 %extra8, fp128 %extra8,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%accext9 = fpext double %trunc8 to fp128 %accext9 = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
%ext9 = fpext double %frob9 to fp128 double %trunc8,
metadata !"fpexcept.strict") #0
%ext9 = call fp128 @llvm.experimental.constrained.fpext.f128.f64(
double %frob9,
metadata !"fpexcept.strict") #0
%mul9 = call fp128 @llvm.experimental.constrained.fmul.f128( %mul9 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %accext9, fp128 %ext9, fp128 %accext9, fp128 %ext9,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
%extra9 = call fp128 @llvm.experimental.constrained.fmul.f128( %extra9 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %mul9, fp128 0xL00000000000000003fff00000a000000, fp128 %mul9, fp128 0xL00000000000000003fff00000a000000,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
Show All 9 Lines

llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll

Show All 27 Lines
} }
define <2 x double> @constrained_vector_fdiv_v2f64() #0 { define <2 x double> @constrained_vector_fdiv_v2f64() #0 {
; S390X-LABEL: constrained_vector_fdiv_v2f64: ; S390X-LABEL: constrained_vector_fdiv_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI1_0 ; S390X-NEXT: larl %r1, .LCPI1_0
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ldeb %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI1_1 ; S390X-NEXT: larl %r1, .LCPI1_1
; S390X-NEXT: ldeb %f2, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI1_2
; S390X-NEXT: ldeb %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: ddbr %f2, %f1 ; S390X-NEXT: larl %r1, .LCPI1_2
; S390X-NEXT: ldeb %f2, 0(%r1)
; S390X-NEXT: ddbr %f0, %f1 ; S390X-NEXT: ddbr %f0, %f1
; S390X-NEXT: ddbr %f2, %f1
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fdiv_v2f64: ; SZ13-LABEL: constrained_vector_fdiv_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI1_0 ; SZ13-NEXT: larl %r1, .LCPI1_0
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: larl %r1, .LCPI1_1 ; SZ13-NEXT: larl %r1, .LCPI1_1
; SZ13-NEXT: vl %v1, 0(%r1), 3 ; SZ13-NEXT: vl %v1, 0(%r1), 3
Show All 9 Lines
} }
define <3 x float> @constrained_vector_fdiv_v3f32() #0 { define <3 x float> @constrained_vector_fdiv_v3f32() #0 {
; S390X-LABEL: constrained_vector_fdiv_v3f32: ; S390X-LABEL: constrained_vector_fdiv_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI2_0 ; S390X-NEXT: larl %r1, .LCPI2_0
; S390X-NEXT: le %f1, 0(%r1) ; S390X-NEXT: le %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI2_1 ; S390X-NEXT: larl %r1, .LCPI2_1
; S390X-NEXT: le %f4, 0(%r1) ; S390X-NEXT: le %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI2_2 ; S390X-NEXT: larl %r1, .LCPI2_2
; S390X-NEXT: le %f2, 0(%r1) ; S390X-NEXT: le %f2, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI2_3 ; S390X-NEXT: larl %r1, .LCPI2_3
; S390X-NEXT: le %f0, 0(%r1) ; S390X-NEXT: le %f4, 0(%r1)
; S390X-NEXT: debr %f4, %f1
; S390X-NEXT: debr %f2, %f1
; S390X-NEXT: debr %f0, %f1 ; S390X-NEXT: debr %f0, %f1
; S390X-NEXT: debr %f2, %f1
; S390X-NEXT: debr %f4, %f1
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fdiv_v3f32: ; SZ13-LABEL: constrained_vector_fdiv_v3f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI2_0 ; SZ13-NEXT: larl %r1, .LCPI2_0
; SZ13-NEXT: lde %f0, 0(%r1) ; SZ13-NEXT: lde %f0, 0(%r1)
; SZ13-NEXT: larl %r1, .LCPI2_1 ; SZ13-NEXT: larl %r1, .LCPI2_1
; SZ13-NEXT: lde %f1, 0(%r1) ; SZ13-NEXT: lde %f1, 0(%r1)
Show All 13 Lines %div = call <3 x float> @llvm.experimental.constrained.fdiv.v3f32(
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
ret <3 x float> %div ret <3 x float> %div
} }
define void @constrained_vector_fdiv_v3f64(<3 x double>* %a) #0 { define void @constrained_vector_fdiv_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_fdiv_v3f64: ; S390X-LABEL: constrained_vector_fdiv_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: ld %f0, 16(%r2)
; S390X-NEXT: ld %f1, 8(%r2)
; S390X-NEXT: larl %r1, .LCPI3_0
; S390X-NEXT: ldeb %f2, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI3_1 ; S390X-NEXT: larl %r1, .LCPI3_1
; S390X-NEXT: ldeb %f3, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI3_2 ; S390X-NEXT: larl %r1, .LCPI3_2
; S390X-NEXT: ldeb %f4, 0(%r1) ; S390X-NEXT: ldeb %f1, 0(%r1)
; S390X-NEXT: ddbr %f3, %f1 ; S390X-NEXT: larl %r1, .LCPI3_0
; S390X-NEXT: ddb %f2, 0(%r2) ; S390X-NEXT: ldeb %f2, 0(%r1)
; S390X-NEXT: ddbr %f4, %f0 ; S390X-NEXT: ddb %f1, 0(%r2)
; S390X-NEXT: std %f4, 16(%r2) ; S390X-NEXT: ddb %f0, 8(%r2)
; S390X-NEXT: std %f3, 8(%r2) ; S390X-NEXT: ddb %f2, 16(%r2)
; S390X-NEXT: std %f2, 0(%r2) ; S390X-NEXT: std %f1, 0(%r2)
; S390X-NEXT: std %f0, 8(%r2)
; S390X-NEXT: std %f2, 16(%r2)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fdiv_v3f64: ; SZ13-LABEL: constrained_vector_fdiv_v3f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI3_0 ; SZ13-NEXT: larl %r1, .LCPI3_0
; SZ13-NEXT: ldeb %f1, 0(%r1) ; SZ13-NEXT: ldeb %f1, 0(%r1)
; SZ13-NEXT: ddb %f1, 16(%r2) ; SZ13-NEXT: ddb %f1, 16(%r2)
; SZ13-NEXT: larl %r1, .LCPI3_1 ; SZ13-NEXT: larl %r1, .LCPI3_1
Show All 15 Lines
} }
define <4 x double> @constrained_vector_fdiv_v4f64() #0 { define <4 x double> @constrained_vector_fdiv_v4f64() #0 {
; S390X-LABEL: constrained_vector_fdiv_v4f64: ; S390X-LABEL: constrained_vector_fdiv_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI4_0 ; S390X-NEXT: larl %r1, .LCPI4_0
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ldeb %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI4_1 ; S390X-NEXT: larl %r1, .LCPI4_1
; S390X-NEXT: ldeb %f6, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI4_2 ; S390X-NEXT: larl %r1, .LCPI4_2
; S390X-NEXT: ldeb %f4, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI4_3
; S390X-NEXT: ldeb %f2, 0(%r1) ; S390X-NEXT: ldeb %f2, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI4_3
; S390X-NEXT: ldeb %f4, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI4_4 ; S390X-NEXT: larl %r1, .LCPI4_4
; S390X-NEXT: ldeb %f0, 0(%r1) ; S390X-NEXT: ldeb %f6, 0(%r1)
; S390X-NEXT: ddbr %f6, %f1
; S390X-NEXT: ddbr %f4, %f1
; S390X-NEXT: ddbr %f2, %f1
; S390X-NEXT: ddbr %f0, %f1 ; S390X-NEXT: ddbr %f0, %f1
; S390X-NEXT: ddbr %f2, %f1
; S390X-NEXT: ddbr %f4, %f1
; S390X-NEXT: ddbr %f6, %f1
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fdiv_v4f64: ; SZ13-LABEL: constrained_vector_fdiv_v4f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI4_0 ; SZ13-NEXT: larl %r1, .LCPI4_0
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: larl %r1, .LCPI4_1 ; SZ13-NEXT: larl %r1, .LCPI4_1
; SZ13-NEXT: vl %v1, 0(%r1), 3 ; SZ13-NEXT: vl %v1, 0(%r1), 3
; SZ13-NEXT: vfddb %v26, %v1, %v0 ; SZ13-NEXT: vfddb %v24, %v1, %v0
; SZ13-NEXT: larl %r1, .LCPI4_2 ; SZ13-NEXT: larl %r1, .LCPI4_2
; SZ13-NEXT: vl %v1, 0(%r1), 3 ; SZ13-NEXT: vl %v1, 0(%r1), 3
; SZ13-NEXT: vfddb %v24, %v1, %v0 ; SZ13-NEXT: vfddb %v26, %v1, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%div = call <4 x double> @llvm.experimental.constrained.fdiv.v4f64( %div = call <4 x double> @llvm.experimental.constrained.fdiv.v4f64(
<4 x double> <double 1.000000e+00, double 2.000000e+00, <4 x double> <double 1.000000e+00, double 2.000000e+00,
double 3.000000e+00, double 4.000000e+00>, double 3.000000e+00, double 4.000000e+00>,
<4 x double> <double 1.000000e+01, double 1.000000e+01, <4 x double> <double 1.000000e+01, double 1.000000e+01,
double 1.000000e+01, double 1.000000e+01>, double 1.000000e+01, double 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
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; S390X-NEXT: ldr %f2, %f8 ; S390X-NEXT: ldr %f2, %f8
; S390X-NEXT: brasl %r14, fmod@PLT ; S390X-NEXT: brasl %r14, fmod@PLT
; S390X-NEXT: larl %r1, .LCPI6_2 ; S390X-NEXT: larl %r1, .LCPI6_2
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ldeb %f1, 0(%r1)
; S390X-NEXT: ldr %f9, %f0 ; S390X-NEXT: ldr %f9, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: ldr %f2, %f8 ; S390X-NEXT: ldr %f2, %f8
; S390X-NEXT: brasl %r14, fmod@PLT ; S390X-NEXT: brasl %r14, fmod@PLT
; S390X-NEXT: ldr %f2, %f9 ; S390X-NEXT: ldr %f2, %f0
; S390X-NEXT: ldr %f0, %f9
; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 288(%r15) ; S390X-NEXT: lmg %r14, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_frem_v2f64: ; SZ13-LABEL: constrained_vector_frem_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: stmg %r14, %r15, 112(%r15) ; SZ13-NEXT: stmg %r14, %r15, 112(%r15)
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; S390X-NEXT: ler %f2, %f8 ; S390X-NEXT: ler %f2, %f8
; S390X-NEXT: brasl %r14, fmodf@PLT ; S390X-NEXT: brasl %r14, fmodf@PLT
; S390X-NEXT: larl %r1, .LCPI7_3 ; S390X-NEXT: larl %r1, .LCPI7_3
; S390X-NEXT: le %f1, 0(%r1) ; S390X-NEXT: le %f1, 0(%r1)
; S390X-NEXT: ler %f10, %f0 ; S390X-NEXT: ler %f10, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: ler %f2, %f8 ; S390X-NEXT: ler %f2, %f8
; S390X-NEXT: brasl %r14, fmodf@PLT ; S390X-NEXT: brasl %r14, fmodf@PLT
; S390X-NEXT: ler %f4, %f0
; S390X-NEXT: ler %f0, %f9
; S390X-NEXT: ler %f2, %f10 ; S390X-NEXT: ler %f2, %f10
; S390X-NEXT: ler %f4, %f9
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 296(%r15) ; S390X-NEXT: lmg %r14, %r15, 296(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_frem_v3f32: ; SZ13-LABEL: constrained_vector_frem_v3f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
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; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: .cfi_offset %f9, -176 ; S390X-NEXT: .cfi_offset %f9, -176
; S390X-NEXT: .cfi_offset %f10, -184 ; S390X-NEXT: .cfi_offset %f10, -184
; S390X-NEXT: lgr %r13, %r2 ; S390X-NEXT: lgr %r13, %r2
; S390X-NEXT: ld %f8, 16(%r2) ; S390X-NEXT: ld %f8, 0(%r2)
; S390X-NEXT: ld %f2, 0(%r2) ; S390X-NEXT: ld %f2, 16(%r2)
; S390X-NEXT: larl %r1, .LCPI8_0 ; S390X-NEXT: larl %r1, .LCPI8_0
; S390X-NEXT: ldeb %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: ld %f9, 8(%r2) ; S390X-NEXT: ld %f9, 8(%r2)
; S390X-NEXT: brasl %r14, fmod@PLT ; S390X-NEXT: brasl %r14, fmod@PLT
; S390X-NEXT: larl %r1, .LCPI8_1 ; S390X-NEXT: larl %r1, .LCPI8_1
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ldeb %f1, 0(%r1)
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: ldr %f2, %f9 ; S390X-NEXT: ldr %f2, %f9
; S390X-NEXT: brasl %r14, fmod@PLT ; S390X-NEXT: brasl %r14, fmod@PLT
; S390X-NEXT: larl %r1, .LCPI8_2 ; S390X-NEXT: larl %r1, .LCPI8_2
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ldeb %f1, 0(%r1)
; S390X-NEXT: ldr %f9, %f0 ; S390X-NEXT: ldr %f9, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: ldr %f2, %f8 ; S390X-NEXT: ldr %f2, %f8
; S390X-NEXT: brasl %r14, fmod@PLT ; S390X-NEXT: brasl %r14, fmod@PLT
; S390X-NEXT: std %f0, 16(%r13) ; S390X-NEXT: std %f0, 0(%r13)
; S390X-NEXT: std %f9, 8(%r13) ; S390X-NEXT: std %f9, 8(%r13)
; S390X-NEXT: std %f10, 0(%r13) ; S390X-NEXT: std %f10, 16(%r13)
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r13, %r15, 288(%r15) ; S390X-NEXT: lmg %r13, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_frem_v3f64: ; SZ13-LABEL: constrained_vector_frem_v3f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
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; S390X-NEXT: ldr %f2, %f8 ; S390X-NEXT: ldr %f2, %f8
; S390X-NEXT: brasl %r14, fmod@PLT ; S390X-NEXT: brasl %r14, fmod@PLT
; S390X-NEXT: larl %r1, .LCPI9_4 ; S390X-NEXT: larl %r1, .LCPI9_4
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ldeb %f1, 0(%r1)
; S390X-NEXT: ldr %f11, %f0 ; S390X-NEXT: ldr %f11, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: ldr %f2, %f8 ; S390X-NEXT: ldr %f2, %f8
; S390X-NEXT: brasl %r14, fmod@PLT ; S390X-NEXT: brasl %r14, fmod@PLT
; S390X-NEXT: ldr %f2, %f11 ; S390X-NEXT: ldr %f6, %f0
; S390X-NEXT: ldr %f4, %f10 ; S390X-NEXT: ldr %f0, %f9
; S390X-NEXT: ldr %f6, %f9 ; S390X-NEXT: ldr %f2, %f10
; S390X-NEXT: ldr %f4, %f11
; S390X-NEXT: ld %f8, 184(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 184(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f11, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f11, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 304(%r15) ; S390X-NEXT: lmg %r14, %r15, 304(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_frem_v4f64: ; SZ13-LABEL: constrained_vector_frem_v4f64:
▲ Show 20 Lines • Show All 70 Lines • ▼ Show 20 Lines %mul = call <1 x float> @llvm.experimental.constrained.fmul.v1f32(
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
ret <1 x float> %mul ret <1 x float> %mul
} }
define <2 x double> @constrained_vector_fmul_v2f64() #0 { define <2 x double> @constrained_vector_fmul_v2f64() #0 {
; S390X-LABEL: constrained_vector_fmul_v2f64: ; S390X-LABEL: constrained_vector_fmul_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI11_0 ; S390X-NEXT: larl %r1, .LCPI11_0
; S390X-NEXT: ldeb %f2, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI11_1 ; S390X-NEXT: larl %r1, .LCPI11_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI11_2 ; S390X-NEXT: larl %r1, .LCPI11_2
; S390X-NEXT: ldeb %f0, 0(%r1) ; S390X-NEXT: ldeb %f2, 0(%r1)
; S390X-NEXT: mdbr %f2, %f1
; S390X-NEXT: mdbr %f0, %f1 ; S390X-NEXT: mdbr %f0, %f1
; S390X-NEXT: mdbr %f2, %f1
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fmul_v2f64: ; SZ13-LABEL: constrained_vector_fmul_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI11_0 ; SZ13-NEXT: larl %r1, .LCPI11_0
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: larl %r1, .LCPI11_1 ; SZ13-NEXT: larl %r1, .LCPI11_1
; SZ13-NEXT: vl %v1, 0(%r1), 3 ; SZ13-NEXT: vl %v1, 0(%r1), 3
; SZ13-NEXT: vfmdb %v24, %v1, %v0 ; SZ13-NEXT: vfmdb %v24, %v1, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%mul = call <2 x double> @llvm.experimental.constrained.fmul.v2f64( %mul = call <2 x double> @llvm.experimental.constrained.fmul.v2f64(
<2 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>, <2 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,
<2 x double> <double 2.000000e+00, double 3.000000e+00>, <2 x double> <double 2.000000e+00, double 3.000000e+00>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
ret <2 x double> %mul ret <2 x double> %mul
} }
define <3 x float> @constrained_vector_fmul_v3f32() #0 { define <3 x float> @constrained_vector_fmul_v3f32() #0 {
; S390X-LABEL: constrained_vector_fmul_v3f32: ; S390X-LABEL: constrained_vector_fmul_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI12_0 ; S390X-NEXT: larl %r1, .LCPI12_0
; S390X-NEXT: le %f0, 0(%r1) ; S390X-NEXT: le %f4, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI12_1 ; S390X-NEXT: larl %r1, .LCPI12_1
; S390X-NEXT: ler %f4, %f0 ; S390X-NEXT: ler %f0, %f4
; S390X-NEXT: meeb %f4, 0(%r1) ; S390X-NEXT: meeb %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI12_2 ; S390X-NEXT: larl %r1, .LCPI12_2
; S390X-NEXT: ler %f2, %f0 ; S390X-NEXT: ler %f2, %f4
; S390X-NEXT: meeb %f2, 0(%r1) ; S390X-NEXT: meeb %f2, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI12_3 ; S390X-NEXT: larl %r1, .LCPI12_3
; S390X-NEXT: meeb %f0, 0(%r1) ; S390X-NEXT: meeb %f4, 0(%r1)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fmul_v3f32: ; SZ13-LABEL: constrained_vector_fmul_v3f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: vgmf %v0, 1, 8 ; SZ13-NEXT: vgmf %v0, 1, 8
; SZ13-NEXT: larl %r1, .LCPI12_0 ; SZ13-NEXT: larl %r1, .LCPI12_0
; SZ13-NEXT: vgmf %v2, 2, 8 ; SZ13-NEXT: vgmf %v2, 2, 8
; SZ13-NEXT: vgmf %v1, 1, 8 ; SZ13-NEXT: vgmf %v1, 1, 8
Show All 13 Lines %mul = call <3 x float> @llvm.experimental.constrained.fmul.v3f32(
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
ret <3 x float> %mul ret <3 x float> %mul
} }
define void @constrained_vector_fmul_v3f64(<3 x double>* %a) #0 { define void @constrained_vector_fmul_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_fmul_v3f64: ; S390X-LABEL: constrained_vector_fmul_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: ld %f0, 8(%r2)
; S390X-NEXT: larl %r1, .LCPI13_0 ; S390X-NEXT: larl %r1, .LCPI13_0
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f0, 0(%r1)
; S390X-NEXT: ld %f2, 16(%r2) ; S390X-NEXT: ldr %f1, %f0
; S390X-NEXT: mdbr %f0, %f1 ; S390X-NEXT: ldr %f2, %f0
; S390X-NEXT: ldr %f3, %f1 ; S390X-NEXT: mdb %f0, 0(%r2)
; S390X-NEXT: mdb %f3, 0(%r2) ; S390X-NEXT: mdb %f2, 8(%r2)
; S390X-NEXT: mdbr %f2, %f1 ; S390X-NEXT: mdb %f1, 16(%r2)
; S390X-NEXT: std %f2, 16(%r2) ; S390X-NEXT: std %f0, 0(%r2)
; S390X-NEXT: std %f0, 8(%r2) ; S390X-NEXT: std %f2, 8(%r2)
; S390X-NEXT: std %f3, 0(%r2) ; S390X-NEXT: std %f1, 16(%r2)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fmul_v3f64: ; SZ13-LABEL: constrained_vector_fmul_v3f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI13_0 ; SZ13-NEXT: larl %r1, .LCPI13_0
; SZ13-NEXT: ld %f1, 0(%r1) ; SZ13-NEXT: ld %f1, 0(%r1)
; SZ13-NEXT: larl %r1, .LCPI13_1 ; SZ13-NEXT: larl %r1, .LCPI13_1
; SZ13-NEXT: vl %v0, 0(%r2), 4 ; SZ13-NEXT: vl %v0, 0(%r2), 4
; SZ13-NEXT: vl %v2, 0(%r1), 3 ; SZ13-NEXT: vl %v2, 0(%r1), 3
; SZ13-NEXT: mdb %f1, 16(%r2) ; SZ13-NEXT: mdb %f1, 16(%r2)
; SZ13-NEXT: vfmdb %v0, %v2, %v0 ; SZ13-NEXT: vfmdb %v0, %v2, %v0
; SZ13-NEXT: std %f1, 16(%r2)
; SZ13-NEXT: vst %v0, 0(%r2), 4 ; SZ13-NEXT: vst %v0, 0(%r2), 4
; SZ13-NEXT: std %f1, 16(%r2)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%mul = call <3 x double> @llvm.experimental.constrained.fmul.v3f64( %mul = call <3 x double> @llvm.experimental.constrained.fmul.v3f64(
<3 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF, <3 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,
double 0x7FEFFFFFFFFFFFFF>, double 0x7FEFFFFFFFFFFFFF>,
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
store <3 x double> %mul, <3 x double>* %a store <3 x double> %mul, <3 x double>* %a
ret void ret void
} }
define <4 x double> @constrained_vector_fmul_v4f64() #0 { define <4 x double> @constrained_vector_fmul_v4f64() #0 {
; S390X-LABEL: constrained_vector_fmul_v4f64: ; S390X-LABEL: constrained_vector_fmul_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI14_0 ; S390X-NEXT: larl %r1, .LCPI14_0
; S390X-NEXT: ldeb %f6, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI14_1 ; S390X-NEXT: larl %r1, .LCPI14_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI14_2 ; S390X-NEXT: larl %r1, .LCPI14_2
; S390X-NEXT: ldeb %f4, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI14_3
; S390X-NEXT: ldeb %f2, 0(%r1) ; S390X-NEXT: ldeb %f2, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI14_3
; S390X-NEXT: ldeb %f4, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI14_4 ; S390X-NEXT: larl %r1, .LCPI14_4
; S390X-NEXT: ldeb %f0, 0(%r1) ; S390X-NEXT: ldeb %f6, 0(%r1)
; S390X-NEXT: mdbr %f6, %f1
; S390X-NEXT: mdbr %f4, %f1
; S390X-NEXT: mdbr %f2, %f1
; S390X-NEXT: mdbr %f0, %f1 ; S390X-NEXT: mdbr %f0, %f1
; S390X-NEXT: mdbr %f2, %f1
; S390X-NEXT: mdbr %f4, %f1
; S390X-NEXT: mdbr %f6, %f1
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fmul_v4f64: ; SZ13-LABEL: constrained_vector_fmul_v4f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI14_0 ; SZ13-NEXT: larl %r1, .LCPI14_0
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: larl %r1, .LCPI14_1 ; SZ13-NEXT: larl %r1, .LCPI14_1
; SZ13-NEXT: vl %v1, 0(%r1), 3 ; SZ13-NEXT: vl %v1, 0(%r1), 3
; SZ13-NEXT: larl %r1, .LCPI14_2 ; SZ13-NEXT: larl %r1, .LCPI14_2
; SZ13-NEXT: vfmdb %v26, %v1, %v0
; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: vfmdb %v24, %v1, %v0 ; SZ13-NEXT: vfmdb %v24, %v1, %v0
; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: vfmdb %v26, %v1, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%mul = call <4 x double> @llvm.experimental.constrained.fmul.v4f64( %mul = call <4 x double> @llvm.experimental.constrained.fmul.v4f64(
<4 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF, <4 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,
double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>, double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,
<4 x double> <double 2.000000e+00, double 3.000000e+00, <4 x double> <double 2.000000e+00, double 3.000000e+00,
double 4.000000e+00, double 5.000000e+00>, double 4.000000e+00, double 5.000000e+00>,
metadata !"round.dynamic", metadata !"round.dynamic",
Show All 25 Lines %add = call <1 x float> @llvm.experimental.constrained.fadd.v1f32(
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
ret <1 x float> %add ret <1 x float> %add
} }
define <2 x double> @constrained_vector_fadd_v2f64() #0 { define <2 x double> @constrained_vector_fadd_v2f64() #0 {
; S390X-LABEL: constrained_vector_fadd_v2f64: ; S390X-LABEL: constrained_vector_fadd_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI16_0 ; S390X-NEXT: larl %r1, .LCPI16_0
; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI16_2
; S390X-NEXT: ldeb %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI16_1 ; S390X-NEXT: larl %r1, .LCPI16_1
; S390X-NEXT: ldr %f2, %f1 ; S390X-NEXT: ld %f2, 0(%r1)
; S390X-NEXT: adbr %f0, %f2
; S390X-NEXT: larl %r1, .LCPI16_2
; S390X-NEXT: adb %f2, 0(%r1) ; S390X-NEXT: adb %f2, 0(%r1)
; S390X-NEXT: adbr %f0, %f1
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fadd_v2f64: ; SZ13-LABEL: constrained_vector_fadd_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI16_0 ; SZ13-NEXT: larl %r1, .LCPI16_0
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: larl %r1, .LCPI16_1 ; SZ13-NEXT: larl %r1, .LCPI16_1
; SZ13-NEXT: vl %v1, 0(%r1), 3 ; SZ13-NEXT: vl %v1, 0(%r1), 3
; SZ13-NEXT: vfadb %v24, %v1, %v0 ; SZ13-NEXT: vfadb %v24, %v1, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%add = call <2 x double> @llvm.experimental.constrained.fadd.v2f64( %add = call <2 x double> @llvm.experimental.constrained.fadd.v2f64(
<2 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>, <2 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,
<2 x double> <double 1.000000e+00, double 1.000000e-01>, <2 x double> <double 1.000000e+00, double 1.000000e-01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
ret <2 x double> %add ret <2 x double> %add
} }
define <3 x float> @constrained_vector_fadd_v3f32() #0 { define <3 x float> @constrained_vector_fadd_v3f32() #0 {
; S390X-LABEL: constrained_vector_fadd_v3f32: ; S390X-LABEL: constrained_vector_fadd_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI17_0 ; S390X-NEXT: larl %r1, .LCPI17_0
; S390X-NEXT: le %f0, 0(%r1) ; S390X-NEXT: le %f1, 0(%r1)
; S390X-NEXT: lzer %f4
; S390X-NEXT: aebr %f4, %f0
; S390X-NEXT: larl %r1, .LCPI17_1 ; S390X-NEXT: larl %r1, .LCPI17_1
; S390X-NEXT: ler %f2, %f0 ; S390X-NEXT: ler %f2, %f1
; S390X-NEXT: aeb %f2, 0(%r1) ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: larl %r1, .LCPI17_2
; S390X-NEXT: aeb %f0, 0(%r1) ; S390X-NEXT: aeb %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI17_2
; S390X-NEXT: aeb %f2, 0(%r1)
; S390X-NEXT: lzer %f4
; S390X-NEXT: aebr %f4, %f1
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fadd_v3f32: ; SZ13-LABEL: constrained_vector_fadd_v3f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: vgbm %v0, 15 ; SZ13-NEXT: vgbm %v0, 15
; SZ13-NEXT: vgmf %v2, 1, 1 ; SZ13-NEXT: vgmf %v2, 1, 1
; SZ13-NEXT: vgmf %v3, 2, 8 ; SZ13-NEXT: vgmf %v3, 2, 8
; SZ13-NEXT: lzer %f1 ; SZ13-NEXT: lzer %f1
Show All 12 Lines %add = call <3 x float> @llvm.experimental.constrained.fadd.v3f32(
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
ret <3 x float> %add ret <3 x float> %add
} }
define void @constrained_vector_fadd_v3f64(<3 x double>* %a) #0 { define void @constrained_vector_fadd_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_fadd_v3f64: ; S390X-LABEL: constrained_vector_fadd_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: ld %f0, 8(%r2)
; S390X-NEXT: larl %r1, .LCPI18_0 ; S390X-NEXT: larl %r1, .LCPI18_0
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f0, 0(%r1)
; S390X-NEXT: ld %f2, 16(%r2) ; S390X-NEXT: ldr %f1, %f0
; S390X-NEXT: adbr %f0, %f1 ; S390X-NEXT: ldr %f2, %f0
; S390X-NEXT: ldr %f3, %f1 ; S390X-NEXT: adb %f0, 0(%r2)
; S390X-NEXT: adb %f3, 0(%r2) ; S390X-NEXT: adb %f2, 8(%r2)
; S390X-NEXT: adbr %f2, %f1 ; S390X-NEXT: adb %f1, 16(%r2)
; S390X-NEXT: std %f2, 16(%r2) ; S390X-NEXT: std %f0, 0(%r2)
; S390X-NEXT: std %f0, 8(%r2) ; S390X-NEXT: std %f2, 8(%r2)
; S390X-NEXT: std %f3, 0(%r2) ; S390X-NEXT: std %f1, 16(%r2)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fadd_v3f64: ; SZ13-LABEL: constrained_vector_fadd_v3f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI18_0 ; SZ13-NEXT: larl %r1, .LCPI18_0
; SZ13-NEXT: ld %f1, 0(%r1) ; SZ13-NEXT: ld %f1, 0(%r1)
; SZ13-NEXT: larl %r1, .LCPI18_1 ; SZ13-NEXT: larl %r1, .LCPI18_1
; SZ13-NEXT: vl %v0, 0(%r2), 4 ; SZ13-NEXT: vl %v0, 0(%r2), 4
; SZ13-NEXT: vl %v2, 0(%r1), 3 ; SZ13-NEXT: vl %v2, 0(%r1), 3
; SZ13-NEXT: adb %f1, 16(%r2) ; SZ13-NEXT: adb %f1, 16(%r2)
; SZ13-NEXT: vfadb %v0, %v2, %v0 ; SZ13-NEXT: vfadb %v0, %v2, %v0
; SZ13-NEXT: std %f1, 16(%r2)
; SZ13-NEXT: vst %v0, 0(%r2), 4 ; SZ13-NEXT: vst %v0, 0(%r2), 4
; SZ13-NEXT: std %f1, 16(%r2)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%add = call <3 x double> @llvm.experimental.constrained.fadd.v3f64( %add = call <3 x double> @llvm.experimental.constrained.fadd.v3f64(
<3 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF, <3 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,
double 0x7FEFFFFFFFFFFFFF>, double 0x7FEFFFFFFFFFFFFF>,
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
store <3 x double> %add, <3 x double>* %a store <3 x double> %add, <3 x double>* %a
ret void ret void
} }
define <4 x double> @constrained_vector_fadd_v4f64() #0 { define <4 x double> @constrained_vector_fadd_v4f64() #0 {
; S390X-LABEL: constrained_vector_fadd_v4f64: ; S390X-LABEL: constrained_vector_fadd_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI19_0 ; S390X-NEXT: larl %r1, .LCPI19_0
; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI19_1
; S390X-NEXT: ldr %f2, %f1
; S390X-NEXT: ldr %f6, %f1
; S390X-NEXT: adb %f6, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI19_2
; S390X-NEXT: ldeb %f4, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI19_4
; S390X-NEXT: ldeb %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI19_1
; S390X-NEXT: ld %f6, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI19_3 ; S390X-NEXT: larl %r1, .LCPI19_3
; S390X-NEXT: ldeb %f4, 0(%r1)
; S390X-NEXT: adbr %f0, %f6
; S390X-NEXT: larl %r1, .LCPI19_2
; S390X-NEXT: ldr %f2, %f6
; S390X-NEXT: adb %f2, 0(%r1) ; S390X-NEXT: adb %f2, 0(%r1)
; S390X-NEXT: adbr %f4, %f1 ; S390X-NEXT: adbr %f4, %f6
; S390X-NEXT: adbr %f0, %f1 ; S390X-NEXT: larl %r1, .LCPI19_4
; S390X-NEXT: adb %f6, 0(%r1)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fadd_v4f64: ; SZ13-LABEL: constrained_vector_fadd_v4f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI19_0 ; SZ13-NEXT: larl %r1, .LCPI19_0
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: larl %r1, .LCPI19_1 ; SZ13-NEXT: larl %r1, .LCPI19_1
; SZ13-NEXT: vl %v1, 0(%r1), 3 ; SZ13-NEXT: vl %v1, 0(%r1), 3
; SZ13-NEXT: larl %r1, .LCPI19_2 ; SZ13-NEXT: larl %r1, .LCPI19_2
; SZ13-NEXT: vfadb %v26, %v1, %v0
; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: vfadb %v24, %v1, %v0 ; SZ13-NEXT: vfadb %v24, %v1, %v0
; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: vfadb %v26, %v1, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%add = call <4 x double> @llvm.experimental.constrained.fadd.v4f64( %add = call <4 x double> @llvm.experimental.constrained.fadd.v4f64(
<4 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF, <4 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,
double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>, double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,
<4 x double> <double 1.000000e+00, double 1.000000e-01, <4 x double> <double 1.000000e+00, double 1.000000e-01,
double 2.000000e+00, double 2.000000e-01>, double 2.000000e+00, double 2.000000e-01>,
metadata !"round.dynamic", metadata !"round.dynamic",
Show All 24 Lines %sub = call <1 x float> @llvm.experimental.constrained.fsub.v1f32(
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
ret <1 x float> %sub ret <1 x float> %sub
} }
define <2 x double> @constrained_vector_fsub_v2f64() #0 { define <2 x double> @constrained_vector_fsub_v2f64() #0 {
; S390X-LABEL: constrained_vector_fsub_v2f64: ; S390X-LABEL: constrained_vector_fsub_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI21_1
; S390X-NEXT: ld %f2, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI21_0 ; S390X-NEXT: larl %r1, .LCPI21_0
; S390X-NEXT: ld %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI21_2
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ldeb %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI21_1 ; S390X-NEXT: ldr %f0, %f2
; S390X-NEXT: ldr %f2, %f0 ; S390X-NEXT: larl %r1, .LCPI21_2
; S390X-NEXT: sdb %f2, 0(%r1) ; S390X-NEXT: sdb %f2, 0(%r1)
; S390X-NEXT: sdbr %f0, %f1 ; S390X-NEXT: sdbr %f0, %f1
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fsub_v2f64: ; SZ13-LABEL: constrained_vector_fsub_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI21_0 ; SZ13-NEXT: larl %r1, .LCPI21_0
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: vgmg %v1, 12, 10 ; SZ13-NEXT: vgmg %v1, 12, 10
; SZ13-NEXT: vfsdb %v24, %v1, %v0 ; SZ13-NEXT: vfsdb %v24, %v1, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%sub = call <2 x double> @llvm.experimental.constrained.fsub.v2f64( %sub = call <2 x double> @llvm.experimental.constrained.fsub.v2f64(
<2 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF>, <2 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF>,
<2 x double> <double 1.000000e+00, double 1.000000e-01>, <2 x double> <double 1.000000e+00, double 1.000000e-01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
ret <2 x double> %sub ret <2 x double> %sub
} }
define <3 x float> @constrained_vector_fsub_v3f32() #0 { define <3 x float> @constrained_vector_fsub_v3f32() #0 {
; S390X-LABEL: constrained_vector_fsub_v3f32: ; S390X-LABEL: constrained_vector_fsub_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI22_0 ; S390X-NEXT: larl %r1, .LCPI22_0
; S390X-NEXT: le %f0, 0(%r1) ; S390X-NEXT: le %f4, 0(%r1)
; S390X-NEXT: ler %f4, %f0
; S390X-NEXT: larl %r1, .LCPI22_1 ; S390X-NEXT: larl %r1, .LCPI22_1
; S390X-NEXT: ler %f2, %f0 ; S390X-NEXT: ler %f0, %f4
; S390X-NEXT: seb %f2, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI22_2
; S390X-NEXT: seb %f0, 0(%r1) ; S390X-NEXT: seb %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI22_2
; S390X-NEXT: ler %f2, %f4
; S390X-NEXT: seb %f2, 0(%r1)
; S390X-NEXT: lzer %f1 ; S390X-NEXT: lzer %f1
; S390X-NEXT: sebr %f4, %f1 ; S390X-NEXT: sebr %f4, %f1
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fsub_v3f32: ; SZ13-LABEL: constrained_vector_fsub_v3f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: vgbm %v2, 15 ; SZ13-NEXT: vgbm %v2, 15
; SZ13-NEXT: lzer %f1 ; SZ13-NEXT: lzer %f1
Show All 18 Linesentry:
ret <3 x float> %sub ret <3 x float> %sub
} }
define void @constrained_vector_fsub_v3f64(<3 x double>* %a) #0 { define void @constrained_vector_fsub_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_fsub_v3f64: ; S390X-LABEL: constrained_vector_fsub_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI23_0 ; S390X-NEXT: larl %r1, .LCPI23_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ld %f0, 0(%r1)
; S390X-NEXT: ld %f1, 8(%r2) ; S390X-NEXT: ldr %f1, %f0
; S390X-NEXT: ld %f2, 16(%r2) ; S390X-NEXT: ldr %f2, %f0
; S390X-NEXT: ldr %f3, %f0 ; S390X-NEXT: sdb %f0, 0(%r2)
; S390X-NEXT: sdb %f3, 0(%r2) ; S390X-NEXT: sdb %f2, 8(%r2)
; S390X-NEXT: ldr %f4, %f0 ; S390X-NEXT: sdb %f1, 16(%r2)
; S390X-NEXT: sdbr %f4, %f1 ; S390X-NEXT: std %f0, 0(%r2)
; S390X-NEXT: sdbr %f0, %f2 ; S390X-NEXT: std %f2, 8(%r2)
; S390X-NEXT: std %f0, 16(%r2) ; S390X-NEXT: std %f1, 16(%r2)
; S390X-NEXT: std %f4, 8(%r2)
; S390X-NEXT: std %f3, 0(%r2)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fsub_v3f64: ; SZ13-LABEL: constrained_vector_fsub_v3f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: vl %v0, 0(%r2), 4 ; SZ13-NEXT: vl %v0, 0(%r2), 4
; SZ13-NEXT: vgmg %v2, 12, 10 ; SZ13-NEXT: vgmg %v2, 12, 10
; SZ13-NEXT: sdb %f2, 16(%r2) ; SZ13-NEXT: sdb %f2, 16(%r2)
; SZ13-NEXT: vgmg %v1, 12, 10 ; SZ13-NEXT: vgmg %v1, 12, 10
; SZ13-NEXT: vfsdb %v0, %v1, %v0 ; SZ13-NEXT: vfsdb %v0, %v1, %v0
; SZ13-NEXT: std %f2, 16(%r2)
; SZ13-NEXT: vst %v0, 0(%r2), 4 ; SZ13-NEXT: vst %v0, 0(%r2), 4
; SZ13-NEXT: std %f2, 16(%r2)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%sub = call <3 x double> @llvm.experimental.constrained.fsub.v3f64( %sub = call <3 x double> @llvm.experimental.constrained.fsub.v3f64(
<3 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF, <3 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF,
double 0xFFEFFFFFFFFFFFFF>, double 0xFFEFFFFFFFFFFFFF>,
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
store <3 x double> %sub, <3 x double>* %a store <3 x double> %sub, <3 x double>* %a
ret void ret void
} }
define <4 x double> @constrained_vector_fsub_v4f64() #0 { define <4 x double> @constrained_vector_fsub_v4f64() #0 {
; S390X-LABEL: constrained_vector_fsub_v4f64: ; S390X-LABEL: constrained_vector_fsub_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI24_0
; S390X-NEXT: ld %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI24_1 ; S390X-NEXT: larl %r1, .LCPI24_1
; S390X-NEXT: ldr %f6, %f0 ; S390X-NEXT: ld %f6, 0(%r1)
; S390X-NEXT: sdb %f6, 0(%r1) ; S390X-NEXT: larl %r1, .LCPI24_0
; S390X-NEXT: larl %r1, .LCPI24_2
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ldeb %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI24_4 ; S390X-NEXT: ldr %f0, %f6
; S390X-NEXT: ldeb %f3, 0(%r1) ; S390X-NEXT: larl %r1, .LCPI24_2
; S390X-NEXT: larl %r1, .LCPI24_3 ; S390X-NEXT: ldr %f2, %f6
; S390X-NEXT: ldr %f2, %f0
; S390X-NEXT: sdb %f2, 0(%r1) ; S390X-NEXT: sdb %f2, 0(%r1)
; S390X-NEXT: ldr %f4, %f0 ; S390X-NEXT: larl %r1, .LCPI24_3
; S390X-NEXT: sdbr %f4, %f1 ; S390X-NEXT: ldeb %f3, 0(%r1)
; S390X-NEXT: sdbr %f0, %f3 ; S390X-NEXT: ldr %f4, %f6
; S390X-NEXT: larl %r1, .LCPI24_4
; S390X-NEXT: sdb %f6, 0(%r1)
; S390X-NEXT: sdbr %f0, %f1
; S390X-NEXT: sdbr %f4, %f3
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fsub_v4f64: ; SZ13-LABEL: constrained_vector_fsub_v4f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI24_0 ; SZ13-NEXT: larl %r1, .LCPI24_0
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: vgmg %v1, 12, 10 ; SZ13-NEXT: vgmg %v1, 12, 10
; SZ13-NEXT: larl %r1, .LCPI24_1 ; SZ13-NEXT: larl %r1, .LCPI24_1
; SZ13-NEXT: vfsdb %v26, %v1, %v0
; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: vfsdb %v24, %v1, %v0 ; SZ13-NEXT: vfsdb %v24, %v1, %v0
; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: vfsdb %v26, %v1, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%sub = call <4 x double> @llvm.experimental.constrained.fsub.v4f64( %sub = call <4 x double> @llvm.experimental.constrained.fsub.v4f64(
<4 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF, <4 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF,
double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF>, double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF>,
<4 x double> <double 1.000000e+00, double 1.000000e-01, <4 x double> <double 1.000000e+00, double 1.000000e-01,
double 2.000000e+00, double 2.000000e-01>, double 2.000000e+00, double 2.000000e-01>,
metadata !"round.dynamic", metadata !"round.dynamic",
▲ Show 20 Lines • Show All 45 Lines • ▼ Show 20 Lines %sqrt = call <2 x double> @llvm.experimental.constrained.sqrt.v2f64(
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
ret <2 x double> %sqrt ret <2 x double> %sqrt
} }
define <3 x float> @constrained_vector_sqrt_v3f32() #0 { define <3 x float> @constrained_vector_sqrt_v3f32() #0 {
; S390X-LABEL: constrained_vector_sqrt_v3f32: ; S390X-LABEL: constrained_vector_sqrt_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI27_0 ; S390X-NEXT: larl %r1, .LCPI27_0
; S390X-NEXT: sqeb %f4, 0(%r1) ; S390X-NEXT: sqeb %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI27_1 ; S390X-NEXT: larl %r1, .LCPI27_1
; S390X-NEXT: sqeb %f2, 0(%r1) ; S390X-NEXT: sqeb %f2, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI27_2 ; S390X-NEXT: larl %r1, .LCPI27_2
; S390X-NEXT: sqeb %f0, 0(%r1) ; S390X-NEXT: sqeb %f4, 0(%r1)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_sqrt_v3f32: ; SZ13-LABEL: constrained_vector_sqrt_v3f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI27_0 ; SZ13-NEXT: larl %r1, .LCPI27_0
; SZ13-NEXT: sqeb %f0, 0(%r1) ; SZ13-NEXT: sqeb %f0, 0(%r1)
; SZ13-NEXT: larl %r1, .LCPI27_1 ; SZ13-NEXT: larl %r1, .LCPI27_1
; SZ13-NEXT: vrepf %v0, %v0, 0 ; SZ13-NEXT: vrepf %v0, %v0, 0
Show All 9 Lines %sqrt = call <3 x float> @llvm.experimental.constrained.sqrt.v3f32(
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
ret <3 x float> %sqrt ret <3 x float> %sqrt
} }
define void @constrained_vector_sqrt_v3f64(<3 x double>* %a) #0 { define void @constrained_vector_sqrt_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_sqrt_v3f64: ; S390X-LABEL: constrained_vector_sqrt_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: ld %f0, 8(%r2) ; S390X-NEXT: sqdb %f0, 0(%r2)
; S390X-NEXT: ld %f1, 16(%r2) ; S390X-NEXT: sqdb %f1, 8(%r2)
; S390X-NEXT: sqdb %f2, 0(%r2) ; S390X-NEXT: sqdb %f2, 16(%r2)
; S390X-NEXT: sqdbr %f0, %f0 ; S390X-NEXT: std %f0, 0(%r2)
; S390X-NEXT: sqdbr %f1, %f1 ; S390X-NEXT: std %f1, 8(%r2)
; S390X-NEXT: std %f1, 16(%r2) ; S390X-NEXT: std %f2, 16(%r2)
; S390X-NEXT: std %f0, 8(%r2)
; S390X-NEXT: std %f2, 0(%r2)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_sqrt_v3f64: ; SZ13-LABEL: constrained_vector_sqrt_v3f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: sqdb %f1, 16(%r2) ; SZ13-NEXT: sqdb %f1, 16(%r2)
; SZ13-NEXT: vl %v0, 0(%r2), 4 ; SZ13-NEXT: vl %v0, 0(%r2), 4
; SZ13-NEXT: std %f1, 16(%r2) ; SZ13-NEXT: std %f1, 16(%r2)
; SZ13-NEXT: vfsqdb %v0, %v0 ; SZ13-NEXT: vfsqdb %v0, %v0
; SZ13-NEXT: vst %v0, 0(%r2), 4 ; SZ13-NEXT: vst %v0, 0(%r2), 4
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%sqrt = call <3 x double> @llvm.experimental.constrained.sqrt.v3f64( %sqrt = call <3 x double> @llvm.experimental.constrained.sqrt.v3f64(
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
store <3 x double> %sqrt, <3 x double>* %a store <3 x double> %sqrt, <3 x double>* %a
ret void ret void
} }
define <4 x double> @constrained_vector_sqrt_v4f64() #0 { define <4 x double> @constrained_vector_sqrt_v4f64() #0 {
; S390X-LABEL: constrained_vector_sqrt_v4f64: ; S390X-LABEL: constrained_vector_sqrt_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI29_0 ; S390X-NEXT: larl %r1, .LCPI29_0
; S390X-NEXT: sqdb %f6, 0(%r1) ; S390X-NEXT: sqdb %f2, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI29_1 ; S390X-NEXT: larl %r1, .LCPI29_1
; S390X-NEXT: sqdb %f4, 0(%r1) ; S390X-NEXT: sqdb %f4, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI29_3 ; S390X-NEXT: larl %r1, .LCPI29_3
; S390X-NEXT: ldeb %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI29_2 ; S390X-NEXT: larl %r1, .LCPI29_2
; S390X-NEXT: sqdb %f2, 0(%r1) ; S390X-NEXT: sqdb %f6, 0(%r1)
; S390X-NEXT: sqdbr %f0, %f0 ; S390X-NEXT: sqdbr %f0, %f0
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_sqrt_v4f64: ; SZ13-LABEL: constrained_vector_sqrt_v4f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI29_0 ; SZ13-NEXT: larl %r1, .LCPI29_0
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: vfsqdb %v26, %v0 ; SZ13-NEXT: vfsqdb %v24, %v0
; SZ13-NEXT: larl %r1, .LCPI29_1 ; SZ13-NEXT: larl %r1, .LCPI29_1
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: vfsqdb %v24, %v0 ; SZ13-NEXT: vfsqdb %v26, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%sqrt = call <4 x double> @llvm.experimental.constrained.sqrt.v4f64( %sqrt = call <4 x double> @llvm.experimental.constrained.sqrt.v4f64(
<4 x double> <double 42.0, double 42.1, <4 x double> <double 42.0, double 42.1,
double 42.2, double 42.3>, double 42.2, double 42.3>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
ret <4 x double> %sqrt ret <4 x double> %sqrt
▲ Show 20 Lines • Show All 59 Lines • ▼ Show 20 Lines
; S390X-NEXT: ldr %f2, %f8 ; S390X-NEXT: ldr %f2, %f8
; S390X-NEXT: brasl %r14, pow@PLT ; S390X-NEXT: brasl %r14, pow@PLT
; S390X-NEXT: larl %r1, .LCPI31_2 ; S390X-NEXT: larl %r1, .LCPI31_2
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f9, %f0 ; S390X-NEXT: ldr %f9, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: ldr %f2, %f8 ; S390X-NEXT: ldr %f2, %f8
; S390X-NEXT: brasl %r14, pow@PLT ; S390X-NEXT: brasl %r14, pow@PLT
; S390X-NEXT: ldr %f2, %f9 ; S390X-NEXT: ldr %f2, %f0
; S390X-NEXT: ldr %f0, %f9
; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 288(%r15) ; S390X-NEXT: lmg %r14, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_pow_v2f64: ; SZ13-LABEL: constrained_vector_pow_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: stmg %r14, %r15, 112(%r15) ; SZ13-NEXT: stmg %r14, %r15, 112(%r15)
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
; S390X-NEXT: ler %f2, %f8 ; S390X-NEXT: ler %f2, %f8
; S390X-NEXT: brasl %r14, powf@PLT ; S390X-NEXT: brasl %r14, powf@PLT
; S390X-NEXT: larl %r1, .LCPI32_3 ; S390X-NEXT: larl %r1, .LCPI32_3
; S390X-NEXT: le %f1, 0(%r1) ; S390X-NEXT: le %f1, 0(%r1)
; S390X-NEXT: ler %f10, %f0 ; S390X-NEXT: ler %f10, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: ler %f2, %f8 ; S390X-NEXT: ler %f2, %f8
; S390X-NEXT: brasl %r14, powf@PLT ; S390X-NEXT: brasl %r14, powf@PLT
; S390X-NEXT: ler %f4, %f0
; S390X-NEXT: ler %f0, %f9
; S390X-NEXT: ler %f2, %f10 ; S390X-NEXT: ler %f2, %f10
; S390X-NEXT: ler %f4, %f9
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 296(%r15) ; S390X-NEXT: lmg %r14, %r15, 296(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_pow_v3f32: ; SZ13-LABEL: constrained_vector_pow_v3f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
▲ Show 20 Lines • Show All 53 Lines • ▼ Show 20 Lines
; S390X-NEXT: std %f9, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f9, 176(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f10, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f10, 168(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f11, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f11, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: .cfi_offset %f9, -176 ; S390X-NEXT: .cfi_offset %f9, -176
; S390X-NEXT: .cfi_offset %f10, -184 ; S390X-NEXT: .cfi_offset %f10, -184
; S390X-NEXT: .cfi_offset %f11, -192 ; S390X-NEXT: .cfi_offset %f11, -192
; S390X-NEXT: lgr %r13, %r2 ; S390X-NEXT: lgr %r13, %r2
; S390X-NEXT: ld %f8, 16(%r2) ; S390X-NEXT: ld %f8, 0(%r2)
; S390X-NEXT: ld %f0, 0(%r2) ; S390X-NEXT: ld %f0, 16(%r2)
; S390X-NEXT: larl %r1, .LCPI33_0 ; S390X-NEXT: larl %r1, .LCPI33_0
; S390X-NEXT: ldeb %f9, 0(%r1) ; S390X-NEXT: ldeb %f9, 0(%r1)
; S390X-NEXT: ld %f10, 8(%r2) ; S390X-NEXT: ld %f10, 8(%r2)
; S390X-NEXT: ldr %f2, %f9 ; S390X-NEXT: ldr %f2, %f9
; S390X-NEXT: brasl %r14, pow@PLT ; S390X-NEXT: brasl %r14, pow@PLT
; S390X-NEXT: ldr %f11, %f0 ; S390X-NEXT: ldr %f11, %f0
; S390X-NEXT: ldr %f0, %f10 ; S390X-NEXT: ldr %f0, %f10
; S390X-NEXT: ldr %f2, %f9 ; S390X-NEXT: ldr %f2, %f9
; S390X-NEXT: brasl %r14, pow@PLT ; S390X-NEXT: brasl %r14, pow@PLT
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f8 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ldr %f2, %f9 ; S390X-NEXT: ldr %f2, %f9
; S390X-NEXT: brasl %r14, pow@PLT ; S390X-NEXT: brasl %r14, pow@PLT
; S390X-NEXT: std %f0, 16(%r13) ; S390X-NEXT: std %f0, 0(%r13)
; S390X-NEXT: std %f10, 8(%r13) ; S390X-NEXT: std %f10, 8(%r13)
; S390X-NEXT: std %f11, 0(%r13) ; S390X-NEXT: std %f11, 16(%r13)
; S390X-NEXT: ld %f8, 184(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 184(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f11, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f11, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r13, %r15, 296(%r15) ; S390X-NEXT: lmg %r13, %r15, 296(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_pow_v3f64: ; SZ13-LABEL: constrained_vector_pow_v3f64:
▲ Show 20 Lines • Show All 84 Lines • ▼ Show 20 Lines
; S390X-NEXT: ldr %f2, %f8 ; S390X-NEXT: ldr %f2, %f8
; S390X-NEXT: brasl %r14, pow@PLT ; S390X-NEXT: brasl %r14, pow@PLT
; S390X-NEXT: larl %r1, .LCPI34_4 ; S390X-NEXT: larl %r1, .LCPI34_4
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f11, %f0 ; S390X-NEXT: ldr %f11, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: ldr %f2, %f8 ; S390X-NEXT: ldr %f2, %f8
; S390X-NEXT: brasl %r14, pow@PLT ; S390X-NEXT: brasl %r14, pow@PLT
; S390X-NEXT: ldr %f2, %f11 ; S390X-NEXT: ldr %f6, %f0
; S390X-NEXT: ldr %f4, %f10 ; S390X-NEXT: ldr %f0, %f9
; S390X-NEXT: ldr %f6, %f9 ; S390X-NEXT: ldr %f2, %f10
; S390X-NEXT: ldr %f4, %f11
; S390X-NEXT: ld %f8, 184(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 184(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f11, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f11, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 304(%r15) ; S390X-NEXT: lmg %r14, %r15, 304(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_pow_v4f64: ; SZ13-LABEL: constrained_vector_pow_v4f64:
▲ Show 20 Lines • Show All 103 Lines • ▼ Show 20 Lines
; S390X-NEXT: lghi %r2, 3 ; S390X-NEXT: lghi %r2, 3
; S390X-NEXT: brasl %r14, __powidf2@PLT ; S390X-NEXT: brasl %r14, __powidf2@PLT
; S390X-NEXT: larl %r1, .LCPI36_1 ; S390X-NEXT: larl %r1, .LCPI36_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f8, %f0 ; S390X-NEXT: ldr %f8, %f0
; S390X-NEXT: lghi %r2, 3 ; S390X-NEXT: lghi %r2, 3
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, __powidf2@PLT ; S390X-NEXT: brasl %r14, __powidf2@PLT
; S390X-NEXT: ldr %f2, %f8 ; S390X-NEXT: ldr %f2, %f0
; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 280(%r15) ; S390X-NEXT: lmg %r14, %r15, 280(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_powi_v2f64: ; SZ13-LABEL: constrained_vector_powi_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: stmg %r14, %r15, 112(%r15) ; SZ13-NEXT: stmg %r14, %r15, 112(%r15)
; SZ13-NEXT: .cfi_offset %r14, -48 ; SZ13-NEXT: .cfi_offset %r14, -48
▲ Show 20 Lines • Show All 47 Lines • ▼ Show 20 Lines
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, __powisf2@PLT ; S390X-NEXT: brasl %r14, __powisf2@PLT
; S390X-NEXT: larl %r1, .LCPI37_2 ; S390X-NEXT: larl %r1, .LCPI37_2
; S390X-NEXT: le %f1, 0(%r1) ; S390X-NEXT: le %f1, 0(%r1)
; S390X-NEXT: ler %f9, %f0 ; S390X-NEXT: ler %f9, %f0
; S390X-NEXT: lghi %r2, 3 ; S390X-NEXT: lghi %r2, 3
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, __powisf2@PLT ; S390X-NEXT: brasl %r14, __powisf2@PLT
; S390X-NEXT: ler %f4, %f0
; S390X-NEXT: ler %f0, %f8
; S390X-NEXT: ler %f2, %f9 ; S390X-NEXT: ler %f2, %f9
; S390X-NEXT: ler %f4, %f8
; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 288(%r15) ; S390X-NEXT: lmg %r14, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_powi_v3f32: ; SZ13-LABEL: constrained_vector_powi_v3f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: stmg %r14, %r15, 112(%r15) ; SZ13-NEXT: stmg %r14, %r15, 112(%r15)
▲ Show 20 Lines • Show All 146 Lines • ▼ Show 20 Lines
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, __powidf2@PLT ; S390X-NEXT: brasl %r14, __powidf2@PLT
; S390X-NEXT: larl %r1, .LCPI39_3 ; S390X-NEXT: larl %r1, .LCPI39_3
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: lghi %r2, 3 ; S390X-NEXT: lghi %r2, 3
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, __powidf2@PLT ; S390X-NEXT: brasl %r14, __powidf2@PLT
; S390X-NEXT: ldr %f2, %f10 ; S390X-NEXT: ldr %f6, %f0
; S390X-NEXT: ldr %f4, %f9 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ldr %f6, %f8 ; S390X-NEXT: ldr %f2, %f9
; S390X-NEXT: ldr %f4, %f10
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 296(%r15) ; S390X-NEXT: lmg %r14, %r15, 296(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_powi_v4f64: ; SZ13-LABEL: constrained_vector_powi_v4f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
▲ Show 20 Lines • Show All 84 Lines • ▼ Show 20 Lines
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -168 ; S390X-NEXT: aghi %r15, -168
; S390X-NEXT: .cfi_def_cfa_offset 328 ; S390X-NEXT: .cfi_def_cfa_offset 328
; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: larl %r1, .LCPI41_0 ; S390X-NEXT: larl %r1, .LCPI41_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: brasl %r14, sin@PLT ; S390X-NEXT: brasl %r14, sin@PLT
; S390X-NEXT: larl %r1, .LCPI41_1 ; S390X-NEXT: larl %r1, .LCPI41_1
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f8, %f0 ; S390X-NEXT: ldr %f8, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, sin@PLT ; S390X-NEXT: brasl %r14, sin@PLT
; S390X-NEXT: ldr %f2, %f8 ; S390X-NEXT: ldr %f2, %f0
; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 280(%r15) ; S390X-NEXT: lmg %r14, %r15, 280(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_sin_v2f64: ; SZ13-LABEL: constrained_vector_sin_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: stmg %r14, %r15, 112(%r15) ; SZ13-NEXT: stmg %r14, %r15, 112(%r15)
; SZ13-NEXT: .cfi_offset %r14, -48 ; SZ13-NEXT: .cfi_offset %r14, -48
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; S390X-NEXT: ler %f8, %f0 ; S390X-NEXT: ler %f8, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, sinf@PLT ; S390X-NEXT: brasl %r14, sinf@PLT
; S390X-NEXT: larl %r1, .LCPI42_2 ; S390X-NEXT: larl %r1, .LCPI42_2
; S390X-NEXT: le %f1, 0(%r1) ; S390X-NEXT: le %f1, 0(%r1)
; S390X-NEXT: ler %f9, %f0 ; S390X-NEXT: ler %f9, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, sinf@PLT ; S390X-NEXT: brasl %r14, sinf@PLT
; S390X-NEXT: ler %f4, %f0
; S390X-NEXT: ler %f0, %f8
; S390X-NEXT: ler %f2, %f9 ; S390X-NEXT: ler %f2, %f9
; S390X-NEXT: ler %f4, %f8
; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 288(%r15) ; S390X-NEXT: lmg %r14, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_sin_v3f32: ; SZ13-LABEL: constrained_vector_sin_v3f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: stmg %r14, %r15, 112(%r15) ; SZ13-NEXT: stmg %r14, %r15, 112(%r15)
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: .cfi_offset %f9, -176 ; S390X-NEXT: .cfi_offset %f9, -176
; S390X-NEXT: .cfi_offset %f10, -184 ; S390X-NEXT: .cfi_offset %f10, -184
; S390X-NEXT: lgr %r13, %r2 ; S390X-NEXT: lgr %r13, %r2
; S390X-NEXT: ld %f8, 16(%r2) ; S390X-NEXT: ld %f8, 0(%r2)
; S390X-NEXT: ld %f0, 0(%r2) ; S390X-NEXT: ld %f0, 16(%r2)
; S390X-NEXT: ld %f9, 8(%r2) ; S390X-NEXT: ld %f9, 8(%r2)
; S390X-NEXT: brasl %r14, sin@PLT ; S390X-NEXT: brasl %r14, sin@PLT
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f9 ; S390X-NEXT: ldr %f0, %f9
; S390X-NEXT: brasl %r14, sin@PLT ; S390X-NEXT: brasl %r14, sin@PLT
; S390X-NEXT: ldr %f9, %f0 ; S390X-NEXT: ldr %f9, %f0
; S390X-NEXT: ldr %f0, %f8 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: brasl %r14, sin@PLT ; S390X-NEXT: brasl %r14, sin@PLT
; S390X-NEXT: std %f0, 16(%r13) ; S390X-NEXT: std %f0, 0(%r13)
; S390X-NEXT: std %f9, 8(%r13) ; S390X-NEXT: std %f9, 8(%r13)
; S390X-NEXT: std %f10, 0(%r13) ; S390X-NEXT: std %f10, 16(%r13)
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r13, %r15, 288(%r15) ; S390X-NEXT: lmg %r13, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_sin_v3f64: ; SZ13-LABEL: constrained_vector_sin_v3f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
▲ Show 20 Lines • Show All 49 Lines • ▼ Show 20 Lines
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: .cfi_offset %f9, -176 ; S390X-NEXT: .cfi_offset %f9, -176
; S390X-NEXT: .cfi_offset %f10, -184 ; S390X-NEXT: .cfi_offset %f10, -184
; S390X-NEXT: larl %r1, .LCPI44_0 ; S390X-NEXT: larl %r1, .LCPI44_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: brasl %r14, sin@PLT ; S390X-NEXT: brasl %r14, sin@PLT
; S390X-NEXT: larl %r1, .LCPI44_1 ; S390X-NEXT: larl %r1, .LCPI44_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f8, %f0 ; S390X-NEXT: ldr %f8, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, sin@PLT ; S390X-NEXT: brasl %r14, sin@PLT
; S390X-NEXT: larl %r1, .LCPI44_2 ; S390X-NEXT: larl %r1, .LCPI44_2
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f9, %f0 ; S390X-NEXT: ldr %f9, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, sin@PLT ; S390X-NEXT: brasl %r14, sin@PLT
; S390X-NEXT: larl %r1, .LCPI44_3 ; S390X-NEXT: larl %r1, .LCPI44_3
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, sin@PLT ; S390X-NEXT: brasl %r14, sin@PLT
; S390X-NEXT: ldr %f2, %f10 ; S390X-NEXT: ldr %f6, %f0
; S390X-NEXT: ldr %f4, %f9 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ldr %f6, %f8 ; S390X-NEXT: ldr %f2, %f9
; S390X-NEXT: ldr %f4, %f10
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 296(%r15) ; S390X-NEXT: lmg %r14, %r15, 296(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_sin_v4f64: ; SZ13-LABEL: constrained_vector_sin_v4f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
▲ Show 20 Lines • Show All 79 Lines • ▼ Show 20 Lines
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -168 ; S390X-NEXT: aghi %r15, -168
; S390X-NEXT: .cfi_def_cfa_offset 328 ; S390X-NEXT: .cfi_def_cfa_offset 328
; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: larl %r1, .LCPI46_0 ; S390X-NEXT: larl %r1, .LCPI46_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: brasl %r14, cos@PLT ; S390X-NEXT: brasl %r14, cos@PLT
; S390X-NEXT: larl %r1, .LCPI46_1 ; S390X-NEXT: larl %r1, .LCPI46_1
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f8, %f0 ; S390X-NEXT: ldr %f8, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, cos@PLT ; S390X-NEXT: brasl %r14, cos@PLT
; S390X-NEXT: ldr %f2, %f8 ; S390X-NEXT: ldr %f2, %f0
; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 280(%r15) ; S390X-NEXT: lmg %r14, %r15, 280(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_cos_v2f64: ; SZ13-LABEL: constrained_vector_cos_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: stmg %r14, %r15, 112(%r15) ; SZ13-NEXT: stmg %r14, %r15, 112(%r15)
; SZ13-NEXT: .cfi_offset %r14, -48 ; SZ13-NEXT: .cfi_offset %r14, -48
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; S390X-NEXT: ler %f8, %f0 ; S390X-NEXT: ler %f8, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, cosf@PLT ; S390X-NEXT: brasl %r14, cosf@PLT
; S390X-NEXT: larl %r1, .LCPI47_2 ; S390X-NEXT: larl %r1, .LCPI47_2
; S390X-NEXT: le %f1, 0(%r1) ; S390X-NEXT: le %f1, 0(%r1)
; S390X-NEXT: ler %f9, %f0 ; S390X-NEXT: ler %f9, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, cosf@PLT ; S390X-NEXT: brasl %r14, cosf@PLT
; S390X-NEXT: ler %f4, %f0
; S390X-NEXT: ler %f0, %f8
; S390X-NEXT: ler %f2, %f9 ; S390X-NEXT: ler %f2, %f9
; S390X-NEXT: ler %f4, %f8
; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 288(%r15) ; S390X-NEXT: lmg %r14, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_cos_v3f32: ; SZ13-LABEL: constrained_vector_cos_v3f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: stmg %r14, %r15, 112(%r15) ; SZ13-NEXT: stmg %r14, %r15, 112(%r15)
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: .cfi_offset %f9, -176 ; S390X-NEXT: .cfi_offset %f9, -176
; S390X-NEXT: .cfi_offset %f10, -184 ; S390X-NEXT: .cfi_offset %f10, -184
; S390X-NEXT: lgr %r13, %r2 ; S390X-NEXT: lgr %r13, %r2
; S390X-NEXT: ld %f8, 16(%r2) ; S390X-NEXT: ld %f8, 0(%r2)
; S390X-NEXT: ld %f0, 0(%r2) ; S390X-NEXT: ld %f0, 16(%r2)
; S390X-NEXT: ld %f9, 8(%r2) ; S390X-NEXT: ld %f9, 8(%r2)
; S390X-NEXT: brasl %r14, cos@PLT ; S390X-NEXT: brasl %r14, cos@PLT
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f9 ; S390X-NEXT: ldr %f0, %f9
; S390X-NEXT: brasl %r14, cos@PLT ; S390X-NEXT: brasl %r14, cos@PLT
; S390X-NEXT: ldr %f9, %f0 ; S390X-NEXT: ldr %f9, %f0
; S390X-NEXT: ldr %f0, %f8 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: brasl %r14, cos@PLT ; S390X-NEXT: brasl %r14, cos@PLT
; S390X-NEXT: std %f0, 16(%r13) ; S390X-NEXT: std %f0, 0(%r13)
; S390X-NEXT: std %f9, 8(%r13) ; S390X-NEXT: std %f9, 8(%r13)
; S390X-NEXT: std %f10, 0(%r13) ; S390X-NEXT: std %f10, 16(%r13)
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r13, %r15, 288(%r15) ; S390X-NEXT: lmg %r13, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_cos_v3f64: ; SZ13-LABEL: constrained_vector_cos_v3f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
▲ Show 20 Lines • Show All 49 Lines • ▼ Show 20 Lines
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: .cfi_offset %f9, -176 ; S390X-NEXT: .cfi_offset %f9, -176
; S390X-NEXT: .cfi_offset %f10, -184 ; S390X-NEXT: .cfi_offset %f10, -184
; S390X-NEXT: larl %r1, .LCPI49_0 ; S390X-NEXT: larl %r1, .LCPI49_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: brasl %r14, cos@PLT ; S390X-NEXT: brasl %r14, cos@PLT
; S390X-NEXT: larl %r1, .LCPI49_1 ; S390X-NEXT: larl %r1, .LCPI49_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f8, %f0 ; S390X-NEXT: ldr %f8, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, cos@PLT ; S390X-NEXT: brasl %r14, cos@PLT
; S390X-NEXT: larl %r1, .LCPI49_2 ; S390X-NEXT: larl %r1, .LCPI49_2
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f9, %f0 ; S390X-NEXT: ldr %f9, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, cos@PLT ; S390X-NEXT: brasl %r14, cos@PLT
; S390X-NEXT: larl %r1, .LCPI49_3 ; S390X-NEXT: larl %r1, .LCPI49_3
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, cos@PLT ; S390X-NEXT: brasl %r14, cos@PLT
; S390X-NEXT: ldr %f2, %f10 ; S390X-NEXT: ldr %f6, %f0
; S390X-NEXT: ldr %f4, %f9 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ldr %f6, %f8 ; S390X-NEXT: ldr %f2, %f9
; S390X-NEXT: ldr %f4, %f10
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 296(%r15) ; S390X-NEXT: lmg %r14, %r15, 296(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_cos_v4f64: ; SZ13-LABEL: constrained_vector_cos_v4f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
▲ Show 20 Lines • Show All 79 Lines • ▼ Show 20 Lines
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -168 ; S390X-NEXT: aghi %r15, -168
; S390X-NEXT: .cfi_def_cfa_offset 328 ; S390X-NEXT: .cfi_def_cfa_offset 328
; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: larl %r1, .LCPI51_0 ; S390X-NEXT: larl %r1, .LCPI51_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: brasl %r14, exp@PLT ; S390X-NEXT: brasl %r14, exp@PLT
; S390X-NEXT: larl %r1, .LCPI51_1 ; S390X-NEXT: larl %r1, .LCPI51_1
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f8, %f0 ; S390X-NEXT: ldr %f8, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, exp@PLT ; S390X-NEXT: brasl %r14, exp@PLT
; S390X-NEXT: ldr %f2, %f8 ; S390X-NEXT: ldr %f2, %f0
; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 280(%r15) ; S390X-NEXT: lmg %r14, %r15, 280(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_exp_v2f64: ; SZ13-LABEL: constrained_vector_exp_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: stmg %r14, %r15, 112(%r15) ; SZ13-NEXT: stmg %r14, %r15, 112(%r15)
; SZ13-NEXT: .cfi_offset %r14, -48 ; SZ13-NEXT: .cfi_offset %r14, -48
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; S390X-NEXT: ler %f8, %f0 ; S390X-NEXT: ler %f8, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, expf@PLT ; S390X-NEXT: brasl %r14, expf@PLT
; S390X-NEXT: larl %r1, .LCPI52_2 ; S390X-NEXT: larl %r1, .LCPI52_2
; S390X-NEXT: le %f1, 0(%r1) ; S390X-NEXT: le %f1, 0(%r1)
; S390X-NEXT: ler %f9, %f0 ; S390X-NEXT: ler %f9, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, expf@PLT ; S390X-NEXT: brasl %r14, expf@PLT
; S390X-NEXT: ler %f4, %f0
; S390X-NEXT: ler %f0, %f8
; S390X-NEXT: ler %f2, %f9 ; S390X-NEXT: ler %f2, %f9
; S390X-NEXT: ler %f4, %f8
; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 288(%r15) ; S390X-NEXT: lmg %r14, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_exp_v3f32: ; SZ13-LABEL: constrained_vector_exp_v3f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: stmg %r14, %r15, 112(%r15) ; SZ13-NEXT: stmg %r14, %r15, 112(%r15)
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: .cfi_offset %f9, -176 ; S390X-NEXT: .cfi_offset %f9, -176
; S390X-NEXT: .cfi_offset %f10, -184 ; S390X-NEXT: .cfi_offset %f10, -184
; S390X-NEXT: lgr %r13, %r2 ; S390X-NEXT: lgr %r13, %r2
; S390X-NEXT: ld %f8, 16(%r2) ; S390X-NEXT: ld %f8, 0(%r2)
; S390X-NEXT: ld %f0, 0(%r2) ; S390X-NEXT: ld %f0, 16(%r2)
; S390X-NEXT: ld %f9, 8(%r2) ; S390X-NEXT: ld %f9, 8(%r2)
; S390X-NEXT: brasl %r14, exp@PLT ; S390X-NEXT: brasl %r14, exp@PLT
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f9 ; S390X-NEXT: ldr %f0, %f9
; S390X-NEXT: brasl %r14, exp@PLT ; S390X-NEXT: brasl %r14, exp@PLT
; S390X-NEXT: ldr %f9, %f0 ; S390X-NEXT: ldr %f9, %f0
; S390X-NEXT: ldr %f0, %f8 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: brasl %r14, exp@PLT ; S390X-NEXT: brasl %r14, exp@PLT
; S390X-NEXT: std %f0, 16(%r13) ; S390X-NEXT: std %f0, 0(%r13)
; S390X-NEXT: std %f9, 8(%r13) ; S390X-NEXT: std %f9, 8(%r13)
; S390X-NEXT: std %f10, 0(%r13) ; S390X-NEXT: std %f10, 16(%r13)
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r13, %r15, 288(%r15) ; S390X-NEXT: lmg %r13, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_exp_v3f64: ; SZ13-LABEL: constrained_vector_exp_v3f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
▲ Show 20 Lines • Show All 49 Lines • ▼ Show 20 Lines
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: .cfi_offset %f9, -176 ; S390X-NEXT: .cfi_offset %f9, -176
; S390X-NEXT: .cfi_offset %f10, -184 ; S390X-NEXT: .cfi_offset %f10, -184
; S390X-NEXT: larl %r1, .LCPI54_0 ; S390X-NEXT: larl %r1, .LCPI54_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: brasl %r14, exp@PLT ; S390X-NEXT: brasl %r14, exp@PLT
; S390X-NEXT: larl %r1, .LCPI54_1 ; S390X-NEXT: larl %r1, .LCPI54_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f8, %f0 ; S390X-NEXT: ldr %f8, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, exp@PLT ; S390X-NEXT: brasl %r14, exp@PLT
; S390X-NEXT: larl %r1, .LCPI54_2 ; S390X-NEXT: larl %r1, .LCPI54_2
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f9, %f0 ; S390X-NEXT: ldr %f9, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, exp@PLT ; S390X-NEXT: brasl %r14, exp@PLT
; S390X-NEXT: larl %r1, .LCPI54_3 ; S390X-NEXT: larl %r1, .LCPI54_3
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, exp@PLT ; S390X-NEXT: brasl %r14, exp@PLT
; S390X-NEXT: ldr %f2, %f10 ; S390X-NEXT: ldr %f6, %f0
; S390X-NEXT: ldr %f4, %f9 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ldr %f6, %f8 ; S390X-NEXT: ldr %f2, %f9
; S390X-NEXT: ldr %f4, %f10
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 296(%r15) ; S390X-NEXT: lmg %r14, %r15, 296(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_exp_v4f64: ; SZ13-LABEL: constrained_vector_exp_v4f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
▲ Show 20 Lines • Show All 79 Lines • ▼ Show 20 Lines
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -168 ; S390X-NEXT: aghi %r15, -168
; S390X-NEXT: .cfi_def_cfa_offset 328 ; S390X-NEXT: .cfi_def_cfa_offset 328
; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: larl %r1, .LCPI56_0 ; S390X-NEXT: larl %r1, .LCPI56_0
; S390X-NEXT: ldeb %f0, 0(%r1) ; S390X-NEXT: ld %f0, 0(%r1)
; S390X-NEXT: brasl %r14, exp2@PLT ; S390X-NEXT: brasl %r14, exp2@PLT
; S390X-NEXT: larl %r1, .LCPI56_1 ; S390X-NEXT: larl %r1, .LCPI56_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ldeb %f1, 0(%r1)
; S390X-NEXT: ldr %f8, %f0 ; S390X-NEXT: ldr %f8, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, exp2@PLT ; S390X-NEXT: brasl %r14, exp2@PLT
; S390X-NEXT: ldr %f2, %f8 ; S390X-NEXT: ldr %f2, %f0
; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 280(%r15) ; S390X-NEXT: lmg %r14, %r15, 280(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_exp2_v2f64: ; SZ13-LABEL: constrained_vector_exp2_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: stmg %r14, %r15, 112(%r15) ; SZ13-NEXT: stmg %r14, %r15, 112(%r15)
; SZ13-NEXT: .cfi_offset %r14, -48 ; SZ13-NEXT: .cfi_offset %r14, -48
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; S390X-NEXT: ler %f8, %f0 ; S390X-NEXT: ler %f8, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, exp2f@PLT ; S390X-NEXT: brasl %r14, exp2f@PLT
; S390X-NEXT: larl %r1, .LCPI57_2 ; S390X-NEXT: larl %r1, .LCPI57_2
; S390X-NEXT: le %f1, 0(%r1) ; S390X-NEXT: le %f1, 0(%r1)
; S390X-NEXT: ler %f9, %f0 ; S390X-NEXT: ler %f9, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, exp2f@PLT ; S390X-NEXT: brasl %r14, exp2f@PLT
; S390X-NEXT: ler %f4, %f0
; S390X-NEXT: ler %f0, %f8
; S390X-NEXT: ler %f2, %f9 ; S390X-NEXT: ler %f2, %f9
; S390X-NEXT: ler %f4, %f8
; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 288(%r15) ; S390X-NEXT: lmg %r14, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_exp2_v3f32: ; SZ13-LABEL: constrained_vector_exp2_v3f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: stmg %r14, %r15, 112(%r15) ; SZ13-NEXT: stmg %r14, %r15, 112(%r15)
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: .cfi_offset %f9, -176 ; S390X-NEXT: .cfi_offset %f9, -176
; S390X-NEXT: .cfi_offset %f10, -184 ; S390X-NEXT: .cfi_offset %f10, -184
; S390X-NEXT: lgr %r13, %r2 ; S390X-NEXT: lgr %r13, %r2
; S390X-NEXT: ld %f8, 16(%r2) ; S390X-NEXT: ld %f8, 0(%r2)
; S390X-NEXT: ld %f0, 0(%r2) ; S390X-NEXT: ld %f0, 16(%r2)
; S390X-NEXT: ld %f9, 8(%r2) ; S390X-NEXT: ld %f9, 8(%r2)
; S390X-NEXT: brasl %r14, exp2@PLT ; S390X-NEXT: brasl %r14, exp2@PLT
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f9 ; S390X-NEXT: ldr %f0, %f9
; S390X-NEXT: brasl %r14, exp2@PLT ; S390X-NEXT: brasl %r14, exp2@PLT
; S390X-NEXT: ldr %f9, %f0 ; S390X-NEXT: ldr %f9, %f0
; S390X-NEXT: ldr %f0, %f8 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: brasl %r14, exp2@PLT ; S390X-NEXT: brasl %r14, exp2@PLT
; S390X-NEXT: std %f0, 16(%r13) ; S390X-NEXT: std %f0, 0(%r13)
; S390X-NEXT: std %f9, 8(%r13) ; S390X-NEXT: std %f9, 8(%r13)
; S390X-NEXT: std %f10, 0(%r13) ; S390X-NEXT: std %f10, 16(%r13)
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r13, %r15, 288(%r15) ; S390X-NEXT: lmg %r13, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_exp2_v3f64: ; SZ13-LABEL: constrained_vector_exp2_v3f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
▲ Show 20 Lines • Show All 66 Lines • ▼ Show 20 Lines
; S390X-NEXT: ldr %f9, %f0 ; S390X-NEXT: ldr %f9, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, exp2@PLT ; S390X-NEXT: brasl %r14, exp2@PLT
; S390X-NEXT: larl %r1, .LCPI59_3 ; S390X-NEXT: larl %r1, .LCPI59_3
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, exp2@PLT ; S390X-NEXT: brasl %r14, exp2@PLT
; S390X-NEXT: ldr %f2, %f10 ; S390X-NEXT: ldr %f6, %f0
; S390X-NEXT: ldr %f4, %f9 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ldr %f6, %f8 ; S390X-NEXT: ldr %f2, %f9
; S390X-NEXT: ldr %f4, %f10
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 296(%r15) ; S390X-NEXT: lmg %r14, %r15, 296(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_exp2_v4f64: ; SZ13-LABEL: constrained_vector_exp2_v4f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
▲ Show 20 Lines • Show All 79 Lines • ▼ Show 20 Lines
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -168 ; S390X-NEXT: aghi %r15, -168
; S390X-NEXT: .cfi_def_cfa_offset 328 ; S390X-NEXT: .cfi_def_cfa_offset 328
; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: larl %r1, .LCPI61_0 ; S390X-NEXT: larl %r1, .LCPI61_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: brasl %r14, log@PLT ; S390X-NEXT: brasl %r14, log@PLT
; S390X-NEXT: larl %r1, .LCPI61_1 ; S390X-NEXT: larl %r1, .LCPI61_1
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f8, %f0 ; S390X-NEXT: ldr %f8, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, log@PLT ; S390X-NEXT: brasl %r14, log@PLT
; S390X-NEXT: ldr %f2, %f8 ; S390X-NEXT: ldr %f2, %f0
; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 280(%r15) ; S390X-NEXT: lmg %r14, %r15, 280(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_log_v2f64: ; SZ13-LABEL: constrained_vector_log_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: stmg %r14, %r15, 112(%r15) ; SZ13-NEXT: stmg %r14, %r15, 112(%r15)
; SZ13-NEXT: .cfi_offset %r14, -48 ; SZ13-NEXT: .cfi_offset %r14, -48
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; S390X-NEXT: ler %f8, %f0 ; S390X-NEXT: ler %f8, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, logf@PLT ; S390X-NEXT: brasl %r14, logf@PLT
; S390X-NEXT: larl %r1, .LCPI62_2 ; S390X-NEXT: larl %r1, .LCPI62_2
; S390X-NEXT: le %f1, 0(%r1) ; S390X-NEXT: le %f1, 0(%r1)
; S390X-NEXT: ler %f9, %f0 ; S390X-NEXT: ler %f9, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, logf@PLT ; S390X-NEXT: brasl %r14, logf@PLT
; S390X-NEXT: ler %f4, %f0
; S390X-NEXT: ler %f0, %f8
; S390X-NEXT: ler %f2, %f9 ; S390X-NEXT: ler %f2, %f9
; S390X-NEXT: ler %f4, %f8
; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 288(%r15) ; S390X-NEXT: lmg %r14, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_log_v3f32: ; SZ13-LABEL: constrained_vector_log_v3f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: stmg %r14, %r15, 112(%r15) ; SZ13-NEXT: stmg %r14, %r15, 112(%r15)
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: .cfi_offset %f9, -176 ; S390X-NEXT: .cfi_offset %f9, -176
; S390X-NEXT: .cfi_offset %f10, -184 ; S390X-NEXT: .cfi_offset %f10, -184
; S390X-NEXT: lgr %r13, %r2 ; S390X-NEXT: lgr %r13, %r2
; S390X-NEXT: ld %f8, 16(%r2) ; S390X-NEXT: ld %f8, 0(%r2)
; S390X-NEXT: ld %f0, 0(%r2) ; S390X-NEXT: ld %f0, 16(%r2)
; S390X-NEXT: ld %f9, 8(%r2) ; S390X-NEXT: ld %f9, 8(%r2)
; S390X-NEXT: brasl %r14, log@PLT ; S390X-NEXT: brasl %r14, log@PLT
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f9 ; S390X-NEXT: ldr %f0, %f9
; S390X-NEXT: brasl %r14, log@PLT ; S390X-NEXT: brasl %r14, log@PLT
; S390X-NEXT: ldr %f9, %f0 ; S390X-NEXT: ldr %f9, %f0
; S390X-NEXT: ldr %f0, %f8 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: brasl %r14, log@PLT ; S390X-NEXT: brasl %r14, log@PLT
; S390X-NEXT: std %f0, 16(%r13) ; S390X-NEXT: std %f0, 0(%r13)
; S390X-NEXT: std %f9, 8(%r13) ; S390X-NEXT: std %f9, 8(%r13)
; S390X-NEXT: std %f10, 0(%r13) ; S390X-NEXT: std %f10, 16(%r13)
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r13, %r15, 288(%r15) ; S390X-NEXT: lmg %r13, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_log_v3f64: ; SZ13-LABEL: constrained_vector_log_v3f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
▲ Show 20 Lines • Show All 49 Lines • ▼ Show 20 Lines
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: .cfi_offset %f9, -176 ; S390X-NEXT: .cfi_offset %f9, -176
; S390X-NEXT: .cfi_offset %f10, -184 ; S390X-NEXT: .cfi_offset %f10, -184
; S390X-NEXT: larl %r1, .LCPI64_0 ; S390X-NEXT: larl %r1, .LCPI64_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: brasl %r14, log@PLT ; S390X-NEXT: brasl %r14, log@PLT
; S390X-NEXT: larl %r1, .LCPI64_1 ; S390X-NEXT: larl %r1, .LCPI64_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f8, %f0 ; S390X-NEXT: ldr %f8, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, log@PLT ; S390X-NEXT: brasl %r14, log@PLT
; S390X-NEXT: larl %r1, .LCPI64_2 ; S390X-NEXT: larl %r1, .LCPI64_2
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f9, %f0 ; S390X-NEXT: ldr %f9, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, log@PLT ; S390X-NEXT: brasl %r14, log@PLT
; S390X-NEXT: larl %r1, .LCPI64_3 ; S390X-NEXT: larl %r1, .LCPI64_3
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, log@PLT ; S390X-NEXT: brasl %r14, log@PLT
; S390X-NEXT: ldr %f2, %f10 ; S390X-NEXT: ldr %f6, %f0
; S390X-NEXT: ldr %f4, %f9 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ldr %f6, %f8 ; S390X-NEXT: ldr %f2, %f9
; S390X-NEXT: ldr %f4, %f10
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 296(%r15) ; S390X-NEXT: lmg %r14, %r15, 296(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_log_v4f64: ; SZ13-LABEL: constrained_vector_log_v4f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
▲ Show 20 Lines • Show All 79 Lines • ▼ Show 20 Lines
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -168 ; S390X-NEXT: aghi %r15, -168
; S390X-NEXT: .cfi_def_cfa_offset 328 ; S390X-NEXT: .cfi_def_cfa_offset 328
; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: larl %r1, .LCPI66_0 ; S390X-NEXT: larl %r1, .LCPI66_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: brasl %r14, log10@PLT ; S390X-NEXT: brasl %r14, log10@PLT
; S390X-NEXT: larl %r1, .LCPI66_1 ; S390X-NEXT: larl %r1, .LCPI66_1
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f8, %f0 ; S390X-NEXT: ldr %f8, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, log10@PLT ; S390X-NEXT: brasl %r14, log10@PLT
; S390X-NEXT: ldr %f2, %f8 ; S390X-NEXT: ldr %f2, %f0
; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 280(%r15) ; S390X-NEXT: lmg %r14, %r15, 280(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_log10_v2f64: ; SZ13-LABEL: constrained_vector_log10_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: stmg %r14, %r15, 112(%r15) ; SZ13-NEXT: stmg %r14, %r15, 112(%r15)
; SZ13-NEXT: .cfi_offset %r14, -48 ; SZ13-NEXT: .cfi_offset %r14, -48
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; S390X-NEXT: ler %f8, %f0 ; S390X-NEXT: ler %f8, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, log10f@PLT ; S390X-NEXT: brasl %r14, log10f@PLT
; S390X-NEXT: larl %r1, .LCPI67_2 ; S390X-NEXT: larl %r1, .LCPI67_2
; S390X-NEXT: le %f1, 0(%r1) ; S390X-NEXT: le %f1, 0(%r1)
; S390X-NEXT: ler %f9, %f0 ; S390X-NEXT: ler %f9, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, log10f@PLT ; S390X-NEXT: brasl %r14, log10f@PLT
; S390X-NEXT: ler %f4, %f0
; S390X-NEXT: ler %f0, %f8
; S390X-NEXT: ler %f2, %f9 ; S390X-NEXT: ler %f2, %f9
; S390X-NEXT: ler %f4, %f8
; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 288(%r15) ; S390X-NEXT: lmg %r14, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_log10_v3f32: ; SZ13-LABEL: constrained_vector_log10_v3f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: stmg %r14, %r15, 112(%r15) ; SZ13-NEXT: stmg %r14, %r15, 112(%r15)
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: .cfi_offset %f9, -176 ; S390X-NEXT: .cfi_offset %f9, -176
; S390X-NEXT: .cfi_offset %f10, -184 ; S390X-NEXT: .cfi_offset %f10, -184
; S390X-NEXT: lgr %r13, %r2 ; S390X-NEXT: lgr %r13, %r2
; S390X-NEXT: ld %f8, 16(%r2) ; S390X-NEXT: ld %f8, 0(%r2)
; S390X-NEXT: ld %f0, 0(%r2) ; S390X-NEXT: ld %f0, 16(%r2)
; S390X-NEXT: ld %f9, 8(%r2) ; S390X-NEXT: ld %f9, 8(%r2)
; S390X-NEXT: brasl %r14, log10@PLT ; S390X-NEXT: brasl %r14, log10@PLT
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f9 ; S390X-NEXT: ldr %f0, %f9
; S390X-NEXT: brasl %r14, log10@PLT ; S390X-NEXT: brasl %r14, log10@PLT
; S390X-NEXT: ldr %f9, %f0 ; S390X-NEXT: ldr %f9, %f0
; S390X-NEXT: ldr %f0, %f8 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: brasl %r14, log10@PLT ; S390X-NEXT: brasl %r14, log10@PLT
; S390X-NEXT: std %f0, 16(%r13) ; S390X-NEXT: std %f0, 0(%r13)
; S390X-NEXT: std %f9, 8(%r13) ; S390X-NEXT: std %f9, 8(%r13)
; S390X-NEXT: std %f10, 0(%r13) ; S390X-NEXT: std %f10, 16(%r13)
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r13, %r15, 288(%r15) ; S390X-NEXT: lmg %r13, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_log10_v3f64: ; SZ13-LABEL: constrained_vector_log10_v3f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
▲ Show 20 Lines • Show All 49 Lines • ▼ Show 20 Lines
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: .cfi_offset %f9, -176 ; S390X-NEXT: .cfi_offset %f9, -176
; S390X-NEXT: .cfi_offset %f10, -184 ; S390X-NEXT: .cfi_offset %f10, -184
; S390X-NEXT: larl %r1, .LCPI69_0 ; S390X-NEXT: larl %r1, .LCPI69_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: brasl %r14, log10@PLT ; S390X-NEXT: brasl %r14, log10@PLT
; S390X-NEXT: larl %r1, .LCPI69_1 ; S390X-NEXT: larl %r1, .LCPI69_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f8, %f0 ; S390X-NEXT: ldr %f8, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, log10@PLT ; S390X-NEXT: brasl %r14, log10@PLT
; S390X-NEXT: larl %r1, .LCPI69_2 ; S390X-NEXT: larl %r1, .LCPI69_2
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f9, %f0 ; S390X-NEXT: ldr %f9, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, log10@PLT ; S390X-NEXT: brasl %r14, log10@PLT
; S390X-NEXT: larl %r1, .LCPI69_3 ; S390X-NEXT: larl %r1, .LCPI69_3
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, log10@PLT ; S390X-NEXT: brasl %r14, log10@PLT
; S390X-NEXT: ldr %f2, %f10 ; S390X-NEXT: ldr %f6, %f0
; S390X-NEXT: ldr %f4, %f9 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ldr %f6, %f8 ; S390X-NEXT: ldr %f2, %f9
; S390X-NEXT: ldr %f4, %f10
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 296(%r15) ; S390X-NEXT: lmg %r14, %r15, 296(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_log10_v4f64: ; SZ13-LABEL: constrained_vector_log10_v4f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
▲ Show 20 Lines • Show All 79 Lines • ▼ Show 20 Lines
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -168 ; S390X-NEXT: aghi %r15, -168
; S390X-NEXT: .cfi_def_cfa_offset 328 ; S390X-NEXT: .cfi_def_cfa_offset 328
; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: larl %r1, .LCPI71_0 ; S390X-NEXT: larl %r1, .LCPI71_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: brasl %r14, log2@PLT ; S390X-NEXT: brasl %r14, log2@PLT
; S390X-NEXT: larl %r1, .LCPI71_1 ; S390X-NEXT: larl %r1, .LCPI71_1
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f8, %f0 ; S390X-NEXT: ldr %f8, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, log2@PLT ; S390X-NEXT: brasl %r14, log2@PLT
; S390X-NEXT: ldr %f2, %f8 ; S390X-NEXT: ldr %f2, %f0
; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 280(%r15) ; S390X-NEXT: lmg %r14, %r15, 280(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_log2_v2f64: ; SZ13-LABEL: constrained_vector_log2_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: stmg %r14, %r15, 112(%r15) ; SZ13-NEXT: stmg %r14, %r15, 112(%r15)
; SZ13-NEXT: .cfi_offset %r14, -48 ; SZ13-NEXT: .cfi_offset %r14, -48
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; S390X-NEXT: ler %f8, %f0 ; S390X-NEXT: ler %f8, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, log2f@PLT ; S390X-NEXT: brasl %r14, log2f@PLT
; S390X-NEXT: larl %r1, .LCPI72_2 ; S390X-NEXT: larl %r1, .LCPI72_2
; S390X-NEXT: le %f1, 0(%r1) ; S390X-NEXT: le %f1, 0(%r1)
; S390X-NEXT: ler %f9, %f0 ; S390X-NEXT: ler %f9, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, log2f@PLT ; S390X-NEXT: brasl %r14, log2f@PLT
; S390X-NEXT: ler %f4, %f0
; S390X-NEXT: ler %f0, %f8
; S390X-NEXT: ler %f2, %f9 ; S390X-NEXT: ler %f2, %f9
; S390X-NEXT: ler %f4, %f8
; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 288(%r15) ; S390X-NEXT: lmg %r14, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_log2_v3f32: ; SZ13-LABEL: constrained_vector_log2_v3f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: stmg %r14, %r15, 112(%r15) ; SZ13-NEXT: stmg %r14, %r15, 112(%r15)
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: .cfi_offset %f9, -176 ; S390X-NEXT: .cfi_offset %f9, -176
; S390X-NEXT: .cfi_offset %f10, -184 ; S390X-NEXT: .cfi_offset %f10, -184
; S390X-NEXT: lgr %r13, %r2 ; S390X-NEXT: lgr %r13, %r2
; S390X-NEXT: ld %f8, 16(%r2) ; S390X-NEXT: ld %f8, 0(%r2)
; S390X-NEXT: ld %f0, 0(%r2) ; S390X-NEXT: ld %f0, 16(%r2)
; S390X-NEXT: ld %f9, 8(%r2) ; S390X-NEXT: ld %f9, 8(%r2)
; S390X-NEXT: brasl %r14, log2@PLT ; S390X-NEXT: brasl %r14, log2@PLT
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f9 ; S390X-NEXT: ldr %f0, %f9
; S390X-NEXT: brasl %r14, log2@PLT ; S390X-NEXT: brasl %r14, log2@PLT
; S390X-NEXT: ldr %f9, %f0 ; S390X-NEXT: ldr %f9, %f0
; S390X-NEXT: ldr %f0, %f8 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: brasl %r14, log2@PLT ; S390X-NEXT: brasl %r14, log2@PLT
; S390X-NEXT: std %f0, 16(%r13) ; S390X-NEXT: std %f0, 0(%r13)
; S390X-NEXT: std %f9, 8(%r13) ; S390X-NEXT: std %f9, 8(%r13)
; S390X-NEXT: std %f10, 0(%r13) ; S390X-NEXT: std %f10, 16(%r13)
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r13, %r15, 288(%r15) ; S390X-NEXT: lmg %r13, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_log2_v3f64: ; SZ13-LABEL: constrained_vector_log2_v3f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
▲ Show 20 Lines • Show All 49 Lines • ▼ Show 20 Lines
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: .cfi_offset %f9, -176 ; S390X-NEXT: .cfi_offset %f9, -176
; S390X-NEXT: .cfi_offset %f10, -184 ; S390X-NEXT: .cfi_offset %f10, -184
; S390X-NEXT: larl %r1, .LCPI74_0 ; S390X-NEXT: larl %r1, .LCPI74_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: brasl %r14, log2@PLT ; S390X-NEXT: brasl %r14, log2@PLT
; S390X-NEXT: larl %r1, .LCPI74_1 ; S390X-NEXT: larl %r1, .LCPI74_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f8, %f0 ; S390X-NEXT: ldr %f8, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, log2@PLT ; S390X-NEXT: brasl %r14, log2@PLT
; S390X-NEXT: larl %r1, .LCPI74_2 ; S390X-NEXT: larl %r1, .LCPI74_2
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f9, %f0 ; S390X-NEXT: ldr %f9, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, log2@PLT ; S390X-NEXT: brasl %r14, log2@PLT
; S390X-NEXT: larl %r1, .LCPI74_3 ; S390X-NEXT: larl %r1, .LCPI74_3
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, log2@PLT ; S390X-NEXT: brasl %r14, log2@PLT
; S390X-NEXT: ldr %f2, %f10 ; S390X-NEXT: ldr %f6, %f0
; S390X-NEXT: ldr %f4, %f9 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ldr %f6, %f8 ; S390X-NEXT: ldr %f2, %f9
; S390X-NEXT: ldr %f4, %f10
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 296(%r15) ; S390X-NEXT: lmg %r14, %r15, 296(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_log2_v4f64: ; SZ13-LABEL: constrained_vector_log2_v4f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
▲ Show 20 Lines • Show All 59 Lines • ▼ Show 20 Lines %rint = call <1 x float> @llvm.experimental.constrained.rint.v1f32(
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
ret <1 x float> %rint ret <1 x float> %rint
} }
define <2 x double> @constrained_vector_rint_v2f64() #0 { define <2 x double> @constrained_vector_rint_v2f64() #0 {
; S390X-LABEL: constrained_vector_rint_v2f64: ; S390X-LABEL: constrained_vector_rint_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI76_0 ; S390X-NEXT: larl %r1, .LCPI76_0
; S390X-NEXT: ldeb %f0, 0(%r1) ; S390X-NEXT: ld %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI76_1 ; S390X-NEXT: larl %r1, .LCPI76_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ldeb %f1, 0(%r1)
; S390X-NEXT: fidbr %f2, 0, %f0 ; S390X-NEXT: fidbr %f0, 0, %f0
; S390X-NEXT: fidbr %f0, 0, %f1 ; S390X-NEXT: fidbr %f2, 0, %f1
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_rint_v2f64: ; SZ13-LABEL: constrained_vector_rint_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI76_0 ; SZ13-NEXT: larl %r1, .LCPI76_0
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: vfidb %v24, %v0, 0, 0 ; SZ13-NEXT: vfidb %v24, %v0, 0, 0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
Show All 9 Lines
; S390X-LABEL: constrained_vector_rint_v3f32: ; S390X-LABEL: constrained_vector_rint_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI77_0 ; S390X-NEXT: larl %r1, .LCPI77_0
; S390X-NEXT: le %f0, 0(%r1) ; S390X-NEXT: le %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI77_1 ; S390X-NEXT: larl %r1, .LCPI77_1
; S390X-NEXT: le %f1, 0(%r1) ; S390X-NEXT: le %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI77_2 ; S390X-NEXT: larl %r1, .LCPI77_2
; S390X-NEXT: le %f3, 0(%r1) ; S390X-NEXT: le %f3, 0(%r1)
; S390X-NEXT: fiebr %f4, 0, %f0 ; S390X-NEXT: fiebr %f0, 0, %f0
; S390X-NEXT: fiebr %f2, 0, %f1 ; S390X-NEXT: fiebr %f2, 0, %f1
; S390X-NEXT: fiebr %f0, 0, %f3 ; S390X-NEXT: fiebr %f4, 0, %f3
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_rint_v3f32: ; SZ13-LABEL: constrained_vector_rint_v3f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI77_0 ; SZ13-NEXT: larl %r1, .LCPI77_0
; SZ13-NEXT: lde %f0, 0(%r1) ; SZ13-NEXT: lde %f0, 0(%r1)
; SZ13-NEXT: larl %r1, .LCPI77_1 ; SZ13-NEXT: larl %r1, .LCPI77_1
; SZ13-NEXT: lde %f1, 0(%r1) ; SZ13-NEXT: lde %f1, 0(%r1)
Show All 12 Lines %rint = call <3 x float> @llvm.experimental.constrained.rint.v3f32(
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
ret <3 x float> %rint ret <3 x float> %rint
} }
define void @constrained_vector_rint_v3f64(<3 x double>* %a) #0 { define void @constrained_vector_rint_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_rint_v3f64: ; S390X-LABEL: constrained_vector_rint_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: ld %f0, 0(%r2) ; S390X-NEXT: ld %f0, 16(%r2)
; S390X-NEXT: ld %f1, 8(%r2) ; S390X-NEXT: ld %f1, 8(%r2)
; S390X-NEXT: ld %f2, 16(%r2) ; S390X-NEXT: ld %f2, 0(%r2)
; S390X-NEXT: fidbr %f0, 0, %f0 ; S390X-NEXT: fidbr %f0, 0, %f0
; S390X-NEXT: fidbr %f1, 0, %f1 ; S390X-NEXT: fidbr %f1, 0, %f1
; S390X-NEXT: fidbr %f2, 0, %f2 ; S390X-NEXT: fidbr %f2, 0, %f2
; S390X-NEXT: std %f2, 16(%r2) ; S390X-NEXT: std %f2, 0(%r2)
; S390X-NEXT: std %f1, 8(%r2) ; S390X-NEXT: std %f1, 8(%r2)
; S390X-NEXT: std %f0, 0(%r2) ; S390X-NEXT: std %f0, 16(%r2)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_rint_v3f64: ; SZ13-LABEL: constrained_vector_rint_v3f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: vl %v1, 0(%r2), 4 ; SZ13-NEXT: vl %v0, 0(%r2), 4
; SZ13-NEXT: ld %f0, 16(%r2) ; SZ13-NEXT: ld %f1, 16(%r2)
; SZ13-NEXT: vfidb %v1, %v1, 0, 0 ; SZ13-NEXT: vfidb %v0, %v0, 0, 0
; SZ13-NEXT: fidbra %f0, 0, %f0, 0 ; SZ13-NEXT: fidbra %f1, 0, %f1, 0
; SZ13-NEXT: std %f0, 16(%r2) ; SZ13-NEXT: vst %v0, 0(%r2), 4
; SZ13-NEXT: vst %v1, 0(%r2), 4 ; SZ13-NEXT: std %f1, 16(%r2)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%rint = call <3 x double> @llvm.experimental.constrained.rint.v3f64( %rint = call <3 x double> @llvm.experimental.constrained.rint.v3f64(
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
store <3 x double> %rint, <3 x double>* %a store <3 x double> %rint, <3 x double>* %a
ret void ret void
} }
define <4 x double> @constrained_vector_rint_v4f64() #0 { define <4 x double> @constrained_vector_rint_v4f64() #0 {
; S390X-LABEL: constrained_vector_rint_v4f64: ; S390X-LABEL: constrained_vector_rint_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI79_0 ; S390X-NEXT: larl %r1, .LCPI79_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ld %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI79_1 ; S390X-NEXT: larl %r1, .LCPI79_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI79_2 ; S390X-NEXT: larl %r1, .LCPI79_2
; S390X-NEXT: ld %f2, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI79_3
; S390X-NEXT: ld %f3, 0(%r1) ; S390X-NEXT: ld %f3, 0(%r1)
; S390X-NEXT: fidbr %f6, 0, %f0 ; S390X-NEXT: larl %r1, .LCPI79_3
; S390X-NEXT: fidbr %f4, 0, %f1 ; S390X-NEXT: ld %f5, 0(%r1)
; S390X-NEXT: fidbr %f2, 0, %f2 ; S390X-NEXT: fidbr %f0, 0, %f0
; S390X-NEXT: fidbr %f0, 0, %f3 ; S390X-NEXT: fidbr %f2, 0, %f1
; S390X-NEXT: fidbr %f4, 0, %f3
; S390X-NEXT: fidbr %f6, 0, %f5
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_rint_v4f64: ; SZ13-LABEL: constrained_vector_rint_v4f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI79_0 ; SZ13-NEXT: larl %r1, .LCPI79_0
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: larl %r1, .LCPI79_1 ; SZ13-NEXT: larl %r1, .LCPI79_1
; SZ13-NEXT: vfidb %v24, %v0, 0, 0 ; SZ13-NEXT: vfidb %v24, %v0, 0, 0
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -168 ; S390X-NEXT: aghi %r15, -168
; S390X-NEXT: .cfi_def_cfa_offset 328 ; S390X-NEXT: .cfi_def_cfa_offset 328
; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: larl %r1, .LCPI81_0 ; S390X-NEXT: larl %r1, .LCPI81_0
; S390X-NEXT: ldeb %f0, 0(%r1) ; S390X-NEXT: ld %f0, 0(%r1)
; S390X-NEXT: brasl %r14, nearbyint@PLT ; S390X-NEXT: brasl %r14, nearbyint@PLT
; S390X-NEXT: larl %r1, .LCPI81_1 ; S390X-NEXT: larl %r1, .LCPI81_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ldeb %f1, 0(%r1)
; S390X-NEXT: ldr %f8, %f0 ; S390X-NEXT: ldr %f8, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, nearbyint@PLT ; S390X-NEXT: brasl %r14, nearbyint@PLT
; S390X-NEXT: ldr %f2, %f8 ; S390X-NEXT: ldr %f2, %f0
; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 280(%r15) ; S390X-NEXT: lmg %r14, %r15, 280(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_nearbyint_v2f64: ; SZ13-LABEL: constrained_vector_nearbyint_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI81_0 ; SZ13-NEXT: larl %r1, .LCPI81_0
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
Show All 27 Lines
; S390X-NEXT: ler %f8, %f0 ; S390X-NEXT: ler %f8, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, nearbyintf@PLT ; S390X-NEXT: brasl %r14, nearbyintf@PLT
; S390X-NEXT: larl %r1, .LCPI82_2 ; S390X-NEXT: larl %r1, .LCPI82_2
; S390X-NEXT: le %f1, 0(%r1) ; S390X-NEXT: le %f1, 0(%r1)
; S390X-NEXT: ler %f9, %f0 ; S390X-NEXT: ler %f9, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, nearbyintf@PLT ; S390X-NEXT: brasl %r14, nearbyintf@PLT
; S390X-NEXT: ler %f4, %f0
; S390X-NEXT: ler %f0, %f8
; S390X-NEXT: ler %f2, %f9 ; S390X-NEXT: ler %f2, %f9
; S390X-NEXT: ler %f4, %f8
; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 288(%r15) ; S390X-NEXT: lmg %r14, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_nearbyint_v3f32: ; SZ13-LABEL: constrained_vector_nearbyint_v3f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI82_0 ; SZ13-NEXT: larl %r1, .LCPI82_0
Show All 28 Lines
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: .cfi_offset %f9, -176 ; S390X-NEXT: .cfi_offset %f9, -176
; S390X-NEXT: .cfi_offset %f10, -184 ; S390X-NEXT: .cfi_offset %f10, -184
; S390X-NEXT: lgr %r13, %r2 ; S390X-NEXT: lgr %r13, %r2
; S390X-NEXT: ld %f8, 16(%r2) ; S390X-NEXT: ld %f8, 0(%r2)
; S390X-NEXT: ld %f0, 0(%r2) ; S390X-NEXT: ld %f0, 16(%r2)
; S390X-NEXT: ld %f9, 8(%r2) ; S390X-NEXT: ld %f9, 8(%r2)
; S390X-NEXT: brasl %r14, nearbyint@PLT ; S390X-NEXT: brasl %r14, nearbyint@PLT
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f9 ; S390X-NEXT: ldr %f0, %f9
; S390X-NEXT: brasl %r14, nearbyint@PLT ; S390X-NEXT: brasl %r14, nearbyint@PLT
; S390X-NEXT: ldr %f9, %f0 ; S390X-NEXT: ldr %f9, %f0
; S390X-NEXT: ldr %f0, %f8 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: brasl %r14, nearbyint@PLT ; S390X-NEXT: brasl %r14, nearbyint@PLT
; S390X-NEXT: std %f0, 16(%r13) ; S390X-NEXT: std %f0, 0(%r13)
; S390X-NEXT: std %f9, 8(%r13) ; S390X-NEXT: std %f9, 8(%r13)
; S390X-NEXT: std %f10, 0(%r13) ; S390X-NEXT: std %f10, 16(%r13)
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r13, %r15, 288(%r15) ; S390X-NEXT: lmg %r13, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_nearbyint_v3f64: ; SZ13-LABEL: constrained_vector_nearbyint_v3f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: vl %v1, 0(%r2), 4 ; SZ13-NEXT: vl %v0, 0(%r2), 4
; SZ13-NEXT: ld %f0, 16(%r2) ; SZ13-NEXT: ld %f1, 16(%r2)
; SZ13-NEXT: vfidb %v1, %v1, 4, 0 ; SZ13-NEXT: vfidb %v0, %v0, 4, 0
; SZ13-NEXT: fidbra %f0, 0, %f0, 4 ; SZ13-NEXT: fidbra %f1, 0, %f1, 4
; SZ13-NEXT: std %f0, 16(%r2) ; SZ13-NEXT: vst %v0, 0(%r2), 4
; SZ13-NEXT: vst %v1, 0(%r2), 4 ; SZ13-NEXT: std %f1, 16(%r2)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%nearby = call <3 x double> @llvm.experimental.constrained.nearbyint.v3f64( %nearby = call <3 x double> @llvm.experimental.constrained.nearbyint.v3f64(
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
store <3 x double> %nearby, <3 x double>* %a store <3 x double> %nearby, <3 x double>* %a
Show All 27 Lines
; S390X-NEXT: ldr %f9, %f0 ; S390X-NEXT: ldr %f9, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, nearbyint@PLT ; S390X-NEXT: brasl %r14, nearbyint@PLT
; S390X-NEXT: larl %r1, .LCPI84_3 ; S390X-NEXT: larl %r1, .LCPI84_3
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, nearbyint@PLT ; S390X-NEXT: brasl %r14, nearbyint@PLT
; S390X-NEXT: ldr %f2, %f10 ; S390X-NEXT: ldr %f6, %f0
; S390X-NEXT: ldr %f4, %f9 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ldr %f6, %f8 ; S390X-NEXT: ldr %f2, %f9
; S390X-NEXT: ldr %f4, %f10
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 296(%r15) ; S390X-NEXT: lmg %r14, %r15, 296(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_nearbyint_v4f64: ; SZ13-LABEL: constrained_vector_nearbyint_v4f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
▲ Show 20 Lines • Show All 70 Lines • ▼ Show 20 Lines
; S390X-NEXT: brasl %r14, fmax@PLT ; S390X-NEXT: brasl %r14, fmax@PLT
; S390X-NEXT: larl %r1, .LCPI86_2 ; S390X-NEXT: larl %r1, .LCPI86_2
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ldeb %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI86_3 ; S390X-NEXT: larl %r1, .LCPI86_3
; S390X-NEXT: ldeb %f2, 0(%r1) ; S390X-NEXT: ldeb %f2, 0(%r1)
; S390X-NEXT: ldr %f8, %f0 ; S390X-NEXT: ldr %f8, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, fmax@PLT ; S390X-NEXT: brasl %r14, fmax@PLT
; S390X-NEXT: ldr %f2, %f8 ; S390X-NEXT: ldr %f2, %f0
; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 280(%r15) ; S390X-NEXT: lmg %r14, %r15, 280(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_maxnum_v2f64: ; SZ13-LABEL: constrained_vector_maxnum_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: stmg %r14, %r15, 112(%r15) ; SZ13-NEXT: stmg %r14, %r15, 112(%r15)
; SZ13-NEXT: .cfi_offset %r14, -48 ; SZ13-NEXT: .cfi_offset %r14, -48
Show All 36 Lines
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: .cfi_offset %f9, -176 ; S390X-NEXT: .cfi_offset %f9, -176
; S390X-NEXT: .cfi_offset %f10, -184 ; S390X-NEXT: .cfi_offset %f10, -184
; S390X-NEXT: larl %r1, .LCPI87_0 ; S390X-NEXT: larl %r1, .LCPI87_0
; S390X-NEXT: le %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI87_1
; S390X-NEXT: le %f8, 0(%r1) ; S390X-NEXT: le %f8, 0(%r1)
; S390X-NEXT: ler %f2, %f8 ; S390X-NEXT: larl %r1, .LCPI87_1
; S390X-NEXT: le %f2, 0(%r1)
; S390X-NEXT: ler %f0, %f8
; S390X-NEXT: brasl %r14, fmaxf@PLT ; S390X-NEXT: brasl %r14, fmaxf@PLT
; S390X-NEXT: larl %r1, .LCPI87_2 ; S390X-NEXT: larl %r1, .LCPI87_2
; S390X-NEXT: le %f1, 0(%r1) ; S390X-NEXT: le %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI87_3 ; S390X-NEXT: larl %r1, .LCPI87_3
; S390X-NEXT: le %f2, 0(%r1) ; S390X-NEXT: le %f2, 0(%r1)
; S390X-NEXT: ler %f9, %f0 ; S390X-NEXT: ler %f9, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, fmaxf@PLT ; S390X-NEXT: brasl %r14, fmaxf@PLT
; S390X-NEXT: larl %r1, .LCPI87_4 ; S390X-NEXT: larl %r1, .LCPI87_4
; S390X-NEXT: le %f2, 0(%r1) ; S390X-NEXT: le %f1, 0(%r1)
; S390X-NEXT: ler %f10, %f0 ; S390X-NEXT: ler %f10, %f0
; S390X-NEXT: ler %f0, %f8 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: ler %f2, %f8
; S390X-NEXT: brasl %r14, fmaxf@PLT ; S390X-NEXT: brasl %r14, fmaxf@PLT
; S390X-NEXT: ler %f4, %f0
; S390X-NEXT: ler %f0, %f9
; S390X-NEXT: ler %f2, %f10 ; S390X-NEXT: ler %f2, %f10
; S390X-NEXT: ler %f4, %f9
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 296(%r15) ; S390X-NEXT: lmg %r14, %r15, 296(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_maxnum_v3f32: ; SZ13-LABEL: constrained_vector_maxnum_v3f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: .cfi_offset %f9, -176 ; S390X-NEXT: .cfi_offset %f9, -176
; S390X-NEXT: .cfi_offset %f10, -184 ; S390X-NEXT: .cfi_offset %f10, -184
; S390X-NEXT: lgr %r13, %r2 ; S390X-NEXT: lgr %r13, %r2
; S390X-NEXT: ld %f8, 16(%r2) ; S390X-NEXT: ld %f8, 0(%r2)
; S390X-NEXT: ld %f0, 0(%r2) ; S390X-NEXT: ld %f0, 16(%r2)
; S390X-NEXT: larl %r1, .LCPI88_0 ; S390X-NEXT: larl %r1, .LCPI88_0
; S390X-NEXT: ldeb %f2, 0(%r1) ; S390X-NEXT: ldeb %f2, 0(%r1)
; S390X-NEXT: ld %f9, 8(%r2) ; S390X-NEXT: ld %f9, 8(%r2)
; S390X-NEXT: brasl %r14, fmax@PLT ; S390X-NEXT: brasl %r14, fmax@PLT
; S390X-NEXT: larl %r1, .LCPI88_1 ; S390X-NEXT: larl %r1, .LCPI88_1
; S390X-NEXT: ldeb %f2, 0(%r1) ; S390X-NEXT: ldeb %f2, 0(%r1)
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f9 ; S390X-NEXT: ldr %f0, %f9
; S390X-NEXT: brasl %r14, fmax@PLT ; S390X-NEXT: brasl %r14, fmax@PLT
; S390X-NEXT: larl %r1, .LCPI88_2 ; S390X-NEXT: larl %r1, .LCPI88_2
; S390X-NEXT: ldeb %f2, 0(%r1) ; S390X-NEXT: ldeb %f2, 0(%r1)
; S390X-NEXT: ldr %f9, %f0 ; S390X-NEXT: ldr %f9, %f0
; S390X-NEXT: ldr %f0, %f8 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: brasl %r14, fmax@PLT ; S390X-NEXT: brasl %r14, fmax@PLT
; S390X-NEXT: std %f0, 16(%r13) ; S390X-NEXT: std %f0, 0(%r13)
; S390X-NEXT: std %f9, 8(%r13) ; S390X-NEXT: std %f9, 8(%r13)
; S390X-NEXT: std %f10, 0(%r13) ; S390X-NEXT: std %f10, 16(%r13)
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r13, %r15, 288(%r15) ; S390X-NEXT: lmg %r13, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_log10_maxnum_v3f64: ; SZ13-LABEL: constrained_vector_log10_maxnum_v3f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
▲ Show 20 Lines • Show All 81 Lines • ▼ Show 20 Lines
; S390X-NEXT: brasl %r14, fmax@PLT ; S390X-NEXT: brasl %r14, fmax@PLT
; S390X-NEXT: larl %r1, .LCPI89_6 ; S390X-NEXT: larl %r1, .LCPI89_6
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ldeb %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI89_7 ; S390X-NEXT: larl %r1, .LCPI89_7
; S390X-NEXT: ldeb %f2, 0(%r1) ; S390X-NEXT: ldeb %f2, 0(%r1)
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, fmax@PLT ; S390X-NEXT: brasl %r14, fmax@PLT
; S390X-NEXT: ldr %f2, %f10 ; S390X-NEXT: ldr %f6, %f0
; S390X-NEXT: ldr %f4, %f9 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ldr %f6, %f8 ; S390X-NEXT: ldr %f2, %f9
; S390X-NEXT: ldr %f4, %f10
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 296(%r15) ; S390X-NEXT: lmg %r14, %r15, 296(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_maxnum_v4f64: ; SZ13-LABEL: constrained_vector_maxnum_v4f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
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; S390X-NEXT: brasl %r14, fmin@PLT ; S390X-NEXT: brasl %r14, fmin@PLT
; S390X-NEXT: larl %r1, .LCPI91_2 ; S390X-NEXT: larl %r1, .LCPI91_2
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ldeb %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI91_3 ; S390X-NEXT: larl %r1, .LCPI91_3
; S390X-NEXT: ldeb %f2, 0(%r1) ; S390X-NEXT: ldeb %f2, 0(%r1)
; S390X-NEXT: ldr %f8, %f0 ; S390X-NEXT: ldr %f8, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, fmin@PLT ; S390X-NEXT: brasl %r14, fmin@PLT
; S390X-NEXT: ldr %f2, %f8 ; S390X-NEXT: ldr %f2, %f0
; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 280(%r15) ; S390X-NEXT: lmg %r14, %r15, 280(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_minnum_v2f64: ; SZ13-LABEL: constrained_vector_minnum_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: stmg %r14, %r15, 112(%r15) ; SZ13-NEXT: stmg %r14, %r15, 112(%r15)
; SZ13-NEXT: .cfi_offset %r14, -48 ; SZ13-NEXT: .cfi_offset %r14, -48
Show All 36 Lines
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: .cfi_offset %f9, -176 ; S390X-NEXT: .cfi_offset %f9, -176
; S390X-NEXT: .cfi_offset %f10, -184 ; S390X-NEXT: .cfi_offset %f10, -184
; S390X-NEXT: larl %r1, .LCPI92_0 ; S390X-NEXT: larl %r1, .LCPI92_0
; S390X-NEXT: le %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI92_1
; S390X-NEXT: le %f8, 0(%r1) ; S390X-NEXT: le %f8, 0(%r1)
; S390X-NEXT: ler %f2, %f8 ; S390X-NEXT: larl %r1, .LCPI92_1
; S390X-NEXT: le %f2, 0(%r1)
; S390X-NEXT: ler %f0, %f8
; S390X-NEXT: brasl %r14, fminf@PLT ; S390X-NEXT: brasl %r14, fminf@PLT
; S390X-NEXT: larl %r1, .LCPI92_2 ; S390X-NEXT: larl %r1, .LCPI92_2
; S390X-NEXT: le %f1, 0(%r1) ; S390X-NEXT: le %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI92_3 ; S390X-NEXT: larl %r1, .LCPI92_3
; S390X-NEXT: le %f2, 0(%r1) ; S390X-NEXT: le %f2, 0(%r1)
; S390X-NEXT: ler %f9, %f0 ; S390X-NEXT: ler %f9, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, fminf@PLT ; S390X-NEXT: brasl %r14, fminf@PLT
; S390X-NEXT: larl %r1, .LCPI92_4 ; S390X-NEXT: larl %r1, .LCPI92_4
; S390X-NEXT: le %f2, 0(%r1) ; S390X-NEXT: le %f1, 0(%r1)
; S390X-NEXT: ler %f10, %f0 ; S390X-NEXT: ler %f10, %f0
; S390X-NEXT: ler %f0, %f8 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: ler %f2, %f8
; S390X-NEXT: brasl %r14, fminf@PLT ; S390X-NEXT: brasl %r14, fminf@PLT
; S390X-NEXT: ler %f4, %f0
; S390X-NEXT: ler %f0, %f9
; S390X-NEXT: ler %f2, %f10 ; S390X-NEXT: ler %f2, %f10
; S390X-NEXT: ler %f4, %f9
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 296(%r15) ; S390X-NEXT: lmg %r14, %r15, 296(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_minnum_v3f32: ; SZ13-LABEL: constrained_vector_minnum_v3f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
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; S390X-NEXT: std %f9, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f9, 176(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f10, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f10, 168(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f11, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f11, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: .cfi_offset %f9, -176 ; S390X-NEXT: .cfi_offset %f9, -176
; S390X-NEXT: .cfi_offset %f10, -184 ; S390X-NEXT: .cfi_offset %f10, -184
; S390X-NEXT: .cfi_offset %f11, -192 ; S390X-NEXT: .cfi_offset %f11, -192
; S390X-NEXT: lgr %r13, %r2 ; S390X-NEXT: lgr %r13, %r2
; S390X-NEXT: ld %f8, 16(%r2) ; S390X-NEXT: ld %f8, 0(%r2)
; S390X-NEXT: ld %f0, 0(%r2) ; S390X-NEXT: ld %f0, 16(%r2)
; S390X-NEXT: larl %r1, .LCPI93_0 ; S390X-NEXT: larl %r1, .LCPI93_0
; S390X-NEXT: ldeb %f9, 0(%r1) ; S390X-NEXT: ldeb %f9, 0(%r1)
; S390X-NEXT: ld %f10, 8(%r2) ; S390X-NEXT: ld %f10, 8(%r2)
; S390X-NEXT: ldr %f2, %f9 ; S390X-NEXT: ldr %f2, %f9
; S390X-NEXT: brasl %r14, fmin@PLT ; S390X-NEXT: brasl %r14, fmin@PLT
; S390X-NEXT: ldr %f11, %f0 ; S390X-NEXT: ldr %f11, %f0
; S390X-NEXT: ldr %f0, %f10 ; S390X-NEXT: ldr %f0, %f10
; S390X-NEXT: ldr %f2, %f9 ; S390X-NEXT: ldr %f2, %f9
; S390X-NEXT: brasl %r14, fmin@PLT ; S390X-NEXT: brasl %r14, fmin@PLT
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f8 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ldr %f2, %f9 ; S390X-NEXT: ldr %f2, %f9
; S390X-NEXT: brasl %r14, fmin@PLT ; S390X-NEXT: brasl %r14, fmin@PLT
; S390X-NEXT: std %f0, 16(%r13) ; S390X-NEXT: std %f0, 0(%r13)
; S390X-NEXT: std %f10, 8(%r13) ; S390X-NEXT: std %f10, 8(%r13)
; S390X-NEXT: std %f11, 0(%r13) ; S390X-NEXT: std %f11, 16(%r13)
; S390X-NEXT: ld %f8, 184(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 184(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f11, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f11, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r13, %r15, 296(%r15) ; S390X-NEXT: lmg %r13, %r15, 296(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_minnum_v3f64: ; SZ13-LABEL: constrained_vector_minnum_v3f64:
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; S390X-NEXT: brasl %r14, fmin@PLT ; S390X-NEXT: brasl %r14, fmin@PLT
; S390X-NEXT: larl %r1, .LCPI94_6 ; S390X-NEXT: larl %r1, .LCPI94_6
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ldeb %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI94_7 ; S390X-NEXT: larl %r1, .LCPI94_7
; S390X-NEXT: ldeb %f2, 0(%r1) ; S390X-NEXT: ldeb %f2, 0(%r1)
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, fmin@PLT ; S390X-NEXT: brasl %r14, fmin@PLT
; S390X-NEXT: ldr %f2, %f10 ; S390X-NEXT: ldr %f6, %f0
; S390X-NEXT: ldr %f4, %f9 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ldr %f6, %f8 ; S390X-NEXT: ldr %f2, %f9
; S390X-NEXT: ldr %f4, %f10
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 296(%r15) ; S390X-NEXT: lmg %r14, %r15, 296(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_minnum_v4f64: ; SZ13-LABEL: constrained_vector_minnum_v4f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
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define <2 x float> @constrained_vector_fptrunc_v2f64() #0 { define <2 x float> @constrained_vector_fptrunc_v2f64() #0 {
; S390X-LABEL: constrained_vector_fptrunc_v2f64: ; S390X-LABEL: constrained_vector_fptrunc_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI96_0 ; S390X-NEXT: larl %r1, .LCPI96_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ld %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI96_1 ; S390X-NEXT: larl %r1, .LCPI96_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ledbr %f2, %f0 ; S390X-NEXT: ledbr %f0, %f0
; S390X-NEXT: ledbr %f0, %f1 ; S390X-NEXT: ledbr %f2, %f1
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fptrunc_v2f64: ; SZ13-LABEL: constrained_vector_fptrunc_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI96_0 ; SZ13-NEXT: larl %r1, .LCPI96_0
; SZ13-NEXT: ld %f0, 0(%r1) ; SZ13-NEXT: ld %f0, 0(%r1)
; SZ13-NEXT: larl %r1, .LCPI96_1 ; SZ13-NEXT: larl %r1, .LCPI96_1
; SZ13-NEXT: ld %f1, 0(%r1) ; SZ13-NEXT: ld %f1, 0(%r1)
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define <4 x float> @constrained_vector_fptrunc_v4f64() #0 { define <4 x float> @constrained_vector_fptrunc_v4f64() #0 {
; S390X-LABEL: constrained_vector_fptrunc_v4f64: ; S390X-LABEL: constrained_vector_fptrunc_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI98_0 ; S390X-NEXT: larl %r1, .LCPI98_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ld %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI98_1 ; S390X-NEXT: larl %r1, .LCPI98_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI98_2 ; S390X-NEXT: larl %r1, .LCPI98_2
; S390X-NEXT: ld %f2, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI98_3
; S390X-NEXT: ld %f3, 0(%r1) ; S390X-NEXT: ld %f3, 0(%r1)
; S390X-NEXT: ledbr %f6, %f0 ; S390X-NEXT: larl %r1, .LCPI98_3
; S390X-NEXT: ledbr %f4, %f1 ; S390X-NEXT: ld %f5, 0(%r1)
; S390X-NEXT: ledbr %f2, %f2 ; S390X-NEXT: ledbr %f0, %f0
; S390X-NEXT: ledbr %f0, %f3 ; S390X-NEXT: ledbr %f2, %f1
; S390X-NEXT: ledbr %f4, %f3
; S390X-NEXT: ledbr %f6, %f5
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fptrunc_v4f64: ; SZ13-LABEL: constrained_vector_fptrunc_v4f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI98_0 ; SZ13-NEXT: larl %r1, .LCPI98_0
; SZ13-NEXT: ld %f0, 0(%r1) ; SZ13-NEXT: ld %f0, 0(%r1)
; SZ13-NEXT: larl %r1, .LCPI98_1 ; SZ13-NEXT: larl %r1, .LCPI98_1
; SZ13-NEXT: ld %f1, 0(%r1) ; SZ13-NEXT: ld %f1, 0(%r1)
Show All 37 Lines %result = call <1 x double> @llvm.experimental.constrained.fpext.v1f64.v1f32(
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
ret <1 x double> %result ret <1 x double> %result
} }
define <2 x double> @constrained_vector_fpext_v2f32() #0 { define <2 x double> @constrained_vector_fpext_v2f32() #0 {
; S390X-LABEL: constrained_vector_fpext_v2f32: ; S390X-LABEL: constrained_vector_fpext_v2f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI100_0 ; S390X-NEXT: larl %r1, .LCPI100_0
; S390X-NEXT: ldeb %f2, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI100_1
; S390X-NEXT: ldeb %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI100_1
; S390X-NEXT: ldeb %f2, 0(%r1)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fpext_v2f32: ; SZ13-LABEL: constrained_vector_fpext_v2f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI100_0 ; SZ13-NEXT: larl %r1, .LCPI100_0
; SZ13-NEXT: ldeb %f0, 0(%r1) ; SZ13-NEXT: ldeb %f0, 0(%r1)
; SZ13-NEXT: larl %r1, .LCPI100_1 ; SZ13-NEXT: larl %r1, .LCPI100_1
; SZ13-NEXT: ldeb %f1, 0(%r1) ; SZ13-NEXT: ldeb %f1, 0(%r1)
; SZ13-NEXT: vmrhg %v24, %v1, %v0 ; SZ13-NEXT: vmrhg %v24, %v1, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%result = call <2 x double> @llvm.experimental.constrained.fpext.v2f64.v2f32( %result = call <2 x double> @llvm.experimental.constrained.fpext.v2f64.v2f32(
<2 x float><float 42.0, float 43.0>, <2 x float><float 42.0, float 43.0>,
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
ret <2 x double> %result ret <2 x double> %result
} }
define void @constrained_vector_fpext_v3f64(<3 x float>* %src, <3 x double>* %dest) #0 { define void @constrained_vector_fpext_v3f64(<3 x float>* %src, <3 x double>* %dest) #0 {
; S390X-LABEL: constrained_vector_fpext_v3f64: ; S390X-LABEL: constrained_vector_fpext_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: lg %r0, 0(%r2) ; S390X-NEXT: lg %r0, 0(%r2)
; S390X-NEXT: sllg %r1, %r0, 32 ; S390X-NEXT: sllg %r1, %r0, 32
; S390X-NEXT: ldgr %f0, %r1 ; S390X-NEXT: ldgr %f0, %r1
; S390X-NEXT: nilf %r0, 0 ; S390X-NEXT: nilf %r0, 0
; S390X-NEXT: ldeb %f1, 8(%r2) ; S390X-NEXT: ldgr %f1, %r0
; S390X-NEXT: ldgr %f2, %r0 ; S390X-NEXT: ldeb %f2, 8(%r2)
; S390X-NEXT: ldebr %f2, %f2 ; S390X-NEXT: ldebr %f1, %f1
; S390X-NEXT: ldebr %f0, %f0 ; S390X-NEXT: ldebr %f0, %f0
; S390X-NEXT: std %f1, 16(%r3)
; S390X-NEXT: std %f0, 8(%r3) ; S390X-NEXT: std %f0, 8(%r3)
; S390X-NEXT: std %f2, 0(%r3) ; S390X-NEXT: std %f2, 16(%r3)
; S390X-NEXT: std %f1, 0(%r3)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fpext_v3f64: ; SZ13-LABEL: constrained_vector_fpext_v3f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: vl %v0, 0(%r2), 4 ; SZ13-NEXT: vl %v0, 0(%r2), 4
; SZ13-NEXT: vrepf %v2, %v0, 1 ; SZ13-NEXT: vrepf %v2, %v0, 1
; SZ13-NEXT: ldebr %f1, %f0 ; SZ13-NEXT: ldebr %f1, %f0
; SZ13-NEXT: ldebr %f2, %f2 ; SZ13-NEXT: ldebr %f2, %f2
Show All 11 Linesentry:
store <3 x double> %result, <3 x double>* %dest store <3 x double> %result, <3 x double>* %dest
ret void ret void
} }
define <4 x double> @constrained_vector_fpext_v4f32() #0 { define <4 x double> @constrained_vector_fpext_v4f32() #0 {
; S390X-LABEL: constrained_vector_fpext_v4f32: ; S390X-LABEL: constrained_vector_fpext_v4f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI102_0 ; S390X-NEXT: larl %r1, .LCPI102_0
; S390X-NEXT: ldeb %f6, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI102_1 ; S390X-NEXT: larl %r1, .LCPI102_1
; S390X-NEXT: ldeb %f4, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI102_2
; S390X-NEXT: ldeb %f2, 0(%r1) ; S390X-NEXT: ldeb %f2, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI102_2
; S390X-NEXT: ldeb %f4, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI102_3 ; S390X-NEXT: larl %r1, .LCPI102_3
; S390X-NEXT: ldeb %f0, 0(%r1) ; S390X-NEXT: ldeb %f6, 0(%r1)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fpext_v4f32: ; SZ13-LABEL: constrained_vector_fpext_v4f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI102_0 ; SZ13-NEXT: larl %r1, .LCPI102_0
; SZ13-NEXT: ldeb %f0, 0(%r1) ; SZ13-NEXT: ldeb %f0, 0(%r1)
; SZ13-NEXT: larl %r1, .LCPI102_1 ; SZ13-NEXT: larl %r1, .LCPI102_1
; SZ13-NEXT: ldeb %f1, 0(%r1) ; SZ13-NEXT: ldeb %f1, 0(%r1)
▲ Show 20 Lines • Show All 53 Lines • ▼ Show 20 Lines
; S390X-NEXT: larl %r1, .LCPI104_0 ; S390X-NEXT: larl %r1, .LCPI104_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ld %f0, 0(%r1)
; S390X-NEXT: brasl %r14, ceil@PLT ; S390X-NEXT: brasl %r14, ceil@PLT
; S390X-NEXT: larl %r1, .LCPI104_1 ; S390X-NEXT: larl %r1, .LCPI104_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f8, %f0 ; S390X-NEXT: ldr %f8, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, ceil@PLT ; S390X-NEXT: brasl %r14, ceil@PLT
; S390X-NEXT: ldr %f2, %f8 ; S390X-NEXT: ldr %f2, %f0
; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 280(%r15) ; S390X-NEXT: lmg %r14, %r15, 280(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_ceil_v2f64: ; SZ13-LABEL: constrained_vector_ceil_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI104_0 ; SZ13-NEXT: larl %r1, .LCPI104_0
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
Show All 27 Lines
; S390X-NEXT: ler %f8, %f0 ; S390X-NEXT: ler %f8, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, ceilf@PLT ; S390X-NEXT: brasl %r14, ceilf@PLT
; S390X-NEXT: larl %r1, .LCPI105_2 ; S390X-NEXT: larl %r1, .LCPI105_2
; S390X-NEXT: le %f1, 0(%r1) ; S390X-NEXT: le %f1, 0(%r1)
; S390X-NEXT: ler %f9, %f0 ; S390X-NEXT: ler %f9, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, ceilf@PLT ; S390X-NEXT: brasl %r14, ceilf@PLT
; S390X-NEXT: ler %f4, %f0
; S390X-NEXT: ler %f0, %f8
; S390X-NEXT: ler %f2, %f9 ; S390X-NEXT: ler %f2, %f9
; S390X-NEXT: ler %f4, %f8
; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 288(%r15) ; S390X-NEXT: lmg %r14, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_ceil_v3f32: ; SZ13-LABEL: constrained_vector_ceil_v3f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI105_0 ; SZ13-NEXT: larl %r1, .LCPI105_0
Show All 27 Lines
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: .cfi_offset %f9, -176 ; S390X-NEXT: .cfi_offset %f9, -176
; S390X-NEXT: .cfi_offset %f10, -184 ; S390X-NEXT: .cfi_offset %f10, -184
; S390X-NEXT: lgr %r13, %r2 ; S390X-NEXT: lgr %r13, %r2
; S390X-NEXT: ld %f8, 16(%r2) ; S390X-NEXT: ld %f8, 0(%r2)
; S390X-NEXT: ld %f0, 0(%r2) ; S390X-NEXT: ld %f0, 16(%r2)
; S390X-NEXT: ld %f9, 8(%r2) ; S390X-NEXT: ld %f9, 8(%r2)
; S390X-NEXT: brasl %r14, ceil@PLT ; S390X-NEXT: brasl %r14, ceil@PLT
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f9 ; S390X-NEXT: ldr %f0, %f9
; S390X-NEXT: brasl %r14, ceil@PLT ; S390X-NEXT: brasl %r14, ceil@PLT
; S390X-NEXT: ldr %f9, %f0 ; S390X-NEXT: ldr %f9, %f0
; S390X-NEXT: ldr %f0, %f8 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: brasl %r14, ceil@PLT ; S390X-NEXT: brasl %r14, ceil@PLT
; S390X-NEXT: std %f0, 16(%r13) ; S390X-NEXT: std %f0, 0(%r13)
; S390X-NEXT: std %f9, 8(%r13) ; S390X-NEXT: std %f9, 8(%r13)
; S390X-NEXT: std %f10, 0(%r13) ; S390X-NEXT: std %f10, 16(%r13)
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r13, %r15, 288(%r15) ; S390X-NEXT: lmg %r13, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_ceil_v3f64: ; SZ13-LABEL: constrained_vector_ceil_v3f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: vl %v1, 0(%r2), 4 ; SZ13-NEXT: vl %v0, 0(%r2), 4
; SZ13-NEXT: ld %f0, 16(%r2) ; SZ13-NEXT: ld %f1, 16(%r2)
; SZ13-NEXT: vfidb %v1, %v1, 4, 6 ; SZ13-NEXT: vfidb %v0, %v0, 4, 6
; SZ13-NEXT: fidbra %f0, 6, %f0, 4 ; SZ13-NEXT: fidbra %f1, 6, %f1, 4
; SZ13-NEXT: std %f0, 16(%r2) ; SZ13-NEXT: vst %v0, 0(%r2), 4
; SZ13-NEXT: vst %v1, 0(%r2), 4 ; SZ13-NEXT: std %f1, 16(%r2)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%ceil = call <3 x double> @llvm.experimental.constrained.ceil.v3f64( %ceil = call <3 x double> @llvm.experimental.constrained.ceil.v3f64(
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
store <3 x double> %ceil, <3 x double>* %a store <3 x double> %ceil, <3 x double>* %a
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Lines
; S390X-NEXT: larl %r1, .LCPI108_0 ; S390X-NEXT: larl %r1, .LCPI108_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ld %f0, 0(%r1)
; S390X-NEXT: brasl %r14, floor@PLT ; S390X-NEXT: brasl %r14, floor@PLT
; S390X-NEXT: larl %r1, .LCPI108_1 ; S390X-NEXT: larl %r1, .LCPI108_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f8, %f0 ; S390X-NEXT: ldr %f8, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, floor@PLT ; S390X-NEXT: brasl %r14, floor@PLT
; S390X-NEXT: ldr %f2, %f8 ; S390X-NEXT: ldr %f2, %f0
; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 280(%r15) ; S390X-NEXT: lmg %r14, %r15, 280(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_floor_v2f64: ; SZ13-LABEL: constrained_vector_floor_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI108_0 ; SZ13-NEXT: larl %r1, .LCPI108_0
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
Show All 27 Lines
; S390X-NEXT: ler %f8, %f0 ; S390X-NEXT: ler %f8, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, floorf@PLT ; S390X-NEXT: brasl %r14, floorf@PLT
; S390X-NEXT: larl %r1, .LCPI109_2 ; S390X-NEXT: larl %r1, .LCPI109_2
; S390X-NEXT: le %f1, 0(%r1) ; S390X-NEXT: le %f1, 0(%r1)
; S390X-NEXT: ler %f9, %f0 ; S390X-NEXT: ler %f9, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, floorf@PLT ; S390X-NEXT: brasl %r14, floorf@PLT
; S390X-NEXT: ler %f4, %f0
; S390X-NEXT: ler %f0, %f8
; S390X-NEXT: ler %f2, %f9 ; S390X-NEXT: ler %f2, %f9
; S390X-NEXT: ler %f4, %f8
; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 288(%r15) ; S390X-NEXT: lmg %r14, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_floor_v3f32: ; SZ13-LABEL: constrained_vector_floor_v3f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI109_0 ; SZ13-NEXT: larl %r1, .LCPI109_0
Show All 27 Lines
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: .cfi_offset %f9, -176 ; S390X-NEXT: .cfi_offset %f9, -176
; S390X-NEXT: .cfi_offset %f10, -184 ; S390X-NEXT: .cfi_offset %f10, -184
; S390X-NEXT: lgr %r13, %r2 ; S390X-NEXT: lgr %r13, %r2
; S390X-NEXT: ld %f8, 16(%r2) ; S390X-NEXT: ld %f8, 0(%r2)
; S390X-NEXT: ld %f0, 0(%r2) ; S390X-NEXT: ld %f0, 16(%r2)
; S390X-NEXT: ld %f9, 8(%r2) ; S390X-NEXT: ld %f9, 8(%r2)
; S390X-NEXT: brasl %r14, floor@PLT ; S390X-NEXT: brasl %r14, floor@PLT
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f9 ; S390X-NEXT: ldr %f0, %f9
; S390X-NEXT: brasl %r14, floor@PLT ; S390X-NEXT: brasl %r14, floor@PLT
; S390X-NEXT: ldr %f9, %f0 ; S390X-NEXT: ldr %f9, %f0
; S390X-NEXT: ldr %f0, %f8 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: brasl %r14, floor@PLT ; S390X-NEXT: brasl %r14, floor@PLT
; S390X-NEXT: std %f0, 16(%r13) ; S390X-NEXT: std %f0, 0(%r13)
; S390X-NEXT: std %f9, 8(%r13) ; S390X-NEXT: std %f9, 8(%r13)
; S390X-NEXT: std %f10, 0(%r13) ; S390X-NEXT: std %f10, 16(%r13)
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r13, %r15, 288(%r15) ; S390X-NEXT: lmg %r13, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_floor_v3f64: ; SZ13-LABEL: constrained_vector_floor_v3f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: vl %v1, 0(%r2), 4 ; SZ13-NEXT: vl %v0, 0(%r2), 4
; SZ13-NEXT: ld %f0, 16(%r2) ; SZ13-NEXT: ld %f1, 16(%r2)
; SZ13-NEXT: vfidb %v1, %v1, 4, 7 ; SZ13-NEXT: vfidb %v0, %v0, 4, 7
; SZ13-NEXT: fidbra %f0, 7, %f0, 4 ; SZ13-NEXT: fidbra %f1, 7, %f1, 4
; SZ13-NEXT: std %f0, 16(%r2) ; SZ13-NEXT: vst %v0, 0(%r2), 4
; SZ13-NEXT: vst %v1, 0(%r2), 4 ; SZ13-NEXT: std %f1, 16(%r2)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%floor = call <3 x double> @llvm.experimental.constrained.floor.v3f64( %floor = call <3 x double> @llvm.experimental.constrained.floor.v3f64(
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
store <3 x double> %floor, <3 x double>* %a store <3 x double> %floor, <3 x double>* %a
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; S390X-NEXT: larl %r1, .LCPI112_0 ; S390X-NEXT: larl %r1, .LCPI112_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ld %f0, 0(%r1)
; S390X-NEXT: brasl %r14, round@PLT ; S390X-NEXT: brasl %r14, round@PLT
; S390X-NEXT: larl %r1, .LCPI112_1 ; S390X-NEXT: larl %r1, .LCPI112_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f8, %f0 ; S390X-NEXT: ldr %f8, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, round@PLT ; S390X-NEXT: brasl %r14, round@PLT
; S390X-NEXT: ldr %f2, %f8 ; S390X-NEXT: ldr %f2, %f0
; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 280(%r15) ; S390X-NEXT: lmg %r14, %r15, 280(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_round_v2f64: ; SZ13-LABEL: constrained_vector_round_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI112_0 ; SZ13-NEXT: larl %r1, .LCPI112_0
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
Show All 27 Lines
; S390X-NEXT: ler %f8, %f0 ; S390X-NEXT: ler %f8, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, roundf@PLT ; S390X-NEXT: brasl %r14, roundf@PLT
; S390X-NEXT: larl %r1, .LCPI113_2 ; S390X-NEXT: larl %r1, .LCPI113_2
; S390X-NEXT: le %f1, 0(%r1) ; S390X-NEXT: le %f1, 0(%r1)
; S390X-NEXT: ler %f9, %f0 ; S390X-NEXT: ler %f9, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, roundf@PLT ; S390X-NEXT: brasl %r14, roundf@PLT
; S390X-NEXT: ler %f4, %f0
; S390X-NEXT: ler %f0, %f8
; S390X-NEXT: ler %f2, %f9 ; S390X-NEXT: ler %f2, %f9
; S390X-NEXT: ler %f4, %f8
; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 288(%r15) ; S390X-NEXT: lmg %r14, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_round_v3f32: ; SZ13-LABEL: constrained_vector_round_v3f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI113_0 ; SZ13-NEXT: larl %r1, .LCPI113_0
Show All 28 Lines
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: .cfi_offset %f9, -176 ; S390X-NEXT: .cfi_offset %f9, -176
; S390X-NEXT: .cfi_offset %f10, -184 ; S390X-NEXT: .cfi_offset %f10, -184
; S390X-NEXT: lgr %r13, %r2 ; S390X-NEXT: lgr %r13, %r2
; S390X-NEXT: ld %f8, 16(%r2) ; S390X-NEXT: ld %f8, 0(%r2)
; S390X-NEXT: ld %f0, 0(%r2) ; S390X-NEXT: ld %f0, 16(%r2)
; S390X-NEXT: ld %f9, 8(%r2) ; S390X-NEXT: ld %f9, 8(%r2)
; S390X-NEXT: brasl %r14, round@PLT ; S390X-NEXT: brasl %r14, round@PLT
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f9 ; S390X-NEXT: ldr %f0, %f9
; S390X-NEXT: brasl %r14, round@PLT ; S390X-NEXT: brasl %r14, round@PLT
; S390X-NEXT: ldr %f9, %f0 ; S390X-NEXT: ldr %f9, %f0
; S390X-NEXT: ldr %f0, %f8 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: brasl %r14, round@PLT ; S390X-NEXT: brasl %r14, round@PLT
; S390X-NEXT: std %f0, 16(%r13) ; S390X-NEXT: std %f0, 0(%r13)
; S390X-NEXT: std %f9, 8(%r13) ; S390X-NEXT: std %f9, 8(%r13)
; S390X-NEXT: std %f10, 0(%r13) ; S390X-NEXT: std %f10, 16(%r13)
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r13, %r15, 288(%r15) ; S390X-NEXT: lmg %r13, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_round_v3f64: ; SZ13-LABEL: constrained_vector_round_v3f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: vl %v1, 0(%r2), 4 ; SZ13-NEXT: vl %v0, 0(%r2), 4
; SZ13-NEXT: ld %f0, 16(%r2) ; SZ13-NEXT: ld %f1, 16(%r2)
; SZ13-NEXT: vfidb %v1, %v1, 4, 1 ; SZ13-NEXT: vfidb %v0, %v0, 4, 1
; SZ13-NEXT: fidbra %f0, 1, %f0, 4 ; SZ13-NEXT: fidbra %f1, 1, %f1, 4
; SZ13-NEXT: std %f0, 16(%r2) ; SZ13-NEXT: vst %v0, 0(%r2), 4
; SZ13-NEXT: vst %v1, 0(%r2), 4 ; SZ13-NEXT: std %f1, 16(%r2)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%round = call <3 x double> @llvm.experimental.constrained.round.v3f64( %round = call <3 x double> @llvm.experimental.constrained.round.v3f64(
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
store <3 x double> %round, <3 x double>* %a store <3 x double> %round, <3 x double>* %a
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; S390X-NEXT: larl %r1, .LCPI116_0 ; S390X-NEXT: larl %r1, .LCPI116_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ld %f0, 0(%r1)
; S390X-NEXT: brasl %r14, trunc@PLT ; S390X-NEXT: brasl %r14, trunc@PLT
; S390X-NEXT: larl %r1, .LCPI116_1 ; S390X-NEXT: larl %r1, .LCPI116_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ldr %f8, %f0 ; S390X-NEXT: ldr %f8, %f0
; S390X-NEXT: ldr %f0, %f1 ; S390X-NEXT: ldr %f0, %f1
; S390X-NEXT: brasl %r14, trunc@PLT ; S390X-NEXT: brasl %r14, trunc@PLT
; S390X-NEXT: ldr %f2, %f8 ; S390X-NEXT: ldr %f2, %f0
; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 280(%r15) ; S390X-NEXT: lmg %r14, %r15, 280(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_trunc_v2f64: ; SZ13-LABEL: constrained_vector_trunc_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI116_0 ; SZ13-NEXT: larl %r1, .LCPI116_0
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
Show All 27 Lines
; S390X-NEXT: ler %f8, %f0 ; S390X-NEXT: ler %f8, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, truncf@PLT ; S390X-NEXT: brasl %r14, truncf@PLT
; S390X-NEXT: larl %r1, .LCPI117_2 ; S390X-NEXT: larl %r1, .LCPI117_2
; S390X-NEXT: le %f1, 0(%r1) ; S390X-NEXT: le %f1, 0(%r1)
; S390X-NEXT: ler %f9, %f0 ; S390X-NEXT: ler %f9, %f0
; S390X-NEXT: ler %f0, %f1 ; S390X-NEXT: ler %f0, %f1
; S390X-NEXT: brasl %r14, truncf@PLT ; S390X-NEXT: brasl %r14, truncf@PLT
; S390X-NEXT: ler %f4, %f0
; S390X-NEXT: ler %f0, %f8
; S390X-NEXT: ler %f2, %f9 ; S390X-NEXT: ler %f2, %f9
; S390X-NEXT: ler %f4, %f8
; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r14, %r15, 288(%r15) ; S390X-NEXT: lmg %r14, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_trunc_v3f32: ; SZ13-LABEL: constrained_vector_trunc_v3f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI117_0 ; SZ13-NEXT: larl %r1, .LCPI117_0
Show All 27 Lines
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f9, 168(%r15) # 8-byte Folded Spill
; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f10, 160(%r15) # 8-byte Folded Spill
; S390X-NEXT: .cfi_offset %f8, -168 ; S390X-NEXT: .cfi_offset %f8, -168
; S390X-NEXT: .cfi_offset %f9, -176 ; S390X-NEXT: .cfi_offset %f9, -176
; S390X-NEXT: .cfi_offset %f10, -184 ; S390X-NEXT: .cfi_offset %f10, -184
; S390X-NEXT: lgr %r13, %r2 ; S390X-NEXT: lgr %r13, %r2
; S390X-NEXT: ld %f8, 16(%r2) ; S390X-NEXT: ld %f8, 0(%r2)
; S390X-NEXT: ld %f0, 0(%r2) ; S390X-NEXT: ld %f0, 16(%r2)
; S390X-NEXT: ld %f9, 8(%r2) ; S390X-NEXT: ld %f9, 8(%r2)
; S390X-NEXT: brasl %r14, trunc@PLT ; S390X-NEXT: brasl %r14, trunc@PLT
; S390X-NEXT: ldr %f10, %f0 ; S390X-NEXT: ldr %f10, %f0
; S390X-NEXT: ldr %f0, %f9 ; S390X-NEXT: ldr %f0, %f9
; S390X-NEXT: brasl %r14, trunc@PLT ; S390X-NEXT: brasl %r14, trunc@PLT
; S390X-NEXT: ldr %f9, %f0 ; S390X-NEXT: ldr %f9, %f0
; S390X-NEXT: ldr %f0, %f8 ; S390X-NEXT: ldr %f0, %f8
; S390X-NEXT: brasl %r14, trunc@PLT ; S390X-NEXT: brasl %r14, trunc@PLT
; S390X-NEXT: std %f0, 16(%r13) ; S390X-NEXT: std %f0, 0(%r13)
; S390X-NEXT: std %f9, 8(%r13) ; S390X-NEXT: std %f9, 8(%r13)
; S390X-NEXT: std %f10, 0(%r13) ; S390X-NEXT: std %f10, 16(%r13)
; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f8, 176(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f9, 168(%r15) # 8-byte Folded Reload
; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload ; S390X-NEXT: ld %f10, 160(%r15) # 8-byte Folded Reload
; S390X-NEXT: lmg %r13, %r15, 288(%r15) ; S390X-NEXT: lmg %r13, %r15, 288(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_trunc_v3f64: ; SZ13-LABEL: constrained_vector_trunc_v3f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: vl %v1, 0(%r2), 4 ; SZ13-NEXT: vl %v0, 0(%r2), 4
; SZ13-NEXT: ld %f0, 16(%r2) ; SZ13-NEXT: ld %f1, 16(%r2)
; SZ13-NEXT: vfidb %v1, %v1, 4, 5 ; SZ13-NEXT: vfidb %v0, %v0, 4, 5
; SZ13-NEXT: fidbra %f0, 5, %f0, 4 ; SZ13-NEXT: fidbra %f1, 5, %f1, 4
; SZ13-NEXT: std %f0, 16(%r2) ; SZ13-NEXT: vst %v0, 0(%r2), 4
; SZ13-NEXT: vst %v1, 0(%r2), 4 ; SZ13-NEXT: std %f1, 16(%r2)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%trunc = call <3 x double> @llvm.experimental.constrained.trunc.v3f64( %trunc = call <3 x double> @llvm.experimental.constrained.trunc.v3f64(
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
store <3 x double> %trunc, <3 x double>* %a store <3 x double> %trunc, <3 x double>* %a
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llvm/test/CodeGen/X86/fp-intrinsics.ll

Show First 20 Lines • Show All 1,098 Lines • ▼ Show 20 Lines
; X87-NEXT: leal {{[0-9]+}}(%esp), %eax ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
; X87-NEXT: movl %eax, (%esp) ; X87-NEXT: movl %eax, (%esp)
; X87-NEXT: calll __fixdfti ; X87-NEXT: calll __fixdfti
; X87-NEXT: subl $4, %esp ; X87-NEXT: subl $4, %esp
; X87-NEXT: movl {{[0-9]+}}(%esp), %eax ; X87-NEXT: movl {{[0-9]+}}(%esp), %eax
; X87-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X87-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X87-NEXT: movl {{[0-9]+}}(%esp), %edx ; X87-NEXT: movl {{[0-9]+}}(%esp), %edx
; X87-NEXT: movl {{[0-9]+}}(%esp), %edi ; X87-NEXT: movl {{[0-9]+}}(%esp), %edi
; X87-NEXT: movl %edi, 8(%esi) ; X87-NEXT: movl %edi, 12(%esi)
; X87-NEXT: movl %edx, 12(%esi) ; X87-NEXT: movl %edx, 8(%esi)
; X87-NEXT: movl %eax, (%esi)
; X87-NEXT: movl %ecx, 4(%esi) ; X87-NEXT: movl %ecx, 4(%esi)
; X87-NEXT: movl %eax, (%esi)
; X87-NEXT: movl %esi, %eax ; X87-NEXT: movl %esi, %eax
; X87-NEXT: addl $36, %esp ; X87-NEXT: addl $36, %esp
; X87-NEXT: popl %esi ; X87-NEXT: popl %esi
; X87-NEXT: popl %edi ; X87-NEXT: popl %edi
; X87-NEXT: retl $4 ; X87-NEXT: retl $4
; ;
; X86-SSE-LABEL: f20s128: ; X86-SSE-LABEL: f20s128:
; X86-SSE: # %bb.0: # %entry ; X86-SSE: # %bb.0: # %entry
; X86-SSE-NEXT: pushl %edi ; X86-SSE-NEXT: pushl %edi
; X86-SSE-NEXT: pushl %esi ; X86-SSE-NEXT: pushl %esi
; X86-SSE-NEXT: subl $36, %esp ; X86-SSE-NEXT: subl $36, %esp
; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; X86-SSE-NEXT: movsd %xmm0, {{[0-9]+}}(%esp) ; X86-SSE-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)
; X86-SSE-NEXT: leal {{[0-9]+}}(%esp), %eax ; X86-SSE-NEXT: leal {{[0-9]+}}(%esp), %eax
; X86-SSE-NEXT: movl %eax, (%esp) ; X86-SSE-NEXT: movl %eax, (%esp)
; X86-SSE-NEXT: calll __fixdfti ; X86-SSE-NEXT: calll __fixdfti
; X86-SSE-NEXT: subl $4, %esp ; X86-SSE-NEXT: subl $4, %esp
; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-SSE-NEXT: movl %edi, 8(%esi) ; X86-SSE-NEXT: movl %edi, 12(%esi)
; X86-SSE-NEXT: movl %edx, 12(%esi) ; X86-SSE-NEXT: movl %edx, 8(%esi)
; X86-SSE-NEXT: movl %eax, (%esi)
; X86-SSE-NEXT: movl %ecx, 4(%esi) ; X86-SSE-NEXT: movl %ecx, 4(%esi)
; X86-SSE-NEXT: movl %eax, (%esi)
; X86-SSE-NEXT: movl %esi, %eax ; X86-SSE-NEXT: movl %esi, %eax
; X86-SSE-NEXT: addl $36, %esp ; X86-SSE-NEXT: addl $36, %esp
; X86-SSE-NEXT: popl %esi ; X86-SSE-NEXT: popl %esi
; X86-SSE-NEXT: popl %edi ; X86-SSE-NEXT: popl %edi
; X86-SSE-NEXT: retl $4 ; X86-SSE-NEXT: retl $4
; ;
; SSE-LABEL: f20s128: ; SSE-LABEL: f20s128:
; SSE: # %bb.0: # %entry ; SSE: # %bb.0: # %entry
▲ Show 20 Lines • Show All 294 Lines • ▼ Show 20 Lines
; X87-NEXT: leal {{[0-9]+}}(%esp), %eax ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
; X87-NEXT: movl %eax, (%esp) ; X87-NEXT: movl %eax, (%esp)
; X87-NEXT: calll __fixunsdfti ; X87-NEXT: calll __fixunsdfti
; X87-NEXT: subl $4, %esp ; X87-NEXT: subl $4, %esp
; X87-NEXT: movl {{[0-9]+}}(%esp), %eax ; X87-NEXT: movl {{[0-9]+}}(%esp), %eax
; X87-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X87-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X87-NEXT: movl {{[0-9]+}}(%esp), %edx ; X87-NEXT: movl {{[0-9]+}}(%esp), %edx
; X87-NEXT: movl {{[0-9]+}}(%esp), %edi ; X87-NEXT: movl {{[0-9]+}}(%esp), %edi
; X87-NEXT: movl %edi, 8(%esi) ; X87-NEXT: movl %edi, 12(%esi)
; X87-NEXT: movl %edx, 12(%esi) ; X87-NEXT: movl %edx, 8(%esi)
; X87-NEXT: movl %eax, (%esi)
; X87-NEXT: movl %ecx, 4(%esi) ; X87-NEXT: movl %ecx, 4(%esi)
; X87-NEXT: movl %eax, (%esi)
; X87-NEXT: movl %esi, %eax ; X87-NEXT: movl %esi, %eax
; X87-NEXT: addl $36, %esp ; X87-NEXT: addl $36, %esp
; X87-NEXT: popl %esi ; X87-NEXT: popl %esi
; X87-NEXT: popl %edi ; X87-NEXT: popl %edi
; X87-NEXT: retl $4 ; X87-NEXT: retl $4
; ;
; X86-SSE-LABEL: f20u128: ; X86-SSE-LABEL: f20u128:
; X86-SSE: # %bb.0: # %entry ; X86-SSE: # %bb.0: # %entry
; X86-SSE-NEXT: pushl %edi ; X86-SSE-NEXT: pushl %edi
; X86-SSE-NEXT: pushl %esi ; X86-SSE-NEXT: pushl %esi
; X86-SSE-NEXT: subl $36, %esp ; X86-SSE-NEXT: subl $36, %esp
; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; X86-SSE-NEXT: movsd %xmm0, {{[0-9]+}}(%esp) ; X86-SSE-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)
; X86-SSE-NEXT: leal {{[0-9]+}}(%esp), %eax ; X86-SSE-NEXT: leal {{[0-9]+}}(%esp), %eax
; X86-SSE-NEXT: movl %eax, (%esp) ; X86-SSE-NEXT: movl %eax, (%esp)
; X86-SSE-NEXT: calll __fixunsdfti ; X86-SSE-NEXT: calll __fixunsdfti
; X86-SSE-NEXT: subl $4, %esp ; X86-SSE-NEXT: subl $4, %esp
; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-SSE-NEXT: movl %edi, 8(%esi) ; X86-SSE-NEXT: movl %edi, 12(%esi)
; X86-SSE-NEXT: movl %edx, 12(%esi) ; X86-SSE-NEXT: movl %edx, 8(%esi)
; X86-SSE-NEXT: movl %eax, (%esi)
; X86-SSE-NEXT: movl %ecx, 4(%esi) ; X86-SSE-NEXT: movl %ecx, 4(%esi)
; X86-SSE-NEXT: movl %eax, (%esi)
; X86-SSE-NEXT: movl %esi, %eax ; X86-SSE-NEXT: movl %esi, %eax
; X86-SSE-NEXT: addl $36, %esp ; X86-SSE-NEXT: addl $36, %esp
; X86-SSE-NEXT: popl %esi ; X86-SSE-NEXT: popl %esi
; X86-SSE-NEXT: popl %edi ; X86-SSE-NEXT: popl %edi
; X86-SSE-NEXT: retl $4 ; X86-SSE-NEXT: retl $4
; ;
; SSE-LABEL: f20u128: ; SSE-LABEL: f20u128:
; SSE: # %bb.0: # %entry ; SSE: # %bb.0: # %entry
▲ Show 20 Lines • Show All 508 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/fp128-cast-strict.ll

Show First 20 Lines • Show All 390 Lines • ▼ Show 20 Lines
; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll __fixtfti ; X86-NEXT: calll __fixtfti
; X86-NEXT: addl $28, %esp ; X86-NEXT: addl $28, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%conv = call i128 @llvm.experimental.constrained.fptosi.i128.f128(fp128 %x, metadata !"fpexcept.strict") #0 %conv = call i128 @llvm.experimental.constrained.fptosi.i128.f128(fp128 %x, metadata !"fpexcept.strict") #0
ret i128 %conv ret i128 %conv
▲ Show 20 Lines • Show All 119 Lines • ▼ Show 20 Lines
; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll __fixunstfti ; X86-NEXT: calll __fixunstfti
; X86-NEXT: addl $28, %esp ; X86-NEXT: addl $28, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%conv = call i128 @llvm.experimental.constrained.fptoui.i128.f128(fp128 %x, metadata !"fpexcept.strict") #0 %conv = call i128 @llvm.experimental.constrained.fptoui.i128.f128(fp128 %x, metadata !"fpexcept.strict") #0
ret i128 %conv ret i128 %conv
Show All 20 Lines

llvm/test/CodeGen/X86/fp128-libcalls-strict.ll

Show All 36 Lines
; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll __addtf3 ; X86-NEXT: calll __addtf3
; X86-NEXT: addl $44, %esp ; X86-NEXT: addl $44, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%add = call fp128 @llvm.experimental.constrained.fadd.f128(fp128 %x, fp128 %y, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %add = call fp128 @llvm.experimental.constrained.fadd.f128(fp128 %x, fp128 %y, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret fp128 %add ret fp128 %add
Show All 25 Lines
; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll __subtf3 ; X86-NEXT: calll __subtf3
; X86-NEXT: addl $44, %esp ; X86-NEXT: addl $44, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%sub = call fp128 @llvm.experimental.constrained.fsub.f128(fp128 %x, fp128 %y, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %sub = call fp128 @llvm.experimental.constrained.fsub.f128(fp128 %x, fp128 %y, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret fp128 %sub ret fp128 %sub
Show All 25 Lines
; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll __multf3 ; X86-NEXT: calll __multf3
; X86-NEXT: addl $44, %esp ; X86-NEXT: addl $44, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%mul = call fp128 @llvm.experimental.constrained.fmul.f128(fp128 %x, fp128 %y, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %mul = call fp128 @llvm.experimental.constrained.fmul.f128(fp128 %x, fp128 %y, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret fp128 %mul ret fp128 %mul
Show All 25 Lines
; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll __divtf3 ; X86-NEXT: calll __divtf3
; X86-NEXT: addl $44, %esp ; X86-NEXT: addl $44, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%div = call fp128 @llvm.experimental.constrained.fdiv.f128(fp128 %x, fp128 %y, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %div = call fp128 @llvm.experimental.constrained.fdiv.f128(fp128 %x, fp128 %y, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret fp128 %div ret fp128 %div
Show All 29 Lines
; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll fmal ; X86-NEXT: calll fmal
; X86-NEXT: addl $60, %esp ; X86-NEXT: addl $60, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%fma = call fp128 @llvm.experimental.constrained.fma.f128(fp128 %x, fp128 %y, fp128 %z, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %fma = call fp128 @llvm.experimental.constrained.fma.f128(fp128 %x, fp128 %y, fp128 %z, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret fp128 %fma ret fp128 %fma
Show All 25 Lines
; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll fmodl ; X86-NEXT: calll fmodl
; X86-NEXT: addl $44, %esp ; X86-NEXT: addl $44, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%div = call fp128 @llvm.experimental.constrained.frem.f128(fp128 %x, fp128 %y, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %div = call fp128 @llvm.experimental.constrained.frem.f128(fp128 %x, fp128 %y, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret fp128 %div ret fp128 %div
Show All 21 Lines
; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll ceill ; X86-NEXT: calll ceill
; X86-NEXT: addl $28, %esp ; X86-NEXT: addl $28, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%ceil = call fp128 @llvm.experimental.constrained.ceil.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %ceil = call fp128 @llvm.experimental.constrained.ceil.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret fp128 %ceil ret fp128 %ceil
Show All 21 Lines
; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll cosl ; X86-NEXT: calll cosl
; X86-NEXT: addl $28, %esp ; X86-NEXT: addl $28, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%cos = call fp128 @llvm.experimental.constrained.cos.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %cos = call fp128 @llvm.experimental.constrained.cos.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret fp128 %cos ret fp128 %cos
Show All 21 Lines
; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll expl ; X86-NEXT: calll expl
; X86-NEXT: addl $28, %esp ; X86-NEXT: addl $28, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%exp = call fp128 @llvm.experimental.constrained.exp.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %exp = call fp128 @llvm.experimental.constrained.exp.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret fp128 %exp ret fp128 %exp
Show All 21 Lines
; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll exp2l ; X86-NEXT: calll exp2l
; X86-NEXT: addl $28, %esp ; X86-NEXT: addl $28, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%exp2 = call fp128 @llvm.experimental.constrained.exp2.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %exp2 = call fp128 @llvm.experimental.constrained.exp2.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret fp128 %exp2 ret fp128 %exp2
Show All 21 Lines
; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll floorl ; X86-NEXT: calll floorl
; X86-NEXT: addl $28, %esp ; X86-NEXT: addl $28, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%floor = call fp128 @llvm.experimental.constrained.floor.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %floor = call fp128 @llvm.experimental.constrained.floor.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret fp128 %floor ret fp128 %floor
Show All 21 Lines
; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll logl ; X86-NEXT: calll logl
; X86-NEXT: addl $28, %esp ; X86-NEXT: addl $28, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%log = call fp128 @llvm.experimental.constrained.log.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %log = call fp128 @llvm.experimental.constrained.log.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret fp128 %log ret fp128 %log
Show All 21 Lines
; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll log10l ; X86-NEXT: calll log10l
; X86-NEXT: addl $28, %esp ; X86-NEXT: addl $28, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%log10 = call fp128 @llvm.experimental.constrained.log10.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %log10 = call fp128 @llvm.experimental.constrained.log10.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret fp128 %log10 ret fp128 %log10
Show All 21 Lines
; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll log2l ; X86-NEXT: calll log2l
; X86-NEXT: addl $28, %esp ; X86-NEXT: addl $28, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%log2 = call fp128 @llvm.experimental.constrained.log2.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %log2 = call fp128 @llvm.experimental.constrained.log2.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret fp128 %log2 ret fp128 %log2
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; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll fmaxl ; X86-NEXT: calll fmaxl
; X86-NEXT: addl $44, %esp ; X86-NEXT: addl $44, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%maxnum = call fp128 @llvm.experimental.constrained.maxnum.f128(fp128 %x, fp128 %y, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %maxnum = call fp128 @llvm.experimental.constrained.maxnum.f128(fp128 %x, fp128 %y, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret fp128 %maxnum ret fp128 %maxnum
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; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll fminl ; X86-NEXT: calll fminl
; X86-NEXT: addl $44, %esp ; X86-NEXT: addl $44, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%minnum = call fp128 @llvm.experimental.constrained.minnum.f128(fp128 %x, fp128 %y, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %minnum = call fp128 @llvm.experimental.constrained.minnum.f128(fp128 %x, fp128 %y, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret fp128 %minnum ret fp128 %minnum
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; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll nearbyintl ; X86-NEXT: calll nearbyintl
; X86-NEXT: addl $28, %esp ; X86-NEXT: addl $28, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%nearbyint = call fp128 @llvm.experimental.constrained.nearbyint.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %nearbyint = call fp128 @llvm.experimental.constrained.nearbyint.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret fp128 %nearbyint ret fp128 %nearbyint
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; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll powl ; X86-NEXT: calll powl
; X86-NEXT: addl $44, %esp ; X86-NEXT: addl $44, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%pow = call fp128 @llvm.experimental.constrained.pow.f128(fp128 %x, fp128 %y, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %pow = call fp128 @llvm.experimental.constrained.pow.f128(fp128 %x, fp128 %y, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret fp128 %pow ret fp128 %pow
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; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll __powitf2 ; X86-NEXT: calll __powitf2
; X86-NEXT: addl $28, %esp ; X86-NEXT: addl $28, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%powi = call fp128 @llvm.experimental.constrained.powi.f128(fp128 %x, i32 %y, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %powi = call fp128 @llvm.experimental.constrained.powi.f128(fp128 %x, i32 %y, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret fp128 %powi ret fp128 %powi
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; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll rintl ; X86-NEXT: calll rintl
; X86-NEXT: addl $28, %esp ; X86-NEXT: addl $28, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%rint = call fp128 @llvm.experimental.constrained.rint.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %rint = call fp128 @llvm.experimental.constrained.rint.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret fp128 %rint ret fp128 %rint
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; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll roundl ; X86-NEXT: calll roundl
; X86-NEXT: addl $28, %esp ; X86-NEXT: addl $28, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%round = call fp128 @llvm.experimental.constrained.round.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %round = call fp128 @llvm.experimental.constrained.round.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret fp128 %round ret fp128 %round
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; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll sinl ; X86-NEXT: calll sinl
; X86-NEXT: addl $28, %esp ; X86-NEXT: addl $28, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%sin = call fp128 @llvm.experimental.constrained.sin.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %sin = call fp128 @llvm.experimental.constrained.sin.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret fp128 %sin ret fp128 %sin
Show All 21 Lines
; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll sqrtl ; X86-NEXT: calll sqrtl
; X86-NEXT: addl $28, %esp ; X86-NEXT: addl $28, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%sqrt = call fp128 @llvm.experimental.constrained.sqrt.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %sqrt = call fp128 @llvm.experimental.constrained.sqrt.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret fp128 %sqrt ret fp128 %sqrt
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; X86-NEXT: pushl {{[0-9]+}}(%esp) ; X86-NEXT: pushl {{[0-9]+}}(%esp)
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: calll truncl ; X86-NEXT: calll truncl
; X86-NEXT: addl $28, %esp ; X86-NEXT: addl $28, %esp
; X86-NEXT: movl (%esp), %eax ; X86-NEXT: movl (%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, 8(%esi) ; X86-NEXT: movl %edi, 12(%esi)
; X86-NEXT: movl %edx, 12(%esi) ; X86-NEXT: movl %edx, 8(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %ecx, 4(%esi) ; X86-NEXT: movl %ecx, 4(%esi)
; X86-NEXT: movl %eax, (%esi)
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl $20, %esp ; X86-NEXT: addl $20, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
entry: entry:
%trunc = call fp128 @llvm.experimental.constrained.trunc.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %trunc = call fp128 @llvm.experimental.constrained.trunc.f128(fp128 %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret fp128 %trunc ret fp128 %trunc
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llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll

Show First 20 Lines • Show All 286 Lines • ▼ Show 20 Lines
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: callq fmod ; CHECK-NEXT: callq fmod
; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: callq fmod ; CHECK-NEXT: callq fmod
; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp) ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
; CHECK-NEXT: fldl {{[0-9]+}}(%rsp) ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
; CHECK-NEXT: # xmm0 = mem[0],zero ; CHECK-NEXT: # xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
; CHECK-NEXT: # xmm1 = mem[0],zero ; CHECK-NEXT: # xmm1 = mem[0],zero
; CHECK-NEXT: addq $24, %rsp ; CHECK-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_frem_v3f64: ; AVX-LABEL: constrained_vector_frem_v3f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: subq $56, %rsp ; AVX-NEXT: subq $56, %rsp
▲ Show 20 Lines • Show All 766 Lines • ▼ Show 20 Lines
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: callq pow ; CHECK-NEXT: callq pow
; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: callq pow ; CHECK-NEXT: callq pow
; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp) ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
; CHECK-NEXT: fldl {{[0-9]+}}(%rsp) ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
; CHECK-NEXT: # xmm0 = mem[0],zero ; CHECK-NEXT: # xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
; CHECK-NEXT: # xmm1 = mem[0],zero ; CHECK-NEXT: # xmm1 = mem[0],zero
; CHECK-NEXT: addq $24, %rsp ; CHECK-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_pow_v3f64: ; AVX-LABEL: constrained_vector_pow_v3f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: subq $56, %rsp ; AVX-NEXT: subq $56, %rsp
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; CHECK-NEXT: movl $3, %edi ; CHECK-NEXT: movl $3, %edi
; CHECK-NEXT: callq __powidf2 ; CHECK-NEXT: callq __powidf2
; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movl $3, %edi ; CHECK-NEXT: movl $3, %edi
; CHECK-NEXT: callq __powidf2 ; CHECK-NEXT: callq __powidf2
; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp) ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
; CHECK-NEXT: fldl {{[0-9]+}}(%rsp) ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
; CHECK-NEXT: # xmm0 = mem[0],zero ; CHECK-NEXT: # xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
; CHECK-NEXT: # xmm1 = mem[0],zero ; CHECK-NEXT: # xmm1 = mem[0],zero
; CHECK-NEXT: addq $24, %rsp ; CHECK-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_powi_v3f64: ; AVX-LABEL: constrained_vector_powi_v3f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: subq $56, %rsp ; AVX-NEXT: subq $56, %rsp
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; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq sin ; CHECK-NEXT: callq sin
; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq sin ; CHECK-NEXT: callq sin
; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp) ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
; CHECK-NEXT: fldl {{[0-9]+}}(%rsp) ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
; CHECK-NEXT: # xmm0 = mem[0],zero ; CHECK-NEXT: # xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
; CHECK-NEXT: # xmm1 = mem[0],zero ; CHECK-NEXT: # xmm1 = mem[0],zero
; CHECK-NEXT: addq $24, %rsp ; CHECK-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_sin_v3f64: ; AVX-LABEL: constrained_vector_sin_v3f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: subq $56, %rsp ; AVX-NEXT: subq $56, %rsp
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; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq cos ; CHECK-NEXT: callq cos
; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq cos ; CHECK-NEXT: callq cos
; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp) ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
; CHECK-NEXT: fldl {{[0-9]+}}(%rsp) ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
; CHECK-NEXT: # xmm0 = mem[0],zero ; CHECK-NEXT: # xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
; CHECK-NEXT: # xmm1 = mem[0],zero ; CHECK-NEXT: # xmm1 = mem[0],zero
; CHECK-NEXT: addq $24, %rsp ; CHECK-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_cos_v3f64: ; AVX-LABEL: constrained_vector_cos_v3f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: subq $56, %rsp ; AVX-NEXT: subq $56, %rsp
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; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq exp ; CHECK-NEXT: callq exp
; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq exp ; CHECK-NEXT: callq exp
; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp) ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
; CHECK-NEXT: fldl {{[0-9]+}}(%rsp) ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
; CHECK-NEXT: # xmm0 = mem[0],zero ; CHECK-NEXT: # xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
; CHECK-NEXT: # xmm1 = mem[0],zero ; CHECK-NEXT: # xmm1 = mem[0],zero
; CHECK-NEXT: addq $24, %rsp ; CHECK-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_exp_v3f64: ; AVX-LABEL: constrained_vector_exp_v3f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: subq $56, %rsp ; AVX-NEXT: subq $56, %rsp
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; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq exp2 ; CHECK-NEXT: callq exp2
; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq exp2 ; CHECK-NEXT: callq exp2
; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp) ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
; CHECK-NEXT: fldl {{[0-9]+}}(%rsp) ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
; CHECK-NEXT: # xmm0 = mem[0],zero ; CHECK-NEXT: # xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
; CHECK-NEXT: # xmm1 = mem[0],zero ; CHECK-NEXT: # xmm1 = mem[0],zero
; CHECK-NEXT: addq $24, %rsp ; CHECK-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_exp2_v3f64: ; AVX-LABEL: constrained_vector_exp2_v3f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: subq $56, %rsp ; AVX-NEXT: subq $56, %rsp
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; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq log ; CHECK-NEXT: callq log
; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq log ; CHECK-NEXT: callq log
; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp) ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
; CHECK-NEXT: fldl {{[0-9]+}}(%rsp) ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
; CHECK-NEXT: # xmm0 = mem[0],zero ; CHECK-NEXT: # xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
; CHECK-NEXT: # xmm1 = mem[0],zero ; CHECK-NEXT: # xmm1 = mem[0],zero
; CHECK-NEXT: addq $24, %rsp ; CHECK-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_log_v3f64: ; AVX-LABEL: constrained_vector_log_v3f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: subq $56, %rsp ; AVX-NEXT: subq $56, %rsp
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; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq log10 ; CHECK-NEXT: callq log10
; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq log10 ; CHECK-NEXT: callq log10
; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp) ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
; CHECK-NEXT: fldl {{[0-9]+}}(%rsp) ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
; CHECK-NEXT: # xmm0 = mem[0],zero ; CHECK-NEXT: # xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
; CHECK-NEXT: # xmm1 = mem[0],zero ; CHECK-NEXT: # xmm1 = mem[0],zero
; CHECK-NEXT: addq $24, %rsp ; CHECK-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_log10_v3f64: ; AVX-LABEL: constrained_vector_log10_v3f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: subq $56, %rsp ; AVX-NEXT: subq $56, %rsp
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; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq log2 ; CHECK-NEXT: callq log2
; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq log2 ; CHECK-NEXT: callq log2
; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp) ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
; CHECK-NEXT: fldl {{[0-9]+}}(%rsp) ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
; CHECK-NEXT: # xmm0 = mem[0],zero ; CHECK-NEXT: # xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
; CHECK-NEXT: # xmm1 = mem[0],zero ; CHECK-NEXT: # xmm1 = mem[0],zero
; CHECK-NEXT: addq $24, %rsp ; CHECK-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_log2_v3f64: ; AVX-LABEL: constrained_vector_log2_v3f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: subq $56, %rsp ; AVX-NEXT: subq $56, %rsp
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; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq rint ; CHECK-NEXT: callq rint
; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq rint ; CHECK-NEXT: callq rint
; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp) ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
; CHECK-NEXT: fldl {{[0-9]+}}(%rsp) ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
; CHECK-NEXT: # xmm0 = mem[0],zero ; CHECK-NEXT: # xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
; CHECK-NEXT: # xmm1 = mem[0],zero ; CHECK-NEXT: # xmm1 = mem[0],zero
; CHECK-NEXT: addq $24, %rsp ; CHECK-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_rint_v3f64: ; AVX-LABEL: constrained_vector_rint_v3f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
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; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq nearbyint ; CHECK-NEXT: callq nearbyint
; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq nearbyint ; CHECK-NEXT: callq nearbyint
; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp) ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
; CHECK-NEXT: fldl {{[0-9]+}}(%rsp) ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
; CHECK-NEXT: # xmm0 = mem[0],zero ; CHECK-NEXT: # xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
; CHECK-NEXT: # xmm1 = mem[0],zero ; CHECK-NEXT: # xmm1 = mem[0],zero
; CHECK-NEXT: addq $24, %rsp ; CHECK-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_nearby_v3f64: ; AVX-LABEL: constrained_vector_nearby_v3f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
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; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: callq fmax ; CHECK-NEXT: callq fmax
; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: callq fmax ; CHECK-NEXT: callq fmax
; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp) ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
; CHECK-NEXT: fldl {{[0-9]+}}(%rsp) ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
; CHECK-NEXT: # xmm0 = mem[0],zero ; CHECK-NEXT: # xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
; CHECK-NEXT: # xmm1 = mem[0],zero ; CHECK-NEXT: # xmm1 = mem[0],zero
; CHECK-NEXT: addq $24, %rsp ; CHECK-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_max_v3f64: ; AVX-LABEL: constrained_vector_max_v3f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: subq $56, %rsp ; AVX-NEXT: subq $56, %rsp
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; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: callq fmin ; CHECK-NEXT: callq fmin
; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: callq fmin ; CHECK-NEXT: callq fmin
; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp) ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
; CHECK-NEXT: fldl {{[0-9]+}}(%rsp) ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
; CHECK-NEXT: # xmm0 = mem[0],zero ; CHECK-NEXT: # xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
; CHECK-NEXT: # xmm1 = mem[0],zero ; CHECK-NEXT: # xmm1 = mem[0],zero
; CHECK-NEXT: addq $24, %rsp ; CHECK-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_min_v3f64: ; AVX-LABEL: constrained_vector_min_v3f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: subq $56, %rsp ; AVX-NEXT: subq $56, %rsp
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; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq ceil ; CHECK-NEXT: callq ceil
; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq ceil ; CHECK-NEXT: callq ceil
; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp) ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
; CHECK-NEXT: fldl {{[0-9]+}}(%rsp) ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
; CHECK-NEXT: # xmm0 = mem[0],zero ; CHECK-NEXT: # xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
; CHECK-NEXT: # xmm1 = mem[0],zero ; CHECK-NEXT: # xmm1 = mem[0],zero
; CHECK-NEXT: addq $24, %rsp ; CHECK-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_ceil_v3f64: ; AVX-LABEL: constrained_vector_ceil_v3f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
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; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq floor ; CHECK-NEXT: callq floor
; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq floor ; CHECK-NEXT: callq floor
; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp) ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
; CHECK-NEXT: fldl {{[0-9]+}}(%rsp) ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
; CHECK-NEXT: # xmm0 = mem[0],zero ; CHECK-NEXT: # xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
; CHECK-NEXT: # xmm1 = mem[0],zero ; CHECK-NEXT: # xmm1 = mem[0],zero
; CHECK-NEXT: addq $24, %rsp ; CHECK-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_floor_v3f64: ; AVX-LABEL: constrained_vector_floor_v3f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
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; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq round ; CHECK-NEXT: callq round
; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq round ; CHECK-NEXT: callq round
; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp) ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
; CHECK-NEXT: fldl {{[0-9]+}}(%rsp) ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
; CHECK-NEXT: # xmm0 = mem[0],zero ; CHECK-NEXT: # xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
; CHECK-NEXT: # xmm1 = mem[0],zero ; CHECK-NEXT: # xmm1 = mem[0],zero
; CHECK-NEXT: addq $24, %rsp ; CHECK-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_round_v3f64: ; AVX-LABEL: constrained_vector_round_v3f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: subq $56, %rsp ; AVX-NEXT: subq $56, %rsp
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; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq trunc ; CHECK-NEXT: callq trunc
; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq trunc ; CHECK-NEXT: callq trunc
; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp) ; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
; CHECK-NEXT: fldl {{[0-9]+}}(%rsp) ; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload ; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
; CHECK-NEXT: # xmm0 = mem[0],zero ; CHECK-NEXT: # xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload ; CHECK-NEXT: movsd (%rsp), %xmm1 # 8-byte Reload
; CHECK-NEXT: # xmm1 = mem[0],zero ; CHECK-NEXT: # xmm1 = mem[0],zero
; CHECK-NEXT: addq $24, %rsp ; CHECK-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_trunc_v3f64: ; AVX-LABEL: constrained_vector_trunc_v3f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
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