Page MenuHomePhabricator

[AArch64][SVE2] Asm: support SVE2 Floating Point Pairwise Group
ClosedPublic

Authored by c-rhodes on May 24 2019, 6:07 AM.

Details

Summary

Patch adds support for the following instructions:

SVE2 floating-point pairwise operations:

  • FADDP, FMAXNMP, FMINNMP, FMAXP, FMINP

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Diff Detail

Repository
rL LLVM

Event Timeline

c-rhodes created this revision.May 24 2019, 6:07 AM
chill added inline comments.May 24 2019, 7:08 AM
test/MC/AArch64/SVE2/faddp-diagnostics.s
36 ↗(On Diff #201217)

Also p0/z is invalid predicate, e.g.:

faddp z0.h, p0/z, z0.h, z1.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand

etc.

c-rhodes added inline comments.May 24 2019, 7:52 AM
test/MC/AArch64/SVE2/faddp-diagnostics.s
36 ↗(On Diff #201217)

I can add a test for that before merging. Managed to miss this for quite a few of the predicate instructions it seems. I have a patch downstream that improves the SVE predicate tests also as similar cases are missing there, I'll get that up after the SVE2 stuff is in.

chill accepted this revision.May 28 2019, 1:48 AM
This revision is now accepted and ready to land.May 28 2019, 1:48 AM
This revision was automatically updated to reflect the committed changes.
c-rhodes marked an inline comment as done.May 29 2019, 1:41 AM