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[AArch64][SVE2] Asm: support SVE2 Narrowing Group
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Authored by c-rhodes on May 21 2019, 9:07 AM.

Details

Summary

Patch adds support for the following instructions:

SVE2 bitwise shift right narrow:

  • SQSHRUNB, SQSHRUNT, SQRSHRUNB, SQRSHRUNT, SHRNB, SHRNT, RSHRNB, RSHRNT, SQSHRNB, SQSHRNT, SQRSHRNB, SQRSHRNT, UQSHRNB, UQSHRNT, UQRSHRNB, UQRSHRNT

SVE2 integer add/subtract narrow high part:

  • ADDHNB, ADDHNT, RADDHNB, RADDHNT, SUBHNB, SUBHNT, RSUBHNB, RSUBHNT

SVE2 saturating extract narrow:

  • SQXTNB, SQXTNT, UQXTNB, UQXTNT, SQXTUNB, SQXTUNT

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

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Repository
rL LLVM

Event Timeline

c-rhodes created this revision.May 21 2019, 9:07 AM
This revision is now accepted and ready to land.May 21 2019, 11:56 PM
This revision was automatically updated to reflect the committed changes.