[Backend] DBG_CALLSITE & DBG_CALLSITEPARAM instr handling

[djtodoro]

Summary

Handle DBG_CALLSITE and DBG_CALLSITEPARAM meta instructions through backend pipeline. It partially relies on the way DBG_VALUE is handled.

Authors: @asowda, @NikolaPrica, @djtodoro, @ivanbaev

[djtodoro]

• Rename: VariableNotChanged ===> ArgumentNotModified
• Refactor test cases

[dstenb]

lib/CodeGen/StackColoring.cpp

963

The iterator does seem to be invalidated here (or am I overlooking something?), so you should be able to use BB.instrs() here instead.

lib/CodeGen/StackSlotColoring.cpp

376

MBB.instrs()

[dstenb]

lib/CodeGen/StackColoring.cpp

963

Gah, "does _not_".

[djtodoro]

@dstenb Thanks for comments!

lib/CodeGen/StackColoring.cpp

963

Yes.

lib/CodeGen/StackSlotColoring.cpp

376

As well as above.

[djtodoro]

• Use MBB.instrs()

include/llvm/BinaryFormat/Dwarf.def

 HANDLE_DW_OP(0xa5, regval_type, 5, DWARF)
 HANDLE_DW_OP(0xa6, deref_type, 5, DWARF)
 HANDLE_DW_OP(0xa7, xderef_type, 5, DWARF)
 HANDLE_DW_OP(0xa8, convert, 5, DWARF)
 HANDLE_DW_OP(0xa9, reinterpret, 5, DWARF)
 // Vendor extensions:
 // Extensions for GNU-style thread-local storage.
 HANDLE_DW_OP(0xe0, GNU_push_tls_address, 0, GNU)
+// The GNU entry value extension.
+// See http://www.dwarfstd.org/ShowIssue.php?issue=100909.1&type=open .
+HANDLE_DW_OP(0xf3, GNU_entry_value, 0, GNU)
 // Extensions for Fission proposal.
 HANDLE_DW_OP(0xfb, GNU_addr_index, 0, GNU)
 HANDLE_DW_OP(0xfc, GNU_const_index, 0, GNU)
 
 // DWARF languages.
 HANDLE_DW_LANG(0x0001, C89, 0, 2, DWARF)
 HANDLE_DW_LANG(0x0002, C, 0, 2, DWARF)
 HANDLE_DW_LANG(0x0003, Ada83, 1, 2, DWARF)

include/llvm/CodeGen/MachineBasicBlock.h

#endif
   iterator getLastNonDebugInstr();
   const_iterator getLastNonDebugInstr() const {
     return const_cast<MachineBasicBlock *>(this)->getLastNonDebugInstr();
   }
 
   /// Convenience function that returns true if the block ends in a return
   /// instruction.
   bool isReturnBlock() const {
-    return !empty() && back().isReturn();
+    if (!empty()) {
+      const_iterator LastMI = this->getLastNonDebugInstr();
+      if((LastMI != this->end()) && (LastMI->isReturn()))
+        return true;
+    }
+    return false;
   }
 
   /// Convenience function that returns true if the bock ends in a EH scope
   /// return instruction.
   bool isEHScopeReturnBlock() const {
     return !empty() && back().isEHScopeReturn();
   }
 

include/llvm/CodeGen/MachineInstrBuilder.h

 MachineInstr *buildDbgValueForSpill(MachineBasicBlock &BB,
                                     MachineBasicBlock::iterator I,
                                     const MachineInstr &Orig, int FrameIndex);
 
 /// Update a DBG_VALUE whose value has been spilled to FrameIndex. Useful when
 /// modifying an instruction in place while iterating over a basic block.
 void updateDbgValueForSpill(MachineInstr &Orig, int FrameIndex);
 
+/// Clone a DBG_CALLPARAM whose location is spilled to FrameIndex.
+MachineInstr *buildDbgCallParamForSpill(MachineInstr &Orig, int FrameIndex);
+
+/// Clone a DBG_CALLPARAM whose location is global addres.
+MachineInstr *buildDbgCallParamForGlobal(MachineInstr &Orig,
+                                         const GlobalValue *GV);
+
+/// Firstly check whether DBG_CALLSITEPARAM could be described with
+/// DICallSiteParam metadata. If it can't be described by DICallSite metadata
+/// delete it and return true. Otherwise set parameter location to 0.
+bool invalidateParamLocation(MachineInstr *MI);
+
 inline unsigned getDefRegState(bool B) {
   return B ? RegState::Define : 0;
 }
 inline unsigned getImplRegState(bool B) {
   return B ? RegState::Implicit : 0;
 }
 inline unsigned getKillRegState(bool B) {
   return B ? RegState::Kill : 0;

include/llvm/IR/DebugInfoMetadata.h

public:
 
   /// Checks if the last 4 elements of the expression are DW_OP_constu <DWARF
   /// Address Space> DW_OP_swap DW_OP_xderef and extracts the <DWARF Address
   /// Space>.
   static const DIExpression *extractAddressClass(const DIExpression *Expr,
                                                  unsigned &AddrClass);
 
   /// Constants for DIExpression::prepend.
-  enum { NoDeref = false, WithDeref = true, WithStackValue = true };
+  enum { NoDeref = false, WithDeref = true, WithStackValue = true,
+         WithEntryValue = true};
 
   /// Prepend \p DIExpr with a deref and offset operation and optionally turn it
   /// into a stack value.
   static DIExpression *prepend(const DIExpression *Expr, bool DerefBefore,
                                int64_t Offset = 0, bool DerefAfter = false,
-                               bool StackValue = false);
+                               bool StackValue = false, bool EntryValue = false);
 
   /// Prepend \p DIExpr with the given opcodes and optionally turn it into a
   /// stack value.
   static DIExpression *prependOpcodes(const DIExpression *Expr,
                                       SmallVectorImpl<uint64_t> &Ops,
-                                      bool StackValue = false);
+                                      bool StackValue = false,
+                                      bool EntryValue = false);
 
   /// Append the opcodes \p Ops to \p DIExpr. Unlike \ref appendToStack, the
   /// returned expression is a stack value only if \p DIExpr is a stack value.
   /// If \p DIExpr describes a fragment, the returned expression will describe
   /// the same fragment.
   static DIExpression *append(const DIExpression *Expr, ArrayRef<uint64_t> Ops);
 
   /// Convert \p DIExpr into a stack value if it isn't one already by appending
public:
   }
 
   /// Check if fragments overlap between this DIExpression and \p Other.
   bool fragmentsOverlap(const DIExpression *Other) const {
     if (!isFragment() || !Other->isFragment())
       return true;
     return fragmentCmp(Other) == 0;
   }
+
+  bool isEntryValue() const {
+    return getNumElements() > 0 && getElement(0) == dwarf::DW_OP_GNU_entry_value;
+  }
 };
 
 /// Global variables.
 ///
 /// TODO: Remove DisplayName.  It's always equal to Name.
 class DIGlobalVariable : public DIVariable {
   friend class LLVMContextImpl;
   friend class MDNode;

lib/CodeGen/CalcSpillWeights.cpp

struct CopyHint {
     }
   };
   std::set<CopyHint> CopyHints;
 
   for (MachineRegisterInfo::reg_instr_iterator
        I = mri.reg_instr_begin(li.reg), E = mri.reg_instr_end();
        I != E; ) {
     MachineInstr *mi = &*(I++);
+    numInstr++;
+
+    if (mi->isIdentityCopy() || mi->isImplicitDef() || mi->isDebugInstr())
+      continue;
+    if (!visited.insert(mi).second)
+      continue;
 
     // For local split artifacts, we are interested only in instructions between
     // the expected start and end of the range.
     SlotIndex si = LIS.getInstructionIndex(*mi);
     if (localSplitArtifact && ((si < *start) || (si > *end)))
       continue;
 
-    numInstr++;
-    if (mi->isIdentityCopy() || mi->isImplicitDef() || mi->isDebugInstr())
-      continue;
-    if (!visited.insert(mi).second)
-      continue;
-
     float weight = 1.0f;
     if (Spillable) {
       // Get loop info for mi.
       if (mi->getParent() != mbb) {
         mbb = mi->getParent();
         loop = Loops.getLoopFor(mbb);
         isExiting = loop ? loop->isLoopExiting(mbb) : false;
       }

lib/CodeGen/InlineSpiller.cpp

 STATISTIC(NumSnippets,        "Number of spilled snippets");
 STATISTIC(NumSpills,          "Number of spills inserted");
 STATISTIC(NumSpillsRemoved,   "Number of spills removed");
 STATISTIC(NumReloads,         "Number of reloads inserted");
 STATISTIC(NumReloadsRemoved,  "Number of reloads removed");
 STATISTIC(NumFolded,          "Number of folded stack accesses");
 STATISTIC(NumFoldedLoads,     "Number of folded loads");
 STATISTIC(NumRemats,          "Number of rematerialized defs for spilling");
+STATISTIC(NumDbgCallSites,    "Number of dbg call sites deleted");
 
 static cl::opt<bool> DisableHoisting("disable-spill-hoist", cl::Hidden,
                                      cl::desc("Disable inline spill hoisting"));
 
 namespace {
 
 class HoistSpillHelper : private LiveRangeEdit::Delegate {
   MachineFunction &MF;
for (MachineRegisterInfo::reg_bundle_iterator
            RegI = MRI.reg_bundle_begin(Reg), E = MRI.reg_bundle_end();
          RegI != E; ) {
       MachineInstr &MI = *RegI++;
 
       // Debug values are not allowed to affect codegen.
       if (MI.isDebugValue())
         continue;
 
+      // If DebugCallSite parameter virtual register is present here
+      // that means that it should have been handled somewhere
+      // in register coalescing pass. For now we just set it as no-reg
+      // since we can't materialize it correctly here.
+      if (MI.isDebugCallSiteParam()) {
+        LLVM_DEBUG(dbgs() << "Invalidating virt reg from " << MI);
+        MI.getOperand(2).setReg(0U);
+        continue;
+      }
+
+      if (MI.isDebugCallSite()) {
+        MachineOperand &MOCallReg = MI.getOperand(1);
+        if (MOCallReg.isReg() && MOCallReg.getReg() == Reg) {
+          // We lose a dbg info for a call site, so delete it.
+          ++NumDbgCallSites;
+          MI.eraseFromParent();
+          continue;
+        }
+
+        auto It = MI.getIterator();
+        while (It->isBundledWithSucc()) {
+          It++;
+          MachineOperand &MO = It->getOperand(2);
+          if (MO.isReg() && MO.getReg() == Reg) {
+            LLVM_DEBUG(dbgs() << "Invalidating virt reg from " << MI);
+            invalidateParamLocation(&*It);
+            break;
+          }
+        }
+        continue;
+      }
+
       assert(!MI.isDebugInstr() && "Did not expect to find a use in debug "
              "instruction that isn't a DBG_VALUE");
 
       anyRemat |= reMaterializeFor(LI, MI);
     }
   }
   if (!anyRemat)
     return;
if (MI->isDebugValue()) {
       // Modify DBG_VALUE now that the value is in a spill slot.
       MachineBasicBlock *MBB = MI->getParent();
       LLVM_DEBUG(dbgs() << "Modifying debug info due to spill:\t" << *MI);
       buildDbgValueForSpill(*MBB, MI, *MI, StackSlot);
       MBB->erase(MI);
       continue;
     }
 
+    if (MI->isDebugCallSite()) {
+      // If it ever comes to spilling of a reg that holds a call
+      // remove that call site.
+      // TODO: Try to salvage this, by making frame object for that.
+      MachineOperand &MOCallReg = MI->getOperand(1);
+      if (MOCallReg.isReg() && MOCallReg.getReg() == Reg) {
+        ++NumDbgCallSites;
+        MI->eraseFromParent();
+        continue;
+      }
+
+      auto It = MI->getIterator();
+      SmallVector<std::pair<MachineInstr *, MachineInstr *>, 2> ReplaceInstrs;
+      while (It->isBundledWithSucc()) {
+        It++;
+        if (It->getOperand(2).isReg() && It->getOperand(2).getReg() == Reg) {
+          MachineInstr *SpilledCSP = buildDbgCallParamForSpill(*It, StackSlot);
+          ReplaceInstrs.emplace_back(&*It, SpilledCSP);
+        }
+      }
+      for (auto Replace : ReplaceInstrs) {
+        LLVM_DEBUG(dbgs() << "Modifying debug call param due to spill:\t"
+                          << *Replace.first);
+        Replace.first->eraseFromBundle();
+        MIBundleBuilder(MI).append(Replace.second);
+      }
+      continue;
+    }
+
     assert(!MI->isDebugInstr() && "Did not expect to find a use in debug "
                                   "instruction that isn't a DBG_VALUE");
 
     // Ignore copies to/from snippets. We'll delete them.
     if (SnippetCopies.count(MI))
       continue;
 
     // Stack slot accesses may coalesce away.
     if (coalesceStackAccess(MI, Reg))
       continue;

lib/CodeGen/LexicalScopes.cpp

void LexicalScopes::extractLexicalScopes(
   // Scan each instruction and create scopes. First build working set of scopes.
   for (const auto &MBB : *MF) {
     const MachineInstr *RangeBeginMI = nullptr;
     const MachineInstr *PrevMI = nullptr;
     const DILocation *PrevDL = nullptr;
     for (const auto &MInsn : MBB) {
       // Check if instruction has valid location information.
       const DILocation *MIDL = MInsn.getDebugLoc();
+
+      // Ignore DBG_VALUE and similar instruction that do not contribute to any
+      // instruction in the output.
+      if (MInsn.isMetaInstruction())
+        continue;
+
       if (!MIDL) {
         PrevMI = &MInsn;
         continue;
       }
 
       // If scope has not changed then skip this instruction.
       if (MIDL == PrevDL) {
         PrevMI = &MInsn;
         continue;
       }
 
-      // Ignore DBG_VALUE and similar instruction that do not contribute to any
-      // instruction in the output.
-      if (MInsn.isMetaInstruction())
-        continue;
-
       if (RangeBeginMI) {
         // If we have already seen a beginning of an instruction range and
         // current instruction scope does not match scope of first instruction
         // in this range then create a new instruction range.
         InsnRange R(RangeBeginMI, PrevMI);
         MI2ScopeMap[RangeBeginMI] = getOrCreateLexicalScope(PrevDL);
         MIRanges.push_back(R);
       }

lib/CodeGen/LiveDebugVariables.cpp

for (auto const &L : userLabels) {
     }
   }
   if (!Found)
     userLabels.push_back(llvm::make_unique<UserLabel>(Label, DL, Idx));
 
   return true;
 }
 
+static MachineInstr& getPrevNonDbgInstr(MachineBasicBlock::iterator It) {
+  do {
+    It = std::prev(It);
+  } while (It->isDebugCallSite() || It->isDebugCallSiteParam());
+
+  return *It;
+}
+
 bool LDVImpl::collectDebugValues(MachineFunction &mf) {
   bool Changed = false;
   for (MachineFunction::iterator MFI = mf.begin(), MFE = mf.end(); MFI != MFE;
        ++MFI) {
     MachineBasicBlock *MBB = &*MFI;
     for (MachineBasicBlock::iterator MBBI = MBB->begin(), MBBE = MBB->end();
          MBBI != MBBE;) {
       // Use the first debug instruction in the sequence to get a SlotIndex
       // for following consecutive debug instructions.
       if (!MBBI->isDebugInstr()) {
         ++MBBI;
         continue;
       }
       // Debug instructions has no slot index. Use the previous
       // non-debug instruction's SlotIndex as its SlotIndex.
       SlotIndex Idx =
           MBBI == MBB->begin()
               ? LIS->getMBBStartIdx(MBB)
-              : LIS->getInstructionIndex(*std::prev(MBBI)).getRegSlot();
+              : LIS->getInstructionIndex(getPrevNonDbgInstr(MBBI)).getRegSlot();
       // Handle consecutive debug instructions with the same slot index.
       do {
         // Only handle DBG_VALUE in handleDebugValue(). Skip all other
         // kinds of debug instructions.
         if ((MBBI->isDebugValue() && handleDebugValue(*MBBI, Idx)) ||
             (MBBI->isDebugLabel() && handleDebugLabel(*MBBI, Idx))) {
           MBBI = MBB->erase(MBBI);
           Changed = true;

lib/CodeGen/LiveInterval.cpp

void ConnectedVNInfoEqClasses::Distribute(LiveInterval &LI, LiveInterval *LIV[],
                                           MachineRegisterInfo &MRI) {
   // Rewrite instructions.
   for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(LI.reg),
        RE = MRI.reg_end(); RI != RE;) {
     MachineOperand &MO = *RI;
     MachineInstr *MI = RI->getParent();
     ++RI;
     const VNInfo *VNI;
+
+    // Skip over call site debug instructions.
+    if (MI->isDebugCallSite() || MI->isDebugCallSiteParam())
+        continue;
+
     if (MI->isDebugValue()) {
       // DBG_VALUE instructions don't have slot indexes, so get the index of
       // the instruction before them. The value is defined there too.
       SlotIndex Idx = LIS.getSlotIndexes()->getIndexBefore(*MI);
       VNI = LI.Query(Idx).valueOut();
     } else {
       SlotIndex Idx = LIS.getInstructionIndex(*MI);
       LiveQueryResult LRQ = LI.Query(Idx);

lib/CodeGen/LiveIntervals.cpp

if (NeedsCleanup)
     li->removeEmptySubRanges();
 
   // Find all the values used, including PHI kills.
   ShrinkToUsesWorkList WorkList;
 
   // Visit all instructions reading li->reg.
   unsigned Reg = li->reg;
   for (MachineInstr &UseMI : MRI->reg_instructions(Reg)) {
-    if (UseMI.isDebugValue() || !UseMI.readsVirtualRegister(Reg))
+    if (UseMI.isDebugInstr() || !UseMI.readsVirtualRegister(Reg))
       continue;
     SlotIndex Idx = getInstructionIndex(UseMI).getRegSlot();
     LiveQueryResult LRQ = li->Query(Idx);
     VNInfo *VNI = LRQ.valueIn();
     if (!VNI) {
       // This shouldn't happen: readsVirtualRegister returns true, but there is
       // no live value. It is likely caused by a target getting <undef> flags
       // wrong.

lib/CodeGen/MachineInstr.cpp

 
 Optional<unsigned>
 MachineInstr::getFoldedRestoreSize(const TargetInstrInfo *TII) const {
   MMOList Accesses;
   if (TII->hasLoadFromStackSlot(*this, Accesses))
     return getSpillSlotSize(Accesses, getMF()->getFrameInfo());
   return None;
 }
+
+MachineInstr *llvm::buildDbgCallParamForSpill(MachineInstr &Orig,
+                                              int FrameIndex) {
+  auto *CSP = Orig.getDebugCallSiteParam();
+  unsigned firstReg = Orig.getOperand(0).getReg();
+  DebugLoc DL = Orig.getDebugLoc();
+  MachineFunction *MF = Orig.getParent()->getParent();
+  MachineInstr *NewInstr =
+    BuildMI(*MF, DL, Orig.getDesc()).addReg(firstReg, getDebugRegState(true))
+                                    .addMetadata(CSP)
+                                    .addFrameIndex(FrameIndex)
+                                    .addImm(0);
+  return NewInstr;
+}
+
+MachineInstr *llvm::buildDbgCallParamForGlobal(MachineInstr &Orig,
+                                               const GlobalValue *GV) {
+  auto *CSP = Orig.getDebugCallSiteParam();
+  unsigned firstReg = Orig.getOperand(0).getReg();
+  DebugLoc DL = Orig.getDebugLoc();
+  MachineFunction *MF = Orig.getParent()->getParent();
+  MachineInstr *NewInstr =
+    BuildMI(*MF, DL, Orig.getDesc()).addReg(firstReg, getDebugRegState(true))
+                                     .addMetadata(CSP)
+                                     .addGlobalAddress(GV)
+                                     .addImm(0);
+  return NewInstr;
+}
+
+bool llvm::invalidateParamLocation(MachineInstr *MI) {
+  assert(MI->isDebugCallSiteParam());
+  if (!MI->getDebugCallSiteParam()->getVar() &&
+      MI->getDebugCallSiteParam()->getExpression()->getNumElements() == 0)
+  {
+    MI->eraseFromBundle();
+    return true;
+  }
+  MI->getOperand(2).setReg(0);
+  return false;
+}

lib/CodeGen/MachineRegisterInfo.cpp

 /// deleted during LiveDebugVariables analysis.
 void MachineRegisterInfo::markUsesInDebugValueAsUndef(unsigned Reg) const {
   // Mark any DBG_VALUE that uses Reg as undef (but don't delete it.)
   MachineRegisterInfo::use_instr_iterator nextI;
   for (use_instr_iterator I = use_instr_begin(Reg), E = use_instr_end();
        I != E; I = nextI) {
     nextI = std::next(I);  // I is invalidated by the setReg
     MachineInstr *UseMI = &*I;
-    if (UseMI->isDebugValue())
+    if (UseMI->isDebugValue() || UseMI->isDebugCallSite())
       UseMI->getOperand(0).setReg(0U);
+    else if (UseMI->isDebugCallSiteParam())
+      invalidateParamLocation(UseMI);
   }
 }
 
 static const Function *getCalledFunction(const MachineInstr &MI) {
   for (const MachineOperand &MO : MI.operands()) {
     if (!MO.isGlobal())
       continue;
     const Function *Func = dyn_cast<Function>(MO.getGlobal());

lib/CodeGen/MachineVerifier.cpp

void MachineVerifier::visitMachineBundleBefore(const MachineInstr *MI) {
   }
 
   // Ensure non-terminators don't follow terminators.
   // Ignore predicated terminators formed by if conversion.
   // FIXME: If conversion shouldn't need to violate this rule.
   if (MI->isTerminator() && !TII->isPredicated(*MI)) {
     if (!FirstTerminator)
       FirstTerminator = MI;
-  } else if (FirstTerminator) {
+  } else if (FirstTerminator && !MI->isDebugCallSite()) {
     report("Non-terminator instruction after the first terminator", MI);
     errs() << "First terminator was:\t" << *FirstTerminator;
   }
 }
 
 // The operands on an INLINEASM instruction must follow a template.
 // Verify that the flag operands make sense.
 void MachineVerifier::verifyInlineAsm(const MachineInstr *MI) {
if (MO->isReg() && !MO->isImplicit() && !MI->isVariadic() && MO->getReg())
       report("Extra explicit operand on non-variadic instruction", MO, MONum);
   }
 
   switch (MO->getType()) {
   case MachineOperand::MO_Register: {
     const unsigned Reg = MO->getReg();
     if (!Reg)
       return;
-    if (MRI->tracksLiveness() && !MI->isDebugValue())
+    if (MRI->tracksLiveness() && !MI->isDebugInstr())
       checkLiveness(MO, MONum);
 
     // Verify the consistency of tied operands.
     if (MO->isTied()) {
       unsigned OtherIdx = MI->findTiedOperandIdx(MONum);
       const MachineOperand &OtherMO = MI->getOperand(OtherIdx);
       if (!OtherMO.isReg())
         report("Must be tied to a register", MO, MONum);
for (MachineBasicBlock::const_succ_iterator I = MBB->succ_begin(),
                << " has entry state (" << SPState[(*I)->getNumber()].EntryValue
                << ", " << SPState[(*I)->getNumber()].EntryIsSetup << "), while "
                << printMBBReference(*MBB) << " has exit state ("
                << BBState.ExitValue << ", " << BBState.ExitIsSetup << ").\n";
       }
     }
 
     // Make sure a basic block with return ends with zero stack adjustment.
-    if (!MBB->empty() && MBB->back().isReturn()) {
+    if (MBB->isReturnBlock()) {
       if (BBState.ExitIsSetup)
         report("A return block ends with a FrameSetup.", MBB);
       if (BBState.ExitValue)
         report("A return block ends with a nonzero stack adjustment.", MBB);
     }
   }
 }

lib/CodeGen/PostRASchedulerList.cpp

for (MachineBasicBlock::iterator I = Current; I != MBB.begin();) {
         Scheduler.schedule();
         Scheduler.exitRegion();
         Scheduler.EmitSchedule();
         Current = &MI;
         CurrentCount = Count;
         Scheduler.Observe(MI, CurrentCount);
       }
       I = MI;
-      if (MI.isBundle())
+      // Check also for DBG_CALLSITE bundles.
+      if (MI.isBundle() || (MI.isDebugCallSite() && MI.isBundledWithSucc()))
         Count -= MI.getBundleSize();
     }
     assert(Count == 0 && "Instruction count mismatch!");
     assert((MBB.begin() == Current || CurrentCount != 0) &&
            "Instruction count mismatch!");
     Scheduler.enterRegion(&MBB, MBB.begin(), Current, CurrentCount);
     Scheduler.setEndIndex(CurrentCount);
     Scheduler.schedule();

lib/CodeGen/PrologEpilogInserter.cpp

void PEI::replaceFrameIndices(MachineBasicBlock *BB, MachineFunction &MF,
   for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
     if (TII.isFrameInstr(*I)) {
       InsideCallSequence = TII.isFrameSetup(*I);
       SPAdj += TII.getSPAdjust(*I);
       I = TFI->eliminateCallFramePseudoInstr(MF, *BB, I);
       continue;
     }
 
+    auto handleDebugInstr = [&](MachineInstr &MI, unsigned Operand) {
+      assert((Operand == 0 || Operand == 2) &&
+             "Operand must be register of dbg_value or dbg_callsiteparam");
+      unsigned Reg;
+      int64_t Offset = TFI->getFrameIndexReference(
+          MF, MI.getOperand(Operand).getIndex(), Reg);
+      MI.getOperand(Operand).ChangeToRegister(Reg, false /*isDef*/);
+      MI.getOperand(Operand).setIsDebug();
+
+      if (Operand)
+        MI.getOperand(3).setImm(Offset);
+      else {
+        auto *DIExpr = DIExpression::prepend(MI.getDebugExpression(),
+                                             DIExpression::NoDeref, Offset);
+        MI.getOperand(3).setMetadata(DIExpr);
+      }
+    };
+
     MachineInstr &MI = *I;
     bool DoIncr = true;
     bool DidFinishLoop = true;
-    for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
-      if (!MI.getOperand(i).isFI())
-        continue;
 
+    if (MI.isDebugCallSite()) {
+      auto It = MI.getIterator();
+      while (It->isBundledWithSucc()) {
+        It++;
+        if (It->getOperand(2).isFI())
+          handleDebugInstr(*It, 2);
+      }
+    } else if (MI.isDebugValue() && MI.getOperand(0).isFI()) {
       // Frame indices in debug values are encoded in a target independent
       // way with simply the frame index and offset rather than any
       // target-specific addressing mode.
-      if (MI.isDebugValue()) {
-        assert(i == 0 && "Frame indices can only appear as the first "
-                         "operand of a DBG_VALUE machine instruction");
-        unsigned Reg;
-        int64_t Offset =
-            TFI->getFrameIndexReference(MF, MI.getOperand(0).getIndex(), Reg);
-        MI.getOperand(0).ChangeToRegister(Reg, false /*isDef*/);
-        MI.getOperand(0).setIsDebug();
-        auto *DIExpr = DIExpression::prepend(MI.getDebugExpression(),
-                                             DIExpression::NoDeref, Offset);
-        MI.getOperand(3).setMetadata(DIExpr);
+      handleDebugInstr(MI, 0);
+    } else {
+      for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
+        if (!MI.getOperand(i).isFI())
           continue;
-      }
 
         // TODO: This code should be commoned with the code for
         // PATCHPOINT. There's no good reason for the difference in
         // implementation other than historical accident.  The only
         // remaining difference is the unconditional use of the stack
         // pointer as the base register.
         if (MI.getOpcode() == TargetOpcode::STATEPOINT) {
           assert((!MI.isDebugValue() || i == 0) &&
                  "Frame indicies can only appear as the first operand of a "
                  "DBG_VALUE machine instruction");
           unsigned Reg;
           MachineOperand &Offset = MI.getOperand(i + 1);
           int refOffset = TFI->getFrameIndexReferencePreferSP(
               MF, MI.getOperand(i).getIndex(), Reg, /*IgnoreSPUpdates*/ false);
           Offset.setImm(Offset.getImm() + refOffset + SPAdj);
           MI.getOperand(i).ChangeToRegister(Reg, false /*isDef*/);
           continue;
         }
 
         // Some instructions (e.g. inline asm instructions) can have
         // multiple frame indices and/or cause eliminateFrameIndex
         // to insert more than one instruction. We need the register
         // scavenger to go through all of these instructions so that
         // it can update its register information. We keep the
         // iterator at the point before insertion so that we can
         // revisit them in full.
         bool AtBeginning = (I == BB->begin());
-      if (!AtBeginning) --I;
+        if (!AtBeginning)
+          --I;
 
         // If this instruction has a FrameIndex operand, we need to
         // use that target machine register info object to eliminate
         // it.
         TRI.eliminateFrameIndex(MI, SPAdj, i,
-                              FrameIndexEliminationScavenging ?  RS : nullptr);
+                                FrameIndexEliminationScavenging ? RS : nullptr);
 
         // Reset the iterator if we were at the beginning of the BB.
         if (AtBeginning) {
           I = BB->begin();
           DoIncr = false;
         }
 
         DidFinishLoop = false;
         break;
       }
+    }
 
     // If we are looking at a call sequence, we need to keep track of
     // the SP adjustment made by each instruction in the sequence.
     // This includes both the frame setup/destroy pseudos (handled above),
     // as well as other instructions that have side effects w.r.t the SP.
     // Note that this must come after eliminateFrameIndex, because
     // if I itself referred to a frame index, we shouldn't count its own
     // adjustment.

lib/CodeGen/RegAllocFast.cpp

void RegAllocFast::allocateBasicBlock(MachineBasicBlock &MBB) {
 
   // Otherwise, sequentially allocate each instruction in the MBB.
   for (MachineInstr &MI : MBB) {
     LLVM_DEBUG(
       dbgs() << "\n>> " << MI << "Regs:";
       dumpState()
     );
 
+    if (MI.isDebugCallSite() || MI.isDebugCallSiteParam())
+      continue;
+
     // Special handling for debug values. Note that they are not allowed to
     // affect codegen of the other instructions in any way.
     if (MI.isDebugValue()) {
       handleDebugValue(MI);
       continue;
     }
 
     allocateInstruction(MI);

lib/CodeGen/RegisterCoalescer.cpp

RegisterCoalescer::removeCopyByCommutingDef(const CoalescerPair &CP,
   for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(IntA.reg),
                                          UE = MRI->use_end();
        UI != UE; /* ++UI is below because of possible MI removal */) {
     MachineOperand &UseMO = *UI;
     ++UI;
     if (UseMO.isUndef())
       continue;
     MachineInstr *UseMI = UseMO.getParent();
-    if (UseMI->isDebugValue()) {
+    if (UseMI->isDebugInstr()) {
       // FIXME These don't have an instruction index.  Not clear we have enough
       // info to decide whether to do this replacement or not.  For now do it.
       UseMO.setReg(NewReg);
       continue;
     }
     SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI).getRegSlot(true);
     LiveInterval::iterator US = IntA.FindSegmentContaining(UseIdx);
     assert(US != IntA.end() && "Use must be live");
for (unsigned i = 0, e = NewMIImplDefs.size(); i != e; ++i) {
     for (MCRegUnitIterator Units(Reg, TRI); Units.isValid(); ++Units)
       if (LiveRange *LR = LIS->getCachedRegUnit(*Units))
         LR->createDeadDef(NewMIIdx.getRegSlot(), LIS->getVNInfoAllocator());
   }
 
   LLVM_DEBUG(dbgs() << "Remat: " << NewMI);
   ++NumReMats;
 
-  // If the virtual SrcReg is completely eliminated, update all DBG_VALUEs
-  // to describe DstReg instead.
+  CalleeSavedRegChecker CalleeSavedRegs(MF);
+  // If the virtual SrcReg is completely eliminated, update all dbginfo
+  // instructions to describe DstReg instead.
   if (MRI->use_nodbg_empty(SrcReg)) {
     for (MachineOperand &UseMO : MRI->use_operands(SrcReg)) {
       MachineInstr *UseMI = UseMO.getParent();
-      if (UseMI->isDebugValue()) {
-        if (TargetRegisterInfo::isPhysicalRegister(DstReg))
-          UseMO.substPhysReg(DstReg, *TRI);
+      // Sometimes global objects, like raw string of charachets, could
+      // be loaded into register that carries that function parameter.
+      // We track that global in DBG_CALLSITEPARAM.
+      if (UseMI->isDebugCallSiteParam() &&
+          DefMI->getNumOperands() == 2 &&
+          DefMI->getOperand(1).isGlobal() &&
+          DstReg == UseMI->getOperand(0).getReg()) {
+
+        auto RIt = UseMI->getReverseIterator();
+        while(!RIt->isDebugCallSite()) RIt++;
+        MachineInstr *NewInstr =
+          buildDbgCallParamForGlobal(*UseMI, DefMI->getOperand(1).getGlobal());
+        UseMI->eraseFromBundle();
+        MIBundleBuilder(&*RIt).append(NewInstr);
+        LLVM_DEBUG(dbgs() << "\t\tupdated: " << *UseMI);
+      } else if (UseMI->isDebugInstr()) {
+        if (TargetRegisterInfo::isPhysicalRegister(DstReg)) {
+          if (UseMI->isDebugCallSiteParam() &&
+              !CalleeSavedRegs.isCalleeSaved(DstReg))
+            invalidateParamLocation(UseMI);
           else
+            UseMO.substPhysReg(DstReg, *TRI);
+        } else
           UseMO.setReg(DstReg);
         // Move the debug value directly after the def of the rematerialized
         // value in DstReg.
+        if (UseMI->isDebugValue())
           MBB->splice(std::next(NewMI.getIterator()), UseMI->getParent(), UseMI);
         LLVM_DEBUG(dbgs() << "\t\tupdated: " << *UseMI);
       }
     }
   }
 
   if (ToBeUpdated.count(SrcReg))
     return true;
 
void RegisterCoalescer::updateRegDefsUses(unsigned SrcReg,
   LiveInterval *DstInt = DstIsPhys ? nullptr : &LIS->getInterval(DstReg);
 
   if (DstInt && DstInt->hasSubRanges() && DstReg != SrcReg) {
     for (MachineOperand &MO : MRI->reg_operands(DstReg)) {
       unsigned SubReg = MO.getSubReg();
       if (SubReg == 0 || MO.isUndef())
         continue;
       MachineInstr &MI = *MO.getParent();
-      if (MI.isDebugValue())
+      if (MI.isDebugInstr())
         continue;
       SlotIndex UseIdx = LIS->getInstructionIndex(MI).getRegSlot(true);
       addUndefFlag(*DstInt, UseIdx, MO, SubReg);
     }
   }
 
   SmallPtrSet<MachineInstr*, 8> Visited;
   for (MachineRegisterInfo::reg_instr_iterator
if (SrcReg == DstReg && !Visited.insert(UseMI).second)
       continue;
 
     SmallVector<unsigned,8> Ops;
     bool Reads, Writes;
     std::tie(Reads, Writes) = UseMI->readsWritesVirtualRegister(SrcReg, &Ops);
 
     // If SrcReg wasn't read, it may still be the case that DstReg is live-in
     // because SrcReg is a sub-register.
-    if (DstInt && !Reads && SubIdx && !UseMI->isDebugValue())
+    if (DstInt && !Reads && SubIdx && !UseMI->isDebugInstr())
       Reads = DstInt->liveAt(LIS->getInstructionIndex(*UseMI));
 
     // Replace SrcReg with DstReg in all UseMI operands.
     for (unsigned i = 0, e = Ops.size(); i != e; ++i) {
       MachineOperand &MO = UseMI->getOperand(Ops[i]);
 
       // Adjust <undef> flags in case of sub-register joins. We don't want to
       // turn a full def into a read-modify-write sub-register def and vice
       // versa.
       if (SubIdx && MO.isDef())
         MO.setIsUndef(!Reads);
 
       // A subreg use of a partially undef (super) register may be a complete
       // undef use now and then has to be marked that way.
       if (SubIdx != 0 && MO.isUse() && MRI->shouldTrackSubRegLiveness(DstReg)) {
         if (!DstInt->hasSubRanges()) {
           BumpPtrAllocator &Allocator = LIS->getVNInfoAllocator();
           LaneBitmask Mask = MRI->getMaxLaneMaskForVReg(DstInt->reg);
           DstInt->createSubRangeFrom(Allocator, Mask, *DstInt);
         }
-        SlotIndex MIIdx = UseMI->isDebugValue()
+        SlotIndex MIIdx = UseMI->isDebugInstr()
                               ? LIS->getSlotIndexes()->getIndexBefore(*UseMI)
                               : LIS->getInstructionIndex(*UseMI);
         SlotIndex UseIdx = MIIdx.getRegSlot(true);
         addUndefFlag(*DstInt, UseIdx, MO, SubIdx);
       }
 
       if (DstIsPhys)
         MO.substPhysReg(DstReg, *TRI);
       else
         MO.substVirtReg(DstReg, SubIdx, *TRI);
     }
 
     LLVM_DEBUG({
       dbgs() << "\t\tupdated: ";
-      if (!UseMI->isDebugValue())
+      if (!UseMI->isDebugInstr())
         dbgs() << LIS->getInstructionIndex(*UseMI) << "\t";
       dbgs() << *UseMI;
     });
   }
 }
 
 bool RegisterCoalescer::canJoinPhys(const CoalescerPair &CP) {
   // Always join simple intervals that are defined by a single copy from a

lib/CodeGen/ScheduleDAGInstrs.cpp

for (MachineBasicBlock::iterator MII = RegionEnd, MIE = RegionBegin;
 
     if (MI.isDebugValue()) {
       DbgMI = &MI;
       continue;
     }
     if (MI.isDebugLabel())
       continue;
 
+    if (MI.isDebugCallSite() || MI.isDebugCallSiteParam())
+      continue;
+
     SUnit *SU = MISUnitMap[&MI];
     assert(SU && "No SUnit mapped to this MI");
 
     if (RPTracker) {
       RegisterOperands RegOpers;
       RegOpers.collect(MI, *TRI, MRI, TrackLaneMasks, false);
       if (TrackLaneMasks) {
         SlotIndex SlotIdx = LIS->getInstructionIndex(MI);

lib/CodeGen/SplitKit.cpp

for (const VNInfo *V : PS.valnos) {
                    &LIS.getVNInfoAllocator());
       Undefs.clear();
       LI.computeSubRangeUndefs(Undefs, PS.LaneMask, MRI, *LIS.getSlotIndexes());
       extendPHIRange(B, SubLRC, S, PS.LaneMask, Undefs);
     }
   }
 }
 
+/// For dbg call instructions we search back to the instruction that loads
+/// parameter carrying register and take its slot index in order to perform
+/// same subsitution that is done for that that instruction. If we do not
+/// find such instruction (because it may be in other block) we set it as
+/// undef reg.
+static MachineInstr *getParamLoadingInstr(MachineInstr *MI) {
+  auto It = MI->getReverseIterator();
+  unsigned Reg = MI->getOperand(0).getReg();
+  auto End = It->getParent()->rend();
+  It++;
+  while (It != End) {
+    if (It->isCopy()) {
+      if (It->getOperand(0).isReg() && It->getOperand(0).getReg() == Reg)
+        return &*It;
+    }
+    It++;
+  }
+  return nullptr;
+}
+
+/// Rewrite register that holds indirect call.
+static bool updateDbgCallSiteInstr(MachineInstr *MI) {
+  auto It = MI->getReverseIterator();
+  unsigned Reg = MI->getOperand(1).getReg();
+  auto End = It->getParent()->rend();
+  It++;
+  while (It != End) {
+    if (It->isCopy()) {
+      if (It->getOperand(1).isReg() && It->getOperand(1).getReg() == Reg) {
+        MI->getOperand(1).setReg(It->getOperand(0).getReg());
+        return true;
+      }
+    }
+    It++;
+  }
+  return false;
+}
+
 /// rewriteAssigned - Rewrite all uses of Edit->getReg().
 void SplitEditor::rewriteAssigned(bool ExtendRanges) {
   struct ExtPoint {
     ExtPoint(const MachineOperand &O, unsigned R, SlotIndex N)
       : MO(O), RegIdx(R), Next(N) {}
 
     MachineOperand MO;
     unsigned RegIdx;
if (MI->isDebugValue()) {
       LLVM_DEBUG(dbgs() << "Zapping " << *MI);
       MO.setReg(0);
       continue;
     }
 
     // <undef> operands don't really read the register, so it doesn't matter
     // which register we choose.  When the use operand is tied to a def, we must
     // use the same register as the def, so just do that always.
-    SlotIndex Idx = LIS.getInstructionIndex(*MI);
+    bool isDbgCallSite = MI->isDebugCallSite() || MI->isDebugCallSiteParam();
+    SlotIndex Idx;
+    if (MI->isDebugCallSiteParam()) {
+      if (MachineInstr *NonDbgInstr = getParamLoadingInstr(MI)) {
+        Idx = LIS.getInstructionIndex(*NonDbgInstr);
+      } else {
+        invalidateParamLocation(MI);
+        continue;
+      }
+    } else if (MI->isDebugCallSite()) {
+      if (updateDbgCallSiteInstr(MI))
+        continue;
+      else {
+        MI->eraseFromParent();
+        continue;
+      }
+    } else
+      Idx = LIS.getInstructionIndex(*MI);
+
     if (MO.isDef() || MO.isUndef())
       Idx = Idx.getRegSlot(MO.isEarlyClobber());
 
     // Rewrite to the mapped register at Idx.
     unsigned RegIdx = RegAssign.lookup(Idx);
     LiveInterval &LI = LIS.getInterval(Edit->get(RegIdx));
     MO.setReg(LI.reg);
     LLVM_DEBUG(dbgs() << "  rewr " << printMBBReference(*MI->getParent())
                       << '\t' << Idx << ':' << RegIdx << '\t' << *MI);
 
     // Extend liveness to Idx if the instruction reads reg.
-    if (!ExtendRanges || MO.isUndef())
+    if (!ExtendRanges || MO.isUndef() || isDbgCallSite)
       continue;
 
     // Skip instructions that don't read Reg.
     if (MO.isDef()) {
       if (!MO.getSubReg() && !MO.isEarlyClobber())
         continue;
       // We may want to extend a live range for a partial redef, or for a use
       // tied to an early clobber.

lib/CodeGen/StackColoring.cpp

for (const std::pair<int, int> &SI : SlotRemap) {
     // Note that this will not replace uses in MMOs (which we'll update below),
     // or anywhere else (which is why we won't delete the original
     // instruction).
     FromAI->replaceAllUsesWith(Inst);
   }
 
   // Remap all instructions to the new stack slots.
   for (MachineBasicBlock &BB : *MF)
-    for (MachineInstr &I : BB) {
+    for (MachineInstr &I : BB.instrs()) {
       // Skip lifetime markers. We'll remove them soon.
       if (I.getOpcode() == TargetOpcode::LIFETIME_START ||
           I.getOpcode() == TargetOpcode::LIFETIME_END)
         continue;
 
       // Update the MachineMemOperand to use the new alloca.
       for (MachineMemOperand *MMO : I.memoperands()) {
         // We've replaced IR-level uses of the remapped allocas, so we only

lib/CodeGen/StackSlotColoring.cpp

for (unsigned SS = 0, SE = SSRefs.size(); SS != SE; ++SS) {
     const PseudoSourceValue *NewSV = MF.getPSVManager().getFixedStack(NewFI);
     SmallVectorImpl<MachineMemOperand *> &RefMMOs = SSRefs[SS];
     for (unsigned i = 0, e = RefMMOs.size(); i != e; ++i)
       RefMMOs[i]->setValue(NewSV);
   }
 
   // Rewrite all MO_FrameIndex operands.  Look for dead stores.
   for (MachineBasicBlock &MBB : MF) {
-    for (MachineInstr &MI : MBB)
+    for (MachineInstr &MI : MBB.instrs())
       RewriteInstruction(MI, SlotMapping, MF);
     RemoveDeadStores(&MBB);
   }
 
   // Delete unused stack slots.
   for (int StackID = 0, E = AllColors.size(); StackID != E; ++StackID) {
     int NextColor = NextColors[StackID];
     while (NextColor != -1) {
       LLVM_DEBUG(dbgs() << "Removing unused stack object fi#" << NextColor << "\n");

lib/CodeGen/TailDuplicator.cpp

for (unsigned i = 0, e = SSAUpdateVRs.size(); i != e; ++i) {
         ++UI;
         if (UseMI->isDebugValue()) {
           // SSAUpdate can replace the use with an undef. That creates
           // a debug instruction that is a kill.
           // FIXME: Should it SSAUpdate job to delete debug instructions
           // instead of replacing the use with undef?
           UseMI->eraseFromParent();
           continue;
+        } else if (UseMI->isDebugCallSiteParam()) {
+          UseMI->eraseFromBundle();
+          continue;
         }
         if (UseMI->getParent() == DefBB && !UseMI->isPHI())
           continue;
         SSAUpdate.RewriteUse(UseMO);
       }
     }
 
     SSAUpdateVRs.clear();

lib/CodeGen/VirtRegMap.cpp

 #include "llvm/CodeGen/LiveInterval.h"
 #include "llvm/CodeGen/LiveIntervals.h"
 #include "llvm/CodeGen/LiveStacks.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineOperand.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/SlotIndexes.h"
 #include "llvm/CodeGen/TargetInstrInfo.h"
 #include "llvm/CodeGen/TargetOpcodes.h"
 #include "llvm/CodeGen/TargetRegisterInfo.h"
 #include "llvm/CodeGen/TargetSubtargetInfo.h"
 #include "llvm/Config/llvm-config.h"
 #include "llvm/MC/LaneBitmask.h"
 #include "llvm/Pass.h"
 #include "llvm/Support/Compiler.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/raw_ostream.h"
 #include <cassert>
 #include <iterator>
 #include <utility>
 
 using namespace llvm;
 
 #define DEBUG_TYPE "regalloc"
 
 STATISTIC(NumSpillSlots, "Number of spill slots allocated");
 STATISTIC(NumIdCopies,   "Number of identity moves eliminated after rewriting");
+STATISTIC(NumCSDeleted,  "Number of deleted call site parameter information");
 
 //===----------------------------------------------------------------------===//
 //  VirtRegMap implementation
 //===----------------------------------------------------------------------===//
 
 char VirtRegMap::ID = 0;
 
 INITIALIZE_PASS(VirtRegMap, "virtregmap", "Virtual Register Map", false, false)
class VirtRegRewriter : public MachineFunctionPass {
   LiveIntervals *LIS;
   VirtRegMap *VRM;
 
   void rewrite();
   void addMBBLiveIns();
   bool readsUndefSubreg(const MachineOperand &MO) const;
   void addLiveInsForSubRanges(const LiveInterval &LI, unsigned PhysReg) const;
   void handleIdentityCopy(MachineInstr &MI) const;
+  void handleCallSiteIdentities(MachineInstr &MI) const;
   void expandCopyBundle(MachineInstr &MI) const;
   bool subRegLiveThrough(const MachineInstr &MI, unsigned SuperPhysReg) const;
 
 public:
   static char ID;
 
   VirtRegRewriter() : MachineFunctionPass(ID) {}
 
for (MCRegUnitIterator Unit(SuperPhysReg, TRI); Unit.isValid(); ++Unit) {
     // Thus, vreg and RU interferes and vreg cannot be assigned to
     // SuperPhysReg. Therefore, this situation cannot happen.
     if (UnitRange.liveAt(AfterMIDefs) && UnitRange.liveAt(BeforeMIUses))
       return true;
   }
   return false;
 }
 
+void VirtRegRewriter::handleCallSiteIdentities(MachineInstr &MI) const {
+  assert(MI.isDebugCallSiteParam() && "This method handles only call" &&
+         "site params");
+
+  // If we have overlapping registers check whether backup location
+  // description based on variable and expression over variable exists.
+  // If not, delete this call site parameter location.
+  if(invalidateParamLocation(&MI))
+    NumCSDeleted++;
+}
+
 void VirtRegRewriter::rewrite() {
   bool NoSubRegLiveness = !MRI->subRegLivenessEnabled();
   SmallVector<unsigned, 8> SuperDeads;
   SmallVector<unsigned, 8> SuperDefs;
   SmallVector<unsigned, 8> SuperKills;
+  CalleeSavedRegChecker CalleeSavedRegs(MF);
 
   for (MachineFunction::iterator MBBI = MF->begin(), MBBE = MF->end();
        MBBI != MBBE; ++MBBI) {
     LLVM_DEBUG(MBBI->print(dbgs(), Indexes));
     for (MachineBasicBlock::instr_iterator
            MII = MBBI->instr_begin(), MIE = MBBI->instr_end(); MII != MIE;) {
       MachineInstr *MI = &*MII;
       ++MII;
 
+      bool earlyDbgCSExit = false;
       for (MachineInstr::mop_iterator MOI = MI->operands_begin(),
            MOE = MI->operands_end(); MOI != MOE; ++MOI) {
         MachineOperand &MO = *MOI;
 
         // Make sure MRI knows about registers clobbered by regmasks.
         if (MO.isRegMask())
           MRI->addPhysRegsUsedFromRegMask(MO.getRegMask());
 
         if (!MO.isReg() || !TargetRegisterInfo::isVirtualRegister(MO.getReg()))
           continue;
         unsigned VirtReg = MO.getReg();
         unsigned PhysReg = VRM->getPhys(VirtReg);
+
+        if (MI->isDebugCallSiteParam()) {
+          if (PhysReg == VirtRegMap::NO_PHYS_REG) {
+            // This Condition should be revisited and removed. Such
+            // situation should not occur. If it occurs it means that
+            // we have not handled virtual register or call site parameter
+            // properly - we didn't changed it to its new virtual/physical
+            // register
+            // location or to proper frame location.
+            LLVM_DEBUG(dbgs() << "Setting call parameter location as invalid "
+                              << *MI);
+            if (invalidateParamLocation(MI))
+              NumCSDeleted++;
+            earlyDbgCSExit = true;
+            break;
+          } else if (!CalleeSavedRegs.isCalleeSaved(PhysReg)) {
+            if (MI->getOperand(0).getReg() == PhysReg)
+              handleCallSiteIdentities(*MI);
+            else if (invalidateParamLocation(MI))
+              NumCSDeleted++;
+            earlyDbgCSExit = true;
+            break;
+          }
+        }
+
         assert(PhysReg != VirtRegMap::NO_PHYS_REG &&
                "Instruction uses unmapped VirtReg");
         assert(!MRI->isReserved(PhysReg) && "Reserved register assignment");
 
         // Preserve semantics of sub-register operands.
         unsigned SubReg = MO.getSubReg();
         if (SubReg != 0) {
           if (NoSubRegLiveness || !MRI->shouldTrackSubRegLiveness(VirtReg)) {
for (MachineBasicBlock::instr_iterator
           MO.setSubReg(0);
         }
         // Rewrite. Note we could have used MachineOperand::substPhysReg(), but
         // we need the inlining here.
         MO.setReg(PhysReg);
         MO.setIsRenamable(true);
       }
 
+      if (earlyDbgCSExit)
+        continue;
+
       // Add any missing super-register kills after rewriting the whole
       // instruction.
       while (!SuperKills.empty())
         MI->addRegisterKilled(SuperKills.pop_back_val(), TRI, true);
 
       while (!SuperDeads.empty())
         MI->addRegisterDead(SuperDeads.pop_back_val(), TRI, true);
 

lib/IR/DebugInfoMetadata.cpp

for (auto I = expr_op_begin(), E = expr_op_end(); I != E; ++I) {
     case dwarf::DW_OP_xor:
     case dwarf::DW_OP_shl:
     case dwarf::DW_OP_shr:
     case dwarf::DW_OP_shra:
     case dwarf::DW_OP_deref:
     case dwarf::DW_OP_xderef:
     case dwarf::DW_OP_neg:
     case dwarf::DW_OP_push_object_address:
+    case dwarf::DW_OP_GNU_entry_value:
     case dwarf::DW_OP_not:
     case dwarf::DW_OP_dup:
       break;
     }
   }
   return true;
 }
 
return DIExpression::get(Expr->getContext(),
                              makeArrayRef(&*Expr->Elements.begin(),
                                           Expr->Elements.size() - PatternSize));
   }
   return Expr;
 }
 
 DIExpression *DIExpression::prepend(const DIExpression *Expr, bool DerefBefore,
                                     int64_t Offset, bool DerefAfter,
-                                    bool StackValue) {
+                                    bool StackValue, bool EntryValue) {
   SmallVector<uint64_t, 8> Ops;
   if (DerefBefore)
     Ops.push_back(dwarf::DW_OP_deref);
 
   appendOffset(Ops, Offset);
   if (DerefAfter)
     Ops.push_back(dwarf::DW_OP_deref);
 
-  return prependOpcodes(Expr, Ops, StackValue);
+  return prependOpcodes(Expr, Ops, StackValue, EntryValue);
 }
 
 DIExpression *DIExpression::prependOpcodes(const DIExpression *Expr,
                                            SmallVectorImpl<uint64_t> &Ops,
-                                           bool StackValue) {
+                                           bool StackValue, bool EntryValue) {
   assert(Expr && "Can't prepend ops to this expression");
 
+  if (EntryValue)
+    Ops.push_back(dwarf::DW_OP_GNU_entry_value);
+
   // If there are no ops to prepend, do not even add the DW_OP_stack_value.
   if (Ops.empty())
     StackValue = false;
   for (auto Op : Expr->expr_ops()) {
     // A DW_OP_stack_value comes at the end, but before a DW_OP_LLVM_fragment.
     if (StackValue) {
       if (Op.getOp() == dwarf::DW_OP_stack_value)
         StackValue = false;

lib/Target/Mips/MipsAsmPrinter.cpp

if (MI->isDebugValue()) {
     raw_svector_ostream OS(Str);
 
     PrintDebugValueComment(MI, OS);
     return;
   }
   if (MI->isDebugLabel())
     return;
 
+  if (MI->isDebugCallSite() || MI->isDebugCallSiteParam())
+    return;
+
   // If we just ended a constant pool, mark it as such.
   if (InConstantPool && Opc != Mips::CONSTPOOL_ENTRY) {
     OutStreamer->EmitDataRegion(MCDR_DataRegionEnd);
     InConstantPool = false;
   }
   if (Opc == Mips::CONSTPOOL_ENTRY) {
     // CONSTPOOL_ENTRY - This instruction represents a floating
     // constant pool in the function.  The first operand is the ID#

lib/Target/X86/X86CallFrameOptimization.cpp

void X86CallFrameOptimization::collectCallInfo(MachineFunction &MF,
   --I;
 
   // We now expect the end of the sequence. If we stopped early,
   // or reached the end of the block without finding a call, bail.
   if (I == MBB.end() || !I->isCall())
     return;
 
   Context.Call = &*I;
-  if ((++I)->getOpcode() != TII->getCallFrameDestroyOpcode())
+   // Skip over debug instructions. Most of the times it is debug info
+  // for call site.
+  while((++I)->isDebugInstr());
+  if (I->getOpcode() != TII->getCallFrameDestroyOpcode())
     return;
 
   // Now, go through the vector, and see that we don't have any gaps,
   // but only a series of storing instructions.
   auto MMI = Context.ArgStoreVector.begin(), MME = Context.ArgStoreVector.end();
   for (; MMI != MME; ++MMI, Context.ExpectedDist += SlotSize)
     if (*MMI == nullptr)
       break;

lib/Target/X86/X86FrameLowering.cpp

void X86FrameLowering::emitEpilogue(MachineFunction &MF,
   }
 
   MachineBasicBlock::iterator FirstCSPop = MBBI;
   // Skip the callee-saved pop instructions.
   while (MBBI != MBB.begin()) {
     MachineBasicBlock::iterator PI = std::prev(MBBI);
     unsigned Opc = PI->getOpcode();
 
-    if (Opc != X86::DBG_VALUE && !PI->isTerminator()) {
+    if (Opc != X86::DBG_CALLSITE && Opc != X86::DBG_CALLSITEPARAM &&
+        Opc != X86::DBG_VALUE && !PI->isTerminator()) {
       if ((Opc != X86::POP32r || !PI->getFlag(MachineInstr::FrameDestroy)) &&
           (Opc != X86::POP64r || !PI->getFlag(MachineInstr::FrameDestroy)))
         break;
       FirstCSPop = PI;
     }
 
     --MBBI;
   }

test/DebugInfo/MIR/X86/dbginfo-loading-stack-param.mir

+# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=greedy %s -o -| FileCheck %s
+# CHECK-NOT: DBG_CALLSITEPARAM $xmm0, !15, %7
+# CHECK: DBG_CALLSITEPARAM $xmm0, !15, %stack.0
+# Frist check is for checking call dbg info virtual register spliting from
+# SplitEditor::rewriteAssigned.
+# Second check is for testing when virtual register is replaced with
+# frame object.
+# Test is produced from code:
+# extern float externFunc(float);
+# extern float externFunc2(float);
+#
+# float foo(float arg1) {
+#   float result = 0;
+#   if (arg1 > 10.1231) {
+#     result += externFunc(arg1);
+#   }
+#   else {
+#     arg1 += 10;
+#     result = externFunc2(arg1);
+#     result += externFunc(arg1);
+#   }
+#   return result;
+# }
+
+--- |
+  ; ModuleID = 'dbginfo-loading-stack-param.ll'
+  source_filename = "dbginfo-loading-stack-param.c"
+  target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+  target triple = "x86_64-unknown-linux-gnu"
+
+  define float @foo(float %arg1) local_unnamed_addr !dbg !6 {
+  entry:
+    %conv = fpext float %arg1 to double, !dbg !21
+    %cmp = fcmp ogt double %conv, 1.012310e+01, !dbg !21
+    br i1 %cmp, label %if.then, label %if.else, !dbg !21
+
+  if.then:                                          ; preds = %entry
+    %call = tail call float @externFunc(float %arg1), !dbg !21, !CallSite !11
+    br label %if.end, !dbg !21
+
+  if.else:                                          ; preds = %entry
+    %add2 = fadd float %arg1, 1.000000e+01, !dbg !21
+    %call3 = tail call float @externFunc2(float %add2), !dbg !21, !CallSite !17
+    %call4 = tail call float @externFunc(float %add2), !dbg !21, !CallSite !20
+    br label %if.end
+
+  if.end:                                           ; preds = %if.else, %if.then
+    %call4.sink = phi float [ %call4, %if.else ], [ 0.000000e+00, %if.then ]
+    %call3.sink = phi float [ %call3, %if.else ], [ %call, %if.then ]
+    %add5 = fadd float %call4.sink, %call3.sink
+    ret float %add5, !dbg !21
+  }
+
+  declare float @externFunc(float) local_unnamed_addr
+
+  declare float @externFunc2(float) local_unnamed_addr
+
+  ; Function Attrs: nounwind
+  declare void @llvm.stackprotector(i8*, i8**) #0
+
+  attributes #0 = { nounwind }
+
+  !llvm.dbg.cu = !{!0}
+  !llvm.module.flags = !{!3, !4}
+  !llvm.ident = !{!5}
+
+  !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 4.0.0", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
+  !1 = !DIFile(filename: "dbginfo-loading-stack-param.c", directory: "/")
+  !2 = !{}
+  !3 = !{i32 2, !"Dwarf Version", i32 4}
+  !4 = !{i32 2, !"Debug Info Version", i32 3}
+  !5 = !{!"clang version 4.0.0"}
+  !6 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 4, type: !7, isLocal: false, isDefinition: true, scopeLine: 4, flags: DIFlagPrototyped, isOptimized: true, unit: !0, retainedNodes: !10)
+  !7 = !DISubroutineType(types: !8)
+  !8 = !{!9, !9}
+  !9 = !DIBasicType(name: "float", size: 32, encoding: DW_ATE_float)
+  !10 = !{!11, !17, !20}
+  !11 = !DICallSite(scope: !12, file: !1, parameters: !14, line: 7, calledSubprogram: !16)
+  !12 = distinct !DILexicalBlock(scope: !13, file: !1, line: 6, column: 22)
+  !13 = distinct !DILexicalBlock(scope: !6, file: !1, line: 6, column: 6)
+  !14 = !{!15}
+  !15 = !DICallSiteParam(argno: 1, expr: !DIExpression())
+  !16 = !DISubprogram(name: "externFunc", scope: !1, file: !1, line: 1, isLocal: false, isDefinition: false, flags: DIFlagPrototyped, isOptimized: true, retainedNodes: !2)
+  !17 = !DICallSite(scope: !18, file: !1, parameters: !14, line: 11, calledSubprogram: !19)
+  !18 = distinct !DILexicalBlock(scope: !13, file: !1, line: 9, column: 7)
+  !19 = !DISubprogram(name: "externFunc2", scope: !1, file: !1, line: 2, isLocal: false, isDefinition: false, flags: DIFlagPrototyped, isOptimized: true, retainedNodes: !2)
+  !20 = !DICallSite(scope: !18, file: !1, parameters: !14, line: 12, calledSubprogram: !16)
+  !21 = !DILocation(line: 4, column: 17, scope: !6)
+
+...
+---
+name:            foo
+alignment:       4
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: fr32 }
+  - { id: 1, class: fr32 }
+  - { id: 2, class: fr32 }
+  - { id: 3, class: fr32 }
+  - { id: 4, class: fr32 }
+  - { id: 5, class: fr32 }
+  - { id: 6, class: fr64 }
+  - { id: 7, class: fr32 }
+  - { id: 8, class: fr32 }
+  - { id: 9, class: fr32 }
+  - { id: 10, class: fr32 }
+  - { id: 11, class: fr32 }
+  - { id: 12, class: fr32 }
+  - { id: 13, class: fr32 }
+  - { id: 14, class: fr32 }
+liveins:
+  - { reg: '$xmm0', virtual-reg: '%5' }
+frameInfo:
+  isFrameAddressTaken: false
+  isReturnAddressTaken: false
+  hasStackMap:     false
+  hasPatchPoint:   false
+  stackSize:       0
+  offsetAdjustment: 0
+  maxAlignment:    0
+  adjustsStack:    false
+  hasCalls:        true
+  maxCallFrameSize: 0
+  hasOpaqueSPAdjustment: false
+  hasVAStart:      false
+  hasMustTailInVarArgFunc: false
+constants:
+  - id:              0
+    value:           'double 1.012310e+01'
+    alignment:       8
+  - id:              1
+    value:           'float 1.000000e+01'
+    alignment:       4
+body:             |
+  bb.0.entry:
+    successors: %bb.1.if.then(0x40000000), %bb.2.if.else(0x40000000)
+    liveins: $xmm0
+
+    %7 = COPY $xmm0
+    %6 = CVTSS2SDrr %7, debug-location !21
+    UCOMISDrm %6, $rip, 1, $noreg, %const.0, $noreg, implicit-def $eflags, debug-location !21 :: (load 8 from constant-pool)
+    JBE_1 %bb.2.if.else, implicit killed $eflags, debug-location !21
+    JMP_1 %bb.1.if.then, debug-location !21
+
+  bb.1.if.then:
+    successors: %bb.3.if.end(0x80000000)
+
+    ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !21
+    $xmm0 = COPY %7, debug-location !21
+    CALL64pcrel32 @externFunc, csr_64, implicit $rsp, implicit $ssp, implicit $xmm0, implicit-def $rsp, implicit-def $ssp, implicit-def $xmm0, debug-location !21
+    DBG_CALLSITE 0, $noreg, !11, debug-location !21 {
+      DBG_CALLSITEPARAM $xmm0, !15, %7, $noreg, debug-location !21
+    }
+    ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !21
+    %14 = COPY $xmm0, debug-location !21
+    %13 = FsFLD0SS
+    JMP_1 %bb.3.if.end, debug-location !21
+
+  bb.2.if.else:
+    successors: %bb.3.if.end(0x80000000)
+
+    %7 = ADDSSrm %7, $rip, 1, $noreg, %const.1, $noreg, debug-location !21 :: (load 4 from constant-pool)
+    ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !21
+    $xmm0 = COPY %7, debug-location !21
+    CALL64pcrel32 @externFunc2, csr_64, implicit $rsp, implicit $ssp, implicit $xmm0, implicit-def $rsp, implicit-def $ssp, implicit-def $xmm0, debug-location !21
+    DBG_CALLSITE 0, $noreg, !17, debug-location !21 {
+      DBG_CALLSITEPARAM $xmm0, !15, %7, $noreg, debug-location !21
+    }
+    ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !21
+    %14 = COPY $xmm0, debug-location !21
+    ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !21
+    $xmm0 = COPY %7, debug-location !21
+    CALL64pcrel32 @externFunc, csr_64, implicit $rsp, implicit $ssp, implicit $xmm0, implicit-def $rsp, implicit-def $ssp, implicit-def $xmm0, debug-location !21
+    DBG_CALLSITE 0, $noreg, !20, debug-location !21 {
+      DBG_CALLSITEPARAM $xmm0, !15, %7, $noreg, debug-location !21
+    }
+    ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !21
+    %13 = COPY $xmm0, debug-location !21
+
+  bb.3.if.end:
+    %13 = ADDSSrr %13, %14
+    $xmm0 = COPY %13, debug-location !21
+    RET 0, $xmm0, debug-location !21
+
+...

test/DebugInfo/MIR/X86/dbginfo-param-replace-global.mir

+# RUN: llc -run-pass=simple-register-coalescing %s -o -| FileCheck %s
+# CHECK: DBG_CALLSITEPARAM $rdi, !16, @global, 0
+#int global = 1;
+#void baa(int *);
+#void foo() {
+#  baa(&global);
+#}
+
+--- |
+  ; ModuleID = 'dbginfo-param-replace-global.ll'
+  source_filename = "dbginfo-param-replace-global.c"
+  target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+  target triple = "x86_64-unknown-linux-gnu"
+
+  @global = global i32 1, align 4, !dbg !0
+
+  define void @foo() local_unnamed_addr !dbg !10 {
+  entry:
+    tail call void @baa(i32* nonnull @global), !dbg !18, !CallSite !14
+    ret void, !dbg !19
+  }
+
+  declare void @baa(i32*) local_unnamed_addr
+
+  ; Function Attrs: nounwind
+  declare void @llvm.stackprotector(i8*, i8**) #0
+
+  attributes #0 = { nounwind }
+
+  !llvm.dbg.cu = !{!2}
+  !llvm.module.flags = !{!7, !8}
+  !llvm.ident = !{!9}
+
+  !0 = !DIGlobalVariableExpression(var: !1, expr: !DIExpression())
+  !1 = distinct !DIGlobalVariable(name: "global", scope: !2, file: !3, line: 8, type: !6, isLocal: false, isDefinition: true)
+  !2 = distinct !DICompileUnit(language: DW_LANG_C99, file: !3, producer: "clang version 8.0.0", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !4, globals: !5)
+  !3 = !DIFile(filename: "dbginfo-param-replace-global.c", directory: "/")
+  !4 = !{}
+  !5 = !{!0}
+  !6 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+  !7 = !{i32 2, !"Dwarf Version", i32 4}
+  !8 = !{i32 2, !"Debug Info Version", i32 3}
+  !9 = !{!"clang version 4.0.0"}
+  !10 = distinct !DISubprogram(name: "foo", scope: !3, file: !3, line: 10, type: !11, isLocal: false, isDefinition: true, scopeLine: 10, isOptimized: true, unit: !2, retainedNodes: !13)
+  !11 = !DISubroutineType(types: !12)
+  !12 = !{null}
+  !13 = !{!14}
+  !14 = !DICallSite(scope: !10, file: !3, parameters: !15, line: 11, calledSubprogram: !17)
+  !15 = !{!16}
+  !16 = !DICallSiteParam(argno: 1, expr: !DIExpression())
+  !17 = !DISubprogram(name: "baa", scope: !3, file: !3, line: 9, isLocal: false, isDefinition: false, flags: DIFlagPrototyped, isOptimized: true, retainedNodes: !4)
+  !18 = !DILocation(line: 11, column: 3, scope: !10)
+  !19 = !DILocation(line: 12, column: 1, scope: !10)
+
+...
+---
+name:            foo
+alignment:       4
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+registers: 
+  - { id: 0, class: gr64 }
+frameInfo:
+  isFrameAddressTaken: false
+  isReturnAddressTaken: false
+  hasStackMap:     false
+  hasPatchPoint:   false
+  stackSize:       0
+  offsetAdjustment: 0
+  maxAlignment:    0
+  adjustsStack:    false
+  hasCalls:        false
+  maxCallFrameSize: 0
+  hasOpaqueSPAdjustment: false
+  hasVAStart:      false
+  hasMustTailInVarArgFunc: false
+body:             |
+  bb.0.entry:
+    %0:gr64 = MOV32ri64 @global, debug-location !18
+    $rdi = COPY %0:gr64, debug-location !18
+    TCRETURNdi64 @baa, 0, csr_64, implicit $rsp, implicit  killed $rdi, debug-location !18
+    DBG_CALLSITE 1, $noreg, !14, debug-location !18 {
+      DBG_CALLSITEPARAM debug-use $rdi, !16, debug-use %0, $noreg, debug-location !18
+    }
+...

test/DebugInfo/X86/transfer-call-param-sdnode.ll

+; RUN: llc -stop-after="expand-isel-pseudos" %s  -o -| FileCheck %s -check-prefix=DAG
+; RUN: llc %s  -o -| FileCheck %s
+; DAG: DBG_CALLSITEPARAM $edi
+;
+; CHECK: movl %eax, %edi
+; CHECK-NEXT: .Ltmp
+; CHECK-NEXT: jmp     use                     # TAILCALL
+; CHECK-NEXT: .Ltmp
+; CHECK-NEXT: #DEBUG_CALLSITE: foo: isTailCall: 1, register: %noreg0
+; CHECK-NOT: DBG_PARAM:  arg1: %edi <- %eax
+; void foo(int arg1) {
+;   int baa = arg1<<2;
+;   use(baa > 0 ? baa : -baa);
+; }
+
+
+; ModuleID = 'transfer-call-param-sdnode.c'
+source_filename = "transfer-call-param-sdnode.c"
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+; Function Attrs: nounwind uwtable
+define void @foo(i32 %arg1) local_unnamed_addr !dbg !6 {
+entry:
+  tail call void @llvm.dbg.value(metadata i32 %arg1, i64 0, metadata !12, metadata !DIExpression()), !dbg !17
+  %shl = shl i32 %arg1, 2, !dbg !18
+  tail call void @llvm.dbg.value(metadata i32 %shl, i64 0, metadata !11, metadata !DIExpression()), !dbg !19
+  %cmp = icmp sgt i32 %shl, 0, !dbg !20
+  %sub = sub nsw i32 0, %shl, !dbg !21
+  %cond = select i1 %cmp, i32 %shl, i32 %sub, !dbg !23
+  tail call void @use(i32 %cond), !dbg !24, !call_site !13
+  ret void, !dbg !26
+}
+
+declare void @use(i32) local_unnamed_addr
+
+; Function Attrs: nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata)
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!3, !4}
+!llvm.ident = !{!5}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 4.0.0", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
+!1 = !DIFile(filename: "transfer-call-param-sdnode.c", directory: "/")
+!2 = !{}
+!3 = !{i32 2, !"Dwarf Version", i32 4}
+!4 = !{i32 2, !"Debug Info Version", i32 3}
+!5 = !{!"clang version 4.0.0"}
+!6 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 9, type: !7, isLocal: false, isDefinition: true, scopeLine: 9, flags: DIFlagPrototyped, isOptimized: true, unit: !0, retainedNodes: !10)
+!7 = !DISubroutineType(types: !8)
+!8 = !{null, !9}
+!9 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+!10 = !{!11, !12, !13}
+!11 = !DILocalVariable(name: "baa", scope: !6, file: !1, line: 10, type: !9, flags: DIFlagArgumentNotModified)
+!12 = !DILocalVariable(name: "arg1", arg: 1, scope: !6, file: !1, line: 9, type: !9, flags: DIFlagArgumentNotModified)
+!13 = !DICallSite(scope: !6, file: !1, parameters: !14, line: 11, calledSubprogram: !16)
+!14 = !{!15}
+!15 = !DICallSiteParam(argno: 1, expr: !DIExpression())
+!16 = !DISubprogram(name: "use", scope: !1, file: !1, line: 8, isLocal: false, isDefinition: false, flags: DIFlagPrototyped, isOptimized: true, retainedNodes: !2)
+!17 = !DILocation(line: 9, column: 14, scope: !6)
+!18 = !DILocation(line: 10, column: 17, scope: !6)
+!19 = !DILocation(line: 10, column: 7, scope: !6)
+!20 = !DILocation(line: 11, column: 11, scope: !6)
+!21 = !DILocation(line: 11, column: 23, scope: !22)
+!22 = !DILexicalBlockFile(scope: !6, file: !1, discriminator: 2)
+!23 = !DILocation(line: 11, column: 7, scope: !6)
+!24 = !DILocation(line: 11, column: 3, scope: !25)
+!25 = !DILexicalBlockFile(scope: !6, file: !1, discriminator: 3)
+!26 = !DILocation(line: 12, column: 1, scope: !6)