bjope (Bjorn Pettersson)
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User Since
Sep 26 2016, 7:58 AM (63 w, 1 d)

Recent Activity

Today

bjope added a comment to D40455: Teach InlineCost about address spaces.

Actually the test seems to just cover the ptrtoint case. Need some for the GEP cases as well

Tue, Dec 12, 4:48 AM

Thu, Dec 7

bjope added inline comments to D37052: Add default address space for functions to the data layout (1/3).
Thu, Dec 7, 9:17 AM
bjope added inline comments to D37052: Add default address space for functions to the data layout (1/3).
Thu, Dec 7, 3:45 AM

Wed, Dec 6

bjope added inline comments to D40648: A few initializations to please Valgrind. NFC.
Wed, Dec 6, 7:12 AM

Tue, Dec 5

bjope committed rL319775: Add REQUIRES asserts in combine_loads_from_build_pair.ll.
Add REQUIRES asserts in combine_loads_from_build_pair.ll
Tue, Dec 5, 7:26 AM
bjope committed rL319771: [DAGCombine] Handle big endian correctly in CombineConsecutiveLoads.
[DAGCombine] Handle big endian correctly in CombineConsecutiveLoads
Tue, Dec 5, 6:50 AM
bjope closed D40444: [DAGCombine] Handle big endian correctly in CombineConsecutiveLoads by committing rL319771: [DAGCombine] Handle big endian correctly in CombineConsecutiveLoads.
Tue, Dec 5, 6:50 AM

Mon, Dec 4

bjope updated the summary of D40455: Teach InlineCost about address spaces.
Mon, Dec 4, 1:50 PM
bjope updated the summary of D40455: Teach InlineCost about address spaces.
Mon, Dec 4, 1:50 PM
bjope updated the diff for D40455: Teach InlineCost about address spaces.

Added some more tests.

Mon, Dec 4, 1:48 PM
bjope updated the diff for D40444: [DAGCombine] Handle big endian correctly in CombineConsecutiveLoads.

Added a test case that checks that the build_pair -> combine load transform is done during ISel.

Mon, Dec 4, 10:42 AM

Sun, Dec 3

bjope added a comment to D35985: Skip live range segment verification for reserved physregs.

I would expect the live ranges of register units that are reserved to be empty and therefore naturally pass verification. Do you know why you end up having non-empty information in those live ranges? We should identify the cause for that and fix it.

Sun, Dec 3, 2:57 AM

Thu, Nov 30

bjope added inline comments to D40339: Use getStoreSize() in various places instead of BitSize >> 3.
Thu, Nov 30, 3:17 PM

Tue, Nov 28

bjope added a comment to D40339: Use getStoreSize() in various places instead of BitSize >> 3.

Thanks for review. r319173.

BTW,

What about all the cases using Type* , like 'ByteSize = Ty->getSizeInBits() / 8;'... These should also be fixed, I presume, but I don't see a getStoreSize() method or similar in Type...

Also, with

diff --git a/include/llvm/IR/DebugInfoMetadata.h b/include/llvm/IR/DebugInfoMetadata.h
index c515f6d..a8aa195 100644
--- a/include/llvm/IR/DebugInfoMetadata.h
+++ b/include/llvm/IR/DebugInfoMetadata.h
@@ -594,6 +594,7 @@ public:
   unsigned getLine() const { return Line; }
   uint64_t getSizeInBits() const { return SizeInBits; }
   uint32_t getAlignInBits() const { return AlignInBits; }
+  uint64_t getSizeInBytes() const { return (SizeInBits < 8 ? 1 : SizeInBits >> 3); }
Tue, Nov 28, 8:14 AM
bjope accepted D40339: Use getStoreSize() in various places instead of BitSize >> 3.

LGTM

Tue, Nov 28, 4:38 AM

Mon, Nov 27

bjope added a comment to D40444: [DAGCombine] Handle big endian correctly in CombineConsecutiveLoads.

I've done a double check myself for all in-tree uses and all the uses of areNonVolatileConsecutiveLoads should be fine as well.

So modulo a test case this LGTM.

Mon, Nov 27, 8:41 AM
bjope added a comment to D40444: [DAGCombine] Handle big endian correctly in CombineConsecutiveLoads.

This endianness problem is probably also latent where do load combination, but we should sink this check into areNonVolatileConsecutiveLoads and MatchLoadCombine.

Mon, Nov 27, 7:16 AM

Sun, Nov 26

bjope added a comment to D37230: Set hasSideEffects=0 for TargetOpcode::BUNDLE.

A BUNDLE instruction is supposed to describe the combined properties of the bundled instructions (at least when it comes to machine operands). Properties like hasSideEffects/mayLoad/mayStore are static, so we can't update those properties for the BUNDLE instruction depending on the properties of the bundled instructions. So maybe it is a good idea to have the defensive approach of letting the BUNDLE instruction have hasSideEffects=1.

Sun, Nov 26, 10:59 AM

Sat, Nov 25

bjope added a reviewer for D40455: Teach InlineCost about address spaces: haicheng.
Sat, Nov 25, 10:20 AM
bjope added reviewers for D40455: Teach InlineCost about address spaces: chandlerc, arsenm.
Sat, Nov 25, 10:20 AM
bjope created D40455: Teach InlineCost about address spaces.
Sat, Nov 25, 6:17 AM
bjope added inline comments to D40064: Do not use default arguments of DataLayout::getPointer*. NFC.
Sat, Nov 25, 1:15 AM

Fri, Nov 24

bjope added reviewers for D40444: [DAGCombine] Handle big endian correctly in CombineConsecutiveLoads: niravd, hfinkel.
Fri, Nov 24, 9:29 AM
bjope created D40444: [DAGCombine] Handle big endian correctly in CombineConsecutiveLoads.
Fri, Nov 24, 9:21 AM
bjope added a comment to D40339: Use getStoreSize() in various places instead of BitSize >> 3.

I have no further comments. And it looks good from our out-of-tree-targets perspective.
In many situations I think this is NFC. For example the consecutive load/store optimizations have other checks verifying that the involved types are byte sized, so the end result will be the same.
But I haven't really reviewed the MIPS/Hexagon specific parts, and there are no test cases showing that something is more correct (I'm not sure all changes are NFC).

Fri, Nov 24, 7:08 AM

Thu, Nov 23

bjope added inline comments to D40339: Use getStoreSize() in various places instead of BitSize >> 3.
Thu, Nov 23, 10:15 AM

Nov 6 2017

bjope committed rL317513: [MIRPrinter] Use %subreg.xxx syntax for subregister index operands.
[MIRPrinter] Use %subreg.xxx syntax for subregister index operands
Nov 6 2017, 1:46 PM
bjope closed D39696: [MIRPrinter] Use %subreg.xxx syntax for subregister index operands by committing rL317513: [MIRPrinter] Use %subreg.xxx syntax for subregister index operands.
Nov 6 2017, 1:46 PM
bjope created D39696: [MIRPrinter] Use %subreg.xxx syntax for subregister index operands.
Nov 6 2017, 1:30 PM

Nov 2 2017

bjope committed rL317198: [SimplifyCFG] Discard speculated dbg intrinsics.
[SimplifyCFG] Discard speculated dbg intrinsics
Nov 2 2017, 4:56 AM
bjope closed D39494: [SimplifyCFG] Discard speculated dbg intrinsics by committing rL317198: [SimplifyCFG] Discard speculated dbg intrinsics.
Nov 2 2017, 4:55 AM

Nov 1 2017

bjope created D39494: [SimplifyCFG] Discard speculated dbg intrinsics.
Nov 1 2017, 8:52 AM

Oct 26 2017

bjope committed rL316665: [LSV] Avoid adding vectors of pointers as candidates.
[LSV] Avoid adding vectors of pointers as candidates
Oct 26 2017, 6:59 AM
bjope closed D39296: [LSV] Avoid adding vectors of pointers as candidates by committing rL316665: [LSV] Avoid adding vectors of pointers as candidates.
Oct 26 2017, 6:59 AM
bjope committed rL316663: [LSV] Skip all non-byte sizes, not only less than eight bits.
[LSV] Skip all non-byte sizes, not only less than eight bits
Oct 26 2017, 6:43 AM
bjope closed D39295: [LSV] Skip all non-byte sizes, not only less than eight bits by committing rL316663: [LSV] Skip all non-byte sizes, not only less than eight bits.
Oct 26 2017, 6:43 AM
bjope added inline comments to D39295: [LSV] Skip all non-byte sizes, not only less than eight bits.
Oct 26 2017, 6:42 AM
bjope added a comment to D34272: [Tooling] A new framework for executing clang frontend actions..

I get errors when compiling due to this commit:

Oct 26 2017, 5:50 AM

Oct 25 2017

bjope added a reviewer for D39295: [LSV] Skip all non-byte sizes, not only less than eight bits: arsenm.
Oct 25 2017, 9:42 AM
bjope added a reviewer for D39296: [LSV] Avoid adding vectors of pointers as candidates: arsenm.
Oct 25 2017, 9:42 AM
bjope created D39296: [LSV] Avoid adding vectors of pointers as candidates.
Oct 25 2017, 9:26 AM
bjope created D39295: [LSV] Skip all non-byte sizes, not only less than eight bits.
Oct 25 2017, 9:25 AM

Oct 24 2017

bjope committed rL316430: [ConstantFolding] Avoid assert when folding ptrtoint of vectorized GEP.
[ConstantFolding] Avoid assert when folding ptrtoint of vectorized GEP
Oct 24 2017, 5:08 AM
bjope closed D38546: [ConstantFolding] Avoid assert when folding ptrtoint of vectorized GEP by committing rL316430: [ConstantFolding] Avoid assert when folding ptrtoint of vectorized GEP.
Oct 24 2017, 5:08 AM
bjope committed rL316429: [LangRef] Update description of Constant Expressions.
[LangRef] Update description of Constant Expressions
Oct 24 2017, 5:00 AM
bjope closed D39165: [LangRef] Update description of Constant Expression by committing rL316429: [LangRef] Update description of Constant Expressions.
Oct 24 2017, 5:00 AM
bjope added inline comments to D38546: [ConstantFolding] Avoid assert when folding ptrtoint of vectorized GEP.
Oct 24 2017, 12:57 AM

Oct 22 2017

bjope added a comment to D38546: [ConstantFolding] Avoid assert when folding ptrtoint of vectorized GEP.

Needs a FIXME or something explaining why exactly you're returning early; in theory, we should be able to fold vector ptrtoint operations the same way we fold integer ptrtoint operations, given the right logic.

Oct 22 2017, 3:58 AM
bjope created D39165: [LangRef] Update description of Constant Expression.
Oct 22 2017, 3:52 AM
bjope updated the diff for D38546: [ConstantFolding] Avoid assert when folding ptrtoint of vectorized GEP.

Add a FIXME as requested by Eli.

Oct 22 2017, 3:20 AM

Oct 18 2017

bjope requested review of D38546: [ConstantFolding] Avoid assert when folding ptrtoint of vectorized GEP.
Oct 18 2017, 11:45 PM
bjope added a comment to D38546: [ConstantFolding] Avoid assert when folding ptrtoint of vectorized GEP.

The constant expression ptrtoint is supposed to have the same rules as the instruction ptrtoint. Looks like we just forgot to update LangRef when pointer vectors were added.

Oct 18 2017, 8:40 AM

Oct 17 2017

bjope added inline comments to D38546: [ConstantFolding] Avoid assert when folding ptrtoint of vectorized GEP.
Oct 17 2017, 2:53 PM

Oct 16 2017

bjope added a comment to D1251: Teach InlineCost about address spaces.

If nobody remembers why this very old patch never was landed, then I guess I'll make a new attempt as it would avoid the asserts that I've seen.
And it is also one step towards getting rid of the default arguments in DataLayout::getPointerSizeInBits(unsigned AS = 0) , marked as a FIXME in DataLayout.h.

Oct 16 2017, 2:19 PM
bjope added inline comments to D38546: [ConstantFolding] Avoid assert when folding ptrtoint of vectorized GEP.
Oct 16 2017, 1:59 PM
bjope added a comment to D38546: [ConstantFolding] Avoid assert when folding ptrtoint of vectorized GEP.

Ping!

Oct 16 2017, 6:00 AM

Oct 12 2017

bjope added a comment to D38830: [DWARF] Fix bad comparator in sortGlobalExprs..

Eli, I think this looks good.

Oct 12 2017, 2:52 AM

Oct 11 2017

bjope added a comment to D1251: Teach InlineCost about address spaces.

Does anyone remember why this has been "abandoned" (still not finished after four years being in need for review)?

Oct 11 2017, 1:40 AM

Oct 9 2017

bjope added a reviewer for D38546: [ConstantFolding] Avoid assert when folding ptrtoint of vectorized GEP: davide.
Oct 9 2017, 6:27 AM

Oct 4 2017

bjope added inline comments to D38546: [ConstantFolding] Avoid assert when folding ptrtoint of vectorized GEP.
Oct 4 2017, 9:01 AM
bjope created D38546: [ConstantFolding] Avoid assert when folding ptrtoint of vectorized GEP.
Oct 4 2017, 8:54 AM

Oct 3 2017

bjope committed rL314781: [DebugInfo] Handle endianness when moving debug info for split integer values….
[DebugInfo] Handle endianness when moving debug info for split integer values…
Oct 3 2017, 4:04 AM
bjope added a comment to D38172: [Debug info] Handle endianness when moving debug info for split integer values.

Hi,

The test doesn't pass on a llc built without the target "AMDGPU" enabled. To reproduce:

  1. Add -DLLVM_TARGETS_TO_BUILD="X86;PowerPC" to the cmake command.
  2. re-run cmake and build llc. The test doesn't pass on that llc.

    Notice that if we define LLVM_TARGETS_TO_BUILD as "X86;PowerPC;AMDGPU", the test passes again.

    I think this is related to [1], but I don't understand why "isel" defined in AMDGPU gets picked up by a PPC32 through "-stop-after=isel".

    [1] https://github.com/llvm-mirror/llvm/blob/7287fcb5d580e8ac0b860ddd4da03dc395795fa0/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp#L237
Oct 3 2017, 2:27 AM

Oct 2 2017

bjope committed rL314667: [X86][SSE] Fix -Wsign-compare problems introduced in r314658.
[X86][SSE] Fix -Wsign-compare problems introduced in r314658
Oct 2 2017, 5:48 AM
bjope committed rL314666: [Debug info] Handle endianness when moving debug info for split integer values.
[Debug info] Handle endianness when moving debug info for split integer values
Oct 2 2017, 5:48 AM
bjope closed D38172: [Debug info] Handle endianness when moving debug info for split integer values by committing rL314666: [Debug info] Handle endianness when moving debug info for split integer values.
Oct 2 2017, 5:48 AM

Sep 28 2017

bjope committed rL314414: [DebugInfo] Do not extend range for physreg in LiveDebugVariables.
[DebugInfo] Do not extend range for physreg in LiveDebugVariables
Sep 28 2017, 6:14 AM
bjope closed D38140: [DebugInfo] Do not extend range for physreg in LiveDebugVariables by committing rL314414: [DebugInfo] Do not extend range for physreg in LiveDebugVariables.
Sep 28 2017, 6:14 AM

Sep 27 2017

bjope added a comment to D38140: [DebugInfo] Do not extend range for physreg in LiveDebugVariables.

Okay, let's do this: Split the CHECKDBG test into a separate .test file that has the REQUIRES: asserts and re-uses the same input. This way we get some testing in all configurations and full testing in asserts builds.

Sep 27 2017, 9:45 AM
bjope added a comment to D38140: [DebugInfo] Do not extend range for physreg in LiveDebugVariables.

live-debug-variables happens so late in the pipeline that in practice checking for dwarfdump output hasn't caused much churn in the testsuite. I would prefer a -filetype=obj -start-before=greedy | llvm-dwarfdump- test over one that checks DEBUG output (which will only be tested by bots that build with assertions enabled).

Sep 27 2017, 2:18 AM
bjope updated the diff for D38140: [DebugInfo] Do not extend range for physreg in LiveDebugVariables.

Narrowed the test case even further by stopping already after virtregrewriter.

Sep 27 2017, 1:39 AM

Sep 26 2017

bjope added inline comments to D38140: [DebugInfo] Do not extend range for physreg in LiveDebugVariables.
Sep 26 2017, 3:30 PM
bjope updated the diff for D38140: [DebugInfo] Do not extend range for physreg in LiveDebugVariables.

Added REQUIRES asserts to the test case.
Added a second RUN line to also verify the MIR.

Sep 26 2017, 3:30 PM
bjope added inline comments to D38140: [DebugInfo] Do not extend range for physreg in LiveDebugVariables.
Sep 26 2017, 3:30 PM

Sep 25 2017

bjope added reviewers for D38140: [DebugInfo] Do not extend range for physreg in LiveDebugVariables: aprantl, rnk, echristo.
Sep 25 2017, 5:03 AM
bjope updated the summary of D38140: [DebugInfo] Do not extend range for physreg in LiveDebugVariables.
Sep 25 2017, 5:03 AM

Sep 21 2017

bjope added a comment to D37740: [SelectionDAG] Pick correct frame index in LowerArguments.
In D37740#877747, @rnk wrote:

Seems ok to me.
@rnk: was your concern addressed?

Yeah, sorry I didn't say anything. My thoughts were along the lines of "yes, this code is complicated and hard to simplify. Bummer. :("

Sep 21 2017, 12:00 PM
bjope committed rL313901: [SelectionDAG] Pick correct frame index in LowerArguments.
[SelectionDAG] Pick correct frame index in LowerArguments
Sep 21 2017, 11:53 AM
bjope closed D37740: [SelectionDAG] Pick correct frame index in LowerArguments by committing rL313901: [SelectionDAG] Pick correct frame index in LowerArguments.
Sep 21 2017, 11:53 AM
bjope added a comment to D37740: [SelectionDAG] Pick correct frame index in LowerArguments.

I'd still like to contribute by landing this bugfix. We are using it for our out-of-tree target and the problem seems to exist for other big-endian targets as well, as shown by the test case for powerpc.
Any objections?
Ping!

Sep 21 2017, 9:29 AM
bjope created D38140: [DebugInfo] Do not extend range for physreg in LiveDebugVariables.
Sep 21 2017, 9:24 AM

Sep 19 2017

bjope committed rL313628: [Sema] Disallow assigning record lvalues with nested const-qualified fields..
[Sema] Disallow assigning record lvalues with nested const-qualified fields.
Sep 19 2017, 6:12 AM
bjope closed D37254: [Sema] Disallow assigning record lvalues with nested const-qualified fields. by committing rL313628: [Sema] Disallow assigning record lvalues with nested const-qualified fields..
Sep 19 2017, 6:12 AM
bjope accepted D37254: [Sema] Disallow assigning record lvalues with nested const-qualified fields..

Nobody else seems to bother. At least no objections, so I think we can land this now.

Sep 19 2017, 4:36 AM

Sep 13 2017

bjope added inline comments to D37740: [SelectionDAG] Pick correct frame index in LowerArguments.
Sep 13 2017, 11:13 AM
bjope updated the diff for D37740: [SelectionDAG] Pick correct frame index in LowerArguments.

Some fixes related to comments from Adrian Prantl:

  • Strip some attributes from the test case.
  • Stop test after livedebugvalues (that made it possible to relate checks to positions in the fixedStack instead of load instructions).
  • Reformulated the code comment that did not take stack growth direction into consideration.
  • Removed the assert comparing frame index with for the "other" BUILD_PAIR operand. I think we can live without it, as it got a little bit more complicated when taking stack growth into account.
  • Factored out the "LowAddressOp" number to enhance readability.
Sep 13 2017, 10:54 AM

Sep 12 2017

bjope added inline comments to D37740: [SelectionDAG] Pick correct frame index in LowerArguments.
Sep 12 2017, 2:02 PM
bjope added inline comments to D37740: [SelectionDAG] Pick correct frame index in LowerArguments.
Sep 12 2017, 9:28 AM
bjope added a comment to D37254: [Sema] Disallow assigning record lvalues with nested const-qualified fields..

This patch looks good to me now.
But I'm currently working in the same out-of-tree project as the author, so it would be nice if someone else could have a look as well and accept this.

Sep 12 2017, 6:54 AM
bjope added reviewers for D37740: [SelectionDAG] Pick correct frame index in LowerArguments: bogner, rnk, hfinkel, sdardis.
Sep 12 2017, 6:37 AM
bjope created D37740: [SelectionDAG] Pick correct frame index in LowerArguments.
Sep 12 2017, 6:31 AM

Sep 6 2017

bjope added inline comments to D37254: [Sema] Disallow assigning record lvalues with nested const-qualified fields..
Sep 6 2017, 11:36 PM

Sep 5 2017

bjope added inline comments to D36534: [aarch64] Support APInt and APFloat in ImmLeaf subclasses and make AArch64 use them..
Sep 5 2017, 11:31 PM
bjope added inline comments to D36534: [aarch64] Support APInt and APFloat in ImmLeaf subclasses and make AArch64 use them..
Sep 5 2017, 1:37 PM

Aug 29 2017

bjope added inline comments to D36900: Re-land MachineInstr: Reason locally about some memory objects before going to AA..
Aug 29 2017, 11:20 AM

Jun 19 2017

bjope committed rL305725: [InstCombine] Make sure AddReachableCodeToWorklist sets MadeIRChange.
[InstCombine] Make sure AddReachableCodeToWorklist sets MadeIRChange
Jun 19 2017, 11:01 AM
bjope closed D34346: [InstCombine] Make sure AddReachableCodeToWorklist sets MadeIRChange by committing rL305725: [InstCombine] Make sure AddReachableCodeToWorklist sets MadeIRChange.
Jun 19 2017, 11:01 AM
bjope added reviewers for D34346: [InstCombine] Make sure AddReachableCodeToWorklist sets MadeIRChange: sanjoy, craig.topper, dblaikie.
Jun 19 2017, 4:47 AM
bjope created D34346: [InstCombine] Make sure AddReachableCodeToWorklist sets MadeIRChange.
Jun 19 2017, 4:45 AM

Apr 12 2017

bjope committed rL300034: [LoadCombine] Avoid analysing dead basic blocks.
[LoadCombine] Avoid analysing dead basic blocks
Apr 12 2017, 1:20 AM