[RISCV] Insert R_RISCV_ALIGN relocation type and Nops for code alignment when linker relaxation enabled

[shiva0217]

Summary

Linker relaxation may change code size. We need to fix up the alignment of alignment directive in text section by inserting Nops and R_RISCV_ALIGN relocation type. So then linker could satisfy the alignment by removing Nops.

To do this:

1. Add shouldInsertExtraNopBytesForCodeAlign target hook to calculate the Nops we need to insert.
2. Add shouldInsertFixupForCodeAlign target hook to insert R_RISCV_ALIGN fixup type.

[asb]

Hi Shiva. I think your tests need to demonstrate the behaviour when there is no C extension support as well.

lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp

61–66 ↗

(On Diff #149894)

Given that the implementations of these always cast to MCAlignFragment, why not take an MCAlignFragment instead of MCFragment?

[shiva0217]

Update patch to address Alex's comments.

[asb]

My main concern with this patch currently is the ability to handle the relax option changing due to .option relax/norelax. So it's probably blocked on D46423.

Note that D45961 which adds MCSubtargetInfo to MCAlignFragment may also be relevant.

[asb]

It would also be worth testing the treatment of alignment directives emitted when generating a constant pool. Currently ConstantPool::emitEntries will use EmitCodeAlignment, but D45961 suggests changing it to EmitCodeAlignment. This affects whether EmitNops is true for the MCAlignFragment. However this patch doesn't query that property anyway. It might be worth documenting that limitation and perhaps double-checking GCC behaviour. I assume that if you use .align with a value to fill with, GCC ignores that value if linker relaxation is enabled?

[shiva0217]

Rebase and add constant pool test case.

Hi Alex, Thanks for the review. Could the new constant pool test case cover the case you concern with?

[shiva0217]

Rebase and rename insertNopBytesForAlignDirectiveInTextSection to NopBytesToInsertForAlignDirectiveInTextSection

[shiva0217]

Hi Alex, I have added a constant pool test case at the end of align.s to verify the padding behavior for constant pool. Once D45961 landing and changing the behavior, we should be able to aware. It seems that GCC will insert Nops for padding constant pool. Could you illustrate more about "use .align with a value to fill with"? I could test on GCC.

[shiva0217]

Ping?

[jrtc27]

lib/MC/MCAssembler.cpp

840 ↗

(On Diff #178599)

This should be moved into the if (and the dyn_cast should never have existed on its own in the first place; if the result is discarded it should be an isa).

844 ↗

(On Diff #178599)

Hard-coding the section name seems wrong. What if somebody uses a section attribute? GNU as will do the right thing for any executable section regardless of its name, and we should too; from an initial glance it seems that MCSection::UseCodeAlign() will tell you exactly the right thing, and as a bonus is no longer ELF-specific.

[shiva0217]

lib/MC/MCAssembler.cpp

840 ↗

(On Diff #178599)

Hi James,
Thanks for the correction.

844 ↗

(On Diff #178599)

It seems to be a much graceful and universal approach, thanks a lot.

[shiva0217]

Update patch to reflect James comments.

[asb]

In D47755#1334053, @shiva0217 wrote:

Hi Alex, I have added a constant pool test case at the end of align.s to verify the padding behavior for constant pool. Once D45961 landing and changing the behavior, we should be able to aware. It seems that GCC will insert Nops for padding constant pool. Could you illustrate more about "use .align with a value to fill with"? I could test on GCC.

I meant that .align/.p2align in GNU as accept a padding value https://sourceware.org/binutils/docs/as/Align.html#Align. It seems that for RISC-V, it accepts and uses this padding value even when relaxation is enabled, but won't emit the R_RISCV_RELAX in that case (which I suppose makes sense, as the linker wouldn't respect the padding value). I'm not saying we should definitely replicate GNU as here - obviously performing alignment without generating R_RISCV_RELAX is quite liable to break things unexpectedly. But it might not be a bad starting point if it's easy to support. Either way, we should have tests that demonsrate how we handle those cases.

[shiva0217]

1. Add test case for alignment directive with a specific padding value
2. Rename the new target hooks to NopBytesToInsertForAlignDirectiveInCodeSection and insertFixupForAlignDirectiveInCodeSection

[shiva0217]

In D47755#1352910, @asb wrote:

In D47755#1334053, @shiva0217 wrote:

Hi Alex, I have added a constant pool test case at the end of align.s to verify the padding behavior for constant pool. Once D45961 landing and changing the behavior, we should be able to aware. It seems that GCC will insert Nops for padding constant pool. Could you illustrate more about "use .align with a value to fill with"? I could test on GCC.

I meant that .align/.p2align in GNU as accept a padding value https://sourceware.org/binutils/docs/as/Align.html#Align. It seems that for RISC-V, it accepts and uses this padding value even when relaxation is enabled, but won't emit the R_RISCV_RELAX in that case (which I suppose makes sense, as the linker wouldn't respect the padding value). I'm not saying we should definitely replicate GNU as here - obviously performing alignment without generating R_RISCV_RELAX is quite liable to break things unexpectedly. But it might not be a bad starting point if it's easy to support. Either way, we should have tests that demonsrate how we handle those cases.

Hi Alex,
Thanks for the explanation. I tested on GNU with .p2align 4, 1, as you said, GNU won't emit relocation types, so the alignment requirement may break when relaxation is enabled. For the same case with this patch, LLVM will emit relocation types, so the alignment requirement will be satisfied. I have added the test case. Thanks for catching this.

[asb]

@shiva0217 the alignment required will be satisfied, but the linker may overwrite some of the bytes with nop/c.nop which seems undesirable.

I added a few comments. Have you looked much at what gas does for .align in other sections. Maybe it's error on my part but I'm not sure that it's doing the right thing...

include/llvm/MC/MCAsmBackend.h

91 ↗

(On Diff #181416)

How about: "Hook to check if extra nop bytes must be inserted for alignment directive. For some targets this may be necessary in order to support linker relaxation. The number of bytes to insert are returned in Size."

93 ↗

(On Diff #181416)

Should start with a lower-case letter.

Might be better named "shouldInsterExtraNopBytesForCodeAlign"? The use of CodeAlign aligns with the way the term is used in MCSection.h for UseCodeAlign.

98 ↗

(On Diff #181416)

How about "Hook which indicates if the target requires a fixup to be generated when handling an align directive in an executable section (as determined by MCSection::UseCodeAlign())."

99 ↗

(On Diff #181416)

Maybe "shouldInsertFixupForCodeAlign"?

[shiva0217]

Hi @asb, I got your point, we could guard the target hook with AF.hasEmitNops(), so the behavior of .align 4, 1 will be the same as gnu assembler. What do you think?

I've tested .align in data section when relaxation enabled for gnu toolchain, gnu toolchain will not insert R_RISCV_ALIGN, and the alignment position will be correct. It seems that we only need to insert R_RISCV_ALIGN for the relaxable section. As far as I know, it would be code section, but I may miss something.

The target hook's names and comments have been updated, thanks for the revision.

[asb]

In D47755#1362740, @shiva0217 wrote:

Hi @asb, I got your point, we could guard the target hook with AF.hasEmitNops(), so the behavior of .align 4, 1 will be the same as gnu assembler. What do you think?

That sounds good

I've tested .align in data section when relaxation enabled for gnu toolchain, gnu toolchain will not insert R_RISCV_ALIGN, and the alignment position will be correct. It seems that we only need to insert R_RISCV_ALIGN for the relaxable section. As far as I know, it would be code section, but I may miss something.

gas seems to have a bug here, I've filed https://sourceware.org/bugzilla/show_bug.cgi?id=24129

[asb]

In D47755#1369341, @asb wrote:

gas seems to have a bug here, I've filed https://sourceware.org/bugzilla/show_bug.cgi?id=24129

gas issue was my mistake in analysing the output (should have disassembled without aliases). So gas does do the sensible thing.

[asb]

Apologies Shiva, I'd missed that you'd included the AF.hasEmitNops change in the last patch update. This looks good to me - thanks!

llvm/trunk/include/llvm/MC/MCAsmBackend.h

public:
 
   /// Hook to check if a relocation is needed for some target specific reason.
   virtual bool shouldForceRelocation(const MCAssembler &Asm,
                                      const MCFixup &Fixup,
                                      const MCValue &Target) {
     return false;
   }
 
+  /// Hook to check if extra nop bytes must be inserted for alignment directive.
+  /// For some targets this may be necessary in order to support linker
+  /// relaxation. The number of bytes to insert are returned in Size.
+  virtual bool shouldInsertExtraNopBytesForCodeAlign(const MCAlignFragment &AF,
+                                                     unsigned &Size) {
+    return false;
+  }
+
+  /// Hook which indicates if the target requires a fixup to be generated when
+  /// handling an align directive in an executable section
+  virtual bool shouldInsertFixupForCodeAlign(MCAssembler &Asm,
+                                             const MCAsmLayout &Layout,
+                                             MCAlignFragment &AF) {
+    return false;
+  }
+
   /// Apply the \p Value for given \p Fixup into the provided data fragment, at
   /// the offset specified by the fixup and following the fixup kind as
   /// appropriate. Errors (such as an out of range fixup value) should be
   /// reported via \p Ctx.
   /// The  \p STI is present only for fragments of type MCRelaxableFragment and
   /// MCDataFragment with hasInstructions() == true.
   virtual void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
                           const MCValue &Target, MutableArrayRef<char> Data,

llvm/trunk/lib/MC/MCAssembler.cpp

uint64_t MCAssembler::computeFragmentSize(const MCAsmLayout &Layout,
 
   case MCFragment::FT_SymbolId:
     return 4;
 
   case MCFragment::FT_Align: {
     const MCAlignFragment &AF = cast<MCAlignFragment>(F);
     unsigned Offset = Layout.getFragmentOffset(&AF);
     unsigned Size = OffsetToAlignment(Offset, AF.getAlignment());
+
+    // Insert extra Nops for code alignment if the target define
+    // shouldInsertExtraNopBytesForCodeAlign target hook.
+    if (AF.getParent()->UseCodeAlign() && AF.hasEmitNops() &&
+        getBackend().shouldInsertExtraNopBytesForCodeAlign(AF, Size))
+      return Size;
+
     // If we are padding with nops, force the padding to be larger than the
     // minimum nop size.
     if (Size > 0 && AF.hasEmitNops()) {
       while (Size % getBackend().getMinimumNopSize())
         Size += AF.getAlignment();
     }
     if (Size > AF.getMaxBytesToEmit())
       return 0;
for (MCSection &Sec : *this) {
     for (MCFragment &Frag : Sec) {
       // Data and relaxable fragments both have fixups.  So only process
       // those here.
       // FIXME: Is there a better way to do this?  MCEncodedFragmentWithFixups
       // being templated makes this tricky.
       if (isa<MCEncodedFragment>(&Frag) &&
           isa<MCCompactEncodedInstFragment>(&Frag))
         continue;
-      if (!isa<MCEncodedFragment>(&Frag) && !isa<MCCVDefRangeFragment>(&Frag))
+      if (!isa<MCEncodedFragment>(&Frag) && !isa<MCCVDefRangeFragment>(&Frag) &&
+          !isa<MCAlignFragment>(&Frag))
         continue;
       ArrayRef<MCFixup> Fixups;
       MutableArrayRef<char> Contents;
       const MCSubtargetInfo *STI = nullptr;
       if (auto *FragWithFixups = dyn_cast<MCDataFragment>(&Frag)) {
         Fixups = FragWithFixups->getFixups();
         Contents = FragWithFixups->getContents();
         STI = FragWithFixups->getSubtargetInfo();
         assert(!FragWithFixups->hasInstructions() || STI != nullptr);
       } else if (auto *FragWithFixups = dyn_cast<MCRelaxableFragment>(&Frag)) {
         Fixups = FragWithFixups->getFixups();
         Contents = FragWithFixups->getContents();
         STI = FragWithFixups->getSubtargetInfo();
         assert(!FragWithFixups->hasInstructions() || STI != nullptr);
       } else if (auto *FragWithFixups = dyn_cast<MCCVDefRangeFragment>(&Frag)) {
         Fixups = FragWithFixups->getFixups();
         Contents = FragWithFixups->getContents();
       } else if (auto *FragWithFixups = dyn_cast<MCDwarfLineAddrFragment>(&Frag)) {
         Fixups = FragWithFixups->getFixups();
         Contents = FragWithFixups->getContents();
+      } else if (auto *AF = dyn_cast<MCAlignFragment>(&Frag)) {
+        // Insert fixup type for code alignment if the target define
+        // shouldInsertFixupForCodeAlign target hook.
+        if (Sec.UseCodeAlign() && AF->hasEmitNops()) {
+          getBackend().shouldInsertFixupForCodeAlign(*this, Layout, *AF);
+        }
+        continue;
       } else
         llvm_unreachable("Unknown fragment with fixups!");
       for (const MCFixup &Fixup : Fixups) {
         uint64_t FixedValue;
         bool IsResolved;
         MCValue Target;
         std::tie(Target, FixedValue, IsResolved) =
             handleFixup(Layout, Frag, Fixup);

llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h

public:
   void setForceRelocs() { ForceRelocs = true; }
 
   // Generate diff expression relocations if the relax feature is enabled or had
   // previously been enabled, otherwise it is safe for the assembler to
   // calculate these internally.
   bool requiresDiffExpressionRelocations() const override {
     return STI.getFeatureBits()[RISCV::FeatureRelax] || ForceRelocs;
   }
+
+  // Return Size with extra Nop Bytes for alignment directive in code section.
+  bool shouldInsertExtraNopBytesForCodeAlign(const MCAlignFragment &AF,
+                                             unsigned &Size) override;
+
+  // Insert target specific fixup type for alignment directive in code section.
+  bool shouldInsertFixupForCodeAlign(MCAssembler &Asm,
+                                     const MCAsmLayout &Layout,
+                                     MCAlignFragment &AF) override;
+
   void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
                   const MCValue &Target, MutableArrayRef<char> Data,
                   uint64_t Value, bool IsResolved,
                   const MCSubtargetInfo *STI) const override;
 
   std::unique_ptr<MCObjectTargetWriter>
   createObjectTargetWriter() const override;
 
const static MCFixupKindInfo Infos[] = {
       { "fixup_riscv_pcrel_hi20",   12,     20,  MCFixupKindInfo::FKF_IsPCRel },
       { "fixup_riscv_pcrel_lo12_i", 20,     12,  MCFixupKindInfo::FKF_IsPCRel },
       { "fixup_riscv_pcrel_lo12_s",  0,     32,  MCFixupKindInfo::FKF_IsPCRel },
       { "fixup_riscv_jal",          12,     20,  MCFixupKindInfo::FKF_IsPCRel },
       { "fixup_riscv_branch",        0,     32,  MCFixupKindInfo::FKF_IsPCRel },
       { "fixup_riscv_rvc_jump",      2,     11,  MCFixupKindInfo::FKF_IsPCRel },
       { "fixup_riscv_rvc_branch",    0,     16,  MCFixupKindInfo::FKF_IsPCRel },
       { "fixup_riscv_call",          0,     64,  MCFixupKindInfo::FKF_IsPCRel },
-      { "fixup_riscv_relax",         0,      0,  0 }
+      { "fixup_riscv_relax",         0,      0,  0 },
+      { "fixup_riscv_align",         0,      0,  0 }
     };
     static_assert((array_lengthof(Infos)) == RISCV::NumTargetFixupKinds,
                   "Not all fixup kinds added to Infos array");
 
     if (Kind < FirstTargetFixupKind)
       return MCAsmBackend::getFixupKindInfo(Kind);
 
     assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&

llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp

 #include "llvm/ADT/APInt.h"
 #include "llvm/MC/MCAssembler.h"
 #include "llvm/MC/MCContext.h"
 #include "llvm/MC/MCDirectives.h"
 #include "llvm/MC/MCELFObjectWriter.h"
 #include "llvm/MC/MCExpr.h"
 #include "llvm/MC/MCObjectWriter.h"
 #include "llvm/MC/MCSymbol.h"
+#include "llvm/MC/MCValue.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/raw_ostream.h"
 
 using namespace llvm;
 
 // If linker relaxation is enabled, or the relax option had previously been
 // enabled, always emit relocations even if the fixup can be resolved. This is
 // necessary for correctness as offsets may change during relaxation.
void RISCVAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
 
   // For each byte of the fragment that the fixup touches, mask in the
   // bits from the fixup value.
   for (unsigned i = 0; i != NumBytes; ++i) {
     Data[Offset + i] |= uint8_t((Value >> (i * 8)) & 0xff);
   }
 }
 
+// Linker relaxation may change code size. We have to insert Nops
+// for .align directive when linker relaxation enabled. So then Linker
+// could satisfy alignment by removing Nops.
+// The function return the total Nops Size we need to insert.
+bool RISCVAsmBackend::shouldInsertExtraNopBytesForCodeAlign(
+    const MCAlignFragment &AF, unsigned &Size) {
+  // Calculate Nops Size only when linker relaxation enabled.
+  if (!STI.getFeatureBits()[RISCV::FeatureRelax])
+    return false;
+
+  bool HasStdExtC = STI.getFeatureBits()[RISCV::FeatureStdExtC];
+  unsigned MinNopLen = HasStdExtC ? 2 : 4;
+
+  Size = AF.getAlignment() - MinNopLen;
+  return true;
+}
+
+// We need to insert R_RISCV_ALIGN relocation type to indicate the
+// position of Nops and the total bytes of the Nops have been inserted
+// when linker relaxation enabled.
+// The function insert fixup_riscv_align fixup which eventually will
+// transfer to R_RISCV_ALIGN relocation type.
+bool RISCVAsmBackend::shouldInsertFixupForCodeAlign(MCAssembler &Asm,
+                                                    const MCAsmLayout &Layout,
+                                                    MCAlignFragment &AF) {
+  // Insert the fixup only when linker relaxation enabled.
+  if (!STI.getFeatureBits()[RISCV::FeatureRelax])
+    return false;
+
+  // Calculate total Nops we need to insert.
+  unsigned Count;
+  shouldInsertExtraNopBytesForCodeAlign(AF, Count);
+  // No Nop need to insert, simply return.
+  if (Count == 0)
+    return false;
+
+  MCContext &Ctx = Asm.getContext();
+  const MCExpr *Dummy = MCConstantExpr::create(0, Ctx);
+  // Create fixup_riscv_align fixup.
+  MCFixup Fixup =
+      MCFixup::create(0, Dummy, MCFixupKind(RISCV::fixup_riscv_align), SMLoc());
+
+  uint64_t FixedValue = 0;
+  MCValue NopBytes = MCValue::get(Count);
+
+  Asm.getWriter().recordRelocation(Asm, Layout, &AF, Fixup, NopBytes,
+                                   FixedValue);
+
+  return true;
+}
+
 std::unique_ptr<MCObjectTargetWriter>
 RISCVAsmBackend::createObjectTargetWriter() const {
   return createRISCVELFObjectWriter(OSABI, Is64Bit);
 }
 
 MCAsmBackend *llvm::createRISCVAsmBackend(const Target &T,
                                           const MCSubtargetInfo &STI,
                                           const MCRegisterInfo &MRI,
                                           const MCTargetOptions &Options) {
   const Triple &TT = STI.getTargetTriple();
   uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS());
   return new RISCVAsmBackend(STI, OSABI, TT.isArch64Bit());
 }

llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp

unsigned RISCVELFObjectWriter::getRelocType(MCContext &Ctx,
   case RISCV::fixup_riscv_rvc_jump:
     return ELF::R_RISCV_RVC_JUMP;
   case RISCV::fixup_riscv_rvc_branch:
     return ELF::R_RISCV_RVC_BRANCH;
   case RISCV::fixup_riscv_call:
     return ELF::R_RISCV_CALL;
   case RISCV::fixup_riscv_relax:
     return ELF::R_RISCV_RELAX;
+  case RISCV::fixup_riscv_align:
+    return ELF::R_RISCV_ALIGN;
   }
 }
 
 std::unique_ptr<MCObjectTargetWriter>
 llvm::createRISCVELFObjectWriter(uint8_t OSABI, bool Is64Bit) {
   return llvm::make_unique<RISCVELFObjectWriter>(OSABI, Is64Bit);
 }

llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVFixupKinds.h

enum Fixups {
   // compressed branch instruction
   fixup_riscv_rvc_branch,
   // fixup_riscv_call - A fixup representing a call attached to the auipc
   // instruction in a pair composed of adjacent auipc+jalr instructions.
   fixup_riscv_call,
   // fixup_riscv_relax - Used to generate an R_RISCV_RELAX relocation type,
   // which indicates the linker may relax the instruction pair.
   fixup_riscv_relax,
+  // fixup_riscv_align - Used to generate an R_RISCV_ALIGN relocation type,
+  // which indicates the linker should fixup the alignment after linker
+  // relaxation.
+  fixup_riscv_align,
 
   // fixup_riscv_invalid - used as a sentinel and a marker, must be last fixup
   fixup_riscv_invalid,
   NumTargetFixupKinds = fixup_riscv_invalid - FirstTargetFixupKind
 };
 } // end namespace RISCV
 } // end namespace llvm
 
 #endif

llvm/trunk/test/MC/RISCV/align.s

+# The file testing Nop insertion with R_RISCV_ALIGN for relaxation.
+
+# Relaxation enabled:
+# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+relax < %s \
+# RUN:     | llvm-objdump -d -riscv-no-aliases - \
+# RUN:     | FileCheck -check-prefix=RELAX-INST %s
+# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+relax < %s \
+# RUN:     | llvm-readobj -r | FileCheck -check-prefix=RELAX-RELOC %s
+
+# Relaxation disabled:
+# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=-relax < %s \
+# RUN:     | llvm-objdump -d -riscv-no-aliases - \
+# RUN:     | FileCheck -check-prefix=NORELAX-INST %s
+# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=-relax < %s \
+# RUN:     | llvm-readobj -r | FileCheck -check-prefix=NORELAX-RELOC %s
+
+# Relaxation enabled with C extension:
+# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+c,+relax < %s \
+# RUN:     | llvm-objdump -d -riscv-no-aliases - \
+# RUN:     | FileCheck -check-prefix=C-EXT-RELAX-INST %s
+# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+c,+relax < %s \
+# RUN:     | llvm-readobj -r | FileCheck -check-prefix=C-EXT-RELAX-RELOC %s
+
+# Relaxation disabled with C extension:
+# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+c,-relax < %s \
+# RUN:     | llvm-objdump -d -riscv-no-aliases - \
+# RUN:     | FileCheck -check-prefix=C-EXT-NORELAX-INST %s
+# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+c,-relax < %s \
+# RUN:     | llvm-readobj -r | FileCheck -check-prefix=C-EXT-NORELAX-RELOC %s
+
+# We need to insert N-MinNopSize bytes NOPs and R_RISCV_ALIGN relocation
+# type for .align N directive when linker relaxation enabled.
+# Linker could satisfy alignment by removing NOPs after linker relaxation.
+
+# The first R_RISCV_ALIGN come from
+# MCELFStreamer::InitSections() EmitCodeAlignment(4).
+# C-EXT-RELAX-RELOC: R_RISCV_ALIGN - 0x2
+# C-EXT-RELAX-INST:  c.nop
+test:
+  .p2align 2
+# C-EXT-RELAX-RELOC: R_RISCV_ALIGN - 0x2
+# C-EXT-RELAX-INST:  c.nop
+  bne     zero, a0, .LBB0_2
+  mv  a0, zero
+  .p2align 3
+# RELAX-RELOC: R_RISCV_ALIGN - 0x4
+# RELAX-INST:  addi    zero, zero, 0
+# C-EXT-RELAX-RELOC: R_RISCV_ALIGN - 0x6
+# C-EXT-RELAX-INST:  addi    zero, zero, 0
+# C-EXT-RELAX-INST:  c.nop
+# C-EXT-NORELAX-INST: addi    zero, zero, 0
+  add a0, a0, a1
+  .align 4
+.LBB0_2:
+# RELAX-RELOC: R_RISCV_ALIGN - 0xC
+# RELAX-INST:  addi    zero, zero, 0
+# RELAX-INST:  addi    zero, zero, 0
+# RELAX-INST:  addi    zero, zero, 0
+# NORELAX-INST: addi    zero, zero, 0
+# C-EXT-RELAX-RELOC: R_RISCV_ALIGN - 0xE
+# C-EXT-RELAX-INST:  addi    zero, zero, 0
+# C-EXT-RELAX-INST:  addi    zero, zero, 0
+# C-EXT-RELAX-INST:  addi    zero, zero, 0
+# C-EXT-RELAX-INST:  c.nop
+# C-EXT-INST: addi    zero, zero, 0
+# C-EXT-INST: c.nop
+  add a0, a0, a1
+  .p2align 3
+.constant_pool:
+.long 3126770193
+# RELAX-RELOC: R_RISCV_ALIGN - 0x4
+# RELAX-INST:  addi    zero, zero, 0
+# NORELAX-INST: addi    zero, zero, 0
+# C-EXT-RELAX-RELOC: R_RISCV_ALIGN - 0x6
+# C-EXT-RELAX-INST:  addi    zero, zero, 0
+# C-EXT-RELAX-INST:  c.nop
+# C-EXT-INST: addi    zero, zero, 0
+# C-EXT-INST: c.nop
+  add a0, a0, a1
+# Alignment directive with specific padding value 0x01.
+# We will not emit R_RISCV_ALIGN in this case.
+# The behavior is the same as GNU assembler.
+  .p2align 4, 1
+# RELAX-RELOC-NOT: R_RISCV_ALIGN - 0xC
+# RELAX-INST:  01 01
+# RELAX-INST:  01 01
+# C-EXT-RELAX-RELOC-NOT: R_RISCV_ALIGN - 0xE
+# C-EXT-RELAX-INST:  01 01
+# C-EXT-INST:  01 01
+  ret
+# NORELAX-RELOC-NOT: R_RISCV
+# C-EXT-NORELAX-RELOC-NOT: R_RISCV
+# We only need to insert R_RISCV_ALIGN for code section
+# when the linker relaxation enabled.
+        .data
+  .p2align        3
+# RELAX-RELOC-NOT: R_RISCV_ALIGN
+# C-EXT-RELAX-RELOC-NOT: R_RISCV_ALIGN
+data1:
+  .word 7
+  .p2align        4
+# RELAX-RELOC-NOT: R_RISCV_ALIGN
+# C-EXT-RELAX-RELOC-NOT: R_RISCV_ALIGN
+data2:
+  .word 9