Patch [3/3] in a series to add operand constraint checks for SVE's predicated ADD/SUB.
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test/MC/AArch64/SVE/sub-diagnostics.s | ||
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79 | nit: I think it would be slightly clearer if the grouping was like this: // Source and Destination Registers must match sub z25.b, p4/m, z26.b, z2.b // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register // CHECK-NEXT: sub z25.b, p4/m, z26.b, z2.b // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: ..... sub z2.d, p5/m, z3.d, z11.d // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register // CHECK-NEXT: sub z2.d, p5/m, z3.d, z11.d // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // -------------------------------------------------------------- |
nit: I think it would be slightly clearer if the grouping was like this: