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[AArch64][AsmParser] Add isScalarReg() and repurpose isReg()
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Authored by sdesmalen on Dec 20 2017, 6:40 AM.

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Summary

isReg() in AArch64AsmParser.cpp is a bit of a misnomer, and would be better named 'isScalarReg()' instead.

Patch [1/3] in a series to add operand constraint checks for SVE's predicated ADD/SUB.

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Event Timeline

sdesmalen created this revision.Dec 20 2017, 6:40 AM
fhahn accepted this revision.Dec 21 2017, 3:17 AM

LGTM. MCParsedAsmOperand::isReg should return true if the operand is a register operand, not only for scalar registers.

This revision is now accepted and ready to land.Dec 21 2017, 3:17 AM
sdesmalen closed this revision.Jan 2 2018, 5:40 AM