[AArch64][SVE] Asm: Add predicated ADD/SUB instructions

[sdesmalen]

Summary

Add the predicated ADD/SUB instructions and corresponding tests.

Patch [3/3] in a series to add predicated ADD/SUB instructions for SVE.

[fhahn]

lib/Target/AArch64/AArch64SVEInstrInfo.td

18

It takes 4 registers, shouldn't the name be ADD_ZPmZZ? Same below

lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp

94–96

No need for llvm:: here.

test/MC/AArch64/SVE/add-diagnostics.s

21

IIRC you changed the comment/grouping structure in a previous patch. Could you use the same here?

// Comment about case
add 8bit,
add a16bit,
...
...

[sdesmalen]

Reformatted diagnostics tests.

[sdesmalen]

lib/Target/AArch64/AArch64SVEInstrInfo.td

18

This is done to distinguish it from cases where the first input register is not tied with the destination register, but also takes 4 registers, e.g. 'FMLA_ZPmZZ'.

[fhahn]

Thanks Sander, LGTM

lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp

95

Looks like RegNo now could fit on the previous line ;-)