[RISCV] Only emit .option when extension is supported

[BeMg]

Summary

It maybe emit the .option directive without any follow up. Only emit the .option push/pop when there are supported extension difference between function and module.

[BeMg]

Update

[craig.topper]

llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp

282–283

Can we call RTS.emitDirectiveOptionPush(); from emitDirectiveOptionArch() and have it return a bool to indicate that RTS.emitDirectiveOptionPop() needs to be called at the end of the function?

[BeMg]

Refactor the emitDirectiveOptionPush, emitDirectiveOptionArch and emitDirectiveOptionPop in RISCVAsmPrinter::runOnMachineFunction

[craig.topper]

llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp

257

Don't we only need this when we call emitDirectiveOptionArch later? Can we use the same if?

[BeMg]

Merge isSameSupportedAttribute into emitDirectiveOptionArch

[craig.topper]

llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp

284

NeedEmitOptionArch -> EmittedOptionArch

since we already emitted it in the function.

[BeMg]

Rename NeedEmitOptionArch with EmittedOptionArch

[BeMg]

Ping

[craig.topper]

LGTM

llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp

public:
 
   // Wrapper needed for tblgenned pseudo lowering.
   bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const;
 
   void emitStartOfAsmFile(Module &M) override;
   void emitEndOfAsmFile(Module &M) override;
 
   void emitFunctionEntryLabel() override;
-  void emitDirectiveOptionArch();
-  bool isSameAttribute();
+  bool emitDirectiveOptionArch();
 
 private:
   void emitAttributes();
 
   void emitNTLHint(const MachineInstr *MI);
 
   bool lowerToMCInst(const MachineInstr *MI, MCInst &OutMI);
 };
bool RISCVAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
   if (Offset.isImm())
     OS << MCO.getImm();
   else if (Offset.isGlobal())
     OS << *MCO.getExpr();
   OS << "(" << RISCVInstPrinter::getRegisterName(AddrReg.getReg()) << ")";
   return false;
 }
 
-void RISCVAsmPrinter::emitDirectiveOptionArch() {
+bool RISCVAsmPrinter::emitDirectiveOptionArch() {
   RISCVTargetStreamer &RTS =
       static_cast<RISCVTargetStreamer &>(*OutStreamer->getTargetStreamer());
   SmallVector<RISCVOptionArchArg> NeedEmitStdOptionArgs;
   const MCSubtargetInfo &MCSTI = *TM.getMCSubtargetInfo();
   for (const auto &Feature : RISCVFeatureKV) {
     if (STI->hasFeature(Feature.Value) == MCSTI.hasFeature(Feature.Value))
       continue;
 
     if (!llvm::RISCVISAInfo::isSupportedExtensionFeature(Feature.Key))
       continue;
 
     auto Delta = STI->hasFeature(Feature.Value) ? RISCVOptionArchArgType::Plus
                                                 : RISCVOptionArchArgType::Minus;
     NeedEmitStdOptionArgs.emplace_back(Delta, Feature.Key);
   }
-  if (!NeedEmitStdOptionArgs.empty())
+  if (!NeedEmitStdOptionArgs.empty()) {
+    RTS.emitDirectiveOptionPush();
     RTS.emitDirectiveOptionArch(NeedEmitStdOptionArgs);
+    return true;
   }
 
-bool RISCVAsmPrinter::isSameAttribute() {
-  const MCSubtargetInfo &MCSTI = *TM.getMCSubtargetInfo();
-  return MCSTI.getFeatureBits() == STI->getFeatureBits();
+  return false;
 }
 
 bool RISCVAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
   STI = &MF.getSubtarget<RISCVSubtarget>();
   RISCVTargetStreamer &RTS =
       static_cast<RISCVTargetStreamer &>(*OutStreamer->getTargetStreamer());
-  if (!isSameAttribute()) {
-    RTS.emitDirectiveOptionPush();
-    emitDirectiveOptionArch();
-  }
+
+  bool EmittedOptionArch = emitDirectiveOptionArch();
 
   SetupMachineFunction(MF);
   emitFunctionBody();
 
-  if (!isSameAttribute())
+  if (EmittedOptionArch)
     RTS.emitDirectiveOptionPop();
   return false;
 }
 
 void RISCVAsmPrinter::emitStartOfAsmFile(Module &M) {
   RISCVTargetStreamer &RTS =
       static_cast<RISCVTargetStreamer &>(*OutStreamer->getTargetStreamer());
   if (const MDString *ModuleTargetABI =

llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll

 ; CHECK-NOT: .option push
 define void @test4() {
 ; CHECK-LABEL: test4
 ; CHECK-NOT: .option pop
 entry:
   ret void
 }
 
-; CHECK: .option push
+; CHECK-NOT: .option push
 define void @test5() "target-features"="+unaligned-scalar-mem" {
 ; CHECK-LABEL: test5
-; CHECK: .option pop
+; CHECK-NOT: .option pop
 entry:
   ret void
 }