[Clang][AArch64] Diagnostics for SME attributes when target doesn't have 'sme'

[sdesmalen]

Summary

This patch adds error diagnostics to Clang when code uses the AArch64 SME
attributes without specifying 'sme' as available target attribute.

• Function definitions marked as 'arm_streaming', 'arm_locally_streaming', 'arm_shared_za' or 'arm_new_za' will by definition use or require SME instructions.
• Calls from non-streaming functions to streaming-functions require the compiler to enable/disable streaming-SVE mode around the call-site.

In some cases we can accept the SME attributes without having 'sme' enabled:

• Function declaration can have the SME attributes.
• Definitions can be __arm_streaming_compatible since the generated code should execute on processing elements without SME.

[rsandifo-arm]

The intent looks good to me, but I'm not in a position to approve. Very pedantic, sorry, but on the description, I think:

Calls from non-streaming functions to streaming-functions require the compiler to enable/disable streaming-SVE mode around the call-site.

would be more accurate as:

Calls from non-streaming mode to streaming functions…

since it applies to calls from streaming-compatible functions too. (Which is what the patch implements.)

clang/include/clang/Basic/DiagnosticSemaKinds.td

3632

Seems like we can easily split this into two and distinguish the cases, since the code that gives the error can always tell which case applies. I think not having SME for streaming mode is logically more fundamental than not having SME for ZA.

I think sme should be SME (if it's referring to the ISA feature) or should be quoted (if it's referring to the feature syntax).

clang/lib/Sema/SemaChecking.cpp

6717

I don't know the code well enough to know whether this is the right place to check this. if it is, though, I suppose the comment needs to be updated too.

I agree the intention looks right from a spec POV.

clang/test/Sema/aarch64-sme-func-attrs-without-target-feature.cpp

30

Looks like this was intended to be __arm_streaming_compatible.

llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td

138

I don't think even SVE is required. A function like:

void foo() __arm_streaming_compatible {
   printf ("Hello, world!\n");
}

should be OK for base Armv8-A.

[sdesmalen]

• Renamed sme to 'sme' to make it clear that it relates to the target feature
• Split function executed in streaming-SVE mode or using ZA state, requires sme into:
  • function executed in streaming-SVE mode requires 'sme'
  • function using ZA state requires 'sme'
• Removed requirement for SVE being enabled for streaming-compatible functions
• Updated comment of Sema::checkCall

[rsandifo-arm]

LGTM in terms of intent.

clang/lib/Sema/SemaDecl.cpp

12163

Suggest making this an else if. We only need to give one error for a call to a streaming shared-ZA function, since the underlying error is the same.

[aaron.ballman]

clang/test/Sema/aarch64-sme-func-attrs-without-target-feature.cpp

21

Is this a requirement of the specification? I guess I was surprised we're going to these lengths rather than diagnosing the attribute in SemaDeclAttr.cpp when sme is not enabled.

[rsandifo-arm]

clang/test/Sema/aarch64-sme-func-attrs-without-target-feature.cpp

21

Yeah. The problem is that it's possible (and reasonable!) to enable SME for only part of a translation unit. E.g. an ifunc might have SME and non-SME implementations, with those implementations being in the same translation unit. Things like the target and target_version attributes exist to allow this.

A function that's compiled with SME enabled might want to call streaming functions. There therefore needs to be a way of declaring streaming functions without assuming that the whole TU is SME.

[aaron.ballman]

Clang bits generally LGTM aside from a minor request; I'll leave the final sign-off to an LLVM person so those changes can also be reviewed.

clang/lib/Sema/SemaDecl.cpp

12163

Agreed; I think we need only one diagnostic in that case.

clang/test/Sema/aarch64-sme-func-attrs-without-target-feature.cpp

21

Ah, thank you for the explanation, then this extra effort makes a lot more sense.

[sdesmalen]

Removed double error message for missing 'sme' for both ZA and Streaming

[sdesmalen]

Thanks for the review of the Clang side @aaron.ballman and @rsandifo-arm.

@paulwalker-arm would you be happy to have a look at the LLVM side of this patch?

clang/test/Sema/aarch64-sme-func-attrs-without-target-feature.cpp

30

Thanks, I missed that!

[sdesmalen]

• (Clang) Added test-cases for indirect calls.
• (LLVM) Moved the pseudo definition out of the 'let Predicates = [HasSME] {}' block as well.

[paulwalker-arm]

clang/lib/Sema/SemaChecking.cpp

6808

contains("sme") seems more appropriate here?

clang/lib/Sema/SemaDecl.cpp

12159

As above.

12163

Can this be just else given by this point I believe you know UsesZA has to be true.

clang/test/Sema/aarch64-sme-func-attrs-without-target-feature.cpp

2

Does the test require SVE to be enabled?

4

diagnostics

14–18

Is it worth including tests where "sme2" is used? or are we already comfortable feature inheritance is well tested?

llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td

136–137

Doesn't this class belong in SMEInstrFormats.td, then you'll not need to override Predicates?

llvm/test/CodeGen/AArch64/sme-call-streaming-compatible-to-normal-fn-wihout-sme-attr.ll

5

Verify the...

[sdesmalen]

Address further review comments.

clang/test/Sema/aarch64-sme-func-attrs-without-target-feature.cpp

14–18

I'm not sure how well this is tested, but I guess there's no harm in adding an extra test for it.

llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td

136–137

Good point, I've moved the class over and the InstAliases as well (which I guess also shouldn't depend on SME being available)

[sdesmalen]

Updated LLVM MC tests which were failing because smstart/smstop are no longer predicated by 'sme'.
Sorry, I only just noticed that I hadn't run all the tests yet.

@paulwalker-arm could you give this another look?

clang/include/clang/Basic/DiagnosticSemaKinds.td

def warn_gnu_inline_cplusplus_without_extern : Warning<
   " available, this changed in Clang 10">,
   InGroup<DiagGroup<"gnu-inline-cpp-without-extern">>;
 def err_attribute_vecreturn_only_vector_member : Error<
   "the vecreturn attribute can only be used on a class or structure with one member, which must be a vector">;
 def err_attribute_vecreturn_only_pod_record : Error<
   "the vecreturn attribute can only be used on a POD (plain old data) class or structure (i.e. no virtual functions)">;
 def err_sme_attr_mismatch : Error<
   "function declared %0 was previously declared %1, which has different SME function attributes">;
+def err_sme_call_in_non_sme_target : Error<
+  "call to a streaming function requires 'sme'">;
+def err_sme_definition_using_sm_in_non_sme_target : Error<
+  "function executed in streaming-SVE mode requires 'sme'">;
+def err_sme_definition_using_za_in_non_sme_target : Error<
+  "function using ZA state requires 'sme'">;
 def err_cconv_change : Error<
   "function declared '%0' here was previously declared "
   "%select{'%2'|without calling convention}1">;
 def warn_cconv_unsupported : Warning<
   "%0 calling convention is not supported %select{"
   // Use CallingConventionIgnoredReason Enum to specify these.
   "for this target"
   "|on variadic function"

clang/lib/Sema/SemaChecking.cpp

void Sema::CheckArgAlignment(SourceLocation Loc, NamedDecl *FDecl,
   // If the argument is less aligned than the parameter, there is a
   // potential alignment issue.
   if (ArgAlign < ParamAlign)
     Diag(Loc, diag::warn_param_mismatched_alignment)
         << (int)ArgAlign.getQuantity() << (int)ParamAlign.getQuantity()
         << ParamName << (FDecl != nullptr) << FDecl;
 }
 
 /// Handles the checks for format strings, non-POD arguments to vararg
-/// functions, NULL arguments passed to non-NULL parameters, and diagnose_if
-/// attributes.
+/// functions, NULL arguments passed to non-NULL parameters, diagnose_if
+/// attributes and AArch64 SME attributes.
 void Sema::checkCall(NamedDecl *FDecl, const FunctionProtoType *Proto,
                      const Expr *ThisArg, ArrayRef<const Expr *> Args,
                      bool IsMemberFunction, SourceLocation Loc,
                      SourceRange Range, VariadicCallType CallType) {
   // FIXME: We should check as much as we can in the template definition.
   if (CurContext->isDependentContext())
     return;
 
for (unsigned ArgIdx = 0; ArgIdx < N; ++ArgIdx) {
           checkAIXMemberAlignment((Arg->getExprLoc()), Arg);
 
         QualType ParamTy = Proto->getParamType(ArgIdx);
         QualType ArgTy = Arg->getType();
         CheckArgAlignment(Arg->getExprLoc(), FDecl, std::to_string(ArgIdx + 1),
                           ArgTy, ParamTy);
       }
     }
+
+    // If the callee has an AArch64 SME attribute to indicate that it is an
+    // __arm_streaming function, then the caller requires SME to be available.
+    FunctionProtoType::ExtProtoInfo ExtInfo = Proto->getExtProtoInfo();
+    if (ExtInfo.AArch64SMEAttributes & FunctionType::SME_PStateSMEnabledMask) {
+      if (auto *CallerFD = dyn_cast<FunctionDecl>(CurContext)) {
+        llvm::StringMap<bool> CallerFeatureMap;
+        Context.getFunctionFeatureMap(CallerFeatureMap, CallerFD);
+        if (!CallerFeatureMap.contains("sme"))
+          Diag(Loc, diag::err_sme_call_in_non_sme_target);
+      } else if (!Context.getTargetInfo().hasFeature("sme")) {
+        Diag(Loc, diag::err_sme_call_in_non_sme_target);
+      }
+    }
   }
 
   if (FDecl && FDecl->hasAttr<AllocAlignAttr>()) {
     auto *AA = FDecl->getAttr<AllocAlignAttr>();
     const Expr *Arg = Args[AA->getParamIndex().getASTIndex()];
     if (!Arg->isValueDependent()) {
       Expr::EvalResult Align;
       if (Arg->EvaluateAsInt(Align, Context)) {

clang/lib/Sema/SemaDecl.cpp

if (!getLangOpts().CPlusPlus17 && !NewFD->getPrimaryTemplate()) {
         Diag(NewFD->getLocation(),
              diag::warn_cxx17_compat_exception_spec_in_signature)
             << NewFD;
     }
 
     if (!Redeclaration && LangOpts.CUDA)
       checkCUDATargetOverload(NewFD, Previous);
   }
+
+  // Check if the function definition uses any AArch64 SME features without
+  // having the '+sme' feature enabled.
+  if (DeclIsDefn) {
+    bool UsesSM = NewFD->hasAttr<ArmLocallyStreamingAttr>();
+    bool UsesZA = NewFD->hasAttr<ArmNewZAAttr>();
+    if (const auto *FPT = NewFD->getType()->getAs<FunctionProtoType>()) {
+      FunctionProtoType::ExtProtoInfo EPI = FPT->getExtProtoInfo();
+      UsesSM |=
+          EPI.AArch64SMEAttributes & FunctionType::SME_PStateSMEnabledMask;
+      UsesZA |= EPI.AArch64SMEAttributes & FunctionType::SME_PStateZASharedMask;
+    }
+
+    if (UsesSM || UsesZA) {
+      llvm::StringMap<bool> FeatureMap;
+      Context.getFunctionFeatureMap(FeatureMap, NewFD);
+      if (!FeatureMap.contains("sme")) {
+        if (UsesSM)
+          Diag(NewFD->getLocation(),
+               diag::err_sme_definition_using_sm_in_non_sme_target);
+        else
+          Diag(NewFD->getLocation(),
+               diag::err_sme_definition_using_za_in_non_sme_target);
+      }
+    }
+  }
+
   return Redeclaration;
 }
 
 void Sema::CheckMain(FunctionDecl* FD, const DeclSpec& DS) {
   // C++11 [basic.start.main]p3:
   //   A program that [...] declares main to be inline, static or
   //   constexpr is ill-formed.
   // C11 6.7.4p4:  In a hosted environment, no function specifier(s) shall

clang/test/Sema/aarch64-sme-func-attrs-without-target-feature.cpp

+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -fsyntax-only -verify %s
+
+// This test is testing the diagnostics that Clang emits when compiling without '+sme'.
+
+void streaming_compatible_def() __arm_streaming_compatible {} // OK
+void streaming_def() __arm_streaming { } // expected-error {{function executed in streaming-SVE mode requires 'sme'}}
+void shared_za_def() __arm_shared_za { } // expected-error {{function using ZA state requires 'sme'}}
+__arm_new_za void new_za_def() { } // expected-error {{function using ZA state requires 'sme'}}
+__arm_locally_streaming void locally_streaming_def() { } // expected-error {{function executed in streaming-SVE mode requires 'sme'}}
+void streaming_shared_za_def() __arm_streaming __arm_shared_za { } // expected-error {{function executed in streaming-SVE mode requires 'sme'}}
+
+// It should work fine when we explicitly add the target("sme") attribute.
+__attribute__((target("sme"))) void streaming_compatible_def_sme_attr() __arm_streaming_compatible {} // OK
+__attribute__((target("sme"))) void streaming_def_sme_attr() __arm_streaming { } // OK
+__attribute__((target("sme"))) void shared_za_def_sme_attr() __arm_shared_za { } // OK
+__arm_new_za __attribute__((target("sme"))) void new_za_def_sme_attr() {} // OK
+__arm_locally_streaming __attribute__((target("sme"))) void locally_streaming_def_sme_attr() {} // OK
+
+// Test that it also works with the target("sme2") attribute.
+__attribute__((target("sme2"))) void streaming_def_sme2_attr() __arm_streaming { } // OK
+
+// No code is generated for declarations, so it should be fine to declare using the attribute.
+void streaming_compatible_decl() __arm_streaming_compatible; // OK
+void streaming_decl() __arm_streaming; // OK
+void shared_za_decl() __arm_shared_za; // OK
+
+void non_streaming_decl();
+void non_streaming_def(void (*streaming_fn_ptr)(void) __arm_streaming,
+                       void (*streaming_compatible_fn_ptr)(void) __arm_streaming_compatible) {
+  streaming_compatible_decl(); // OK
+  streaming_compatible_fn_ptr(); // OK
+  streaming_decl(); // expected-error {{call to a streaming function requires 'sme'}}
+  streaming_fn_ptr(); // expected-error {{call to a streaming function requires 'sme'}}
+}
+
+void streaming_compatible_def2(void (*streaming_fn_ptr)(void) __arm_streaming,
+                               void (*streaming_compatible_fn_ptr)(void) __arm_streaming_compatible)
+                                __arm_streaming_compatible {
+  non_streaming_decl(); // OK
+  streaming_compatible_decl(); // OK
+  streaming_compatible_fn_ptr(); // OK
+  streaming_decl(); // expected-error {{call to a streaming function requires 'sme'}}
+  streaming_fn_ptr(); // expected-error {{call to a streaming function requires 'sme'}}
+}
+
+// Also test when call-site is not a function.
+int streaming_decl_ret_int() __arm_streaming;
+int x = streaming_decl_ret_int(); // expected-error {{call to a streaming function requires 'sme'}}

llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td

 // Zero instruction
 //===----------------------------------------------------------------------===//
 
 defm ZERO_M : sme_zero<"zero">;
 
 //===----------------------------------------------------------------------===//
 // Mode selection and state access instructions
 //===----------------------------------------------------------------------===//
 
-// SME defines three pstate fields to set or clear PSTATE.SM, PSTATE.ZA, or
-// both fields:
-//
-//   MSR SVCRSM, #<imm1>
-//   MSR SVCRZA, #<imm1>
-//   MSR SVCRSMZA, #<imm1>
-//
-// It's tricky to using the existing pstate operand defined in
-// AArch64SystemOperands.td since it only encodes 5 bits including op1;op2,
-// when these fields are also encoded in CRm[3:1].
-def MSRpstatesvcrImm1
-  : PstateWriteSimple<(ins svcr_op:$pstatefield, timm0_1:$imm), "msr",
-                      "\t$pstatefield, $imm">,
-    Sched<[WriteSys]> {
-  bits<3> pstatefield;
-  bit imm;
-  let Inst{18-16} = 0b011; // op1
-  let Inst{11-9} = pstatefield;
-  let Inst{8} = imm;
-  let Inst{7-5} = 0b011; // op2
-}
-
-def : InstAlias<"smstart",    (MSRpstatesvcrImm1 0b011, 0b1)>;
-def : InstAlias<"smstart sm", (MSRpstatesvcrImm1 0b001, 0b1)>;
-def : InstAlias<"smstart za", (MSRpstatesvcrImm1 0b010, 0b1)>;
-
-def : InstAlias<"smstop",     (MSRpstatesvcrImm1 0b011, 0b0)>;
-def : InstAlias<"smstop sm",  (MSRpstatesvcrImm1 0b001, 0b0)>;
-def : InstAlias<"smstop za",  (MSRpstatesvcrImm1 0b010, 0b0)>;
-
-
-// Pseudo to match to smstart/smstop. This expands:
-//
-//  pseudonode (pstate_za|pstate_sm), before_call, expected_value
-//
-// Into:
-//
-//   if (before_call != expected_value)
-//     node (pstate_za|pstate_sm)
-//
-// where node can be either 'smstart' or 'smstop'.
-def MSRpstatePseudo :
-  Pseudo<(outs),
-           (ins svcr_op:$pstatefield, timm0_1:$imm, GPR64:$rtpstate, timm0_1:$expected_pstate, variable_ops), []>,
-    Sched<[WriteSys]>;
-
 // Pseudo to conditionally restore ZA state. This expands:
 //
 //   pseudonode tpidr2_el0, tpidr2obj, restore_routine
 //
 // Into:
 //
 //   if (tpidr2_el0 == 0)
 //     BL restore_routine, implicit-use tpidr2obj
 //
 def RestoreZAPseudo :

 //   if (%pstate.before.call != 1)
 //     smstop (pstate_za|pstate_sm)
 //
 def : Pat<(AArch64_smstart (i32 svcr_op:$pstate), (i64 0), (i64 1)),  // before call
           (MSRpstatesvcrImm1 svcr_op:$pstate, 0b1)>;
 def : Pat<(AArch64_smstop (i32 svcr_op:$pstate), (i64 0), (i64 1)),   // after call
           (MSRpstatesvcrImm1 svcr_op:$pstate, 0b0)>;
 
-// The generic case which gets expanded to a pseudo node.
-def : Pat<(AArch64_smstart (i32 svcr_op:$pstate), (i64 GPR64:$rtpstate), (i64 timm0_1:$expected_pstate)),
-          (MSRpstatePseudo svcr_op:$pstate, 0b1, GPR64:$rtpstate, timm0_1:$expected_pstate)>;
-def : Pat<(AArch64_smstop (i32 svcr_op:$pstate), (i64 GPR64:$rtpstate), (i64 timm0_1:$expected_pstate)),
-          (MSRpstatePseudo svcr_op:$pstate, 0b0, GPR64:$rtpstate, timm0_1:$expected_pstate)>;
-
 // Read and write TPIDR2_EL0
 def : Pat<(int_aarch64_sme_set_tpidr2 i64:$val),
           (MSR 0xde85, GPR64:$val)>;
 def : Pat<(i64 (int_aarch64_sme_get_tpidr2)),
           (MRS 0xde85)>;
 
 def OBSCURE_COPY : Pseudo<(outs GPR64:$dst), (ins GPR64:$idx), []>, Sched<[]> { }
 def : Pat<(i64 (AArch64ObscureCopy (i64 GPR64:$idx))),
           (OBSCURE_COPY GPR64:$idx)>;
 } // End let Predicates = [HasSME]
 
+// Pseudo to match to smstart/smstop. This expands:
+//
+//  pseudonode (pstate_za|pstate_sm), before_call, expected_value
+//
+// Into:
+//
+//   if (before_call != expected_value)
+//     node (pstate_za|pstate_sm)
+//
+// where node can be either 'smstart' or 'smstop'.
+//
+// This pseudo and corresponding patterns don't need to be predicated by SME,
+// because when they're emitted for streaming-compatible functions and run
+// in a non-SME context the generated code-paths will never execute any
+// SME instructions.
+def MSRpstatePseudo :
+  Pseudo<(outs),
+           (ins svcr_op:$pstatefield, timm0_1:$imm, GPR64:$rtpstate, timm0_1:$expected_pstate, variable_ops), []>,
+    Sched<[WriteSys]>;
+
+def : Pat<(AArch64_smstart (i32 svcr_op:$pstate), (i64 GPR64:$rtpstate), (i64 timm0_1:$expected_pstate)),
+          (MSRpstatePseudo svcr_op:$pstate, 0b1, GPR64:$rtpstate, timm0_1:$expected_pstate)>;
+def : Pat<(AArch64_smstop (i32 svcr_op:$pstate), (i64 GPR64:$rtpstate), (i64 timm0_1:$expected_pstate)),
+          (MSRpstatePseudo svcr_op:$pstate, 0b0, GPR64:$rtpstate, timm0_1:$expected_pstate)>;
+
 //===----------------------------------------------------------------------===//
 // SME2 Instructions
 //===----------------------------------------------------------------------===//
 let Predicates = [HasSME2] in {
 defm ADD_VG2_M2ZZ_S  : sme2_dot_mla_add_sub_array_vg2_single<"add", 0b0011010, MatrixOp32, ZZ_s, ZPR4b32, nxv4i32, int_aarch64_sme_add_write_single_za_vg1x2>;
 defm ADD_VG4_M4ZZ_S  : sme2_dot_mla_add_sub_array_vg4_single<"add", 0b0111010, MatrixOp32, ZZZZ_s, ZPR4b32, nxv4i32, int_aarch64_sme_add_write_single_za_vg1x4>;
 defm ADD_VG2_M2Z2Z_S : sme2_dot_mla_add_sub_array_vg2_multi<"add", 0b011010, MatrixOp32, ZZ_s_mul_r, nxv4i32, int_aarch64_sme_add_write_za_vg1x2>;
 defm ADD_VG4_M4Z4Z_S : sme2_dot_mla_add_sub_array_vg4_multi<"add", 0b011010, MatrixOp32, ZZZZ_s_mul_r, nxv4i32, int_aarch64_sme_add_write_za_vg1x4>;

llvm/lib/Target/AArch64/AArch64TargetMachine.cpp

if (!I) {
     resetTargetOptions(F);
     I = std::make_unique<AArch64Subtarget>(
         TargetTriple, CPU, TuneCPU, FS, *this, isLittle, MinSVEVectorSize,
         MaxSVEVectorSize, StreamingSVEMode, StreamingCompatibleSVEMode);
   }
 
   assert((!StreamingSVEMode || I->hasSME()) &&
          "Expected SME to be available");
-  assert((!StreamingCompatibleSVEMode || I->hasSVEorSME()) &&
-         "Expected SVE or SME to be available");
 
   return I.get();
 }
 
 void AArch64leTargetMachine::anchor() { }
 
 AArch64leTargetMachine::AArch64leTargetMachine(
     const Target &T, const Triple &TT, StringRef CPU, StringRef FS,

llvm/lib/Target/AArch64/SMEInstrFormats.td

 //===----------------------------------------------------------------------===//
 // SME pattern match helpers.
 //===----------------------------------------------------------------------===//
 
 class SME_ZA_Tile_TwoPred_TwoVec_Pat<string name, SDPatternOperator intrinsic, Operand imm_ty, ValueType pg_ty, ValueType vt>
     : Pat<(intrinsic imm_ty:$tile, (pg_ty PPR3bAny:$Pn), (pg_ty PPR3bAny:$Pm), vt:$Zn, vt:$Zm),
           (!cast<Instruction>(name # _PSEUDO) $tile, $Pn, $Pm, $Zn, $Zm)>;
 
+
+//===----------------------------------------------------------------------===//
+// SME smstart/smstop
+//===----------------------------------------------------------------------===//
+
+// SME defines three pstate fields to set or clear PSTATE.SM, PSTATE.ZA, or
+// both fields:
+//
+//   MSR SVCRSM, #<imm1>
+//   MSR SVCRZA, #<imm1>
+//   MSR SVCRSMZA, #<imm1>
+//
+// It's tricky to using the existing pstate operand defined in
+// AArch64SystemOperands.td since it only encodes 5 bits including op1;op2,
+// when these fields are also encoded in CRm[3:1].
+def MSRpstatesvcrImm1
+  : PstateWriteSimple<(ins svcr_op:$pstatefield, timm0_1:$imm), "msr",
+                      "\t$pstatefield, $imm">,
+    Sched<[WriteSys]> {
+  bits<3> pstatefield;
+  bit imm;
+  let Inst{18-16} = 0b011; // op1
+  let Inst{11-9} = pstatefield;
+  let Inst{8} = imm;
+  let Inst{7-5} = 0b011; // op2
+}
+
+def : InstAlias<"smstart",    (MSRpstatesvcrImm1 0b011, 0b1)>;
+def : InstAlias<"smstart sm", (MSRpstatesvcrImm1 0b001, 0b1)>;
+def : InstAlias<"smstart za", (MSRpstatesvcrImm1 0b010, 0b1)>;
+
+def : InstAlias<"smstop",     (MSRpstatesvcrImm1 0b011, 0b0)>;
+def : InstAlias<"smstop sm",  (MSRpstatesvcrImm1 0b001, 0b0)>;
+def : InstAlias<"smstop za",  (MSRpstatesvcrImm1 0b010, 0b0)>;
+
+
 //===----------------------------------------------------------------------===//
 // SME Outer Products
 //===----------------------------------------------------------------------===//
 
 class sme_fp_outer_product_inst<bit S, bits<2> sz, bit op, MatrixTileOperand za_ty,
                                 ZPRRegOp zpr_ty, string mnemonic>
     : I<(outs za_ty:$ZAda),
       (ins za_ty:$_ZAda, PPR3bAny:$Pn, PPR3bAny:$Pm, zpr_ty:$Zn, zpr_ty:$Zm),

llvm/test/CodeGen/AArch64/sme-call-streaming-compatible-to-normal-fn-wihout-sme-attr.ll

+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
+; RUN: llc < %s | FileCheck %s
+
+; Verify that the following code can be compiled without +sme, because if the
+; call is not entered in streaming-SVE mode at runtime, the codepath leading
+; to the smstop/smstart pair will not be executed either.
+
+target triple = "aarch64"
+
+define void @streaming_compatible() #0 {
+; CHECK-LABEL: streaming_compatible:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    stp d15, d14, [sp, #-80]! // 16-byte Folded Spill
+; CHECK-NEXT:    stp d13, d12, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT:    stp d11, d10, [sp, #32] // 16-byte Folded Spill
+; CHECK-NEXT:    stp d9, d8, [sp, #48] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x30, x19, [sp, #64] // 16-byte Folded Spill
+; CHECK-NEXT:    bl __arm_sme_state
+; CHECK-NEXT:    and x19, x0, #0x1
+; CHECK-NEXT:    tbz x19, #0, .LBB0_2
+; CHECK-NEXT:  // %bb.1:
+; CHECK-NEXT:    smstop sm
+; CHECK-NEXT:  .LBB0_2:
+; CHECK-NEXT:    bl non_streaming
+; CHECK-NEXT:    tbz x19, #0, .LBB0_4
+; CHECK-NEXT:  // %bb.3:
+; CHECK-NEXT:    smstart sm
+; CHECK-NEXT:  .LBB0_4:
+; CHECK-NEXT:    ldp x30, x19, [sp, #64] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp d9, d8, [sp, #48] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp d11, d10, [sp, #32] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp d13, d12, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp d15, d14, [sp], #80 // 16-byte Folded Reload
+; CHECK-NEXT:    ret
+  call void @non_streaming()
+  ret void
+}
+
+declare void @non_streaming()
+
+attributes #0 = { nounwind "aarch64_pstate_sm_compatible" }

llvm/test/MC/AArch64/SME/directives-negative.s

 // RUN: not llvm-mc -triple aarch64 -o - %s 2>&1 | FileCheck %s
 
 .arch_extension sme
 .arch_extension nosme
-smstart
+zero {za}
 // CHECK: error: instruction requires: sme
-// CHECK-NEXT: smstart
+// CHECK-NEXT: zero {za}
 
 .arch_extension sme-f64f64
 .arch_extension nosme-f64f64
 fmopa za0.d, p0/m, p0/m, z0.d, z0.d
 // CHECK: error: instruction requires: sme-f64f64
 // CHECK-NEXT: fmopa za0.d, p0/m, p0/m, z0.d, z0.d
 
 .arch_extension sme-i16i64
 .arch_extension nosme-i16i64
 addha za0.d, p0/m, p0/m, z0.d
 // CHECK: error: instruction requires: sme-i16i64
 // CHECK-NEXT: addha za0.d, p0/m, p0/m, z0.d
 
 .arch armv9-a+sme
 .arch armv9-a+nosme
-smstart
+zero {za}
 // CHECK: error: instruction requires: sme
-// CHECK-NEXT: smstart
+// CHECK-NEXT: zero {za}
 
 .arch armv9-a+sme-f64f64
 .arch armv9-a+nosme-f64f64
 fmopa za0.d, p0/m, p0/m, z0.d, z0.d
 // CHECK: error: instruction requires: sme-f64f64
 // CHECK-NEXT: fmopa za0.d, p0/m, p0/m, z0.d, z0.d
 
 .arch armv9-a+sme-i16i64
 .arch armv9-a+nosme-i16i64
 addha za0.d, p0/m, p0/m, z0.d
 // CHECK: error: instruction requires: sme-i16i64
 // CHECK-NEXT: addha za0.d, p0/m, p0/m, z0.d

llvm/test/MC/AArch64/SME/smstart.s

 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \
 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
-// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
-// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \
 // RUN:        | llvm-objdump -d --mattr=+sme - | FileCheck %s --check-prefix=CHECK-INST
 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \
-// RUN:   | llvm-objdump -d --mattr=-sme - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+// RUN:        | llvm-objdump -d --mattr=-sme - | FileCheck %s --check-prefix=CHECK-INST
 
 smstart
 // CHECK-INST: smstart
 // CHECK-ENCODING: [0x7f,0x47,0x03,0xd5]
-// CHECK-ERROR: instruction requires: sme
-// CHECK-UNKNOWN: d503477f   msr   S0_3_C4_C7_3, xzr
 
 smstart sm
 // CHECK-INST: smstart sm
 // CHECK-ENCODING: [0x7f,0x43,0x03,0xd5]
-// CHECK-ERROR: instruction requires: sme
-// CHECK-UNKNOWN: d503437f   msr   S0_3_C4_C3_3, xzr
 
 smstart za
 // CHECK-INST: smstart za
 // CHECK-ENCODING: [0x7f,0x45,0x03,0xd5]
-// CHECK-ERROR: instruction requires: sme
-// CHECK-UNKNOWN: d503457f   msr   S0_3_C4_C5_3, xzr
 
 smstart SM
 // CHECK-INST: smstart sm
 // CHECK-ENCODING: [0x7f,0x43,0x03,0xd5]
-// CHECK-ERROR: instruction requires: sme
-// CHECK-UNKNOWN: d503437f   msr   S0_3_C4_C3_3, xzr
 
 smstart ZA
 // CHECK-INST: smstart za
 // CHECK-ENCODING: [0x7f,0x45,0x03,0xd5]
-// CHECK-ERROR: instruction requires: sme
-// CHECK-UNKNOWN: d503457f   msr   S0_3_C4_C5_3, xzr

llvm/test/MC/AArch64/SME/smstop.s

 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \
 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
-// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
-// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \
 // RUN:        | llvm-objdump -d --mattr=+sme - | FileCheck %s --check-prefix=CHECK-INST
 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \
-// RUN:   | llvm-objdump -d --mattr=-sme - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+// RUN:        | llvm-objdump -d --mattr=-sme - | FileCheck %s --check-prefix=CHECK-INST
 
 smstop
 // CHECK-INST: smstop
 // CHECK-ENCODING: [0x7f,0x46,0x03,0xd5]
-// CHECK-ERROR: instruction requires: sme
-// CHECK-UNKNOWN: d503467f   msr   S0_3_C4_C6_3, xzr
 
 smstop sm
 // CHECK-INST: smstop sm
 // CHECK-ENCODING: [0x7f,0x42,0x03,0xd5]
-// CHECK-ERROR: instruction requires: sme
-// CHECK-UNKNOWN: d503427f   msr   S0_3_C4_C2_3, xzr
 
 smstop za
 // CHECK-INST: smstop za
 // CHECK-ENCODING: [0x7f,0x44,0x03,0xd5]
-// CHECK-ERROR: instruction requires: sme
-// CHECK-UNKNOWN: d503447f   msr   S0_3_C4_C4_3, xzr
 
 smstop SM
 // CHECK-INST: smstop sm
 // CHECK-ENCODING: [0x7f,0x42,0x03,0xd5]
-// CHECK-ERROR: instruction requires: sme
-// CHECK-UNKNOWN: d503427f   msr   S0_3_C4_C2_3, xzr
 
 smstop ZA
 // CHECK-INST: smstop za
 // CHECK-ENCODING: [0x7f,0x44,0x03,0xd5]
-// CHECK-ERROR: instruction requires: sme
-// CHECK-UNKNOWN: d503447f   msr   S0_3_C4_C4_3, xzr

llvm/test/MC/AArch64/SME/system-regs.s

 // CHECK-ENCODING: [0xa3,0x12,0x1c,0xd5]
 // CHECK-ERROR: expected writable system register or pstate
 // CHECK-UNKNOWN: d51c12a3   msr   S3_4_C1_C2_5, x3
 
 msr SVCRSM, #0
 // CHECK-INST: smstop sm
 // CHECK-ENCODING: [0x7f,0x42,0x03,0xd5]
 // CHECK-ERROR: expected writable system register or pstate
-// CHECK-UNKNOWN: d503427f   msr   S0_3_C4_C2_3, xzr
+// CHECK-UNKNOWN: d503427f   smstop sm
 
 msr SVCRSM, #1
 // CHECK-INST: smstart
 // CHECK-ENCODING: [0x7f,0x43,0x03,0xd5]
 // CHECK-ERROR: expected writable system register or pstate
-// CHECK-UNKNOWN: d503437f   msr   S0_3_C4_C3_3, xzr
+// CHECK-UNKNOWN: d503437f   smstart
 
 msr SVCRZA, #0
 // CHECK-INST: smstop za
 // CHECK-ENCODING: [0x7f,0x44,0x03,0xd5]
 // CHECK-ERROR: expected writable system register or pstate
-// CHECK-UNKNOWN: d503447f   msr   S0_3_C4_C4_3, xzr
+// CHECK-UNKNOWN: d503447f   smstop za
 
 msr SVCRZA, #1
 // CHECK-INST: smstart za
 // CHECK-ENCODING: [0x7f,0x45,0x03,0xd5]
 // CHECK-ERROR: expected writable system register or pstate
-// CHECK-UNKNOWN: d503457f   msr   S0_3_C4_C5_3, xzr
+// CHECK-UNKNOWN: d503457f   smstart za
 
 msr SVCRSMZA, #0
 // CHECK-INST: smstop
 // CHECK-ENCODING: [0x7f,0x46,0x03,0xd5]
 // CHECK-ERROR: expected writable system register or pstate
-// CHECK-UNKNOWN: d503467f   msr   S0_3_C4_C6_3, xzr
+// CHECK-UNKNOWN: d503467f   smstop
 
 msr SVCRSMZA, #1
 // CHECK-INST: smstart
 // CHECK-ENCODING: [0x7f,0x47,0x03,0xd5]
 // CHECK-ERROR: expected writable system register or pstate
-// CHECK-UNKNOWN: d503477f   msr   S0_3_C4_C7_3, xzr
+// CHECK-UNKNOWN: d503477f   smstart
 
 msr TPIDR2_EL0, x3
 // CHECK-INST: msr TPIDR2_EL0, x3
 // CHECK-ENCODING: [0xa3,0xd0,0x1b,0xd5]
 // CHECK-ERROR: expected writable system register or pstate
 // CHECK-UNKNOWN: d51bd0a3   msr   S3_3_C13_C0_5, x3