This is an archive of the discontinued LLVM Phabricator instance.

[AMDGPU] Don't suppress printing the .l and .h register suffixes.
ClosedPublic

Authored by kosarev on Jul 24 2023, 4:02 AM.

Details

Summary

We don't seem to have a use for the -amdgpu-keep-16-bit-reg-suffixes
option anymore. Was introduced in https://reviews.llvm.org/D79435.

Diff Detail

Event Timeline

kosarev created this revision.Jul 24 2023, 4:02 AM
Herald added a project: Restricted Project. · View Herald TranscriptJul 24 2023, 4:02 AM
kosarev requested review of this revision.Jul 24 2023, 4:02 AM
Herald added a project: Restricted Project. · View Herald TranscriptJul 24 2023, 4:02 AM
foad accepted this revision.Jul 24 2023, 6:32 AM
This revision is now accepted and ready to land.Jul 24 2023, 6:32 AM

I believe those register classes which would print .l or .h on those targets pre-GFX11 are not used in any instruction actually selected by ISel. But if there was, this would change the default assembly printing for them. Can you verify that there are none? It is a similar question to the one raised here https://reviews.llvm.org/D156105#4540254

I believe those register classes which would print .l or .h on those targets pre-GFX11 are not used in any instruction actually selected by ISel. But if there was, this would change the default assembly printing for them. Can you verify that there are none? It is a similar question to the one raised here https://reviews.llvm.org/D156105#4540254

I don't see any operand definitions using VGPR_LO/HI16. I think any instructions using them would fail on MC tests; it's registers that have the suffixes, not register classes, so codegen should be irrelevant.