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Joe_Nash (Joe Nash)
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User Since
Jul 21 2020, 2:19 PM (101 w, 6 d)

Recent Activity

Thu, Jun 30

Joe_Nash added inline comments to D128656: [AMDGPU] gfx11 Generate VOPD Instructions.
Thu, Jun 30, 2:21 PM · Restricted Project, Restricted Project
Joe_Nash updated the diff for D128656: [AMDGPU] gfx11 Generate VOPD Instructions.

combine cases in doReplace

Thu, Jun 30, 2:21 PM · Restricted Project, Restricted Project
Joe_Nash updated the diff for D128656: [AMDGPU] gfx11 Generate VOPD Instructions.

rebased

Thu, Jun 30, 1:12 PM · Restricted Project, Restricted Project
Joe_Nash committed rG4874838a63fb: [AMDGPU] gfx11 WMMA instruction support (authored by piotr).
[AMDGPU] gfx11 WMMA instruction support
Thu, Jun 30, 8:43 AM · Restricted Project, Restricted Project
Joe_Nash closed D128756: [AMDGPU] gfx11 WMMA instruction support.
Thu, Jun 30, 8:43 AM · Restricted Project, Restricted Project
Joe_Nash updated the diff for D128756: [AMDGPU] gfx11 WMMA instruction support.

invert op_sel_0 value check

Thu, Jun 30, 8:08 AM · Restricted Project, Restricted Project
Joe_Nash added inline comments to D128756: [AMDGPU] gfx11 WMMA instruction support.
Thu, Jun 30, 7:55 AM · Restricted Project, Restricted Project
Joe_Nash updated the diff for D128756: [AMDGPU] gfx11 WMMA instruction support.

better way to copy implicit operands

Thu, Jun 30, 7:55 AM · Restricted Project, Restricted Project

Wed, Jun 29

Joe_Nash updated the diff for D128756: [AMDGPU] gfx11 WMMA instruction support.

use Register() in place of NoRegister. Add implicit operands in convertToThreeAddress

Wed, Jun 29, 12:28 PM · Restricted Project, Restricted Project
Joe_Nash accepted D128802: [AMDGPU] Generate checks for clamp.ll and add GFX11.
Wed, Jun 29, 11:21 AM · Restricted Project, Restricted Project
Joe_Nash accepted D128270: [AMDGPU] New AMDGPUInsertDelayAlu pass.
Wed, Jun 29, 10:24 AM · Restricted Project, Restricted Project
Joe_Nash updated the diff for D128756: [AMDGPU] gfx11 WMMA instruction support.

Removed clang builtin from intrinsics. The builtins can be added in a later patch.

Wed, Jun 29, 8:11 AM · Restricted Project, Restricted Project

Tue, Jun 28

Joe_Nash updated the diff for D128682: [AMDGPU] gfx11 CodeGen for new DPP instructions.

call getDPPOp64 after early exit for DPP32

Tue, Jun 28, 1:21 PM · Restricted Project, Restricted Project
Joe_Nash added reviewers for D128756: [AMDGPU] gfx11 WMMA instruction support: foad, arsenm, rampitec, piotr, rdomingu, Restricted Project.
Tue, Jun 28, 1:16 PM · Restricted Project, Restricted Project
Joe_Nash requested review of D128756: [AMDGPU] gfx11 WMMA instruction support.
Tue, Jun 28, 1:15 PM · Restricted Project, Restricted Project
Joe_Nash updated the diff for D128682: [AMDGPU] gfx11 CodeGen for new DPP instructions.

Removed HasVOP3DPP parameter. explicit type instead of auto. Check ST->hasVOP3DPP before calling getDPPOp64

Tue, Jun 28, 7:13 AM · Restricted Project, Restricted Project
Joe_Nash added a reviewer for D128445: [AMDGPU] Add patterns for GFX11 v_minmax and v_maxmin instructions: arsenm.
Tue, Jun 28, 6:49 AM · Restricted Project, Restricted Project
Joe_Nash accepted D128259: [AMDGPU] llvm.amdgcn.exp.compr is not supported on GFX11.
Tue, Jun 28, 6:45 AM · Restricted Project, Restricted Project

Mon, Jun 27

Joe_Nash updated the diff for D128656: [AMDGPU] gfx11 Generate VOPD Instructions.

changed auto to explicit type, changed print syntax in dbg statement, fixed bad DBG_VALUE in test

Mon, Jun 27, 3:07 PM · Restricted Project, Restricted Project
Joe_Nash added reviewers for D128682: [AMDGPU] gfx11 CodeGen for new DPP instructions: Restricted Project, rampitec, vpykhtin, foad.
Mon, Jun 27, 2:08 PM · Restricted Project, Restricted Project
Joe_Nash requested review of D128682: [AMDGPU] gfx11 CodeGen for new DPP instructions.
Mon, Jun 27, 2:07 PM · Restricted Project, Restricted Project
Joe_Nash added reviewers for D128656: [AMDGPU] gfx11 Generate VOPD Instructions: Restricted Project, foad, rampitec, arsenm, critson, fhahn.
Mon, Jun 27, 8:46 AM · Restricted Project, Restricted Project
Joe_Nash added a comment to D128656: [AMDGPU] gfx11 Generate VOPD Instructions.

There may be some strange looking test changes related to s_delay_alu or s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) because I intend to rebase it on D128270 and D128442. Please ignore those for the moment.

Mon, Jun 27, 8:41 AM · Restricted Project, Restricted Project
Joe_Nash requested review of D128656: [AMDGPU] gfx11 Generate VOPD Instructions.
Mon, Jun 27, 8:38 AM · Restricted Project, Restricted Project

Fri, Jun 24

Joe_Nash added inline comments to D128527: [AMDGPU] Use GFX11 S_PACK_HL instruction in more cases.
Fri, Jun 24, 11:32 AM · Restricted Project, Restricted Project
Joe_Nash committed rG07b7fada73da: [AMDGPU] gfx11 VOPD instructions MC support (authored by Joe_Nash).
[AMDGPU] gfx11 VOPD instructions MC support
Fri, Jun 24, 8:38 AM · Restricted Project, Restricted Project
Joe_Nash closed D128218: [AMDGPU] gfx11 VOPD instructions MC support.
Fri, Jun 24, 8:38 AM · Restricted Project, Restricted Project
Joe_Nash accepted D128517: [AMDGPU] Cluster stores as well as loads for GFX11.
Fri, Jun 24, 6:32 AM · Restricted Project, Restricted Project
Joe_Nash added a comment to D128517: [AMDGPU] Cluster stores as well as loads for GFX11.

LGTM. Perhaps we want to add the store clustering to postRA scheduling as well?

Fri, Jun 24, 6:31 AM · Restricted Project, Restricted Project

Thu, Jun 23

Joe_Nash added inline comments to D128218: [AMDGPU] gfx11 VOPD instructions MC support.
Thu, Jun 23, 12:15 PM · Restricted Project, Restricted Project
Joe_Nash updated the diff for D128218: [AMDGPU] gfx11 VOPD instructions MC support.

fixed formatting, deduplicated VOP2eInst, named a variable

Thu, Jun 23, 12:15 PM · Restricted Project, Restricted Project
Joe_Nash committed rGae72fee74ece: [AMDGPU] gfx11 Select on Buffer Atomic FAdd Rtn type (authored by Joe_Nash).
[AMDGPU] gfx11 Select on Buffer Atomic FAdd Rtn type
Thu, Jun 23, 8:35 AM · Restricted Project, Restricted Project
Joe_Nash closed D128205: [AMDGPU] gfx11 Select on Buffer Atomic FAdd Rtn type.
Thu, Jun 23, 8:35 AM · Restricted Project, Restricted Project
Joe_Nash added inline comments to D128205: [AMDGPU] gfx11 Select on Buffer Atomic FAdd Rtn type.
Thu, Jun 23, 7:59 AM · Restricted Project, Restricted Project
Joe_Nash updated the diff for D128205: [AMDGPU] gfx11 Select on Buffer Atomic FAdd Rtn type.

removed return after else

Thu, Jun 23, 7:59 AM · Restricted Project, Restricted Project

Wed, Jun 22

Joe_Nash accepted D128369: [AMDGPU][MC][GFX11] Correct disassembly of VOP3.DPP8 opcodes.

Thanks for all the tests, I only verified a couple but it seems reasonable. LGTM.

Wed, Jun 22, 1:34 PM · Restricted Project, Restricted Project
Joe_Nash updated the diff for D128205: [AMDGPU] gfx11 Select on Buffer Atomic FAdd Rtn type.

added globalisel support

Wed, Jun 22, 10:37 AM · Restricted Project, Restricted Project

Tue, Jun 21

Joe_Nash committed rG90254d524f29: [AMDGPU] gfx11 Remove SDWA from shuffle_vector ISel (authored by Joe_Nash).
[AMDGPU] gfx11 Remove SDWA from shuffle_vector ISel
Tue, Jun 21, 12:25 PM · Restricted Project, Restricted Project
Joe_Nash closed D128208: [AMDGPU] gfx11 Remove SDWA from shuffle_vector ISel.
Tue, Jun 21, 12:24 PM · Restricted Project, Restricted Project
Joe_Nash accepted D128179: [AMDGPU] Update SPI_SHADER_PGM_RSRC2_PS.EXTRA_LDS_SIZE for GFX11.
Tue, Jun 21, 6:35 AM · Restricted Project, Restricted Project

Mon, Jun 20

Joe_Nash added reviewers for D128218: [AMDGPU] gfx11 VOPD instructions MC support: Restricted Project, foad, rampitec, dp, arsenm.
Mon, Jun 20, 11:18 AM · Restricted Project, Restricted Project
Joe_Nash requested review of D128218: [AMDGPU] gfx11 VOPD instructions MC support.
Mon, Jun 20, 11:15 AM · Restricted Project, Restricted Project
Joe_Nash added reviewers for D128208: [AMDGPU] gfx11 Remove SDWA from shuffle_vector ISel: Restricted Project, foad, rampitec, arsenm.
Mon, Jun 20, 7:48 AM · Restricted Project, Restricted Project
Joe_Nash requested review of D128208: [AMDGPU] gfx11 Remove SDWA from shuffle_vector ISel.
Mon, Jun 20, 7:47 AM · Restricted Project, Restricted Project
Joe_Nash added reviewers for D128205: [AMDGPU] gfx11 Select on Buffer Atomic FAdd Rtn type: Restricted Project, foad, rampitec, Petar.Avramovic.
Mon, Jun 20, 7:24 AM · Restricted Project, Restricted Project
Joe_Nash requested review of D128205: [AMDGPU] gfx11 Select on Buffer Atomic FAdd Rtn type.
Mon, Jun 20, 7:23 AM · Restricted Project, Restricted Project
Joe_Nash accepted D128189: [AMDGPU] Increase instruction cache line size to 128 bytes for GFX11.
Mon, Jun 20, 6:22 AM · Restricted Project, Restricted Project

Fri, Jun 17

Joe_Nash accepted D128075: [AMDGPU][MC][GFX11] Correct disassembly of DPP variants of VOPC64 opcodes.

LGTM

Fri, Jun 17, 12:50 PM · Restricted Project, Restricted Project
Joe_Nash accepted D128054: [AMDGPU] Limit GFX11 to using 128 VGPRs.
Fri, Jun 17, 11:47 AM · Restricted Project, Restricted Project
Joe_Nash added a comment to D128075: [AMDGPU][MC][GFX11] Correct disassembly of DPP variants of VOPC64 opcodes.

Overall looks good, thanks!

Fri, Jun 17, 11:31 AM · Restricted Project, Restricted Project
Joe_Nash added inline comments to D127756: [AMDGPU] gfx11 VINTERP intrinsics and ISel support.
Fri, Jun 17, 10:00 AM · Restricted Project, Restricted Project
Joe_Nash added inline comments to D127664: [AMDGPU] gfx11 ldsdir intrinsics and ISel.
Fri, Jun 17, 9:59 AM · Restricted Project, Restricted Project
Joe_Nash committed rG75378d432fda: [AMDGPU] NFC. Change comment format on gfx11 interp and ldsdir intrinsics (authored by Joe_Nash).
[AMDGPU] NFC. Change comment format on gfx11 interp and ldsdir intrinsics
Fri, Jun 17, 9:58 AM · Restricted Project, Restricted Project
Joe_Nash committed rG2a683647455f: [AMDGPU] gfx11 waitcnt support for VINTERP and LDSDIR instructions (authored by Joe_Nash).
[AMDGPU] gfx11 waitcnt support for VINTERP and LDSDIR instructions
Fri, Jun 17, 7:00 AM · Restricted Project, Restricted Project
Joe_Nash closed D127781: [AMDGPU] gfx11 waitcnt support for VINTERP and LDSDIR instructions.
Fri, Jun 17, 7:00 AM · Restricted Project, Restricted Project
Joe_Nash committed rG20d20156f4ce: [AMDGPU] gfx11 VINTERP intrinsics and ISel support (authored by Joe_Nash).
[AMDGPU] gfx11 VINTERP intrinsics and ISel support
Fri, Jun 17, 6:46 AM · Restricted Project, Restricted Project
Joe_Nash closed D127756: [AMDGPU] gfx11 VINTERP intrinsics and ISel support.
Fri, Jun 17, 6:46 AM · Restricted Project, Restricted Project
Joe_Nash committed rG6d5d8b131300: [AMDGPU] gfx11 ldsdir intrinsics and ISel (authored by Joe_Nash).
[AMDGPU] gfx11 ldsdir intrinsics and ISel
Fri, Jun 17, 6:33 AM · Restricted Project, Restricted Project
Joe_Nash closed D127664: [AMDGPU] gfx11 ldsdir intrinsics and ISel.
Fri, Jun 17, 6:32 AM · Restricted Project, Restricted Project

Thu, Jun 16

Joe_Nash added inline comments to D127664: [AMDGPU] gfx11 ldsdir intrinsics and ISel.
Thu, Jun 16, 1:44 PM · Restricted Project, Restricted Project
Joe_Nash committed rG2d43de13df03: [AMDGPU] gfx11 new dot instruction codegen support (authored by Joe_Nash).
[AMDGPU] gfx11 new dot instruction codegen support
Thu, Jun 16, 11:49 AM · Restricted Project, Restricted Project, Restricted Project
Joe_Nash closed D127904: [AMDGPU] gfx11 new dot instruction codegen support.
Thu, Jun 16, 11:49 AM · Restricted Project, Restricted Project, Restricted Project
Joe_Nash added inline comments to D127664: [AMDGPU] gfx11 ldsdir intrinsics and ISel.
Thu, Jun 16, 11:35 AM · Restricted Project, Restricted Project
Joe_Nash added a reviewer for D127664: [AMDGPU] gfx11 ldsdir intrinsics and ISel: rampitec.
Thu, Jun 16, 10:21 AM · Restricted Project, Restricted Project
Joe_Nash added inline comments to D127904: [AMDGPU] gfx11 new dot instruction codegen support.
Thu, Jun 16, 9:56 AM · Restricted Project, Restricted Project, Restricted Project
Joe_Nash updated the diff for D127904: [AMDGPU] gfx11 new dot instruction codegen support.

added builtin positive tests, removed clamp from intrinsic comments, combined gisel with normal codegen test

Thu, Jun 16, 8:28 AM · Restricted Project, Restricted Project, Restricted Project
Joe_Nash updated the diff for D127664: [AMDGPU] gfx11 ldsdir intrinsics and ISel.

added globalisel runlines to codegen test

Thu, Jun 16, 6:18 AM · Restricted Project, Restricted Project

Wed, Jun 15

Joe_Nash added a comment to D127664: [AMDGPU] gfx11 ldsdir intrinsics and ISel.

I think all outstanding issues are addressed; please take another look.

Wed, Jun 15, 1:45 PM · Restricted Project, Restricted Project
Joe_Nash updated the diff for D127664: [AMDGPU] gfx11 ldsdir intrinsics and ISel.

removed builtin from intrinsic definition

Wed, Jun 15, 1:45 PM · Restricted Project, Restricted Project
Joe_Nash added reviewers for D127904: [AMDGPU] gfx11 new dot instruction codegen support: Restricted Project, Petar.Avramovic, arsen.
Wed, Jun 15, 1:41 PM · Restricted Project, Restricted Project, Restricted Project
Joe_Nash requested review of D127904: [AMDGPU] gfx11 new dot instruction codegen support.
Wed, Jun 15, 1:40 PM · Restricted Project, Restricted Project, Restricted Project
Joe_Nash updated the diff for D127664: [AMDGPU] gfx11 ldsdir intrinsics and ISel.

added s_mov m0 to param.load test

Wed, Jun 15, 7:21 AM · Restricted Project, Restricted Project
Joe_Nash updated the diff for D127756: [AMDGPU] gfx11 VINTERP intrinsics and ISel support.

removed builtins

Wed, Jun 15, 7:14 AM · Restricted Project, Restricted Project
Joe_Nash added inline comments to D127664: [AMDGPU] gfx11 ldsdir intrinsics and ISel.
Wed, Jun 15, 7:07 AM · Restricted Project, Restricted Project
Joe_Nash updated the diff for D127664: [AMDGPU] gfx11 ldsdir intrinsics and ISel.

changed return type of lds_direct_load and commented on input argument type

Wed, Jun 15, 7:06 AM · Restricted Project, Restricted Project
Joe_Nash accepted D127847: [AMDGPU][MC][GFX11] Correct src0 for dpp and dpp8 variants of v_cvt_*_e64.

Nice find, thanks! LGTM

Wed, Jun 15, 6:26 AM · Restricted Project, Restricted Project

Tue, Jun 14

Joe_Nash added a reviewer for D127781: [AMDGPU] gfx11 waitcnt support for VINTERP and LDSDIR instructions: Restricted Project.
Tue, Jun 14, 1:43 PM · Restricted Project, Restricted Project
Joe_Nash requested review of D127781: [AMDGPU] gfx11 waitcnt support for VINTERP and LDSDIR instructions.
Tue, Jun 14, 1:42 PM · Restricted Project, Restricted Project
Joe_Nash added a reviewer for D127664: [AMDGPU] gfx11 ldsdir intrinsics and ISel: piotr.
Tue, Jun 14, 8:55 AM · Restricted Project, Restricted Project
Joe_Nash added reviewers for D127756: [AMDGPU] gfx11 VINTERP intrinsics and ISel support: piotr, Restricted Project.
Tue, Jun 14, 8:53 AM · Restricted Project, Restricted Project
Joe_Nash requested review of D127756: [AMDGPU] gfx11 VINTERP intrinsics and ISel support.
Tue, Jun 14, 8:53 AM · Restricted Project, Restricted Project
Joe_Nash committed rG989bd57f9879: [AMDGPU] gfx11 support add_f16 (authored by Joe_Nash).
[AMDGPU] gfx11 support add_f16
Tue, Jun 14, 6:29 AM · Restricted Project, Restricted Project
Joe_Nash closed D127697: [AMDGPU] gfx11 support add_f16.
Tue, Jun 14, 6:29 AM · Restricted Project, Restricted Project
Joe_Nash added a comment to D127527: [AMDGPU] Define SGPR_NULL64 register. NFCI..

LGTM, but could there be more opportunities to use this?
Are there cases where we want to have value 0 in a source operand (a normal VSrc, not VOPDstS64orS32 like is used in https://reviews.llvm.org/D127542), it can't be folded, and we could use sgpr null 64? It might be interesting to have a test case for that with folding excluded.

0 is inline literal, so usually we can use inline 0 instead.

I can see one marginal case where a 64 bit add/sub is expanded and we are unable to shrink the first instruction so produce V_ADD_CO_CI_U32/V_SUB_CO_CI_U32, e.g. add or sub with an SGPR operand. Here null can be used as a carry-in.

And even this case is impractical. On gfx10 we can use 2 constants, so addc with a vgpr and sgpr will fall down to be shrunk and use vcc as a carry-in, and an operation with 2 sgprs will be SALU.

Tue, Jun 14, 6:10 AM · Restricted Project, Restricted Project

Mon, Jun 13

Joe_Nash added a reviewer for D127697: [AMDGPU] gfx11 support add_f16: Restricted Project.
Mon, Jun 13, 2:12 PM · Restricted Project, Restricted Project
Joe_Nash requested review of D127697: [AMDGPU] gfx11 support add_f16.
Mon, Jun 13, 2:12 PM · Restricted Project, Restricted Project
Joe_Nash added a comment to D127527: [AMDGPU] Define SGPR_NULL64 register. NFCI..

LGTM, but could there be more opportunities to use this?
Are there cases where we want to have value 0 in a source operand (a normal VSrc, not VOPDstS64orS32 like is used in https://reviews.llvm.org/D127542), it can't be folded, and we could use sgpr null 64? It might be interesting to have a test case for that with folding excluded.

Mon, Jun 13, 1:30 PM · Restricted Project, Restricted Project
Joe_Nash added a comment to D127664: [AMDGPU] gfx11 ldsdir intrinsics and ISel.

Can we also add something like test/CodeGen/AMDGPU/llvm.amdgcn.lds.direct.load.ll and test/CodeGen/AMDGPU/llvm.amdgcn.lds.param.load.ll to test codegen?

Mon, Jun 13, 9:27 AM · Restricted Project, Restricted Project
Joe_Nash updated the diff for D127664: [AMDGPU] gfx11 ldsdir intrinsics and ISel.

added ISA codegen test.

Mon, Jun 13, 9:26 AM · Restricted Project, Restricted Project
Joe_Nash added a reviewer for D127664: [AMDGPU] gfx11 ldsdir intrinsics and ISel: Restricted Project.
Mon, Jun 13, 8:51 AM · Restricted Project, Restricted Project
Joe_Nash requested review of D127664: [AMDGPU] gfx11 ldsdir intrinsics and ISel.
Mon, Jun 13, 8:50 AM · Restricted Project, Restricted Project

Fri, Jun 10

Joe_Nash committed rGff85d61a6e18: Update *_TMPRING_SIZE.WAVESIZE for GFX11 (authored by foad).
Update *_TMPRING_SIZE.WAVESIZE for GFX11
Fri, Jun 10, 10:52 AM · Restricted Project, Restricted Project
Joe_Nash closed D127248: Update *_TMPRING_SIZE.WAVESIZE for GFX11.
Fri, Jun 10, 10:52 AM · Restricted Project, Restricted Project
Joe_Nash committed rGea3c9a87d344: [AMDGPU] gfx11 add bits to COMPUTE_PGM_RSRC3 (authored by Joe_Nash).
[AMDGPU] gfx11 add bits to COMPUTE_PGM_RSRC3
Fri, Jun 10, 10:35 AM · Restricted Project, Restricted Project
Joe_Nash closed D127241: [AMDGPU] gfx11 add bits to COMPUTE_PGM_RSRC3.
Fri, Jun 10, 10:35 AM · Restricted Project, Restricted Project
Joe_Nash committed rG78d8fdb88bc3: [AMDGPU] NFC. Comment change to GFX10+ in AsmParser (authored by Joe_Nash).
[AMDGPU] NFC. Comment change to GFX10+ in AsmParser
Fri, Jun 10, 10:03 AM · Restricted Project, Restricted Project
Joe_Nash committed rG9175ab774608: [AMDGPU] gfx11 SRC_POPS_EXISTING_WAVE_ID is removed (authored by Joe_Nash).
[AMDGPU] gfx11 SRC_POPS_EXISTING_WAVE_ID is removed
Fri, Jun 10, 10:00 AM · Restricted Project, Restricted Project
Joe_Nash committed rGfd3304ef8545: [AMDGPU] gfx11 EXECZ and VCCZ are no longer allowed to be used as (authored by Joe_Nash).
[AMDGPU] gfx11 EXECZ and VCCZ are no longer allowed to be used as
Fri, Jun 10, 7:32 AM · Restricted Project, Restricted Project
Joe_Nash closed D127143: [AMDGPU] gfx11 EXECZ and VCCZ are no longer allowed to be used as.
Fri, Jun 10, 7:31 AM · Restricted Project, Restricted Project

Thu, Jun 9

Joe_Nash committed rGbe1082c6d54d: [AMDGPU] gfx11 VOPC instructions (authored by Joe_Nash).
[AMDGPU] gfx11 VOPC instructions
Thu, Jun 9, 12:51 PM · Restricted Project, Restricted Project