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Joe_Nash (Joe Nash)
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Jul 21 2020, 2:19 PM (140 w, 3 d)

Recent Activity

Thu, Mar 30

Joe_Nash accepted D147127: [TableGen] Enable "Type set is empty for each HW mode" error in non-debug builds.

I think this can catch bugs earlier, LGTM.

Thu, Mar 30, 12:02 PM · Restricted Project, Restricted Project

Wed, Mar 29

Joe_Nash added a comment to D147158: [AMDGPU] Do not reserve 16-bit registers.

I am not so sure about SGPRs. I believe it is legal to use SGPR halves.

It appears that this patch does not change anything about the legality of allocating registers in class SGPR_LO16.

But if we will allow SGPRs this code will be needed on older targets again.

Wed, Mar 29, 1:07 PM · Restricted Project, Restricted Project
Joe_Nash added a comment to D147158: [AMDGPU] Do not reserve 16-bit registers.

SGPR_HI16 is already marked as not allocatable. So L611 was partially redundant with that. But this patch does appear to remove a barrier to allocating into the hi or lo half of TMA_LO or some other non-GPR SReg.
I guess there is other code somewhere preventing allocating to those non-GPR SReg? If so, this patch can be marked NFC and the commit reworded to say it skips redundant reservations.

Wed, Mar 29, 12:53 PM · Restricted Project, Restricted Project

Wed, Mar 22

Joe_Nash accepted D146646: [CodeGen] Fix type of MachineRegisterInfo::RegAllocHints. NFC..

LGTM

Wed, Mar 22, 11:26 AM · Restricted Project, Restricted Project

Fri, Mar 10

Joe_Nash accepted D145711: [llvm-tblgen] Support conditional definitions using !casts clauses.

This looks like it fixes 49830, and I agree with foad it is useful in the AMDGPU backend. Functionally LGTM! Thanks for working on it.

Fri, Mar 10, 8:05 AM · Restricted Project, Restricted Project

Feb 22 2023

Joe_Nash added a comment to D144562: [NFC] Refine tests by adding `:` to checks.

I'm fine with the patch, but it's a shame the solution isn't more robust.
Its not self-evident why runline is written like that, so I expect uses without the ':' could creep back in.

Feb 22 2023, 1:19 PM · Restricted Project, Restricted Project
Joe_Nash committed rG80a8e6805ab8: [AMDGPU] Don't set src mods on permlane16 (authored by Joe_Nash).
[AMDGPU] Don't set src mods on permlane16
Feb 22 2023, 8:42 AM · Restricted Project, Restricted Project
Joe_Nash closed D144519: [AMDGPU] Don't set src mods on permlane16.
Feb 22 2023, 8:42 AM · Restricted Project, Restricted Project

Feb 21 2023

Joe_Nash added inline comments to D144519: [AMDGPU] Don't set src mods on permlane16.
Feb 21 2023, 1:43 PM · Restricted Project, Restricted Project
Joe_Nash added inline comments to D141643: AMDGPU: Put un-initiaized enumerators together in an enum definition..
Feb 21 2023, 1:36 PM · Restricted Project, Restricted Project
Joe_Nash requested review of D144519: [AMDGPU] Don't set src mods on permlane16.
Feb 21 2023, 1:36 PM · Restricted Project, Restricted Project
Joe_Nash added a comment to D144271: [AMDGPU][MC] Enable modifiers on V_MOV_B32.

Actually, I think due to the way the operand lists for _e32 instructions are constructed, the modifiers are not taking effect.
If you dump the tablegen records, if the change was effective there should be a src0_modifiers operand on the V_MOV_B32_e32 instruction.

I'd expect it to only be on v_mov_b32_e64?

I guess the spec was changed between gfx9 and gfx10. On gfx10 and newer the docs say modifiers are supported on VOP1 as well as VOP3. But in terms of what our backend would make with just the above patch, it seems the modifiers would be on v_mov_b32_e64 but not v_mov_b32_e32. Hence my ask to check the tablegen records.

There are no modifiers in VOP1 - there are no bits in the encoding for them.

Feb 21 2023, 7:10 AM · Restricted Project, Restricted Project

Feb 20 2023

Joe_Nash added a comment to D141643: AMDGPU: Put un-initiaized enumerators together in an enum definition..
  1. There is a bug in permlane16 selection I am working on and will put up a patch for soon
  2. I'm curious how AMDGPU/permlane-op-sel.ll test passes. When I run the runline "llc -march=amdgcn -mcpu=gfx1030 -show-mc-encoding" using ToT and check the output I get "v_permlane16_b32 v0, v0, s7, s0 op_sel:[1,0] ; encoding: [0x00,0x49,0x77,0xd7,0x00,0x0f,0x00,0x20]" not what is in the check line.
Feb 20 2023, 3:03 PM · Restricted Project, Restricted Project
Joe_Nash added a comment to D144271: [AMDGPU][MC] Enable modifiers on V_MOV_B32.

Actually, I think due to the way the operand lists for _e32 instructions are constructed, the modifiers are not taking effect.
If you dump the tablegen records, if the change was effective there should be a src0_modifiers operand on the V_MOV_B32_e32 instruction.

I'd expect it to only be on v_mov_b32_e64?

Feb 20 2023, 2:51 PM · Restricted Project, Restricted Project
Joe_Nash added a comment to D144271: [AMDGPU][MC] Enable modifiers on V_MOV_B32.

Thanks for taking a look at this issue.

Feb 20 2023, 2:44 PM · Restricted Project, Restricted Project

Feb 10 2023

Joe_Nash accepted D139000: [AMDGPU] Remove function with incompatible features.

LGTM besides my previously noted typo, but please wait for @arsenm

Feb 10 2023, 11:01 AM · Restricted Project, Restricted Project
Joe_Nash added inline comments to D139000: [AMDGPU] Remove function with incompatible features.
Feb 10 2023, 6:38 AM · Restricted Project, Restricted Project

Feb 3 2023

Joe_Nash accepted D143266: [AMDGPU] GFX11: rename VALU pknorm instructions to pk_norm.

LGTM

Feb 3 2023, 8:17 AM · Restricted Project, Restricted Project

Feb 1 2023

Joe_Nash committed rG55eea6eff96a: [AMDGPU][NFC] More precise predicates on GFX9 f16 insts (authored by Joe_Nash).
[AMDGPU][NFC] More precise predicates on GFX9 f16 insts
Feb 1 2023, 8:47 AM · Restricted Project, Restricted Project
Joe_Nash closed D142990: [AMDGPU][NFC] More precise predicates on GFX9 f16 insts.
Feb 1 2023, 8:47 AM · Restricted Project, Restricted Project
Joe_Nash accepted D142636: AMDGPU/MC: Refactor decoders. Rework decoders for float immediates.
Feb 1 2023, 7:02 AM · Restricted Project, Restricted Project

Jan 31 2023

Joe_Nash added inline comments to D142990: [AMDGPU][NFC] More precise predicates on GFX9 f16 insts.
Jan 31 2023, 10:16 AM · Restricted Project, Restricted Project
Joe_Nash requested review of D142990: [AMDGPU][NFC] More precise predicates on GFX9 f16 insts.
Jan 31 2023, 9:14 AM · Restricted Project, Restricted Project
Joe_Nash added a comment to D142636: AMDGPU/MC: Refactor decoders. Rework decoders for float immediates.

Thanks, LGTM

Jan 31 2023, 6:57 AM · Restricted Project, Restricted Project

Jan 26 2023

Joe_Nash added a comment to D142636: AMDGPU/MC: Refactor decoders. Rework decoders for float immediates.

Overall I like the patch. It definitely improves readability.

Jan 26 2023, 2:50 PM · Restricted Project, Restricted Project

Jan 6 2023

Joe_Nash committed rG1b12d7d15b4f: [AMDGPU] Combine redundant Asm64 and AsmVOP3DPPBase. NFC (authored by Joe_Nash).
[AMDGPU] Combine redundant Asm64 and AsmVOP3DPPBase. NFC
Jan 6 2023, 11:10 AM · Restricted Project, Restricted Project
Joe_Nash closed D141088: [AMDGPU] Combine redundant Asm64 and AsmVOP3DPPBase. NFC.
Jan 6 2023, 11:10 AM · Restricted Project, Restricted Project
Joe_Nash added inline comments to D141088: [AMDGPU] Combine redundant Asm64 and AsmVOP3DPPBase. NFC.
Jan 6 2023, 6:43 AM · Restricted Project, Restricted Project
Joe_Nash updated the diff for D141088: [AMDGPU] Combine redundant Asm64 and AsmVOP3DPPBase. NFC.

removed getAsm64

Jan 6 2023, 6:43 AM · Restricted Project, Restricted Project

Jan 5 2023

Joe_Nash added a comment to D141088: [AMDGPU] Combine redundant Asm64 and AsmVOP3DPPBase. NFC.

Further cleanups are possible, such as deleting one of these fields completely or cleaning up AsmVOP3OpSel, but I'd prefer to do it incrementally.

Jan 5 2023, 1:53 PM · Restricted Project, Restricted Project
Joe_Nash requested review of D141088: [AMDGPU] Combine redundant Asm64 and AsmVOP3DPPBase. NFC.
Jan 5 2023, 1:52 PM · Restricted Project, Restricted Project
Joe_Nash accepted D138870: clang/AMDGPU: Remove flat-address-space from feature map.

The code looks fine, but as you say, the change visible in user code and could break something. Do you want to handle that somehow? Maybe wait for @b-sumner

OpenMP assumes flat pointers all over, so if someone was relying on this behavior it wasn't doing anything useful. They had dead code

Jan 5 2023, 7:16 AM · Restricted Project

Jan 4 2023

Joe_Nash accepted D139000: [AMDGPU] Remove function with incompatible features.

Last time I checked (before the holidays), it builds fine without the patch reverted. I can try reverting the patch later when this lands perhaps? Or should it be done at the same time?
For reference the only build issues I experienced where with hard f64 functions like llvm.sin.f64, which are apparently not (well) supported if I understand correctly

Jan 4 2023, 6:26 AM · Restricted Project, Restricted Project

Dec 30 2022

Joe_Nash added a comment to D138870: clang/AMDGPU: Remove flat-address-space from feature map.

The code looks fine, but as you say, the change visible in user code and could break something. Do you want to handle that somehow? Maybe wait for @b-sumner

Dec 30 2022, 6:13 AM · Restricted Project

Dec 29 2022

Joe_Nash accepted D140299: [AMDGPU][GFX11] Correct tied src2 of v_fmac_f16_e64.

LGTM! Thanks for catching that.

Dec 29 2022, 1:33 PM · Restricted Project, Restricted Project
Joe_Nash accepted D138868: AMDGPU/clang: Remove target features from address space test builtins.
Dec 29 2022, 12:38 PM · Restricted Project, Restricted Project
Joe_Nash added inline comments to D138868: AMDGPU/clang: Remove target features from address space test builtins.
Dec 29 2022, 12:14 PM · Restricted Project, Restricted Project
Joe_Nash accepted D140470: [AMDGPU][MC][GFX11] Correct encoding of neg modifier for v_dot2_f32_bf16.

LGTM

Dec 29 2022, 11:49 AM · Restricted Project, Restricted Project

Dec 14 2022

Joe_Nash accepted D140012: [AMDGPU] Clean up SReg classes.

LGTM

Dec 14 2022, 7:55 AM · Restricted Project, Restricted Project

Dec 13 2022

Joe_Nash added a comment to D139000: [AMDGPU] Remove function with incompatible features.

The last functional status I see here is.

Dec 13 2022, 7:10 AM · Restricted Project, Restricted Project

Dec 12 2022

Joe_Nash accepted D139829: [AMDGPU] Make use of !listremove. NFCI..

LGTM

Dec 12 2022, 7:57 AM · Restricted Project, Restricted Project

Dec 7 2022

Joe_Nash committed rGbbfbec94b106: [AMDGPU] Enable OMod on more VOP3 instructions (authored by Joe_Nash).
[AMDGPU] Enable OMod on more VOP3 instructions
Dec 7 2022, 10:31 AM · Restricted Project, Restricted Project
Joe_Nash closed D139469: [AMDGPU] Enable OMod on more VOP3 instructions.
Dec 7 2022, 10:30 AM · Restricted Project, Restricted Project
Joe_Nash updated the diff for D139469: [AMDGPU] Enable OMod on more VOP3 instructions.

precommit gfx11 runline and rebase

Dec 7 2022, 8:46 AM · Restricted Project, Restricted Project
Joe_Nash added inline comments to D139469: [AMDGPU] Enable OMod on more VOP3 instructions.
Dec 7 2022, 8:46 AM · Restricted Project, Restricted Project
Joe_Nash committed rGc6c4f54e6bf7: [AMDGPU] Add gfx11 runline to omod test. NFC (authored by Joe_Nash).
[AMDGPU] Add gfx11 runline to omod test. NFC
Dec 7 2022, 8:41 AM · Restricted Project, Restricted Project

Dec 6 2022

Joe_Nash requested review of D139469: [AMDGPU] Enable OMod on more VOP3 instructions.
Dec 6 2022, 2:45 PM · Restricted Project, Restricted Project

Dec 5 2022

Joe_Nash added a comment to D139000: [AMDGPU] Remove function with incompatible features.

Overall this is looking quite good.

do this on an "opt-in" basis

Makes sense to me

Dec 5 2022, 7:43 AM · Restricted Project, Restricted Project

Dec 2 2022

Joe_Nash accepted D139194: AMDGPU/MC: Simplify AsmParser for VOP3P.

LGTM

Dec 2 2022, 11:26 AM · Restricted Project, Restricted Project

Dec 1 2022

Joe_Nash accepted D138661: [AMDGPU][MC] Correct handling of mandatory literals.
Dec 1 2022, 7:47 AM · Restricted Project, Restricted Project
Joe_Nash added a comment to D139000: [AMDGPU] Remove function with incompatible features.

Overall this looks pretty good. As you say, the feature checking logic is quite limited, but that's not a problem.
I think after this patch lands https://reviews.llvm.org/D123693 can be reverted. Can you try to revert that with this patch and check if device libs can be built correctly at -O0?

I did a quick test where I passed all .bc files from the device libs to Clang for fiji (gfx8) and it still doesn't build even with this patch. The pass kicks in a few times but there's some issues with "dot" instructions.
Not sure how to address those - should it be done in this pass? For instance device libs has a few places here it uses (target("dot8-insts") which allows selection to work (because that only checks the feature) but then it fails because there is no "real" instruction for GFX8 dot8, only GFX11 (it uses the generation).

Do I just go "whack a mole" and try to build, add more checks, try to build again, etc?
I'm worried about complexity exploding if the checks need to be more intricate. e.g. I see that dot instructions have been introduced in the middle of the GFX9 generation (GFX908?) so I'd already need to change the pass completely to check for GFX908

Dec 1 2022, 7:32 AM · Restricted Project, Restricted Project
Joe_Nash accepted D138661: [AMDGPU][MC] Correct handling of mandatory literals.

Ok, apart from that comment LGTM.

Dec 1 2022, 6:48 AM · Restricted Project, Restricted Project

Nov 30 2022

Joe_Nash added a comment to D139000: [AMDGPU] Remove function with incompatible features.

Overall this looks pretty good. As you say, the feature checking logic is quite limited, but that's not a problem.
I think after this patch lands https://reviews.llvm.org/D123693 can be reverted. Can you try to revert that with this patch and check if device libs can be built correctly at -O0?

Nov 30 2022, 9:31 AM · Restricted Project, Restricted Project

Nov 29 2022

Joe_Nash added inline comments to D138661: [AMDGPU][MC] Correct handling of mandatory literals.
Nov 29 2022, 11:48 AM · Restricted Project, Restricted Project
Joe_Nash accepted D138710: [AMDGPU][MC][GFX11] Disable non-VGPR src operands for v_fmac_f16_e64_dpp and v_fmac_f32_e64_dpp instructions.

Thanks, LGTM

Nov 29 2022, 9:07 AM · Restricted Project, Restricted Project

Nov 28 2022

Joe_Nash added a reviewer for D138661: [AMDGPU][MC] Correct handling of mandatory literals: rampitec.
Nov 28 2022, 11:31 AM · Restricted Project, Restricted Project
Joe_Nash added inline comments to D138661: [AMDGPU][MC] Correct handling of mandatory literals.
Nov 28 2022, 11:31 AM · Restricted Project, Restricted Project
Joe_Nash accepted D137969: [AMDGPU][MC][GFX11] Correct op_sel handling for permlane*16.

LGTM

Nov 28 2022, 11:06 AM · Restricted Project, Restricted Project
Joe_Nash added a comment to D138710: [AMDGPU][MC][GFX11] Disable non-VGPR src operands for v_fmac_f16_e64_dpp and v_fmac_f32_e64_dpp instructions.

Its not just SGPRs we want to disable, right? Its inline and literal operands too. So the commit title is slightly misleading.

Nov 28 2022, 11:03 AM · Restricted Project, Restricted Project

Nov 23 2022

Joe_Nash accepted D138594: [AMDGPU][MC] Refactor MC Code Emitter to avoid using magic values.

Thanks to Jay as well for pointing out std::optional on another review.
LGTM

Nov 23 2022, 12:23 PM · Restricted Project, Restricted Project
Joe_Nash added a comment to D138594: [AMDGPU][MC] Refactor MC Code Emitter to avoid using magic values.

I believe the latest guidance is to use std::Optional instead of llvm::Optional (https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716). Also it makes a difference in tests, so is not NFC. Otherwise looks good.

Nov 23 2022, 11:14 AM · Restricted Project, Restricted Project
Joe_Nash accepted D138216: [AMDGPU] Intrinsic to expose s_wait_event for export ready.

LGTM

Nov 23 2022, 7:02 AM · Restricted Project, Restricted Project, Restricted Project

Nov 21 2022

Joe_Nash added inline comments to D138216: [AMDGPU] Intrinsic to expose s_wait_event for export ready.
Nov 21 2022, 8:07 AM · Restricted Project, Restricted Project, Restricted Project

Nov 18 2022

Joe_Nash added inline comments to D133012: [AMDGPU] Add subtarget feature for MAD_U64/I64 bug on GFX11.
Nov 18 2022, 9:48 AM · Restricted Project, Restricted Project

Nov 17 2022

Joe_Nash added a comment to D133012: [AMDGPU] Add subtarget feature for MAD_U64/I64 bug on GFX11.

I have often wanted a standard way of mapping two different pseudos to the same real instruction.

Nov 17 2022, 8:05 AM · Restricted Project, Restricted Project
Joe_Nash accepted D133012: [AMDGPU] Add subtarget feature for MAD_U64/I64 bug on GFX11.

Thanks, LGTM.

Nov 17 2022, 7:30 AM · Restricted Project, Restricted Project
Joe_Nash added a comment to D133012: [AMDGPU] Add subtarget feature for MAD_U64/I64 bug on GFX11.
  • By overriding opName (or PseudoInstr of tablegen record) for _strict pseudo we can have both pseudos select into same real instruction, so now we don't need two.

This is a creative use of the opName, but I think it probably hinders readability. No other instructions are doing this, so when I look at definition of the Real instruction it seems to refer to the non-strict pseudo.

Nov 17 2022, 7:05 AM · Restricted Project, Restricted Project
Joe_Nash accepted D138133: [AMDGPU][GFX11][NFC] Refactor VOPD operands handling (part 2).

LGTM

Nov 17 2022, 6:29 AM · Restricted Project, Restricted Project

Nov 16 2022

Joe_Nash added a comment to D138133: [AMDGPU][GFX11][NFC] Refactor VOPD operands handling (part 2).

See my comment, otherwise I like it.

Nov 16 2022, 2:00 PM · Restricted Project, Restricted Project

Nov 15 2022

Joe_Nash accepted D137952: [AMDGPU][GFX11] Refactor VOPD operands handling.
In D137952#3927187, @dp wrote:

I suggest doing renaming in a separate patch because it is a separate problem introduced before this change.

Nov 15 2022, 6:39 AM · Restricted Project, Restricted Project

Nov 14 2022

Joe_Nash added a comment to D137952: [AMDGPU][GFX11] Refactor VOPD operands handling.
In D137952#3925471, @dp wrote:

Why does it change the error position?

Before this change getParsedSrcIndex handled tied operands as if they were parsed and returned dst index for tied operands:

unsigned getParsedSrcIndex(unsigned SrcIdx, bool ComponentHasSrc2Acc) const {
  if (ComponentHasSrc2Acc && SrcIdx == (MAX_SRC_NUM - 1))
    return getParsedDstIndex();
  ...
}

This patch corrects handling of parsed operands: now they don't include tied ones.

Nov 14 2022, 11:10 AM · Restricted Project, Restricted Project
Joe_Nash committed rG38f47d90dbab: [AMDGPU][MC][NFC] Rename VOP3 VOPC test files (authored by Joe_Nash).
[AMDGPU][MC][NFC] Rename VOP3 VOPC test files
Nov 14 2022, 10:28 AM · Restricted Project, Restricted Project
Joe_Nash closed D137950: [AMDGPU][MC][NFC] Rename VOP3 VOPC test files.
Nov 14 2022, 10:28 AM · Restricted Project, Restricted Project
Joe_Nash added a comment to D137952: [AMDGPU][GFX11] Refactor VOPD operands handling.

This looks like a reasonable refactor. Why does it change the error position?

Nov 14 2022, 8:31 AM · Restricted Project, Restricted Project
Joe_Nash requested review of D137950: [AMDGPU][MC][NFC] Rename VOP3 VOPC test files.
Nov 14 2022, 7:21 AM · Restricted Project, Restricted Project

Nov 11 2022

Joe_Nash accepted D137842: [AMDGPU][MC][GFX11] Improve diagnostic messages for invalid VOPD syntax.

LGTM

Nov 11 2022, 10:08 AM · Restricted Project, Restricted Project
Joe_Nash added inline comments to D137832: [AMDGPU][AsmParser] Forbid TFE modifiers for MBUF stores..
Nov 11 2022, 6:47 AM · Restricted Project, Restricted Project
Joe_Nash added inline comments to D137832: [AMDGPU][AsmParser] Forbid TFE modifiers for MBUF stores..
Nov 11 2022, 6:37 AM · Restricted Project, Restricted Project

Nov 10 2022

Joe_Nash accepted D137575: [AMDGPU][MC] Disable SGPRs as src operands of VOP3 VINTRP instructions.

LGTM

Nov 10 2022, 7:07 AM · Restricted Project, Restricted Project

Nov 3 2022

Joe_Nash accepted D137324: [AMDGPU] Create new instructions in SIInstrInfo::moveToVALU.

LGTM

Nov 3 2022, 11:11 AM · Restricted Project, Restricted Project
Joe_Nash added a comment to D136448: [AMDGPU][GISel] Add llvm.amdgcn.icmp selection.
Nov 3 2022, 8:11 AM · Restricted Project, Restricted Project
Joe_Nash accepted D137332: [AMDGPU][MC][GFX10+] Enable literal operands with permlane16/permlanex16.

LGTM

Nov 3 2022, 7:50 AM · Restricted Project, Restricted Project
Joe_Nash added a comment to D137324: [AMDGPU] Create new instructions in SIInstrInfo::moveToVALU.

This part of the commit message is worded confusingly for me.

Nov 3 2022, 7:46 AM · Restricted Project, Restricted Project
Joe_Nash accepted D137238: [AMDGPU][MC][GFX11][NFC] Correct VINTERP src operands.

LGTM

Nov 3 2022, 6:48 AM · Restricted Project, Restricted Project

Nov 2 2022

Joe_Nash added inline comments to D137238: [AMDGPU][MC][GFX11][NFC] Correct VINTERP src operands.
Nov 2 2022, 11:42 AM · Restricted Project, Restricted Project

Oct 25 2022

Joe_Nash added a comment to D136148: [AMDGPU][NFC] Split MC tests into promoted from VOP2 to VOP3 and only VOP3.
In D136148#3883668, @dp wrote:

The patch may be useful, but I’m concerned with file naming. I think the naming should be consistent. Right now we have vop3, vop3c, vop3cx and now vop3_from…. Maybe we should think over test naming?

IMO vop3_from_vop2_dpp16 is questionable.

To tell you the truth, I considered splitting VOP3 opcodes into native and promoted parts but was unable to find good file names and abandoned the idea.

Any proposals to make the naming consistent?

Oct 25 2022, 1:53 PM · Restricted Project, Restricted Project
Joe_Nash accepted D136149: [AMDGPU][NFC] Split MC tests into promoted from VOP1 to VOP3 and only VOP3.
Oct 25 2022, 1:09 PM · Restricted Project, Restricted Project
Joe_Nash accepted D136148: [AMDGPU][NFC] Split MC tests into promoted from VOP2 to VOP3 and only VOP3.
Oct 25 2022, 1:09 PM · Restricted Project, Restricted Project
Joe_Nash committed rG01b8140d3aac: [AMDGPU] Fix delay alu for VOPD with src2acc (authored by Joe_Nash).
[AMDGPU] Fix delay alu for VOPD with src2acc
Oct 25 2022, 10:11 AM · Restricted Project, Restricted Project
Joe_Nash closed D136629: [AMDGPU] Fix delay alu for VOPD with src2acc.
Oct 25 2022, 10:11 AM · Restricted Project, Restricted Project
Joe_Nash added inline comments to D136629: [AMDGPU] Fix delay alu for VOPD with src2acc.
Oct 25 2022, 8:05 AM · Restricted Project, Restricted Project
Joe_Nash updated the diff for D136629: [AMDGPU] Fix delay alu for VOPD with src2acc.

use const auto &, hoist loop invariant code, shorten td line length, delete parameter name underscores

Oct 25 2022, 8:05 AM · Restricted Project, Restricted Project

Oct 24 2022

Joe_Nash added inline comments to D136448: [AMDGPU][GISel] Add llvm.amdgcn.icmp selection.
Oct 24 2022, 11:28 AM · Restricted Project, Restricted Project
Joe_Nash requested review of D136629: [AMDGPU] Fix delay alu for VOPD with src2acc.
Oct 24 2022, 10:59 AM · Restricted Project, Restricted Project
Joe_Nash added inline comments to D136448: [AMDGPU][GISel] Add llvm.amdgcn.icmp selection.
Oct 24 2022, 6:47 AM · Restricted Project, Restricted Project

Oct 21 2022

Joe_Nash accepted D136370: [AMDGPU][MC] Correct definition of aliases.

LGTM

Oct 21 2022, 8:49 AM · Restricted Project, Restricted Project

Oct 20 2022

Joe_Nash added a comment to D136370: [AMDGPU][MC] Correct definition of aliases.

Overall looks good. Did you observe any instructions that assembled when they shouldn't? It looks like only differences in error message from the tests.

Oct 20 2022, 12:25 PM · Restricted Project, Restricted Project

Oct 19 2022

Joe_Nash accepted D136152: [AMDGPU][MC][GFX8+] Correct v_cndmask operand types.

LGTM

Oct 19 2022, 2:17 PM · Restricted Project, Restricted Project
Joe_Nash committed rGad6698562c3d: [AMDGPU] V_LDEXP_F16 encoding fix and doc update. (authored by Joe_Nash).
[AMDGPU] V_LDEXP_F16 encoding fix and doc update.
Oct 19 2022, 6:53 AM · Restricted Project, Restricted Project
Joe_Nash closed D136195: [AMDGPU] V_LDEXP_F16 encoding fix and doc update..
Oct 19 2022, 6:53 AM · Restricted Project, Restricted Project