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Joe_Nash (Joe Nash)
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User Since
Jul 21 2020, 2:19 PM (46 w, 3 d)

Recent Activity

Fri, Jun 4

Joe_Nash accepted D103699: [AMDGPU] Fix MC tests for v_fmaak_f16 and v_fmamk_f16.

The tests you changed had 2 byte constants vs the 4 byte ones in the remaining f32 tests. But I don't know if that is significant.
LGTM

Fri, Jun 4, 12:08 PM · Restricted Project

Wed, May 26

Joe_Nash added a comment to D71474: [TableGen] Introduce an if/then/else statement..

I've found a difference between the if statement and foreach statement which seems to be related to casting. See https://bugs.llvm.org/show_bug.cgi?id=50486

Wed, May 26, 9:42 AM · Restricted Project

Tue, May 25

Joe_Nash committed rGb67ea3d0c90c: [AMDGPU] Allow no-modifier operands in cvtDPP (authored by Joe_Nash).
[AMDGPU] Allow no-modifier operands in cvtDPP
Tue, May 25, 8:11 AM
Joe_Nash closed D103046: [AMDGPU] Allow no-modifier operands in cvtDPP.
Tue, May 25, 8:11 AM · Restricted Project
Joe_Nash committed rG67c3707b31b4: [AMDGPU] More accurate names for dpp operand types (authored by Joe_Nash).
[AMDGPU] More accurate names for dpp operand types
Tue, May 25, 7:48 AM
Joe_Nash closed D103047: [AMDGPU] More accurate names for dpp operand types.
Tue, May 25, 7:48 AM · Restricted Project

Mon, May 24

Joe_Nash requested review of D103047: [AMDGPU] More accurate names for dpp operand types.
Mon, May 24, 2:22 PM · Restricted Project
Joe_Nash requested review of D103046: [AMDGPU] Allow no-modifier operands in cvtDPP.
Mon, May 24, 2:08 PM · Restricted Project

Apr 29 2021

Joe_Nash added a comment to D101474: [AMDGPU] Make some VOP3 insts commutable.

That is what you suggested last time on https://reviews.llvm.org/D99376

OK :-)

So what caused the test failures that prompted the revert of D99376? Did you just need to update some more lit tests?

Apr 29 2021, 9:47 AM · Restricted Project
Joe_Nash added a comment to D101474: [AMDGPU] Make some VOP3 insts commutable.

This patch revises d35d8da7d6ac6c08578ec0569b072292631691e0.
It contains the commute opportunities excluding float insts

Maybe mention D99376 here rather than just the commit hash?

Why are you excluding float insts now? Is it related to the test failures that caused you to revert D99376, or is it a different problem?

That is what you suggested last time on https://reviews.llvm.org/D99376

Apr 29 2021, 8:34 AM · Restricted Project

Apr 28 2021

Joe_Nash committed rG168228d76a1c: [AMDGPU] Make some VOP3 insts commutable (authored by Joe_Nash).
[AMDGPU] Make some VOP3 insts commutable
Apr 28 2021, 11:10 AM
Joe_Nash closed D101474: [AMDGPU] Make some VOP3 insts commutable.
Apr 28 2021, 11:10 AM · Restricted Project
Joe_Nash requested review of D101474: [AMDGPU] Make some VOP3 insts commutable.
Apr 28 2021, 10:58 AM · Restricted Project
Joe_Nash added inline comments to D101405: [AMDGPU] Change FLAT SADDR to VADDR form in moveToVALU.
Apr 28 2021, 9:17 AM · Restricted Project
Joe_Nash accepted D101408: [AMDGPU] Change FLAT Scratch SADDR to VADDR form in moveToVALU.

LGTM

Apr 28 2021, 9:06 AM · Restricted Project
Joe_Nash added inline comments to D101405: [AMDGPU] Change FLAT SADDR to VADDR form in moveToVALU.
Apr 28 2021, 9:05 AM · Restricted Project

Apr 16 2021

Joe_Nash committed rGa0ed70abded1: [AMDGPU] Remove redundant field from DPP8 def (authored by Joe_Nash).
[AMDGPU] Remove redundant field from DPP8 def
Apr 16 2021, 1:34 PM
Joe_Nash closed D100664: [AMDGPU] Remove redundant field from DPP8 def.
Apr 16 2021, 1:34 PM · Restricted Project
Joe_Nash committed rG919236e60868: [AMDGPU] NFC, Comment in disassembler for dpp8 (authored by Joe_Nash).
[AMDGPU] NFC, Comment in disassembler for dpp8
Apr 16 2021, 1:32 PM
Joe_Nash closed D100665: [AMDGPU] NFC, Comment in disassembler for dpp8.
Apr 16 2021, 1:32 PM · Restricted Project
Joe_Nash requested review of D100665: [AMDGPU] NFC, Comment in disassembler for dpp8.
Apr 16 2021, 11:01 AM · Restricted Project
Joe_Nash requested review of D100664: [AMDGPU] Remove redundant field from DPP8 def.
Apr 16 2021, 10:59 AM · Restricted Project
Joe_Nash committed rG7cc4a02fa2cb: [AMDGPU] Refactor VOP3P Profile and AsmParser, NFC (authored by Joe_Nash).
[AMDGPU] Refactor VOP3P Profile and AsmParser, NFC
Apr 16 2021, 10:18 AM
Joe_Nash closed D100602: [AMDGPU] Refactor VOP3P Profile and AsmParser, NFC.
Apr 16 2021, 10:17 AM · Restricted Project

Apr 15 2021

Joe_Nash requested review of D100602: [AMDGPU] Refactor VOP3P Profile and AsmParser, NFC.
Apr 15 2021, 3:34 PM · Restricted Project

Apr 6 2021

Joe_Nash accepted D99955: AMDGPU: Add isBranch=1 to SOPP branch instructions.
Apr 6 2021, 7:29 AM · Restricted Project

Mar 31 2021

Joe_Nash accepted D99413: [AMDGPU][MC][GFX10][GFX90A] Corrected _e32/_e64 suffices.

LGTM

Mar 31 2021, 9:59 AM · Restricted Project
Joe_Nash accepted D99408: [AMDGPU][MC] Added flag to identify VOP instructions which have a single variant.

LGTM

Mar 31 2021, 9:58 AM · Restricted Project

Mar 30 2021

Joe_Nash added a comment to D99376: [AMDGPU] Mark additional VOP3 as commutable.

Reverted since I don't fully understand the issue. It passed all tests on my system, but then upon rebasing top of tree it didn't. So I suspect the commutes may not be deterministic/ well constrained.

I have a bad suspicion here: that is not OK to just commute source modifiers for opsel. A DST_OP_SEL shares bits with $src0_modifiers, so it needs to be transferred to the new src0 modifiers and masked in src1. I suspect it does not happen.

Mar 30 2021, 10:33 AM · Restricted Project

Mar 29 2021

Joe_Nash added a comment to D99376: [AMDGPU] Mark additional VOP3 as commutable.

Reverted since I don't fully understand the issue. It passed all tests on my system, but then upon rebasing top of tree it didn't. So I suspect the commutes may not be deterministic/ well constrained.

Mar 29 2021, 12:20 PM · Restricted Project
Joe_Nash added a reverting change for rGd35d8da7d6ac: [AMDGPU] Mark additional VOP3 as commutable: rG45fd7c02afc4: Revert "[AMDGPU] Mark additional VOP3 as commutable".
Mar 29 2021, 11:59 AM
Joe_Nash committed rG45fd7c02afc4: Revert "[AMDGPU] Mark additional VOP3 as commutable" (authored by Joe_Nash).
Revert "[AMDGPU] Mark additional VOP3 as commutable"
Mar 29 2021, 11:59 AM
Joe_Nash added a reverting change for D99376: [AMDGPU] Mark additional VOP3 as commutable: rG45fd7c02afc4: Revert "[AMDGPU] Mark additional VOP3 as commutable".
Mar 29 2021, 11:59 AM · Restricted Project
Joe_Nash committed rGd35d8da7d6ac: [AMDGPU] Mark additional VOP3 as commutable (authored by Joe_Nash).
[AMDGPU] Mark additional VOP3 as commutable
Mar 29 2021, 11:33 AM
Joe_Nash closed D99376: [AMDGPU] Mark additional VOP3 as commutable.
Mar 29 2021, 11:32 AM · Restricted Project
Joe_Nash updated the diff for D99376: [AMDGPU] Mark additional VOP3 as commutable.

Confirmed that modifier operands are appropriately swapped if the
instruction is commuted, including opsel modifiers. Added at tests
for it

Mar 29 2021, 10:44 AM · Restricted Project
Joe_Nash updated the diff for D99376: [AMDGPU] Mark additional VOP3 as commutable.

update test using add_lshl

Mar 29 2021, 8:50 AM · Restricted Project

Mar 26 2021

Joe_Nash added inline comments to D99376: [AMDGPU] Mark additional VOP3 as commutable.
Mar 26 2021, 2:40 PM · Restricted Project
Joe_Nash updated the diff for D99376: [AMDGPU] Mark additional VOP3 as commutable.

remove sub as commutative and add add_lshl.
Its pretty bizarre to me that no testing cared if sub was commutative.

Mar 26 2021, 2:39 PM · Restricted Project
Joe_Nash updated the diff for D99376: [AMDGPU] Mark additional VOP3 as commutable.

add test

Mar 26 2021, 2:23 PM · Restricted Project

Mar 25 2021

Joe_Nash added a comment to D99376: [AMDGPU] Mark additional VOP3 as commutable.

It is unclear to me how to force a commute for testing purposes, but if anyone has an idea I can put that in. Vulkan short testlist passes fine with this patch. I will also test a compute psdb.

Mar 25 2021, 1:37 PM · Restricted Project
Joe_Nash requested review of D99376: [AMDGPU] Mark additional VOP3 as commutable.
Mar 25 2021, 1:33 PM · Restricted Project

Mar 23 2021

Joe_Nash committed rG538bda0b8092: [AMDGPU] Refactor DPPCombine (authored by Joe_Nash).
[AMDGPU] Refactor DPPCombine
Mar 23 2021, 9:04 AM
Joe_Nash closed D99099: [AMDGPU] Refactor DPPCombine.
Mar 23 2021, 9:04 AM · Restricted Project

Mar 22 2021

Joe_Nash updated the diff for D99099: [AMDGPU] Refactor DPPCombine.

remove null initialization and fix clang-format

Mar 22 2021, 1:31 PM · Restricted Project
Joe_Nash requested review of D99099: [AMDGPU] Refactor DPPCombine.
Mar 22 2021, 11:50 AM · Restricted Project

Mar 2 2021

Joe_Nash committed rG5531f24cc2cc: [AMDGPU] Make OMod explicit for V_CVT_{U,I}* (authored by Joe_Nash).
[AMDGPU] Make OMod explicit for V_CVT_{U,I}*
Mar 2 2021, 10:40 AM
Joe_Nash closed D97587: [AMDGPU] Make OMod explicit for V_CVT_{U,I}*.
Mar 2 2021, 10:40 AM · Restricted Project

Mar 1 2021

Joe_Nash updated the diff for D97587: [AMDGPU] Make OMod explicit for V_CVT_{U,I}*.

remove erroneous addition of OMod to cvt_flr_i32_f32 &
cvt_rpi_i32_f32

Mar 1 2021, 10:33 AM · Restricted Project
Joe_Nash added a comment to D97689: [AMDGPU][MC][GFX9+] Corrected encoding of op_sel_hi for unused operands in VOP3P.
In D97689#2594395, @dp wrote:

I was surprised to discover that codegen tests include encodings. Is there any reason for that? Should I remove or update them?

Yes, it is surprising. I am inclined to say remove the encodings.

Mar 1 2021, 8:54 AM · Restricted Project
Joe_Nash added a comment to D97689: [AMDGPU][MC][GFX9+] Corrected encoding of op_sel_hi for unused operands in VOP3P.
In D97689#2594395, @dp wrote:

I was surprised to discover that codegen tests include encodings. Is there any reason for that? Should I remove or update them?

Mar 1 2021, 8:50 AM · Restricted Project

Feb 26 2021

Joe_Nash requested review of D97587: [AMDGPU] Make OMod explicit for V_CVT_{U,I}*.
Feb 26 2021, 2:59 PM · Restricted Project

Jan 22 2021

Joe_Nash accepted D94795: [AMDGPU] Fix use of HasModifiers in VopProfile.
Jan 22 2021, 12:02 PM · Restricted Project

Jan 19 2021

Joe_Nash requested changes to D94795: [AMDGPU] Fix use of HasModifiers in VopProfile.

I'm getting failing tests in check-llvm-mc-disassembler-amdgpu when applying this patch, can you take a look at that please?

Jan 19 2021, 11:47 AM · Restricted Project
Joe_Nash accepted D94975: [AMDGPU] Simpler names for arch-specific ttmp registers. NFC..

LGTM

Jan 19 2021, 10:12 AM · Restricted Project

Jan 12 2021

Joe_Nash committed rG314e29ed2b78: [AMDGPU] Add _e64 suffix to VOP3 Insts (authored by Joe_Nash).
[AMDGPU] Add _e64 suffix to VOP3 Insts
Jan 12 2021, 3:40 PM
Joe_Nash closed D94341: [AMDGPU] Add _e64 suffix to VOP3 Insts.
Jan 12 2021, 3:40 PM · Restricted Project

Jan 11 2021

Joe_Nash added a comment to D94341: [AMDGPU] Add _e64 suffix to VOP3 Insts.

Looks OK to me. Does this enable any immediate simplifications? Or is it just to help with future work?

Jan 11 2021, 11:42 AM · Restricted Project
Joe_Nash updated the diff for D94341: [AMDGPU] Add _e64 suffix to VOP3 Insts.

Address format comments of foad.

Jan 11 2021, 11:42 AM · Restricted Project
Joe_Nash committed rGbcec0f27a2c3: [AMDGPU] Deduplicate VOP tablegen asm & ins (authored by Joe_Nash).
[AMDGPU] Deduplicate VOP tablegen asm & ins
Jan 11 2021, 10:57 AM
Joe_Nash closed D94102: [AMDGPU] Deduplicate VOP tablegen asm & ins.
Jan 11 2021, 10:56 AM · Restricted Project
Joe_Nash updated the diff for D94102: [AMDGPU] Deduplicate VOP tablegen asm & ins.

Apply nfc edits suggested by dp

Jan 11 2021, 10:03 AM · Restricted Project

Jan 8 2021

Joe_Nash requested review of D94341: [AMDGPU] Add _e64 suffix to VOP3 Insts.
Jan 8 2021, 2:06 PM · Restricted Project

Jan 5 2021

Joe_Nash updated the diff for D94102: [AMDGPU] Deduplicate VOP tablegen asm & ins.

combined !con per comment by foad

Jan 5 2021, 11:30 AM · Restricted Project
Joe_Nash added a reviewer for D94102: [AMDGPU] Deduplicate VOP tablegen asm & ins: dp.
Jan 5 2021, 10:52 AM · Restricted Project
Joe_Nash requested review of D94102: [AMDGPU] Deduplicate VOP tablegen asm & ins.
Jan 5 2021, 10:49 AM · Restricted Project
Joe_Nash committed rG60466fad2dc1: [AMDGPU] Remove deprecated V_MUL_LO_I32 from GFX10 (authored by Joe_Nash).
[AMDGPU] Remove deprecated V_MUL_LO_I32 from GFX10
Jan 5 2021, 9:07 AM
Joe_Nash closed D94020: [AMDGPU] Remove deprecated V_MUL_LO_I32 from GFX10.
Jan 5 2021, 9:07 AM · Restricted Project

Jan 4 2021

Joe_Nash updated the diff for D94020: [AMDGPU] Remove deprecated V_MUL_LO_I32 from GFX10.

changed B_encoding predicate to be 10_3Insts

Jan 4 2021, 4:25 PM · Restricted Project
Joe_Nash updated the diff for D94020: [AMDGPU] Remove deprecated V_MUL_LO_I32 from GFX10.

remove inst from gfx1030 only, instead of all gfx10

Jan 4 2021, 4:18 PM · Restricted Project
Joe_Nash requested review of D94020: [AMDGPU] Remove deprecated V_MUL_LO_I32 from GFX10.
Jan 4 2021, 10:53 AM · Restricted Project

Nov 30 2020

Joe_Nash added inline comments to D92092: [AMDGPU] Introduce and use isGFX10Plus. NFC..
Nov 30 2020, 9:30 AM · Restricted Project

Nov 4 2020

Joe_Nash committed rG58adab34c480: [AMDGPU] Resolve pseudo registers at encoding uses (authored by Joe_Nash).
[AMDGPU] Resolve pseudo registers at encoding uses
Nov 4 2020, 9:56 AM
Joe_Nash closed D90721: [AMDGPU] Resolve pseudo registers at encoding uses.
Nov 4 2020, 9:56 AM · Restricted Project
Joe_Nash updated the diff for D90721: [AMDGPU] Resolve pseudo registers at encoding uses.

whitespace change for lint and rerun build

Nov 4 2020, 9:14 AM · Restricted Project

Nov 3 2020

Joe_Nash requested review of D90721: [AMDGPU] Resolve pseudo registers at encoding uses.
Nov 3 2020, 2:45 PM · Restricted Project

Oct 21 2020

Joe_Nash committed rGf6d7832f4cf8: [AMDGPU] Refactor SOPC & SOPP .td for extension (authored by Joe_Nash).
[AMDGPU] Refactor SOPC & SOPP .td for extension
Oct 21 2020, 9:39 AM
Joe_Nash closed D89738: [AMDGPU] Refactor SOPC & SOPP .td for extension.
Oct 21 2020, 9:39 AM · Restricted Project

Oct 20 2020

Joe_Nash updated the diff for D89738: [AMDGPU] Refactor SOPC & SOPP .td for extension.

remove accidental commented code

Oct 20 2020, 12:55 PM · Restricted Project
Joe_Nash updated the diff for D89738: [AMDGPU] Refactor SOPC & SOPP .td for extension.

add OtherPredicates and blank line for rampitec

Oct 20 2020, 11:41 AM · Restricted Project

Oct 19 2020

Joe_Nash added a comment to D89738: [AMDGPU] Refactor SOPC & SOPP .td for extension.

Are there hazards associated with SOP, where we have it lowered to real instructions?

I'm not sure exactly what you mean, but there is a workaround for branch instructions, that operates on the real instructions. Original fix at https://github.com/llvm/llvm-project/commit/9ab812d4752b2a1442426db2ccc17dc95d12eb04

Also please run PSDB for this change.

Will do

Oct 19 2020, 2:28 PM · Restricted Project
Joe_Nash requested review of D89738: [AMDGPU] Refactor SOPC & SOPP .td for extension.
Oct 19 2020, 2:07 PM · Restricted Project

Oct 6 2020

Joe_Nash added a comment to D88908: [AMDGPU] Create isGFX9Plus utility function.

Thank you for the review. I do not yet have commit access so please commit this on my behalf.

Oct 6 2020, 10:02 AM · Restricted Project
Joe_Nash requested review of D88908: [AMDGPU] Create isGFX9Plus utility function.
Oct 6 2020, 9:15 AM · Restricted Project

Oct 1 2020

Joe_Nash added a comment to D88708: [AMDGPU] Allow SOP asm mnemonic to differ.

I do not have commit access, please commit the patch for me.

Oct 1 2020, 3:38 PM · Restricted Project
Joe_Nash requested review of D88708: [AMDGPU] Allow SOP asm mnemonic to differ.
Oct 1 2020, 3:35 PM · Restricted Project