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Differential D151096

[RISCV] Make zfbfmin imply the F extension
ClosedPublic

Authored by asb on May 22 2023, 6:57 AM.

Details

Reviewers
craig.topper
reames
kito-cheng
Commits
rG033690fffe8f: [RISCV] Make zfbfmin imply the F extension
Summary

Our current approach is that if one extension requires another, we make LLVM treat it as implied. My initial zfbfmin patch failed to do this for the F extension (documented as a requirement of zfbfmin). This patch fixes that.

Diff Detail

Event Timeline

asb created this revision.May 22 2023, 6:57 AM
Herald added a project: Restricted Project. · View Herald TranscriptMay 22 2023, 6:57 AM
Herald added subscribers: jobnoorman, luke, wingo and 28 others. · View Herald Transcript
asb requested review of this revision.May 22 2023, 6:57 AM
Herald added a project: Restricted Project. · View Herald TranscriptMay 22 2023, 6:57 AM
Herald added subscribers: • pcwang-thead, eopXD, MaskRay. · View Herald Transcript
Harbormaster completed remote builds in B233554: Diff 524284.May 22 2023, 8:06 AM
craig.topper accepted this revision.May 22 2023, 11:10 AM

LGTM

This revision is now accepted and ready to land.May 22 2023, 11:10 AM
This revision was landed with ongoing or failed builds.May 23 2023, 2:10 AM
Closed by commit rG033690fffe8f: [RISCV] Make zfbfmin imply the F extension (authored by asb). · Explain Why
This revision was automatically updated to reflect the committed changes.
asb added a commit: rG033690fffe8f: [RISCV] Make zfbfmin imply the F extension.

Revision Contents

PathSize
llvm/
lib/
Support/
2 lines
test/
MC/
RISCV/
2 lines

Diff 524621

llvm/lib/Support/RISCVISAInfo.cpp

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static const char *ImpliedExtsV[] = {"zvl128b", "zve64d"}; static const char *ImpliedExtsV[] = {"zvl128b", "zve64d"};
static const char *ImpliedExtsXTHeadVdot[] = {"v"}; static const char *ImpliedExtsXTHeadVdot[] = {"v"};
static const char *ImpliedExtsXsfvcp[] = {"zve32x"}; static const char *ImpliedExtsXsfvcp[] = {"zve32x"};
static const char *ImpliedExtsZcb[] = {"zca"}; static const char *ImpliedExtsZcb[] = {"zca"};
static const char *ImpliedExtsZcmp[] = {"zca"}; static const char *ImpliedExtsZcmp[] = {"zca"};
static const char *ImpliedExtsZcmt[] = {"zca"}; static const char *ImpliedExtsZcmt[] = {"zca"};
static const char *ImpliedExtsZdinx[] = {"zfinx"}; static const char *ImpliedExtsZdinx[] = {"zfinx"};
static const char *ImpliedExtsZfa[] = {"f"}; static const char *ImpliedExtsZfa[] = {"f"};
static const char *ImpliedExtsZfbfmin[] = {"f"};
static const char *ImpliedExtsZfh[] = {"f"}; static const char *ImpliedExtsZfh[] = {"f"};
static const char *ImpliedExtsZfhmin[] = {"f"}; static const char *ImpliedExtsZfhmin[] = {"f"};
static const char *ImpliedExtsZfinx[] = {"zicsr"}; static const char *ImpliedExtsZfinx[] = {"zicsr"};
static const char *ImpliedExtsZhinx[] = {"zfinx"}; static const char *ImpliedExtsZhinx[] = {"zfinx"};
static const char *ImpliedExtsZhinxmin[] = {"zfinx"}; static const char *ImpliedExtsZhinxmin[] = {"zfinx"};
static const char *ImpliedExtsZicntr[] = {"zicsr"}; static const char *ImpliedExtsZicntr[] = {"zicsr"};
static const char *ImpliedExtsZihpm[] = {"zicsr"}; static const char *ImpliedExtsZihpm[] = {"zicsr"};
static const char *ImpliedExtsZk[] = {"zkn", "zkt", "zkr"}; static const char *ImpliedExtsZk[] = {"zkn", "zkt", "zkr"};
▲ Show 20 Lines • Show All 45 Lines • ▼ Show 20 Linesstatic constexpr ImpliedExtsEntry ImpliedExts[] = {
{{"v"}, {ImpliedExtsV}}, {{"v"}, {ImpliedExtsV}},
{{"xsfvcp"}, {ImpliedExtsXsfvcp}}, {{"xsfvcp"}, {ImpliedExtsXsfvcp}},
{{"xtheadvdot"}, {ImpliedExtsXTHeadVdot}}, {{"xtheadvdot"}, {ImpliedExtsXTHeadVdot}},
{{"zcb"}, {ImpliedExtsZcb}}, {{"zcb"}, {ImpliedExtsZcb}},
{{"zcmp"}, {ImpliedExtsZcmp}}, {{"zcmp"}, {ImpliedExtsZcmp}},
{{"zcmt"}, {ImpliedExtsZcmt}}, {{"zcmt"}, {ImpliedExtsZcmt}},
{{"zdinx"}, {ImpliedExtsZdinx}}, {{"zdinx"}, {ImpliedExtsZdinx}},
{{"zfa"}, {ImpliedExtsZfa}}, {{"zfa"}, {ImpliedExtsZfa}},
{{"zfbfmin"}, {ImpliedExtsZfbfmin}},
{{"zfh"}, {ImpliedExtsZfh}}, {{"zfh"}, {ImpliedExtsZfh}},
{{"zfhmin"}, {ImpliedExtsZfhmin}}, {{"zfhmin"}, {ImpliedExtsZfhmin}},
{{"zfinx"}, {ImpliedExtsZfinx}}, {{"zfinx"}, {ImpliedExtsZfinx}},
{{"zhinx"}, {ImpliedExtsZhinx}}, {{"zhinx"}, {ImpliedExtsZhinx}},
{{"zhinxmin"}, {ImpliedExtsZhinxmin}}, {{"zhinxmin"}, {ImpliedExtsZhinxmin}},
{{"zicntr"}, {ImpliedExtsZicntr}}, {{"zicntr"}, {ImpliedExtsZicntr}},
{{"zihpm"}, {ImpliedExtsZihpm}}, {{"zihpm"}, {ImpliedExtsZihpm}},
{{"zk"}, {ImpliedExtsZk}}, {{"zk"}, {ImpliedExtsZk}},
▲ Show 20 Lines • Show All 197 Lines • Show Last 20 Lines

llvm/test/MC/RISCV/attribute-arch.s

Show First 20 Lines • Show All 258 Lines • ▼ Show 20 Lines
# CHECK: attribute 5, "rv32i2p1_zicond1p0" # CHECK: attribute 5, "rv32i2p1_zicond1p0"
.attribute arch, "rv32i_smaia1p0" .attribute arch, "rv32i_smaia1p0"
# CHECK: attribute 5, "rv32i2p1_smaia1p0" # CHECK: attribute 5, "rv32i2p1_smaia1p0"
.attribute arch, "rv32i_ssaia1p0" .attribute arch, "rv32i_ssaia1p0"
# CHECK: attribute 5, "rv32i2p1_ssaia1p0" # CHECK: attribute 5, "rv32i2p1_ssaia1p0"
.attribute arch, "rv32if_zfbfmin0p6" .attribute arch, "rv32i_zfbfmin0p6"
# CHECK: .attribute 5, "rv32i2p1_f2p2_zicsr2p0_zfbfmin0p6" # CHECK: .attribute 5, "rv32i2p1_f2p2_zicsr2p0_zfbfmin0p6"
.attribute arch, "rv32i_zvfbfmin0p6" .attribute arch, "rv32i_zvfbfmin0p6"
# CHECK: .attribute 5, "rv32i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zvfbfmin0p6_zvl32b1p0" # CHECK: .attribute 5, "rv32i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zvfbfmin0p6_zvl32b1p0"
.attribute arch, "rv32i_zvfbfwma0p6" .attribute arch, "rv32i_zvfbfwma0p6"
# CHECK: .attribute 5, "rv32i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zvfbfwma0p6_zvl32b1p0" # CHECK: .attribute 5, "rv32i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zvfbfwma0p6_zvl32b1p0"