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[mlir][llvm] Store memory op metadata using op attributes.
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Authored by gysit on Feb 9 2023, 7:34 AM.

Details

Summary

The revision introduces operation attributes to store tbaa metadata on
load and store operations rather than relying using dialect attributes.
At the same time, the change also ensures the provided getters and
setters instead are used instead of a string based lookup. The latter
is done for the tbaa, access groups, and alias scope attributes.

The goal of this change is to ensure the metadata attributes are only
placed on operations that have the corresponding operation attributes.
This is imported since only these operations later on translate these
attributes to LLVM IR. Dialect attributes placed on other operations
are lost during the translation.

Diff Detail

Event Timeline

gysit created this revision.Feb 9 2023, 7:34 AM
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gysit requested review of this revision.Feb 9 2023, 7:34 AM
vzakhari accepted this revision.Feb 9 2023, 6:45 PM

Thank you, @gysit! LGTM

This revision is now accepted and ready to land.Feb 9 2023, 6:45 PM
Dinistro added inline comments.Feb 9 2023, 11:57 PM
mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
288–289

Ultra nit: this is no longer a reference.

mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
683

NIT: There is no reason to capture something in this lambda.

gysit updated this revision to Diff 496371.Feb 10 2023, 1:23 AM
gysit marked 2 inline comments as done.

Address review comments and add a helper class to set attibutes on specific op types.

gysit updated this revision to Diff 496387.Feb 10 2023, 2:06 AM

Rebase to retrigger the CI.

This revision was landed with ongoing or failed builds.Feb 10 2023, 6:29 AM
This revision was automatically updated to reflect the committed changes.
frgossen added inline comments.
mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
38–42

It seems that these are shared across multiple ops and I do not see an interface to manipulate them w/o type switching for all the possibilities (as is already done here).
I found a few use cases that rely on this currently. Would you mind reintroducing these?

frgossen added inline comments.Feb 10 2023, 12:26 PM
mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
38–42

This change broke our backend. LLVMIRIntrinsicGen.cpp::emitIntrinsic also allows for intrinsics to be included in alias scopes, but it now asserts at ModuleTranslation.cpp:1034 only supporting LoadOp|StoreOp.

@hgreving

I have seen these flags requiresAliasScope etc in the past but missed them when implementing the change. Sorry for the mess! Unfortunately there are no tests as well. I think the right way forward is probably to implement an aliasOp / memoryOp interface that provides proper accessors for these attributes. A short term solution may be to drop the type switch and go back to the string based attribute access in module translation?

mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
38–42

I though an interface would be a an overkill since only two ops have these attributes. Do you think it would be worth an interface?

I have no objection against adding the strings back.